/* * Intel ACPI Component Architecture * AML Disassembler version 20091214 * * Disassembly of ./SSDT-4.aml, Sun Jul 29 19:42:52 2012 * * * Original Table Header: * Signature "SSDT" * Length 0x00000144 (324) * Revision 0x01 * Checksum 0x76 * OEM ID "PmRefA" * OEM Table ID "CpuCst" * OEM Revision 0x00001000 (4096) * Compiler ID "INTL" * Compiler Version 0x20100331 (537920305) */ DefinitionBlock ("./SSDT-4.aml", "SSDT", 1, "PmRefA", "CpuCst", 0x00001000) { External (\_PR_.CPU7, DeviceObj) External (\_PR_.CPU6, DeviceObj) External (\_PR_.CPU5, DeviceObj) External (\_PR_.CPU4, DeviceObj) External (\_PR_.CPU3, DeviceObj) External (\_PR_.CPU2, DeviceObj) External (\_PR_.CPU1, DeviceObj) External (\_PR_.CPU0, DeviceObj) Scope (\_PR) { Name (CST, Package (0x04) { 0x03, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, One, 0x0001, 0x000003E8 }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000414, // Address ,) }, 0x02, 0x0040, 0x000001F4 }, Package (0x04) { ResourceTemplate () { Register (SystemIO, 0x08, // Bit Width 0x00, // Bit Offset 0x0000000000000415, // Address ,) }, 0x04, 0x0080, 0x000000C8 } }) } Scope (\_PR.CPU0) { Alias (CST, _CST) } Scope (\_PR.CPU1) { Alias (CST, _CST) } Scope (\_PR.CPU2) { Alias (CST, _CST) } Scope (\_PR.CPU3) { Alias (CST, _CST) } Scope (\_PR.CPU4) { Alias (CST, _CST) } Scope (\_PR.CPU5) { Alias (CST, _CST) } Scope (\_PR.CPU6) { Alias (CST, _CST) } Scope (\_PR.CPU7) { Alias (CST, _CST) } }