diff -xrevision -x.svn -x.DS_Store -x.config -Naur trunk/i386/libsaio/acpi_patcher.c trunkcleanup/i386/libsaio/acpi_patcher.c
--- trunk/i386/libsaio/acpi_patcher.c	2013-06-21 10:48:40.000000000 -0400
+++ trunkcleanup/i386/libsaio/acpi_patcher.c	2013-06-21 10:38:23.000000000 -0400
@@ -439,11 +439,10 @@
 			{
 				switch (Platform.CPU.Model) 
 				{
-					case CPU_MODEL_DOTHAN:	// Intel Pentium M
-					case CPU_MODEL_YONAH:	// Intel Mobile Core Solo, Duo
-					case CPU_MODEL_MEROM:	// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
-					case CPU_MODEL_PENRYN:	// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
-					case CPU_MODEL_ATOM:	// Intel Atom (45nm)
+					case CPU_MODEL_YONAH:
+					case CPU_MODEL_MEROM:
+					case CPU_MODEL_PENRYN:
+					case CPU_MODEL_ATOM:
 					{
 						bool cpu_dynamic_fsb = false;
 
@@ -561,20 +560,20 @@
 
 						break;
 					}
-					case CPU_MODEL_FIELDS:		// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
-					case CPU_MODEL_DALES:		
-					case CPU_MODEL_CLARKDALE:	// Intel Core i3, i5 LGA1156 (32nm)
-					case CPU_MODEL_NEHALEM:		// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
-					case CPU_MODEL_NEHALEM_EX:	// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65xx
-					case CPU_MODEL_WESTMERE:	// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
-					case CPU_MODEL_WESTMERE_EX:	// Intel Xeon E7
-					case CPU_MODEL_SANDYBRIDGE:	// Intel Core i3, i5, i7 LGA1155 (32nm)
-					case CPU_MODEL_SANDYBRIDGE_XEON:// Intel Core i7, Xeon E5 LGA2011 (32nm)
-					case CPU_MODEL_IVYBRIDGE:	// Intel Core i3, i5, i7 LGA1155 (22nm)
+					case CPU_MODEL_NEHALEM:
+					case CPU_MODEL_FIELDS:
+					case CPU_MODEL_DALES:
+					case CPU_MODEL_NEHALEM_EX:
+					case CPU_MODEL_DALES_32NM:
+					case CPU_MODEL_WESTMERE:
+					case CPU_MODEL_WESTMERE_EX:
+					case CPU_MODEL_SANDYBRIDGE:
+					case CPU_MODEL_JAKETOWN:
+					case CPU_MODEL_IVYBRIDGE:
 
 					{
 					if ((Platform.CPU.Model == CPU_MODEL_SANDYBRIDGE) ||
-						(Platform.CPU.Model == CPU_MODEL_SANDYBRIDGE_XEON))
+						(Platform.CPU.Model == CPU_MODEL_JAKETOWN))
 					{
 						 maximum.Control = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0xff;
 					} else {
diff -xrevision -x.svn -x.DS_Store -x.config -Naur trunk/i386/libsaio/cpu.c trunkcleanup/i386/libsaio/cpu.c
--- trunk/i386/libsaio/cpu.c	2013-06-21 10:48:40.000000000 -0400
+++ trunkcleanup/i386/libsaio/cpu.c	2013-06-21 09:50:37.000000000 -0400
@@ -370,30 +370,24 @@
 		if ((p->CPU.Family == 0x06 && p->CPU.Model >= 0x0c) || (p->CPU.Family == 0x0f && p->CPU.Model >= 0x03)) {
 			/* Nehalem CPU model */
 			if (p->CPU.Family == 0x06 && (p->CPU.Model == CPU_MODEL_NEHALEM		||
-										  p->CPU.Model == CPU_MODEL_FIELDS	||
-										  p->CPU.Model == CPU_MODEL_DALES	||
-										  p->CPU.Model == CPU_MODEL_CLARKDALE	||
-										  p->CPU.Model == CPU_MODEL_WESTMERE	||
-										  p->CPU.Model == CPU_MODEL_NEHALEM_EX	||
-										  p->CPU.Model == CPU_MODEL_WESTMERE_EX ||
-										  p->CPU.Model == CPU_MODEL_SANDYBRIDGE ||
-										  p->CPU.Model == CPU_MODEL_SANDYBRIDGE_XEON ||
-										  p->CPU.Model == CPU_MODEL_IVYBRIDGE_XEON	||
-										  p->CPU.Model == CPU_MODEL_IVYBRIDGE  ||
-										  p->CPU.Model == CPU_MODEL_HASWELL_DT  ||
-										  p->CPU.Model == CPU_MODEL_HASWELL_MB  ||
-										  //p->CPU.Model == CPU_MODEL_HASWELL_H  ||
-										  p->CPU.Model == CPU_MODEL_HASWELL_ULT  ||
-										  p->CPU.Model == CPU_MODEL_HASWELL_ULX ))
+						      p->CPU.Model == CPU_MODEL_FIELDS		||
+						      p->CPU.Model == CPU_MODEL_DALES		||
+						      p->CPU.Model == CPU_MODEL_NEHALEM_EX	||
+						      p->CPU.Model == CPU_MODEL_DALES_32NM	||
+						      p->CPU.Model == CPU_MODEL_WESTMERE	||
+						      p->CPU.Model == CPU_MODEL_WESTMERE_EX	||
+						      p->CPU.Model == CPU_MODEL_SANDYBRIDGE	||
+						      p->CPU.Model == CPU_MODEL_JAKETOWN	||
+						      p->CPU.Model == CPU_MODEL_IVYBRIDGE	))
 			{
 				msr = rdmsr64(MSR_PLATFORM_INFO);
 				DBG("msr(%d): platform_info %08x\n", __LINE__, bitfield(msr, 31, 0));
-				bus_ratio_max = bitfield(msr, 14, 8);
-				bus_ratio_min = bitfield(msr, 46, 40); //valv: not sure about this one (Remarq.1)
+				bus_ratio_max = bitfield(msr, 15, 8);
+				bus_ratio_min = bitfield(msr, 47, 40);
 				msr = rdmsr64(MSR_FLEX_RATIO);
 				DBG("msr(%d): flex_ratio %08x\n", __LINE__, bitfield(msr, 31, 0));
 				if (bitfield(msr, 16, 16)) {
-					flex_ratio = bitfield(msr, 14, 8);
+					flex_ratio = bitfield(msr, 15, 8);
 					/* bcc9: at least on the gigabyte h67ma-ud2h,
 					 where the cpu multipler can't be changed to
 					 allow overclocking, the flex_ratio msr has unexpected (to OSX)
diff -xrevision -x.svn -x.DS_Store -x.config -Naur trunk/i386/libsaio/cpu.h trunkcleanup/i386/libsaio/cpu.h
--- trunk/i386/libsaio/cpu.h	2013-06-21 10:48:40.000000000 -0400
+++ trunkcleanup/i386/libsaio/cpu.h	2013-06-21 08:55:00.000000000 -0400
@@ -42,40 +42,22 @@
 
 // CPUID Values
 
-#define CPUID_MODEL_PRESCOTT		3   // 0x03 Celeron D, Pentium 4 (90nm)
-#define CPUID_MODEL_NOCONA		4   // 0x04 Xeon Nocona, Irwindale (90nm)
-#define CPUID_MODEL_PRESLER		6   // 0x06 Pentium 4, Pentium D (65nm)
-#define CPUID_MODEL_PENTIUM_M		9   // 0x09
-#define CPUID_MODEL_DOTHAN		13  // 0x0D Dothan
-#define CPUID_MODEL_YONAH		14  // 0x0E Intel Mobile Core Solo, Duo
-#define CPUID_MODEL_MEROM		15  // 0x0F Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
-#define CPUID_MODEL_CONROE		15  // 0x0F
-#define CPUID_MODEL_CELERON		22  // 0x16
-#define CPUID_MODEL_PENRYN		23  // 0x17 Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
-#define CPUID_MODEL_WOLFDALE		23  // 0x17
-#define CPUID_MODEL_NEHALEM		26  // 0x1A Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
-#define CPUID_MODEL_ATOM		28  // 0x1C Intel Atom (45nm) Pineview, Silverthorne
-#define CPUID_MODEL_XEON_MP		29  // 0x1D MP 7400
-#define CPUID_MODEL_FIELDS		30  // 0x1E Intel Core i5, i7, Xeon X34xx LGA1156 (45nm),(Clarksfiled, Lynnfield, Jasper Forest)
-#define CPUID_MODEL_DALES		31  // 0x1F Havendale, Auburndale
-#define CPUID_MODEL_CLARKDALE		37  // 0x25 Intel Core i3, i5 LGA1156 (32nm), (Arrandale, Clarksdale)
-#define CPUID_MODEL_ATOM_SAN		38  // 0x26
-#define CPUID_MODEL_LINCROFT		39  // 0x27 Intel Atom (45nm) Z6xx (single core)
-#define CPUID_MODEL_SANDYBRIDGE		42  // 0x2A Intel Core i3, i5, i7 LGA1155 (32nm)
-#define CPUID_MODEL_WESTMERE		44  // 0x2C Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
-#define CPUID_MODEL_SANDYBRIDGE_XEON	45  // 0x2D Intel Xeon E5 LGA2011 (32nm), SandyBridge-E, SandyBridge-EN, SandyBridge-EP
-#define CPUID_MODEL_NEHALEM_EX		46  // 0x2E Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x
-#define CPUID_MODEL_WESTMERE_EX		47  // 0x2F Intel Xeon E7
-#define CPUID_MODEL_ATOM_2000		54  // 0x36 Intel Atom (32nm) Cedarview
-#define CPUID_MODEL_IVYBRIDGE		58  // 0x3A Intel Core i5, i7 LGA1155 (22nm)
-#define CPUID_MODEL_HASWELL_DT		60  // 0x3C
-#define CPUID_MODEL_IVYBRIDGE_XEON	62  // 0x3E
-#define CPUID_MODEL_HASWELL_MB		63  // 0x3F
-//#define CPUID_MODEL_HASWELL_H		??  // 0x??
-#define CPUID_MODEL_HASWELL_ULT		69  // 0x45
-#define CPUID_MODEL_HASWELL_ULX		70  // 0x46
-
-/* HASWELL-DT HASWELL-MB HASWELL-H HASWELL-ULT HASWELL ULX*/
+#define CPUID_MODEL_YONAH	14
+#define CPUID_MODEL_MEROM	15
+#define CPUID_MODEL_PENRYN	23
+#define CPUID_MODEL_NEHALEM	26
+#define CPUID_MODEL_ATOM	28
+#define CPUID_MODEL_ATOM_Z6	38
+#define CPUID_MODEL_ATOM_32NM	54
+#define CPUID_MODEL_FIELDS	30
+#define CPUID_MODEL_DALES	31
+#define CPUID_MODEL_NEHALEM_EX	46
+#define CPUID_MODEL_DALES_32NM	37
+#define CPUID_MODEL_WESTMERE	44
+#define CPUID_MODEL_WESTMERE_EX	47
+#define CPUID_MODEL_SANDYBRIDGE	42
+#define CPUID_MODEL_JAKETOWN	45
+#define CPUID_MODEL_IVYBRIDGE	58
 
 static inline uint64_t rdtsc64(void)
 {
diff -xrevision -x.svn -x.DS_Store -x.config -Naur trunk/i386/libsaio/platform.h trunkcleanup/i386/libsaio/platform.h
--- trunk/i386/libsaio/platform.h	2013-06-21 10:48:40.000000000 -0400
+++ trunkcleanup/i386/libsaio/platform.h	2013-06-21 08:59:47.000000000 -0400
@@ -30,38 +30,22 @@
 #define CPUID_88			9
 #define CPUID_MAX			10
 
-#define CPU_MODEL_PRESCOTT		0x03			// Celeron D, Pentium 4 (90nm)
-#define CPU_MODEL_NOCONA		0x04			// Xeon Nocona, Irwindale (90nm)
-#define CPU_MODEL_PRESLER		0x06			// Pentium 4, Pentium D (65nm)
-#define CPU_MODEL_PENTIUM_M		0x09			// Banias
-#define CPU_MODEL_DOTHAN		0x0D			// Dothan
-#define CPU_MODEL_YONAH			0x0E			// Sossaman, Yonah
-#define CPU_MODEL_MEROM			0x0F			// Allendale, Conroe, Kentsfield, Woodcrest, Clovertown, Tigerton, Merom
-#define CPU_MODEL_CONROE		0x0F			// 
-#define CPU_MODEL_CELERON		0x16			// 
-#define CPU_MODEL_PENRYN		0x17			// Wolfdale, Yorkfield, Harpertown, Penryn
-#define CPU_MODEL_WOLFDALE		0x17			// 
-#define CPU_MODEL_NEHALEM		0x1A			// Bloomfield. Nehalem-EP, Nehalem-WS, Gainestown
-#define CPU_MODEL_ATOM			0x1C			// Pineview
-#define CPU_MODEL_XEON_MP		0x1D			// MP 7400
-#define CPU_MODEL_FIELDS		0x1E			// Lynnfield, Clarksfield, Jasper Forest
-#define CPU_MODEL_DALES			0x1F			// Havendale, Auburndale
-#define CPU_MODEL_CLARKDALE		0x25			// Clarkdale, Arrandale
-#define CPU_MODEL_ATOM_SAN		0x26			// Lincroft
-#define CPU_MODEL_LINCROFT		0x27			// 
-#define CPU_MODEL_SANDYBRIDGE		0x2A			// Sandy Bridge
-#define CPU_MODEL_WESTMERE		0x2C			// Gulftown, Westmere-EP, Westmere-WS
-#define CPU_MODEL_SANDYBRIDGE_XEON	0x2D			// Sandy Bridge-E, Sandy Bridge-EP
-#define CPU_MODEL_NEHALEM_EX		0x2E			// Beckton
-#define CPU_MODEL_WESTMERE_EX		0x2F			// Westmere-EX
-#define CPU_MODEL_ATOM_2000		0x36			// Cedarview
-#define CPU_MODEL_IVYBRIDGE		0x3A			// Ivy Bridge
-#define CPU_MODEL_HASWELL_DT		0x3C			// Haswell DT
-#define CPU_MODEL_IVYBRIDGE_XEON	0x3E			// Ivy Bridge Xeon
-#define CPU_MODEL_HASWELL_MB		0x3F			// Haswell MB
-//#define CPU_MODEL_HASWELL_H		0x??			// Haswell H
-#define CPU_MODEL_HASWELL_ULT		0x45			// Haswell ULT
-#define CPU_MODEL_HASWELL_ULX		0x46			// Haswell ULX
+#define CPU_MODEL_YONAH		0x0E
+#define CPU_MODEL_MEROM		0x0F
+#define CPU_MODEL_PENRYN	0x17
+#define CPU_MODEL_NEHALEM	0x1A
+#define CPU_MODEL_ATOM		0x1C
+#define CPU_MODEL_ATOM_Z6	0x26
+#define CPU_MODEL_ATOM_32NM	0x36
+#define CPU_MODEL_FIELDS	0x1E
+#define CPU_MODEL_DALES		0x1F
+#define CPU_MODEL_NEHALEM_EX	0x2E
+#define CPU_MODEL_DALES_32NM	0x25
+#define CPU_MODEL_WESTMERE	0x2C
+#define CPU_MODEL_WESTMERE_EX	0x2F
+#define CPU_MODEL_SANDYBRIDGE	0x2A
+#define CPU_MODEL_JAKETOWN	0x2D
+#define CPU_MODEL_IVYBRIDGE	0x3A
 
 /* CPU Features */
 #define CPU_FEATURE_MMX			0x00000001		// MMX Instruction Set
diff -xrevision -x.svn -x.DS_Store -x.config -Naur trunk/i386/libsaio/smbios.c trunkcleanup/i386/libsaio/smbios.c
--- trunk/i386/libsaio/smbios.c	2013-06-21 10:48:40.000000000 -0400
+++ trunkcleanup/i386/libsaio/smbios.c	2013-06-21 10:47:58.000000000 -0400
@@ -325,30 +325,30 @@
 					{
 						switch (Platform.CPU.Model)
 						{
-							case CPU_MODEL_FIELDS:			// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
+							case CPU_MODEL_FIELDS:
 							case CPU_MODEL_DALES:
-							case CPU_MODEL_CLARKDALE:		// Intel Core i3, i5 LGA1156 (32nm)
+							case CPU_MODEL_DALES_32NM:
 								defaultBIOSInfo.version			= kDefaultiMacNehalemBIOSVersion;
 								defaultSystemInfo.productName	= kDefaultiMacNehalem;
 								defaultSystemInfo.family		= kDefaultiMacFamily;
 								break;
 
-							case CPU_MODEL_SANDYBRIDGE:			// Intel Core i3, i5, i7 LGA1155 (32nm)
-							case CPU_MODEL_SANDYBRIDGE_XEON:			// Intel Core i7, Xeon E5 LGA2011 (32nm)
-							case CPU_MODEL_IVYBRIDGE:			// Intel Core i3, i5, i7 LGA1155 (22nm)
+							case CPU_MODEL_SANDYBRIDGE:
+							case CPU_MODEL_JAKETOWN:
+							case CPU_MODEL_IVYBRIDGE:
 								defaultBIOSInfo.version			= kDefaultiMacSandyBIOSVersion;
 								defaultSystemInfo.productName	= kDefaultiMacSandy;
 								defaultSystemInfo.family		= kDefaultiMacFamily;
 								break;
-							case CPU_MODEL_NEHALEM:			// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
-							case CPU_MODEL_NEHALEM_EX:		// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x
+							case CPU_MODEL_NEHALEM:
+							case CPU_MODEL_NEHALEM_EX:
 								defaultBIOSInfo.version			= kDefaultMacProNehalemBIOSVersion;
 								defaultSystemInfo.productName	= kDefaultMacProNehalem;
 								defaultSystemInfo.family		= kDefaultMacProFamily;
 								break;
 
-							case CPU_MODEL_WESTMERE:		// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
-							case CPU_MODEL_WESTMERE_EX:		// Intel Xeon E7
+							case CPU_MODEL_WESTMERE:
+							case CPU_MODEL_WESTMERE_EX:
 								defaultBIOSInfo.version			= kDefaultMacProWestmereBIOSVersion;
 								defaultBIOSInfo.releaseDate		= kDefaulMacProWestmereBIOSReleaseDate;
 								defaultSystemInfo.productName	= kDefaultMacProWestmere;
@@ -569,17 +569,15 @@
 		{
 			switch (Platform.CPU.Model)
 			{
-				case CPU_MODEL_FIELDS:		// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
+				case CPU_MODEL_NEHALEM:
+				case CPU_MODEL_FIELDS:
 				case CPU_MODEL_DALES:
-				case CPU_MODEL_CLARKDALE:	// Intel Core i3, i5 LGA1156 (32nm)
-				case CPU_MODEL_NEHALEM:		// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
-				case CPU_MODEL_NEHALEM_EX:	// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x
-				case CPU_MODEL_WESTMERE:	// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
-				case CPU_MODEL_WESTMERE_EX:	// Intel Xeon E7
-				case CPU_MODEL_SANDYBRIDGE:	// Intel Core i3, i5, i7 LGA1155 (32nm)
-				case CPU_MODEL_IVYBRIDGE:	// Intel Core i3, i5, i7 LGA1155 (22nm)
-				case CPU_MODEL_IVYBRIDGE_XEON:
-				case CPU_MODEL_SANDYBRIDGE_XEON:// Intel Core i7, Xeon E5 LGA2011 (32nm)
+				case CPU_MODEL_NEHALEM_EX:
+				case CPU_MODEL_DALES_32NM:
+				case CPU_MODEL_WESTMERE:
+				case CPU_MODEL_WESTMERE_EX:
+				case CPU_MODEL_SANDYBRIDGE:
+				case CPU_MODEL_JAKETOWN:
 					break;
 
 				default:
diff -xrevision -x.svn -x.DS_Store -x.config -Naur trunk/i386/libsaio/smbios_getters.c trunkcleanup/i386/libsaio/smbios_getters.c
--- trunk/i386/libsaio/smbios_getters.c	2013-06-21 10:48:40.000000000 -0400
+++ trunkcleanup/i386/libsaio/smbios_getters.c	2013-06-21 11:14:07.000000000 -0400
@@ -32,7 +32,7 @@
 						// set external clock to 0 for SANDY
 						// removes FSB info from system profiler as on real mac's.     
 					case CPU_MODEL_SANDYBRIDGE:
-					case CPU_MODEL_IVYBRIDGE_XEON:
+					case CPU_MODEL_JAKETOWN:
 					case CPU_MODEL_IVYBRIDGE:
 						value->word = 0;
 						break;
@@ -70,20 +70,19 @@
 			{
 				switch (Platform.CPU.Model)
 				{
-					case CPU_MODEL_DOTHAN:		// Intel Pentium M
-					case CPU_MODEL_YONAH:		// Intel Mobile Core Solo, Duo
-					case CPU_MODEL_MEROM:		// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
-					case CPU_MODEL_PENRYN:		// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
-					case CPU_MODEL_ATOM:		// Intel Atom (45nm)
+					case CPU_MODEL_YONAH:
+					case CPU_MODEL_MEROM:
+					case CPU_MODEL_PENRYN:
+					case CPU_MODEL_ATOM:
 						return false;
 
-					case CPU_MODEL_NEHALEM:		// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
-					case CPU_MODEL_FIELDS:		// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
+					case CPU_MODEL_NEHALEM:
+					case CPU_MODEL_FIELDS:
 					case CPU_MODEL_DALES:
-					case CPU_MODEL_CLARKDALE:	// Intel Core i3, i5 LGA1156 (32nm)
-					case CPU_MODEL_WESTMERE:	// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
-					case CPU_MODEL_NEHALEM_EX:	// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x
-					case CPU_MODEL_WESTMERE_EX:	// Intel Xeon E7
+					case CPU_MODEL_NEHALEM_EX:
+					case CPU_MODEL_DALES_32NM:
+					case CPU_MODEL_WESTMERE:
+					case CPU_MODEL_WESTMERE_EX:
 					{
 						// thanks to dgobe for i3/i5/i7 bus speed detection
 						int nhm_bus = 0x3F;
@@ -156,17 +155,17 @@
 			{
 				switch (Platform.CPU.Model)
 				{
-					case CPU_MODEL_DOTHAN:				// Intel Pentium M
-					case CPU_MODEL_YONAH:				// Intel Mobile Core Solo, Duo
-					case CPU_MODEL_MEROM:				// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
-					case CPU_MODEL_PENRYN:				// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
-					case CPU_MODEL_ATOM:				// Intel Atom (45nm)
+					case CPU_MODEL_YONAH:
+					case CPU_MODEL_MEROM:
+					case CPU_MODEL_PENRYN:
+					case CPU_MODEL_ATOM:
 						return true;
 
-					case CPU_MODEL_NEHALEM:				// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
-					case CPU_MODEL_WESTMERE:			// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
-					case CPU_MODEL_WESTMERE_EX:			// Intel Xeon E7
-					case CPU_MODEL_SANDYBRIDGE_XEON:			// Intel Core i7, Xeon E5-xxxx LGA2011 (32nm)
+					case CPU_MODEL_NEHALEM: 
+					case CPU_MODEL_NEHALEM_EX:
+					case CPU_MODEL_WESTMERE:
+					case CPU_MODEL_WESTMERE_EX:
+					case CPU_MODEL_JAKETOWN:
 						if (strstr(Platform.CPU.BrandString, "Xeon(R)"))
 							value->word = 0x0501;			// Xeon 
 						else
@@ -190,9 +189,9 @@
 							value->word = 0x0701;			// Core i7
 						return true;
 
-					case CPU_MODEL_SANDYBRIDGE:			// Intel Core i3, i5, i7 LGA1155 (32nm)
-					case CPU_MODEL_IVYBRIDGE:			// Intel Core i3, i5, i7 LGA1155 (22nm)
-					case CPU_MODEL_CLARKDALE:			// Intel Core i3, i5 LGA1156 (32nm)
+					case CPU_MODEL_DALES_32NM:
+					case CPU_MODEL_SANDYBRIDGE:
+					case CPU_MODEL_IVYBRIDGE:
 						if (strstr(Platform.CPU.BrandString, "Core(TM) i3"))
 							value->word = 0x0901;			// Core i3
 						else
diff -xrevision -x.svn -x.DS_Store -x.config -Naur trunk/i386/modules/AcpiCodec/acpi_codec.c trunkcleanup/i386/modules/AcpiCodec/acpi_codec.c
--- trunk/i386/modules/AcpiCodec/acpi_codec.c	2013-06-21 10:48:44.000000000 -0400
+++ trunkcleanup/i386/modules/AcpiCodec/acpi_codec.c	2013-06-21 10:41:42.000000000 -0400
@@ -778,7 +778,7 @@
 
 static bool is_jaketown(void)
 {
-    return Platform.CPU.Model == CPU_MODEL_SANDYBRIDGE_XEON;
+    return Platform.CPU.Model == CPU_MODEL_JAKETOWN;
 }
 
 static U32 get_bclk(void)
@@ -1069,11 +1069,10 @@
 		{
 			switch (Platform.CPU.Model) 
 			{
-				case CPU_MODEL_DOTHAN: 
-				case CPU_MODEL_YONAH: // Yonah
-				case CPU_MODEL_MEROM: // Merom
-				case CPU_MODEL_PENRYN: // Penryn
-				case CPU_MODEL_ATOM: // Intel Atom (45nm)
+				case CPU_MODEL_YONAH:
+				case CPU_MODEL_MEROM:
+				case CPU_MODEL_PENRYN:
+				case CPU_MODEL_ATOM:
 				{
 					
 					cpu->core_c1_supported = ((sub_Cstates >> 4) & 0xf) ? 1 : 0;
@@ -1119,15 +1118,15 @@
 					
 					break;
 				} 
+				case CPU_MODEL_NEHALEM:
 				case CPU_MODEL_FIELDS:
 				case CPU_MODEL_DALES:
-				case CPU_MODEL_CLARKDALE:
-				case CPU_MODEL_NEHALEM: 
 				case CPU_MODEL_NEHALEM_EX:
+				case CPU_MODEL_DALES_32NM:
 				case CPU_MODEL_WESTMERE:
 				case CPU_MODEL_WESTMERE_EX:
 				case CPU_MODEL_SANDYBRIDGE:
-				case CPU_MODEL_SANDYBRIDGE_XEON:
+				case CPU_MODEL_JAKETOWN:
 				{		
 					
 					cpu->core_c1_supported = ((sub_Cstates >> 4) & 0xf) ? 1 : 0;
@@ -1330,11 +1329,10 @@
 			{
 				switch (Platform.CPU.Model) 
 				{
-					case CPU_MODEL_DOTHAN: 
-					case CPU_MODEL_YONAH: // Yonah
-					case CPU_MODEL_MEROM: // Merom
-					case CPU_MODEL_PENRYN: // Penryn
-					case CPU_MODEL_ATOM: // Intel Atom (45nm)
+					case CPU_MODEL_YONAH:
+					case CPU_MODEL_MEROM:
+					case CPU_MODEL_PENRYN:
+					case CPU_MODEL_ATOM:
 					{
 						bool cpu_dynamic_fsb = false;
 						
@@ -1453,15 +1451,15 @@
 						}
 						break;
 					} 
+					case CPU_MODEL_NEHALEM:
 					case CPU_MODEL_FIELDS:
 					case CPU_MODEL_DALES:
-					case CPU_MODEL_CLARKDALE:
-					case CPU_MODEL_NEHALEM: 
 					case CPU_MODEL_NEHALEM_EX:
+					case CPU_MODEL_DALES_32NM:
 					case CPU_MODEL_WESTMERE:
 					case CPU_MODEL_WESTMERE_EX:
 					case CPU_MODEL_SANDYBRIDGE:
-					case CPU_MODEL_SANDYBRIDGE_XEON:
+					case CPU_MODEL_JAKETOWN:
 					{		
 						
 						maximum.Control = rdmsr64(MSR_IA32_PERF_STATUS) & 0xff; // Seems it always contains maximum multiplier value (with turbo, that's we need)...
