Chameleon

Chameleon Commit Details

Date:2011-06-20 22:45:14 (12 years 10 months ago)
Author:Azimutz
Commit:1031
Parents: 1030
Message:Rest of the code changes from r969 on. Folder now matches trunk as close as possible. Not tested yet!
Changes:
M/branches/azimutz/Chazi/i386/libsaio/convert.c
M/branches/azimutz/Chazi/i386/modules/Memory/spd.c
M/branches/azimutz/Chazi/i386/modules/Memory/Memory.c
M/branches/azimutz/Chazi/i386/boot2/gui.c
M/branches/azimutz/Chazi/i386/modules/GraphicsEnabler/AMDGraphicsEnabler/ati.c
M/branches/azimutz/Chazi/i386/libsaio/fake_efi.c
M/branches/azimutz/Chazi/i386/libsaio/platform.h
M/branches/azimutz/Chazi/i386/libsaio/smbios_getters.c
M/branches/azimutz/Chazi/i386/libsaio/smbios.c
M/branches/azimutz/Chazi/i386/libsaio/bootstruct.h

File differences

branches/azimutz/Chazi/i386/libsaio/bootstruct.h
4343
4444
4545
46
4647
48
49
50
4751
4852
4953
......
136140
137141
138142
143
144
139145
140146
141147
//extern Node *efiPlatformNode; //Azi: test␊
␊
#define VGA_TEXT_MODE 0␊
//defined in /usr/../boot.h␉␉//Azi:--- ??␊
␊
//#define GRAPHICS_MODE 1␊
//#define FB_TEXT_MODE 2␊
␊
/*␊
* Maximum number of boot drivers that can be loaded.␊
*/␊
config_file_t smbiosConfig;␉␉␉␉ // smbios.plist␊
config_file_t helperConfig; // boot helper partition's boot.plist␊
config_file_t ramdiskConfig; // RAMDisk.plist␊
␊
␉bool memDetect;␊
} PrivateBootInfo_t;␊
␊
extern PrivateBootInfo_t *bootInfo;␊
branches/azimutz/Chazi/i386/libsaio/platform.h
153153
154154
155155
156
156
157157
158158
159159
␊
␉struct DMI␊
␉{␊
␉␉int␉␉␉␉␉␉MaxMemorySlots;␉␉␉// number of memory slots polulated by SMBIOS␊
␉␉int␉␉␉␉␉␉MaxMemorySlots;␉␉␉// number of memory slots populated by SMBIOS␊
␉␉int␉␉␉␉␉␉CntMemorySlots;␉␉␉// number of memory slots counted␊
␉␉int␉␉␉␉␉␉MemoryModules;␉␉␉// number of memory modules installed␊
␉␉int␉␉␉␉␉␉DIMM[MAX_RAM_SLOTS];␉// Information and SPD mapping for each slot␊
branches/azimutz/Chazi/i386/libsaio/smbios.c
6565
6666
6767
68
68
6969
7070
7171
......
451451
452452
453453
454
455
456
457
458
459
454460
455461
456462
......
463469
464470
465471
472
473
466474
467475
468476
......
496504
497505
498506
499
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
500526
501
502
503
504
527
505528
529
506530
507531
508532
......
570594
571595
572596
573
597
598
574599
575600
576601
// Default SMBIOS Data␊
//-------------------------------------------------------------------------------------------------------------------------␊
/* Rewrite: use a struct */␊
␊
␉␉␉␉␉␉␉␉␉//Azi: carefully review against trunk and ioreg dumps.␊
#define kDefaultVendorManufacturer␉␉␉␉␉"Apple Inc."␊
#define kDefaultBIOSReleaseDate␉␉␉␉␉␉"11/06/2009"␊
#define kDefaultSerialNumber␉␉␉␉␉␉"SOMESRLNMBR"␊
␉// remove any spaces found at the end␊
␉while ((strSize != 0) && (string[strSize - 1] == ' '))␊
␉␉strSize--;␊
␉␊
␉if (strSize == 0)␊
␉{␊
␉␉*field = 0;␊
␉␉return;␊
␉}␊
␊
␉memcpy((uint8_t *)structHeader + structHeader->length + stringsSize, string, strSize);␊
␉*field = stringIndex;␊
{␊
␉const char *string = 0;␊
␉int len;␊
␉bool parsed;␊
␉int val;␊
␊
␉if (numOfSetters <= idx)␊
␉␉return false;␊
␉␉//case kSMBQWord:␊
␉␉␉if (SMBSetters[idx].keyString)␊
␉␉␉{␊
␉␉␉␉if (getIntForKey(SMBSetters[idx].keyString, (int *)&(value->dword), SMBPlist))␊
␉␉␉␉parsed = getIntForKey(SMBSetters[idx].keyString, &val, SMBPlist);␊
␉␉␉␉if (!parsed)␊
␉␉␉␉␉if (structPtr->orig->type == kSMBTypeMemoryDevice)␉// MemoryDevice only␊
␉␉␉␉␉␉parsed = getSMBValueForKey(structPtr->orig, SMBSetters[idx].keyString, NULL, (returnType *)&val);␊
␉␉␉␉if (parsed)␊
␉␉␉␉{␊
␉␉␉␉␉switch (SMBSetters[idx].valueType)␊
␉␉␉␉␉{␊
␉␉␉␉␉␉case kSMBByte:␊
␉␉␉␉␉␉␉value->byte = (uint8_t)val;␊
␉␉␉␉␉␉␉break;␊
␉␉␉␉␉␉case kSMBWord:␊
␉␉␉␉␉␉␉value->word = (uint16_t)val;␊
␉␉␉␉␉␉␉break;␊
␉␉␉␉␉␉case kSMBDWord:␊
␉␉␉␉␉␉default:␊
␉␉␉␉␉␉␉value->dword = (uint32_t)val;␊
␉␉␉␉␉␉␉break;␊
␉␉␉␉␉}␊
␉␉␉␉␉return true;␊
␉␉␉␉else␊
␉␉␉␉␉if (structPtr->orig->type == kSMBTypeMemoryDevice)␉// MemoryDevice only␊
␉␉␉␉␉␉if (getSMBValueForKey(structPtr->orig, SMBSetters[idx].keyString, NULL, value))␊
␉␉␉␉␉␉␉return true;␊
␉␉␉␉}␊
␉␉␉}␊
␉␉␉␊
␉␉␉if (SMBSetters[idx].getSMBValue)␊
␉␉␉␉if (SMBSetters[idx].getSMBValue(value))␊
␉␉␉␉␉return true;␊
␉␉␉␉case CPU_MODEL_WESTMERE:␉// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core␊
␉␉␉␉case CPU_MODEL_WESTMERE_EX:␉// Intel Xeon E7␊
␉␉␉␉␉break;␊
␉␉␉␉␉default:␊
␉␉␉␉␊
␉␉␉␉default:␊
␉␉␉␉␉return;␊
␉␉␉}␊
␉␉}␊
branches/azimutz/Chazi/i386/libsaio/convert.c
2222
2323
2424
25
25
2626
27
28
27
28
2929
30
30
3131
32
33
32
33
3434
35
35
3636
3737
3838
......
4545
4646
4747
48
48
4949
5050
5151
}␊
␊
/** Parse an UUID string into an (EFI_CHAR8*) buffer */␊
EFI_CHAR8* getUUIDFromString(const char *source)␊
EFI_CHAR8*␉getUUIDFromString(const char *source)␊
{␊
if (!source) return 0;␊
␊
␉if (!source) return 0;␊
␉␊
␉char␉*p = (char *)source;␊
␉int␉i;␊
␉int␉␉i;␊
␉char␉buf[3];␊
␉static EFI_CHAR8 uuid[UUID_LEN+1]="";␊
␊
␉static EFI_CHAR8 uuid[UUID_LEN + 1] = "";␊
␉␊
␉buf[2] = '\0';␊
␉for (i=0; i<UUID_LEN; i++) {␊
␉for (i = 0; i < UUID_LEN; i++) {␊
␉␉if (p[0] == '\0' || p[1] == '\0' || !isxdigit(p[0]) || !isxdigit(p[1])) {␊
␉␉␉verbose("[ERROR] UUID='%s' syntax error\n", source);␊
␉␉␉return 0;␊
␉␉}␊
␉}␊
␉uuid[UUID_LEN]='\0';␊
␊
␉␊
␉if (*p != '\0') {␊
␉␉verbose("[ERROR] UUID='%s' syntax error\n", source);␊
␉␉return 0;␊
branches/azimutz/Chazi/i386/libsaio/fake_efi.c
528528
529529
530530
531
531
532532
533533
534534
␉}␊
␉␊
␉if (!ret) // no bios dmi UUID available, set a fixed value for system-id␊
␉␉ret=getUUIDFromString((sysId = (const char*) SYSTEM_ID));␊
␉␉ret = getUUIDFromString((sysId = (const char*) SYSTEM_ID));␊
␉␊
␉// apply a nice formatting to the displayed output␊
␉verbose("Customizing SystemID with : %s\n", getStringFromUUID(ret));␊
branches/azimutz/Chazi/i386/libsaio/smbios_getters.c
66
77
88
9
910
1011
1112
......
4142
4243
4344
44
45
46
47
45
46
47
48
4849
4950
5051
51
52
53
54
55
56
57
52
53
54
55
56
57
58
5859
5960
6061
......
143144
144145
145146
146
147
147148
148149
149150
150151
151152
152153
153
154
154155
155156
156157
......
159160
160161
161162
162
163
163164
164165
165
166
166167
167168
168169
......
173174
174175
175176
176
177
177178
178179
179180
......
244245
245246
246247
247
248
249
248
249
250
251
252
250253
251254
252255
......
255258
256259
257260
261
262
263
258264
259265
260266
......
266272
267273
268274
269
270
271
275
276
277
278
279
272280
273281
274282
......
288296
289297
290298
291
292
293
299
300
301
302
303
294304
295305
296306
*/␊
␊
#include "smbios_getters.h"␊
#include "bootstruct.h"␊
␊
#ifndef DEBUG_SMBIOS␊
#define DEBUG_SMBIOS 0␊
␉␉␉␉switch (Platform.CPU.Model)␊
␉␉␉␉{␊
␉␉␉␉␉case 0x0D:␉␉␉␉␉// ???␊
␉␉␉␉␉case CPU_MODEL_YONAH:␉␉// Yonah␉␉0x0E␊
␉␉␉␉␉case CPU_MODEL_MEROM:␉␉// Merom␉␉0x0F␊
␉␉␉␉␉case CPU_MODEL_PENRYN:␉␉// Penryn␉␉0x17␊
␉␉␉␉␉case CPU_MODEL_ATOM:␉␉// Atom 45nm␉0x1C␊
␉␉␉␉␉case CPU_MODEL_YONAH:␉␉// Intel Mobile Core Solo, Duo␊
␉␉␉␉␉case CPU_MODEL_MEROM:␉␉// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx␊
␉␉␉␉␉case CPU_MODEL_PENRYN:␉␉// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx␊
␉␉␉␉␉case CPU_MODEL_ATOM:␉␉// Intel Atom (45nm)␊
␉␉␉␉␉␉return false;␊
␊
␉␉␉␉␉case 0x19:␉␉␉␉␉// ??? Intel Core i5 650 @3.20 GHz ␊
␉␉␉␉␉case CPU_MODEL_NEHALEM:␉␉// Intel Core i7 LGA1366 (45nm)␊
␉␉␉␉␉case CPU_MODEL_FIELDS:␉␉// Intel Core i5, i7 LGA1156 (45nm)␊
␉␉␉␉␉case CPU_MODEL_DALES:␉␉// Intel Core i5, i7 LGA1156 (45nm) ???␊
␉␉␉␉␉case CPU_MODEL_DALES_32NM:␉// Intel Core i3, i5, i7 LGA1156 (32nm)␊
␉␉␉␉␉case CPU_MODEL_WESTMERE:␉// Intel Core i7 LGA1366 (32nm) 6 Core␊
␉␉␉␉␉case CPU_MODEL_NEHALEM_EX:␉// Intel Core i7 LGA1366 (45nm) 6 Core ???␊
␉␉␉␉␉case CPU_MODEL_WESTMERE_EX:␉// Intel Core i7 LGA1366 (45nm) 6 Core ???␊
␉␉␉␉␉case CPU_MODEL_NEHALEM:␉␉// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)␊
␉␉␉␉␉case CPU_MODEL_FIELDS:␉␉// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)␊
␉␉␉␉␉case CPU_MODEL_DALES:␊
␉␉␉␉␉case CPU_MODEL_DALES_32NM:␉// Intel Core i3, i5 LGA1156 (32nm)␊
␉␉␉␉␉case CPU_MODEL_WESTMERE:␉// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core␊
␉␉␉␉␉case CPU_MODEL_NEHALEM_EX:␉// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x␊
␉␉␉␉␉case CPU_MODEL_WESTMERE_EX:␉// Intel Xeon E7␊
␉␉␉␉␉{␊
␉␉␉␉␉␉// thanks to dgobe for i3/i5/i7 bus speed detection␊
␉␉␉␉␉␉int nhm_bus = 0x3F;␊
␊
␉␉␉␉␉case CPU_MODEL_FIELDS:␉␉␉␉// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)␊
␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i5"))␊
␉␉␉␉␉␉␉value->word = 0x601;␉␉// Core i5␊
␉␉␉␉␉␉␉value->word = 0x0601;␉␉// Core i5␊
␉␉␉␉␉␉else␊
␉␉␉␉␉␉␉value->word = 0x0701;␉␉// Core i7␊
␉␉␉␉␉␉return true;␊
␊
␉␉␉␉␉case CPU_MODEL_DALES:␉␉␉␉// Havendale, Auburndale␊
␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i5"))␊
␉␉␉␉␉␉␉value->word = 0x601;␉␉// Core i5␊
␉␉␉␉␉␉␉value->word = 0x0601;␉␉// Core i5␊
␉␉␉␉␉␉else␊
␉␉␉␉␉␉␉value->word = 0x0701;␉␉// Core i7␊
␉␉␉␉␉␉return true;␊
case CPU_MODEL_SANDY_XEON:␉␉␉// Intel Xeon E3␊
␉␉␉␉␉case CPU_MODEL_DALES_32NM:␉␉␉// Intel Core i3, i5 LGA1156 (32nm)␊
␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i3"))␊
␉␉␉␉␉␉␉value->word = 0x901;␉␉// Core i3␊
␉␉␉␉␉␉␉value->word = 0x0901;␉␉// Core i3␊
␉␉␉␉␉␉else␊
␉␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i5"))␊
␉␉␉␉␉␉␉␉value->word = 0x601;␉// Core i5␊
␉␉␉␉␉␉␉␉value->word = 0x0601;␉// Core i5␊
␉␉␉␉␉␉␉else␊
␉␉␉␉␉␉␉␉value->word = 0x0701;␉// Core i7␊
␉␉␉␉␉␉return true;␊
␉␉␉␉␉␉return true;␊
␊
␉␉␉␉␉case 0x19:␉␉␉␉␉␉␉// ??? Intel Core i5 650 @3.20 GHz␊
␉␉␉␉␉␉value->word = 0x601;␉␉␉// Core i5␊
␉␉␉␉␉␉value->word = 0x0601;␉␉␉// Core i5␊
␉␉␉␉␉␉return true;␊
␉␉␉␉}␊
␉␉␉}␊
␉␉}␊
␉}␊
␊
␉return false;␊
//␉value->string = NOT_AVAILABLE;␊
//␉return true;␊
␉if (!bootInfo->memDetect)␊
␉␉return false;␊
␉␊
␉value->string = NOT_AVAILABLE;␊
␉return true;␊
}␊
␉␊
bool getSMBMemoryDeviceSerialNumber(returnType *value)␊
␉int␉map;␊
␊
␉idx++;␊
␉␊
␉DBG("getSMBMemoryDeviceSerialNumber index: %d, MAX_RAM_SLOTS: %d\n",idx,MAX_RAM_SLOTS);␊
␉␊
␉if (idx < MAX_RAM_SLOTS)␊
␉{␊
␉␉map = Platform.DMI.DIMM[idx];␊
␉␉}␊
␉}␊
␊
␉return false;␊
//␉value->string = NOT_AVAILABLE;␊
//␉return true;␊
␉if (!bootInfo->memDetect)␊
␉␉return false;␊
␉␊
␉value->string = NOT_AVAILABLE;␊
␉return true;␊
}␊
␊
bool getSMBMemoryDevicePartNumber(returnType *value)␊
␉␉}␊
␉}␊
␊
␉return false;␊
//␉value->string = NOT_AVAILABLE;␊
//␉return true;␊
␉if (!bootInfo->memDetect)␊
␉␉return false;␊
␉␊
␉value->string = NOT_AVAILABLE;␊
␉return true;␊
}␊
␊
␊
branches/azimutz/Chazi/i386/boot2/gui.c
384384
385385
386386
387
387
388388
389389
390390
␉}␊
␉␊
␉gui.backbuffer->width = gui.screen.width;␊
␉gui.backbuffer->height = gui.screen.height;␊
␉gui.backbuffer->height = gui.screen.height; //Azi: allocation error while testing "nVidia GT 220"␊
␊
␉return 0;␊
}␊
branches/azimutz/Chazi/i386/modules/Memory/spd.c
7878
7979
8080
81
81
82
83
84
85
86
87
88
8289
8390
8491
......
247254
248255
249256
250
257
251258
252259
253260
261
262
263
264
265
254266
255
267
268
269
256270
257271
258
259
260
261
272
273
262274
275
276
263277
264278
265279
280
266281
267
282
283
268284
269285
270286
......
275291
276292
277293
278
294
279295
280296
281297
......
316332
317333
318334
319
335
320336
321337
322338
......
325341
326342
327343
328
329
330
331
332
344
333345
334346
335347
336348
337
338
349
350
339351
340352
341353
outb(base + SMBHSTSTS, 0x1f);␉␉␉␉␉// reset SMBus Controller␊
outb(base + SMBHSTDAT, 0xff);␊
␉␊
while( inb(base + SMBHSTSTS) & 0x01);␉␉␉// wait until ready␊
rdtsc(l1, h1);␊
␉while ( inb(base + SMBHSTSTS) & 0x01) // wait until read␊
{ ␊
rdtsc(l2, h2);␊
t = ((h2 - h1) * 0xffffffff + (l2 - l1)) / (Platform.CPU.TSCFrequency / 100);␊
if (t > 5)␊
return 0xFF; // break␊
}␊
␉␊
outb(base + SMBHSTCMD, cmd);␊
outb(base + SMBHSTADD, (adr << 1) | 0x01 );␊
{ ␊
int i, speed;␊
uint8_t spd_size, spd_type;␊
uint32_t base;␊
uint32_t base, mmio, hostc;␊
bool dump = false;␊
RamSlotInfo_t* slot;␊
␊
␉uint16_t cmd = pci_config_read16(smbus_dev->dev.addr, 0x04);␊
␉DBG("SMBus CmdReg: 0x%x\n", cmd);␊
␉pci_config_write16(smbus_dev->dev.addr, 0x04, cmd | 1);␊
␊
␉mmio = pci_config_read32(smbus_dev->dev.addr, 0x10);// & ~0x0f;␊
base = pci_config_read16(smbus_dev->dev.addr, 0x20) & 0xFFFE;␊
DBG("Scanning smbus_dev <%04x, %04x> ...\n",smbus_dev->vendor_id, smbus_dev->device_id);␊
␉hostc = pci_config_read8(smbus_dev->dev.addr, 0x40);␊
verbose("Scanning SMBus [%04x:%04x], mmio: 0x%x, ioport: 0x%x, hostc: 0x%x\n", ␊
␉␉smbus_dev->vendor_id, smbus_dev->device_id, mmio, base, hostc);␊
␊
getBoolForKey("DumpSPD", &dump, &bootInfo->bootConfig);␊
bool fullBanks = // needed at least for laptops␊
Platform.DMI.MemoryModules == Platform.DMI.MaxMemorySlots;␊
// Search MAX_RAM_SLOTS slots␊
␉char spdbuf[256];␊
␉// needed at least for laptops␊
bool fullBanks = Platform.DMI.MemoryModules == Platform.DMI.CntMemorySlots;␊
␊
␉char spdbuf[MAX_SPD_SIZE];␊
// Search MAX_RAM_SLOTS slots␊
for (i = 0; i < MAX_RAM_SLOTS; i++){␊
slot = &Platform.RAM.DIMM[i];␊
spd_size = smb_read_byte_intel(base, 0x50 + i, 0);␊
␉␉DBG("SPD[0] (size): %d @0x%x\n", spd_size, 0x50 + i);␊
// Check spd is present␊
if (spd_size && (spd_size != 0xff) ) {␊
if (spd_size && (spd_size != 0xff))␊
{␊
␊
␉␉␉slot->spd = spdbuf;␊
slot->InUse = true;␊
␊
␉␉␉//for (x = 0; x < spd_size; x++) slot->spd[x] = smb_read_byte_intel(base, 0x50 + i, x);␊
init_spd(slot->spd, base, i);␊
␉␉␉␊
␉␉␊
switch (slot->spd[SPD_MEMORY_TYPE]) {␊
case SPD_MEMORY_TYPE_SDRAM_DDR2:␊
␊
␉␉␉␉}␊
␉␉␉␉slot->Frequency = freq;␊
␉␉␉}␊
␉␉␉␊
␊
␉␉␉verbose("Slot: %d Type %d %dMB (%s) %dMHz Vendor=%s\n PartNo=%s SerialNo=%s\n", ␊
i, ␊
(int)slot->Type,␊
slot->Frequency,␊
slot->Vendor,␊
slot->PartNo,␊
slot->SerialNo);␊
#if DEBUG_SPD␊
dumpPhysAddr("spd content: ",slot->spd, spd_size);␊
getc(); //getchar(); Azi: getc stuff␊
#endif␊
slot->SerialNo); ␊
}␊
␊
// laptops sometimes show slot 0 and 2 with slot 1 empty when only 2 slots are presents so:␊
Platform.DMI.DIMM[i]= ␊
i>0 && Platform.RAM.DIMM[1].InUse==false && fullBanks && Platform.DMI.MaxMemorySlots==2 ? ␊
mapping[i] : i; // for laptops case, mapping setup would need to be more generic than this␊
i>0 && Platform.RAM.DIMM[1].InUse==false && fullBanks && Platform.DMI.CntMemorySlots == 2 ? ␊
mapping[i] : i; // for laptops case, mapping setup would need to be more generic than this␊
␊
␉␉slot->spd = NULL;␊
␊
branches/azimutz/Chazi/i386/modules/Memory/Memory.c
55
66
77
8
89
910
1011
1112
13
1214
13
14
1515
1616
1717
......
4343
4444
4545
46
47
48
49
46
47
48
49
50
51
52
53
54
5055
5156
5257
5358
5459
5560
56
57
58
59
60
61
61
62
63
64
65
66
67
6268
*␊
*/␊
␊
//#include "mem.h" - reminder␊
//#include "libsaio.h"␊
#include "boot.h"␊
#include "pci.h"␊
#include "platform.h"␊
#include "spd.h"␊
#include "dram_controllers.h"␊
#include "spd.h"␊
//#include "mem.h"␊
#include "modules.h"␊
␊
#define kUseMemDetectKey "UseMemDetect"␊
␊
void Memory_hook(void* arg1, void* arg2, void* arg3, void* arg4)␊
{␉␊
␉bool useAutodetection = true;␊
␉getBoolForKey(kUseMemDetectKey, &useAutodetection, &bootInfo->bootConfig);␊
␉␊
␉if (useAutodetection)␊
␉/* our code only works on Intel chipsets so make sure here */␊
␉if (pci_config_read16(PCIADDR(0, 0x00, 0), 0x00) != 0x8086)␊
␉␉bootInfo->memDetect = false;␊
else␊
␉␉bootInfo->memDetect = true;␊
␉/* manually */␊
getBoolForKey(kUseMemDetectKey, &bootInfo->memDetect, &bootInfo->bootConfig);␊
␊
if (bootInfo->memDetect)␊
␉{␊
␉␉if (dram_controller_dev != NULL)␊
␉␉{␊
␉␉␉// Rek: pci dev ram controller direct and fully informative scan ...␊
␉␉␉scan_dram_controller(dram_controller_dev);␊
␉␉}␊
␉}␊
␉//Azi: gone on Kabyl's smbios update...???␊
␉// unfortunately still necesary for some comp where spd cant read correct speed␊
//␉scan_memory(&Platform);␊
␉␊
␉scan_spd(&Platform); // check Mek's implementation!␊
␉␉␊
␉␉//Azi: gone on Kabyl's smbios update - reminder␊
␉␉// unfortunately still necesary for some comp where spd cant read correct speed␊
␉␉//␉scan_memory(&Platform);␊
␉␉␊
scan_spd(&Platform); // check Mek's implementation!␊
}␊
}␊
branches/azimutz/Chazi/i386/modules/GraphicsEnabler/AMDGraphicsEnabler/ati.c
182182
183183
184184
185
185186
187
186188
187189
188190
......
689691
690692
691693
692
693
694
695
696
694697
695698
696699
␉kTriakis,␊
␉kUakari,␊
␉kVervet,␊
//␉kWormy, // why is this missing ??␊
␉kZonalis,␊
//=============== not in my ATIfb␊
␉kPithecia,␊
␉kBulrushes,␊
␉kCattail,␊
bool get_conntype_val(value_t *val)␊
{␊
//Connector types:␊
//0x4 : DisplayPort␊
//0x400: DL DVI-I␊
//0x400 : DisplayPort␊
//0x4: DL DVI-I␊
//0x200: SL DVI-I␉//Azi:---␊
//0x800: HDMI␊
␊
␉return false;␊

Archive Download the corresponding diff file

Revision: 1031