Chameleon

Chameleon Commit Details

Date:2011-06-20 22:45:14 (8 years 2 months ago)
Author:Azimutz
Commit:1031
Parents: 1030
Message:Rest of the code changes from r969 on. Folder now matches trunk as close as possible. Not tested yet!
Changes:
M/branches/azimutz/Chazi/i386/libsaio/convert.c
M/branches/azimutz/Chazi/i386/modules/Memory/spd.c
M/branches/azimutz/Chazi/i386/modules/Memory/Memory.c
M/branches/azimutz/Chazi/i386/boot2/gui.c
M/branches/azimutz/Chazi/i386/modules/GraphicsEnabler/AMDGraphicsEnabler/ati.c
M/branches/azimutz/Chazi/i386/libsaio/fake_efi.c
M/branches/azimutz/Chazi/i386/libsaio/platform.h
M/branches/azimutz/Chazi/i386/libsaio/smbios_getters.c
M/branches/azimutz/Chazi/i386/libsaio/smbios.c
M/branches/azimutz/Chazi/i386/libsaio/bootstruct.h

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branches/azimutz/Chazi/i386/libsaio/bootstruct.h
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//extern Node *efiPlatformNode; //Azi: test
#define VGA_TEXT_MODE 0
//defined in /usr/../boot.h//Azi:--- ??
//#define GRAPHICS_MODE 1
//#define FB_TEXT_MODE 2
/*
* Maximum number of boot drivers that can be loaded.
*/
config_file_t smbiosConfig; // smbios.plist
config_file_t helperConfig; // boot helper partition's boot.plist
config_file_t ramdiskConfig; // RAMDisk.plist
bool memDetect;
} PrivateBootInfo_t;
extern PrivateBootInfo_t *bootInfo;
branches/azimutz/Chazi/i386/libsaio/platform.h
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struct DMI
{
intMaxMemorySlots;// number of memory slots polulated by SMBIOS
intMaxMemorySlots;// number of memory slots populated by SMBIOS
intCntMemorySlots;// number of memory slots counted
intMemoryModules;// number of memory modules installed
intDIMM[MAX_RAM_SLOTS];// Information and SPD mapping for each slot
branches/azimutz/Chazi/i386/libsaio/smbios.c
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// Default SMBIOS Data
//-------------------------------------------------------------------------------------------------------------------------
/* Rewrite: use a struct */
//Azi: carefully review against trunk and ioreg dumps.
#define kDefaultVendorManufacturer"Apple Inc."
#define kDefaultBIOSReleaseDate"11/06/2009"
#define kDefaultSerialNumber"SOMESRLNMBR"
// remove any spaces found at the end
while ((strSize != 0) && (string[strSize - 1] == ' '))
strSize--;
if (strSize == 0)
{
*field = 0;
return;
}
memcpy((uint8_t *)structHeader + structHeader->length + stringsSize, string, strSize);
*field = stringIndex;
{
const char *string = 0;
int len;
bool parsed;
int val;
if (numOfSetters <= idx)
return false;
//case kSMBQWord:
if (SMBSetters[idx].keyString)
{
if (getIntForKey(SMBSetters[idx].keyString, (int *)&(value->dword), SMBPlist))
parsed = getIntForKey(SMBSetters[idx].keyString, &val, SMBPlist);
if (!parsed)
if (structPtr->orig->type == kSMBTypeMemoryDevice)// MemoryDevice only
parsed = getSMBValueForKey(structPtr->orig, SMBSetters[idx].keyString, NULL, (returnType *)&val);
if (parsed)
{
switch (SMBSetters[idx].valueType)
{
case kSMBByte:
value->byte = (uint8_t)val;
break;
case kSMBWord:
value->word = (uint16_t)val;
break;
case kSMBDWord:
default:
value->dword = (uint32_t)val;
break;
}
return true;
else
if (structPtr->orig->type == kSMBTypeMemoryDevice)// MemoryDevice only
if (getSMBValueForKey(structPtr->orig, SMBSetters[idx].keyString, NULL, value))
return true;
}
}
if (SMBSetters[idx].getSMBValue)
if (SMBSetters[idx].getSMBValue(value))
return true;
case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
break;
default:
default:
return;
}
}
branches/azimutz/Chazi/i386/libsaio/convert.c
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}
/** Parse an UUID string into an (EFI_CHAR8*) buffer */
EFI_CHAR8* getUUIDFromString(const char *source)
EFI_CHAR8*getUUIDFromString(const char *source)
{
if (!source) return 0;
if (!source) return 0;
char*p = (char *)source;
inti;
inti;
charbuf[3];
static EFI_CHAR8 uuid[UUID_LEN+1]="";
static EFI_CHAR8 uuid[UUID_LEN + 1] = "";
buf[2] = '\0';
for (i=0; i<UUID_LEN; i++) {
for (i = 0; i < UUID_LEN; i++) {
if (p[0] == '\0' || p[1] == '\0' || !isxdigit(p[0]) || !isxdigit(p[1])) {
verbose("[ERROR] UUID='%s' syntax error\n", source);
return 0;
}
}
uuid[UUID_LEN]='\0';
if (*p != '\0') {
verbose("[ERROR] UUID='%s' syntax error\n", source);
return 0;
branches/azimutz/Chazi/i386/libsaio/fake_efi.c
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}
if (!ret) // no bios dmi UUID available, set a fixed value for system-id
ret=getUUIDFromString((sysId = (const char*) SYSTEM_ID));
ret = getUUIDFromString((sysId = (const char*) SYSTEM_ID));
// apply a nice formatting to the displayed output
verbose("Customizing SystemID with : %s\n", getStringFromUUID(ret));
branches/azimutz/Chazi/i386/libsaio/smbios_getters.c
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*/
#include "smbios_getters.h"
#include "bootstruct.h"
#ifndef DEBUG_SMBIOS
#define DEBUG_SMBIOS 0
switch (Platform.CPU.Model)
{
case 0x0D:// ???
case CPU_MODEL_YONAH:// Yonah0x0E
case CPU_MODEL_MEROM:// Merom0x0F
case CPU_MODEL_PENRYN:// Penryn0x17
case CPU_MODEL_ATOM:// Atom 45nm0x1C
case CPU_MODEL_YONAH:// Intel Mobile Core Solo, Duo
case CPU_MODEL_MEROM:// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
case CPU_MODEL_PENRYN:// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
case CPU_MODEL_ATOM:// Intel Atom (45nm)
return false;
case 0x19:// ??? Intel Core i5 650 @3.20 GHz
case CPU_MODEL_NEHALEM:// Intel Core i7 LGA1366 (45nm)
case CPU_MODEL_FIELDS:// Intel Core i5, i7 LGA1156 (45nm)
case CPU_MODEL_DALES:// Intel Core i5, i7 LGA1156 (45nm) ???
case CPU_MODEL_DALES_32NM:// Intel Core i3, i5, i7 LGA1156 (32nm)
case CPU_MODEL_WESTMERE:// Intel Core i7 LGA1366 (32nm) 6 Core
case CPU_MODEL_NEHALEM_EX:// Intel Core i7 LGA1366 (45nm) 6 Core ???
case CPU_MODEL_WESTMERE_EX:// Intel Core i7 LGA1366 (45nm) 6 Core ???
case CPU_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
case CPU_MODEL_DALES:
case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
case CPU_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x
case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
{
// thanks to dgobe for i3/i5/i7 bus speed detection
int nhm_bus = 0x3F;
case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
if (strstr(Platform.CPU.BrandString, "Core(TM) i5"))
value->word = 0x601;// Core i5
value->word = 0x0601;// Core i5
else
value->word = 0x0701;// Core i7
return true;
case CPU_MODEL_DALES:// Havendale, Auburndale
if (strstr(Platform.CPU.BrandString, "Core(TM) i5"))
value->word = 0x601;// Core i5
value->word = 0x0601;// Core i5
else
value->word = 0x0701;// Core i7
return true;
case CPU_MODEL_SANDY_XEON:// Intel Xeon E3
case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
if (strstr(Platform.CPU.BrandString, "Core(TM) i3"))
value->word = 0x901;// Core i3
value->word = 0x0901;// Core i3
else
if (strstr(Platform.CPU.BrandString, "Core(TM) i5"))
value->word = 0x601;// Core i5
value->word = 0x0601;// Core i5
else
value->word = 0x0701;// Core i7
return true;
return true;
case 0x19:// ??? Intel Core i5 650 @3.20 GHz
value->word = 0x601;// Core i5
value->word = 0x0601;// Core i5
return true;
}
}
}
}
return false;
//value->string = NOT_AVAILABLE;
//return true;
if (!bootInfo->memDetect)
return false;
value->string = NOT_AVAILABLE;
return true;
}
bool getSMBMemoryDeviceSerialNumber(returnType *value)
intmap;
idx++;
DBG("getSMBMemoryDeviceSerialNumber index: %d, MAX_RAM_SLOTS: %d\n",idx,MAX_RAM_SLOTS);
if (idx < MAX_RAM_SLOTS)
{
map = Platform.DMI.DIMM[idx];
}
}
return false;
//value->string = NOT_AVAILABLE;
//return true;
if (!bootInfo->memDetect)
return false;
value->string = NOT_AVAILABLE;
return true;
}
bool getSMBMemoryDevicePartNumber(returnType *value)
}
}
return false;
//value->string = NOT_AVAILABLE;
//return true;
if (!bootInfo->memDetect)
return false;
value->string = NOT_AVAILABLE;
return true;
}
branches/azimutz/Chazi/i386/boot2/gui.c
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}
gui.backbuffer->width = gui.screen.width;
gui.backbuffer->height = gui.screen.height;
gui.backbuffer->height = gui.screen.height; //Azi: allocation error while testing "nVidia GT 220"
return 0;
}
branches/azimutz/Chazi/i386/modules/Memory/spd.c
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outb(base + SMBHSTSTS, 0x1f);// reset SMBus Controller
outb(base + SMBHSTDAT, 0xff);
while( inb(base + SMBHSTSTS) & 0x01);// wait until ready
rdtsc(l1, h1);
while ( inb(base + SMBHSTSTS) & 0x01) // wait until read
{
rdtsc(l2, h2);
t = ((h2 - h1) * 0xffffffff + (l2 - l1)) / (Platform.CPU.TSCFrequency / 100);
if (t > 5)
return 0xFF; // break
}
outb(base + SMBHSTCMD, cmd);
outb(base + SMBHSTADD, (adr << 1) | 0x01 );
{
int i, speed;
uint8_t spd_size, spd_type;
uint32_t base;
uint32_t base, mmio, hostc;
bool dump = false;
RamSlotInfo_t* slot;
uint16_t cmd = pci_config_read16(smbus_dev->dev.addr, 0x04);
DBG("SMBus CmdReg: 0x%x\n", cmd);
pci_config_write16(smbus_dev->dev.addr, 0x04, cmd | 1);
mmio = pci_config_read32(smbus_dev->dev.addr, 0x10);// & ~0x0f;
base = pci_config_read16(smbus_dev->dev.addr, 0x20) & 0xFFFE;
DBG("Scanning smbus_dev <%04x, %04x> ...\n",smbus_dev->vendor_id, smbus_dev->device_id);
hostc = pci_config_read8(smbus_dev->dev.addr, 0x40);
verbose("Scanning SMBus [%04x:%04x], mmio: 0x%x, ioport: 0x%x, hostc: 0x%x\n",
smbus_dev->vendor_id, smbus_dev->device_id, mmio, base, hostc);
getBoolForKey("DumpSPD", &dump, &bootInfo->bootConfig);
bool fullBanks = // needed at least for laptops
Platform.DMI.MemoryModules == Platform.DMI.MaxMemorySlots;
// Search MAX_RAM_SLOTS slots
char spdbuf[256];
// needed at least for laptops
bool fullBanks = Platform.DMI.MemoryModules == Platform.DMI.CntMemorySlots;
char spdbuf[MAX_SPD_SIZE];
// Search MAX_RAM_SLOTS slots
for (i = 0; i < MAX_RAM_SLOTS; i++){
slot = &Platform.RAM.DIMM[i];
spd_size = smb_read_byte_intel(base, 0x50 + i, 0);
DBG("SPD[0] (size): %d @0x%x\n", spd_size, 0x50 + i);
// Check spd is present
if (spd_size && (spd_size != 0xff) ) {
if (spd_size && (spd_size != 0xff))
{
slot->spd = spdbuf;
slot->InUse = true;
//for (x = 0; x < spd_size; x++) slot->spd[x] = smb_read_byte_intel(base, 0x50 + i, x);
init_spd(slot->spd, base, i);
switch (slot->spd[SPD_MEMORY_TYPE]) {
case SPD_MEMORY_TYPE_SDRAM_DDR2:
}
slot->Frequency = freq;
}
verbose("Slot: %d Type %d %dMB (%s) %dMHz Vendor=%s\n PartNo=%s SerialNo=%s\n",
i,
(int)slot->Type,
slot->Frequency,
slot->Vendor,
slot->PartNo,
slot->SerialNo);
#if DEBUG_SPD
dumpPhysAddr("spd content: ",slot->spd, spd_size);
getc(); //getchar(); Azi: getc stuff
#endif
slot->SerialNo);
}
// laptops sometimes show slot 0 and 2 with slot 1 empty when only 2 slots are presents so:
Platform.DMI.DIMM[i]=
i>0 && Platform.RAM.DIMM[1].InUse==false && fullBanks && Platform.DMI.MaxMemorySlots==2 ?
mapping[i] : i; // for laptops case, mapping setup would need to be more generic than this
i>0 && Platform.RAM.DIMM[1].InUse==false && fullBanks && Platform.DMI.CntMemorySlots == 2 ?
mapping[i] : i; // for laptops case, mapping setup would need to be more generic than this
slot->spd = NULL;
branches/azimutz/Chazi/i386/modules/Memory/Memory.c
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*
*/
//#include "mem.h" - reminder
//#include "libsaio.h"
#include "boot.h"
#include "pci.h"
#include "platform.h"
#include "spd.h"
#include "dram_controllers.h"
#include "spd.h"
//#include "mem.h"
#include "modules.h"
#define kUseMemDetectKey "UseMemDetect"
void Memory_hook(void* arg1, void* arg2, void* arg3, void* arg4)
{
bool useAutodetection = true;
getBoolForKey(kUseMemDetectKey, &useAutodetection, &bootInfo->bootConfig);
if (useAutodetection)
/* our code only works on Intel chipsets so make sure here */
if (pci_config_read16(PCIADDR(0, 0x00, 0), 0x00) != 0x8086)
bootInfo->memDetect = false;
else
bootInfo->memDetect = true;
/* manually */
getBoolForKey(kUseMemDetectKey, &bootInfo->memDetect, &bootInfo->bootConfig);
if (bootInfo->memDetect)
{
if (dram_controller_dev != NULL)
{
// Rek: pci dev ram controller direct and fully informative scan ...
scan_dram_controller(dram_controller_dev);
}
}
//Azi: gone on Kabyl's smbios update...???
// unfortunately still necesary for some comp where spd cant read correct speed
//scan_memory(&Platform);
scan_spd(&Platform); // check Mek's implementation!
//Azi: gone on Kabyl's smbios update - reminder
// unfortunately still necesary for some comp where spd cant read correct speed
//scan_memory(&Platform);
scan_spd(&Platform); // check Mek's implementation!
}
}
branches/azimutz/Chazi/i386/modules/GraphicsEnabler/AMDGraphicsEnabler/ati.c
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kTriakis,
kUakari,
kVervet,
//kWormy, // why is this missing ??
kZonalis,
//=============== not in my ATIfb
kPithecia,
kBulrushes,
kCattail,
bool get_conntype_val(value_t *val)
{
//Connector types:
//0x4 : DisplayPort
//0x400: DL DVI-I
//0x400 : DisplayPort
//0x4: DL DVI-I
//0x200: SL DVI-I//Azi:---
//0x800: HDMI
return false;

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Revision: 1031