Chameleon

Chameleon Commit Details

Date:2011-08-06 17:54:14 (12 years 8 months ago)
Author:Sergey Slice
Commit:1290
Parents: 1289
Message:There was a bug in XCode tools/Chameleon project. Now eliminated
Changes:
M/branches/slice/trunkM/i386/modules/Makefile
M/branches/slice/trunkM/revision
M/branches/slice/trunkM/i386/modules/RamDiskLoader/Makefile
M/branches/slice/trunkM/i386/modules/KextPatcher/Makefile
M/branches/slice/trunkM/i386/modules/NVRAM/Makefile
M/branches/slice/trunkM/i386/libsaio/cpu.c
M/branches/slice/trunkM/i386/libsaio/smbios_getters.c
M/branches/slice/trunkM/i386/modules/KernelPatcher/Makefile
M/branches/slice/trunkM/i386/libsaio/smbios.c
M/branches/slice/trunkM/i386/modules/NVRAM/NVRAM.c
M/branches/slice/trunkM/i386/modules/Cconfig

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branches/slice/trunkM/i386/libsaio/cpu.c
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#include "boot.h"␊
␊
#ifndef DEBUG_CPU␊
#define DEBUG_CPU 1␊
#define DEBUG_CPU 0␊
#endif␊
␊
#if DEBUG_CPU␊
/*␊
* Measures the Actual Performance Frequency in Hz (64-bit)␊
*/␊
#if 0␊
static uint64_t measure_aperf_frequency(void)␊
{␊
uint64_t aperfStart;␊
disable_PIT2();␊
return retval;␊
}␊
#endif␊
␊
␊
/*␊
* Calculates the FSB and CPU frequencies using specific MSRs for each CPU␊
* - multi. is read from a specific MSR. In the case of Intel, there is:␊
void scan_cpu(PlatformInfo_t *p)␊
{␊
␉uint64_t␉tscFrequency, fsbFrequency, cpuFrequency;␊
␉uint64_t␉msr, flex_ratio;␊
␉uint64_t␉msr;␊
␉//, flex_ratio;␊
␉uint8_t␉␉maxcoef, maxdiv, currcoef, bus_ratio_max, currdiv;␊
␉const char *newratio;␊
␉int len, myfsb;␊
//␉const char *newratio;␊
␉int /*len,*/ myfsb;␊
␉uint8_t bus_ratio_min;␊
␉uint32_t max_ratio, min_ratio;␊
␊
␊
␉tscFrequency = measure_tsc_frequency();␊
␉fsbFrequency = 0;␊
␉cpuFrequency = 0;␊
␊
␉cpuFrequency = tscFrequency;␊
␉msr = rdmsr64(MSR_IA32_PERF_STATUS);␊
␉DBG("msr(0x%x): ia32_perf_stat 0x%08x\n", MSR_IA32_PERF_STATUS, bitfield(msr, 31, 0));␊
␉currcoef = bitfield(msr, 7, 0);␊
//␉if (currcoef) {␊
//␉␉fsbFrequency = cpuFrequency / currcoef;␊
//␉} else {␊
␉␉fsbFrequency = 133 * 1000000;␊
//␉}␊
␉␊
#if 0␊
␉if ((p->CPU.Vendor == CPUID_VENDOR_INTEL) && ((p->CPU.Family == 0x06)␊
␉␉␉␉␉␉␉␉␉␉␉|| (p->CPU.Family == 0x0f)))␊
␉{␊
␉␉␉␉msr = rdmsr64(MSR_PLATFORM_INFO);␊
␉␉␉␉DBG("msr(0x%04x): platform_info %08x-%08x\n", MSR_PLATFORM_INFO,␊
␉␉␉␉(msr >> 32) & 0xffffffff, msr & 0xffffffff);␊
␉␉␉␉msr = rdmsr64(MSR_IA32_PERF_STATUS);␊
␉␉␉␉DBG("msr(0x%x): ia32_perf_stat 0x%08x\n", MSR_IA32_PERF_STATUS, bitfield(msr, 31, 0));␊
␉␉␉␉currcoef = bitfield(msr, 7, 0);␊
␉␉␉␉if (currcoef) {␊
␉␉␉␉␉fsbFrequency = cpuFrequency / currcoef;␊
␉␉␉␉} else {␊
␉␉␉␉␉fsbFrequency = 133 * 1000000;␊
␉␉␉␉}␊
␉␉␉␉DBG("initial values: FSB=%d CPU=%d\n", fsbFrequency, cpuFrequency);␊
#if DEBUG_CPU␊
␉␉␉␉getchar();␊
#endif␊
␉␉␉␉␊
#if 0␉␉␉␉␊
␉␉␉␉bus_ratio_max = bitfield(msr, 14, 8);␊
bus_ratio_min = bitfield(msr, 46, 40); //valv: not sure about this one (Remarq.1)␊
␉␉␉//␉msr = rdmsr64(MSR_FLEX_RATIO);␊
␉␉␉␉␉␉ presence bit) */␊
␉␉␉␉␉␉//wrmsr64(MSR_FLEX_RATIO, (msr & 0xFFFFFFFFFFFEFFFFULL));␊
␉␉␉␉␉␉//msr = rdmsr64(MSR_FLEX_RATIO);␊
verbose("Unusable flex ratio detected. Patched MSR now %08x\n", bitfield(msr, 31, 0));␊
DBG("Unusable flex ratio detected. Patched MSR now %08x\n", bitfield(msr, 31, 0));␊
␉␉␉␉␉} else {␊
␉␉␉␉␉␉if (bus_ratio_max > flex_ratio) {␊
␉␉␉␉␉␉␉bus_ratio_max = flex_ratio;␊
␉␉//␉␉{␊
␉␉␉␉␉cpuFrequency = tscFrequency;␊
␉␉//␉␉}␊
␉␉␉␉if ((getValueForKey(kbusratio, &newratio, &len, &bootInfo->chameleonConfig)) && (len <= 4)) {␊
#endif␉␉␉␉␊
/*␉␉␉␉if ((getValueForKey(kbusratio, &newratio, &len, &bootInfo->chameleonConfig)) && (len <= 4)) {␊
␉␉␉␉␉max_ratio = atoi(newratio);␊
␉␉␉␉␉max_ratio = (max_ratio * 10);␊
␉␉␉␉␉if (len >= 3) max_ratio = (max_ratio + 5);␊
␉␉␉␉␉} else {␊
␉␉␉␉␉␉max_ratio = (bus_ratio_max * 10);␊
␉␉␉␉␉}␊
␉␉␉␉} else {␊
␉␉␉␉␉max_ratio = currcoef;␊
␉␉␉␉}␊
*/␊
␉␉␉␉max_ratio = currcoef;␊
␉␉␉␉min_ratio = currcoef;␊
␉␉␉␉//valv: to be uncommented if Remarq.1 didn't stick␊
␉␉␉␉/*if(bus_ratio_max > 0) bus_ratio = flex_ratio;*/␊
␉␉␉␉p->CPU.MaxRatio = max_ratio;␊
␉␉␉␉p->CPU.MinRatio = min_ratio;␊
␊
␉␉␉␉myfsb = fsbFrequency / 1000000;␊
␉␉␉␉verbose("Sticking with [BCLK: %dMhz, Bus-Ratio: %d]\n", myfsb, max_ratio);␊
␉␉␉␉currcoef = bus_ratio_max;␊
//␉␉␉␉myfsb = fsbFrequency / 1000000;␊
␉␉␉␉DBG("Sticking with [BCLK: %dhz, Bus-Ratio: %d]\n", fsbFrequency, max_ratio);␊
␉␉␉␉currcoef = max_ratio;␊
#if DEBUG_CPU␊
␉␉␉␉getchar();␊
#endif␊
␉␉␉␉␊
␉␉␉} else {␊
␉␉␉␉msr = rdmsr64(MSR_IA32_PERF_STATUS);␊
␉␉␉␉DBG("msr(0x%x): ia32_perf_stat 0x%08x\n", __LINE__, bitfield(msr, 31, 0));␊
␉␉␉␉DBG("msr(0x%x): ia32_perf_stat 0x%08x\n", MSR_IA32_PERF_STATUS, bitfield(msr, 31, 0));␊
␉␉␉␉currcoef = bitfield(msr, 12, 8);␊
␉␉␉␉/* Non-integer bus ratio for the max-multi*/␊
maxdiv = bitfield(msr, 46, 46);␊
␉␉}␊
␉␉/* Mobile CPU ? */␊
//Slice - no more needed␊
#if 0 // DEBUG_CPU␊
/* // DEBUG_CPU␊
␉pause();␊
␊
␉␊
␉␉␉if (p->CPU.Mobile) {␊
␉␉␉p->CPU.Features |= CPU_FEATURE_MOBILE;␊
␉␉}␊
␉}␊
*/␉␉␉␉␊
//␉}␊
␉␉DBG("CPU is %s\n", p->CPU.Mobile?"Mobile":"Desktop");␊
#endif␉␉␊
␉␊
␉}␊
␉else if((p->CPU.Vendor == CPUID_VENDOR_AMD) && (p->CPU.Family == 0x0f))␊
{␊
}␊
if(!cpuFrequency) cpuFrequency = tscFrequency;␊
}␊
#endif␉␊
#if DEBUG_CPU␊
␉DBG("ready to finish...\n");␊
␉getchar();␊
#endif␊
␉␊
␊
␉p->CPU.MaxCoef = maxcoef;␊
␉p->CPU.MaxDiv = maxdiv;␊
branches/slice/trunkM/i386/libsaio/smbios.c
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␉SMBByte tmp = 0;␊
␉SMBWord tmpW = 0;␊
␊
␉int dimmnbr = 0;␊
//␉int dimmnbr = 0;␊
␉Platform->DMI.MaxMemorySlots␉= 0;␊
␉Platform->DMI.CntMemorySlots␉= 0;␊
␉Platform->DMI.MemoryModules␉= 0;␊
// do not need in complex MSR calculation␉␉␉␉␊
␉␉␉case kSMBTypeProcessorInformation:␊
␉␉␉␉tmpW = ((SMBProcessorInformation *)structHeader)->externalClock;␊
␉␉␉␉Platform->CPU.FSBFrequency = tmpW * MEGA + (tmpW & 7) * 110000; //According to Intel 133->133.33MHz␊
␉␉␉␉Platform->CPU.FSBFrequency = (uint64_t)tmpW * MEGA + (uint64_t)(tmpW % 10) * 110000; //According to Intel 133->133.33MHz␊
␉␉␉␉tmpW = ((SMBProcessorInformation *)structHeader)->currentClock;␊
␉␉␉␉Platform->CPU.CPUFrequency = tmpW * MEGA + (tmpW & 7) * 110000;␊
␉␉␉␉Platform->CPU.CPUFrequency = (uint64_t)tmpW * MEGA + (uint64_t)(tmpW % 10) * 110000;␊
␉␉␉␉msglog("From SMBIOS: FSB=%d CPU=%d\n", Platform->CPU.FSBFrequency, Platform->CPU.CPUFrequency);␊
␉␉␉␉break;␊
␉␊
␉␉␉␉Platform->DMI.MaxMemorySlots += ((SMBPhysicalMemoryArray *)structHeader)->numMemoryDevices;␊
␉␉␉␉break;␊
␊
␉␉␉case kSMBTypeMemoryDevice:␊
/*␉␉␉case kSMBTypeMemoryDevice:␊
␉␉␉␉Platform->DMI.CntMemorySlots++;␊
␉␉␉␉if (((SMBMemoryDevice *)structHeader)->memorySize != 0)␊
␉␉␉␉␉Platform->DMI.MemoryModules++;␊
␉␉␉␉␉Platform->RAM.DIMM[dimmnbr].Frequency = ((SMBMemoryDevice *)structHeader)->memorySpeed;␊
␉␉␉␉dimmnbr++;␊
␉␉␉␉break;␊
*/␊
␉␉}␊
␊
␉␉structPtr = (uint8_t *)((uint32_t)structHeader + structHeader->length);␊
branches/slice/trunkM/i386/libsaio/smbios_getters.c
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␉␉␉{␊
␉␉␉␉switch (Platform->CPU.Model)␊
␉␉␉␉{␊
␉␉␉␉␉case 0x0D:␉␉␉␉␉// ???␊
␉␉␉␉␉case CPU_MODEL_PENTIUM_M:␉␉␉␉␉// Dotah␊
␉␉␉␉␉case CPU_MODEL_YONAH:␉␉// Intel Mobile Core Solo, Duo␊
␉␉␉␉␉case CPU_MODEL_MEROM:␉␉// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx␊
␉␉␉␉␉case CPU_MODEL_PENRYN:␉␉// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx␊
␉␉␉␉␉case CPU_MODEL_NEHALEM:␉␉// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)␊
␉␉␉␉␉case CPU_MODEL_FIELDS:␉␉// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)␊
␉␉␉␉␉case CPU_MODEL_DALES:␊
␉␉␉␉␉case CPU_MODEL_DALES_32NM:␉// Intel Core i3, i5 LGA1156 (32nm)␊
␉␉␉␉␉case CPU_MODEL_DALES_32NM:␉// Intel Core i3, i5 LGA1156 (32nm) Clarkdale␊
␉␉␉␉␉case CPU_MODEL_WESTMERE:␉// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core␊
␉␉␉␉␉case CPU_MODEL_NEHALEM_EX:␉// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x␊
␉␉␉␉␉case CPU_MODEL_WESTMERE_EX:␉// Intel Xeon E7␊
␉␉␉{␊
␉␉␉␉switch (Platform->CPU.Model)␊
␉␉␉␉{␊
␉␉␉␉␉case 0x0D:␉␉␉␉␉␉␉// ???␊
␉␉␉␉␉case CPU_MODEL_PENTIUM_M:␉␉␉␉␉␉␉// Dothan␊
␉␉␉␉␉case CPU_MODEL_YONAH:␉␉␉␉// Intel Mobile Core Solo, Duo␊
␉␉␉␉␉case CPU_MODEL_MEROM:␉␉␉␉// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx␊
␉␉␉␉␉case CPU_MODEL_PENRYN:␉␉␉␉// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx␊
␉␉map = Platform->DMI.DIMM[idx];␊
␉␉if (Platform->RAM.DIMM[map].InUse && Platform->RAM.DIMM[map].Type != 0)␊
␉␉{␊
␉␉␉DBG("RAM Detected Type = %d\n", Platform->RAM.DIMM[map].Type);␊
␉␉␉msglog("RAM Detected Type = %d\n", Platform->RAM.DIMM[map].Type);␊
␉␉␉value->byte = Platform->RAM.DIMM[map].Type;␊
␉␉␉return true;␊
␉␉}␊
bool getSMBMemoryDeviceMemorySpeed(returnType *value)␊
{␊
//Slice - do not use SPD value for memory speed. DMI has real value.␊
return false;␊
/*␉static int idx = -1;␊
//return false;␊
␉static int idx = -1;␊
␉int␉map;␊
␉idx++;␊
␉if (idx < MAX_RAM_SLOTS)␊
␉␉map = Platform->DMI.DIMM[idx];␊
␉␉if (Platform->RAM.DIMM[map].InUse && Platform->RAM.DIMM[map].Frequency != 0)␊
␉␉{␊
␉␉␉DBG("RAM Detected Freq = %d Mhz\n", Platform->RAM.DIMM[map].Frequency);␊
␉␉␉msglog("RAM Detected Freq = %d Mhz\n", Platform->RAM.DIMM[map].Frequency);␊
␉␉␉value->dword = Platform->RAM.DIMM[map].Frequency;␊
␉␉␉return true;␊
␉␉}␊
␉}␊
␊
␉return false; */␊
␉return false; ␊
//␉value->dword = 800;␊
//␉return true;␊
}␊
branches/slice/trunkM/i386/modules/RamDiskLoader/Makefile
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MODULE_NAME = RamDiskLoader␊
MODULE_VERSION = "1.0.0"␊
MODULE_COMPAT_VERSION = "1.0.0"␊
MODULE_START = _$(MODULE_NAME)_start␊
MODULE_START = $(MODULE_NAME)_start␊
MODULE_DEPENDENCIES = ␊
␊
DIR = RamDiskLoader␊
branches/slice/trunkM/i386/modules/KextPatcher/Makefile
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MODULE_NAME = KextPatcher␊
MODULE_VERSION = "1.0.0"␊
MODULE_COMPAT_VERSION = "1.0.0"␊
MODULE_START = _$(MODULE_NAME)_start␊
MODULE_START = $(MODULE_NAME)_start␊
MODULE_DEPENDENCIES = ␊
␊
DIR = KextPatcher␊
␊
MODULE_OBJS = kext_patcher.o inflate.o deflate.o zutil.o inftrees.o inffast.o adler32.o hex_editor.o trees.o␊
␊
OPTIM = -Os -Oz␊
OPTIM = -Oz␊
DEBUG = -DNOTHING␊
#DEBUG = -DDEBUG_HELLO_WORLD=1␊
CFLAGS␉= $(RC_CFLAGS) $(OPTIM) $(MORECPP) -arch i386 -g -Wmost \␊
branches/slice/trunkM/i386/modules/NVRAM/NVRAM.c
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#define UUID_LEN␉16␊
␊
//extern EFI_GUID* getSystemID();␊
void NVRAM_hook(void* arg1, void* arg2, void* arg3, void* arg4);␊
void NVRAM_start(void);␊
␊
typedef struct {␊
branches/slice/trunkM/i386/modules/NVRAM/Makefile
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MODULE_VERSION = "1.0.0"␊
MODULE_COMPAT_VERSION = "1.0.0"␊
MODULE_DESCRIPTION = NVRAM support (remember values from previous boot)␊
MODULE_START = _$(MODULE_NAME)_start␊
MODULE_START = $(MODULE_NAME)_start␊
MODULE_DEPENDENCIES = ␊
␊
DIR = NVRAM␊
␊
MODULE_OBJS = NVRAM.o␊
␊
OPTIM = -Os -Oz␊
DEBUG = -DNOTHING␊
#DEBUG = -DDEBUG_HELLO_WORLD=1␊
CFLAGS␉= $(RC_CFLAGS) $(OPTIM) $(MORECPP) -arch i386 -g -Wmost \␊
-D__ARCHITECTURE__=\"i386\" -DSAIO_INTERNAL_USER \␊
-DRCZ_COMPRESSED_FILE_SUPPORT $(DEBUG) \␊
-fno-builtin $(OMIT_FRAME_POINTER_CFLAG) \␊
-mpreferred-stack-boundary=2 -fno-align-functions -fno-stack-protector \␊
-march=pentium4 -msse2 -mfpmath=sse -msoft-float -fno-common␊
␊
DEFINES=␊
CONFIG = hd␊
INC = -I. -I.. -I$(SYMROOT) -I$(UTILDIR) -I$(LIBSADIR) -I$(LIBSAIODIR) -I$(BOOT2DIR)␊
LIBS=␊
␊
VPATH = $(OBJROOT):$(SYMROOT)␊
␊
␊
␊
SFILES =␊
CFILES = ␊
HFILES = ␊
EXPORTED_HFILES =␊
INSTALLED_HFILES =␊
OTHERFILES = Makefile␊
ALLSRC = $(SFILES) $(CFILES) \␊
␉$(HFILES) $(OTHERFILES)␊
DIRS_NEEDED = $(OBJROOT) $(SYMROOT)␊
␊
all embedtheme optionrom: dylib␊
␊
␊
include ../MakeInc.dir
branches/slice/trunkM/i386/modules/KernelPatcher/Makefile
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MODULE_NAME = KernelPatcher␊
MODULE_VERSION = "1.0.0"␊
MODULE_COMPAT_VERSION = "1.0.0"␊
MODULE_START = _$(MODULE_NAME)_start␊
MODULE_START = $(MODULE_NAME)_start␊
MODULE_DEPENDENCIES = ␊
␊
DIR = KernelPatcher␊
branches/slice/trunkM/i386/modules/Cconfig
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source "i386/modules/Memory/Cconfig"␊
source "i386/modules/Networking/Cconfig"␊
source "i386/modules/USBFix/Cconfig"␊
source "i386/modules/RamDiskLoader/Cconfig"␊
source "i386/modules/HelloWorld/Cconfig"␊
endmenu
branches/slice/trunkM/i386/modules/Makefile
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include ${SRCROOT}/Make.rules␊
␊
# The order of building is important.␊
SUBDIRS = klibc uClibcxx Resolution KernelPatcher NVRAM HelloWorld␊
#HelloWorld Memory NetbookInstaller KextPatcher Networking HPET USBFix RamDiskLoader␊
SUBDIRS = klibc uClibcxx Resolution KernelPatcher NVRAM HelloWorld RamDiskLoader NetbookInstaller KextPatcher ␊
#HelloWorld MemoryNetworking HPET USBFix␊
␊
␊
CFLAGS= -Os $(MORECPP) -arch i386 -g -static␊
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Revision: 1290