Chameleon

Chameleon Commit Details

Date:2010-03-20 17:29:22 (14 years 1 month ago)
Author:DieBuche
Commit:133
Parents: 132
Message:Futher fixes..
Changes:
M/branches/diebuche/i386/libsaio/autoresolution.c
M/branches/diebuche/i386/libsaio/nvidia_resolution.c
M/branches/diebuche/i386/libsaio/autoresolution.h

File differences

branches/diebuche/i386/libsaio/autoresolution.c
321321
322322
323323
324
325
326
327
328
329
324
325
326
327
328
329
330
330331
331332
332333
......
463464
464465
465466
466
467
467468
468469
469470
......
472473
473474
474475
476
475477
476478
477479
......
501503
502504
503505
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
524527
525528
␉ * Unidentified Chipset␊
␉ */␊
␉␊
␉if (map->chipset == CT_UNKWN) {␊
␉␉verbose("Unknown chipset type and unrecognized bios.\n");␊
␉␉ ␊
␉␉verbose("autoresolution only works with Intel 800/900 series graphic chipsets.\n");␊
␉␊
␉␉verbose("Chipset Id: %x\n", map->chipset_id);␊
␉if ( (map->chipset == CT_UNKWN) || ((map->bios != BT_ATI_1) && (map->bios != BT_NVDA) && (map->bios != BT_1)) )␊
␉␉␉{␊
␉␉␉␉␉printf("Unknown chipset type and unrecognized bios.\n");␊
␉␉␉␉␉␊
␉␉␉␉␉printf("autoresolution only works with Intel 800/900 series graphic chipsets.\n");␊
␉␉␉␉␉␊
␉␉␉␉␉printf("Chipset Id: %x\n", map->chipset_id);␊
␉␉close_vbios(map);␊
␉␉return 0;␊
␉}␊
␊
void patch_vbios(vbios_map * map, UInt32 x, UInt32 y, UInt32 bp, UInt32 htotal, UInt32 vtotal) {␊
␉UInt32 i = 0;␊
␉bool err = TRUE;␊
␉//bool err = TRUE;␊
␉/*␊
␉ * Get the aspect ratio for the requested mode␊
␉ */␊
␉i = x = y = 0;␊
␉␊
␉if (map->bios != BT_NVDA) {␊
␉␉verbose("%d modes to pacth\n", map->modeline_num);␊
␉␉while (i < map->modeline_num) {␊
␉␉␉if (x == 1400) x = 1440;␊
␉␉␉if (x == 1600) x = 1680;␊
␉}␊
␉␊
␉if (map->bios == BT_NVDA) {␊
␉␉err = TRUE;␊
␉␉␊
␉␉x = y = 0;␊
␉␉while (err == TRUE) {␊
␉␉␉if (x == 1400) x = 1440;␊
␉␉␉if (x == 1600) x = 1680;␊
␉␉␉␊
␉␉␉y = x * map->aspect_ratio.height / map->aspect_ratio.width;␊
␉␉␉err = nvidia_set_mode(map, i, &x, &y, MAIN_VESA_TABLE);␊
␉␉␉␊
␉␉}␊
␉␉err = TRUE;␊
␉␉x = y = 0;␊
␉␉while (err == TRUE) {␊
␉␉␉if (x == 1400) x = 1440;␊
␉␉␉if (x == 1600) x = 1680;␊
␉␉␉␊
␉␉␉y = x * map->aspect_ratio.height / map->aspect_ratio.width;␊
␉␉␉err = nvidia_set_mode(map, i, &x, &y, SECOND_VESA_TABLE);␊
␉␉}␊
␉␉␉␉␊
␉␉␉␉i = x = y = 0;␊
␉␉␉␉while (i < map->modeline_num) {␊
␉␉␉␉␉␉if (x == 0)␉␉x = 1024;␊
␉␉␉␉␉␉if (x == 1400)␉x = 1440;␊
␉␉␉␉␉␉if (x == 1600)␉x = 1680;␊
␉␉␉␉␉␉␊
␉␉␉␉␉␉y = x * map->aspect_ratio.height / map->aspect_ratio.width;␊
␉␉␉␉␉␉nvidia_set_mode(map, i, &x, &y, MAIN_VESA_TABLE);␊
␉␉␉␉␉␉i++;␉␉␉␊
␉␉␉␉␉}␊
␉␉␉␉␊
␉␉␉␉i = x = y = 0;␊
␉␉␉␉while (i < map->nv_modeline_num_2) {␊
␉␉␉␉␉␉if (x == 1400) x = 1440;␊
␉␉␉␉␉␉if (x == 1600) x = 1680;␊
␉␉␉␉␉␉␊
␉␉␉␉␉␉y = x * map->aspect_ratio.height / map->aspect_ratio.width;␊
␉␉␉␉␉␉nvidia_set_mode(map, i, &x, &y, SECOND_VESA_TABLE);␊
␉␉␉␉␉␉i++;␊
␉␉␉␉␉}␊
␉}␊
}
branches/diebuche/i386/libsaio/autoresolution.h
4646
4747
4848
49
50
51
52
53
54
55
56
57
58
59
4960
61
5062
5163
5264
......
5870
5971
6072
73
6174
6275
6376
77
6478
6579
6680
......
8094
8195
8296
83
97
8498
8599
86
100
87101
88102
89103
␉BT_UNKWN, BT_1, BT_2, BT_3, BT_ATI_1, BT_ATI_2, BT_NVDA␊
} bios_type;␊
␊
typedef struct {␊
␉␉UInt32␉clock;␊
␉␉UInt16␉x;␊
␉␉UInt16␉hsyncstart;␊
␉␉UInt16␉hsyncend;␊
␉␉UInt16␉htotal;␊
␉␉UInt16␉y;␊
␉␉UInt16␉vsyncstart;␊
␉␉UInt16␉vsyncend;␊
␉␉UInt16␉vtotal;␊
␉} generic_modeline;␊
␊
␊
typedef struct {␊
␉UInt32 chipset_id;␊
␉chipset_type chipset;␊
␉␊
␉char * mode_table;␊
␉char * nv_mode_table_2;␊
␉UInt32 nv_mode_table_2_size;␊
␉␊
␉UInt32 mode_table_size;␊
␉UInt32 modeline_num;␊
␉UInt32 nv_modeline_num_2;␊
␉UInt8 b1, b2;␊
␉␊
␉s_aspect aspect_ratio;␊
␉␉␉␉ UInt16 *hsyncstart, UInt16 *hsyncend, UInt16 *hblank,␊
␉␉␉␉ UInt16 *vsyncstart, UInt16 *vsyncend, UInt16 *vblank);␊
␊
/*void cvt_timings(UInt32 x, UInt32 y, UInt32 freq,␊
void cvt_timings(UInt32 x, UInt32 y, UInt32 freq,␊
␉␉␉␉ unsigned long *clock,␊
␉␉␉␉ UInt16 *hsyncstart, UInt16 *hsyncend, UInt16 *hblank,␊
␉␉␉␉ UInt16 *vsyncstart, UInt16 *vsyncend, UInt16 *vblank, BOOL reduced);*/␊
␉␉␉␉ UInt16 *vsyncstart, UInt16 *vsyncend, UInt16 *vblank, bool reduced);␊
␊
void patch_vbios(vbios_map*, UInt32, UInt32, UInt32, UInt32, UInt32);␊
␊
branches/diebuche/i386/libsaio/nvidia_resolution.c
7070
7171
7272
73
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
74103
75104
76105
......
84113
85114
86115
87
116
88117
118
119
120
121
122
123
124
89125
90126
91127
128
92129
93130
94131
132
133
134
135
136
137
138
139
140
141
95142
96143
97144
......
106153
107154
108155
109
156
110157
158
159
160
161
162
163
164
111165
112166
167
168
169
170
113171
114172
115173
␉␊
␉//This won't be used as there is no garanty this is right␊
␉map->mode_table_size = std_vesa->sHeader.usTable_Size;␊
␊
␉␉/*␊
␉␉ ␉ * Determine how many modes and tables sizes␊
␉␉ ␉ */␊
␉␉␊
␉␉NV_MODELINE *␉mode_ptr =␉␉(NV_MODELINE *)␉␉map->mode_table;␊
␉␉NV_MODELINE_2 *␉mode_2_ptr =␉(NV_MODELINE_2 *)␉map->nv_mode_table_2;␊
␉␉map->modeline_num = map->nv_modeline_num_2 = 0;␊
␉␉␊
␉␉//First Table␊
␉␉while ((mode_ptr[map->modeline_num].reserved3 & 0xff) == 0xff)␊
␉␉␉␉map->modeline_num++;␊
␉␉␊
␉␉verbose("First VESA Table has %d modes\n",map->modeline_num);␊
␉␉if (map->modeline_num == 0) {␊
␉␉␉␉verbose("%d is incorrect, make it a 16\n",map->modeline_num);␊
␉␉␉␉map->modeline_num = 16;␊
␉␉␉}␊
␉␉map->mode_table_size = map->modeline_num * sizeof(NV_MODELINE);␊
␉␉␊
␉␉//Second Table␊
␉␉while (mode_2_ptr[map->nv_modeline_num_2].h_disp <= 0x800)␊
␉␉␉␉map->nv_modeline_num_2++;␊
␉␉␊
␉␉printf("Second VESA Table has %d modes\n",map->nv_modeline_num_2);␊
␉␉if (map->nv_modeline_num_2 == 0) {␊
␉␉␉␉verbose("%d is incorrect, make it a 32\n",map->nv_modeline_num_2);␊
␉␉␉␉map->nv_modeline_num_2 = 32;␊
␉␉␉}␊
␉␉map->nv_mode_table_2_size = map->nv_modeline_num_2 * sizeof(NV_MODELINE_2);␊
␉␊
␉return map;␊
}␊
␊
␉␉if ((*x != 0) && (*y != 0) && ( mode_timing[idx].usH_Active >= 640 )) {␊
␉␉␉␊
␉␉␉verbose("Mode %dx%d -> %dx%d ", mode_timing[idx].usH_Active, mode_timing[idx].usV_Active,␊
␉␉␉␉ *x, *y);␊
␉␉␉␉␉*x, *y);␊
␉␉␉␊
␉␉␉generic_modeline modeline;␊
␉␉␉␊
␉␉␉cvt_timings(*x, *y, 60, &modeline.clock,␊
␉␉␉␉␉␉&modeline.hsyncstart, &modeline.hsyncend,␊
␉␉␉␉␉␉&modeline.htotal, &modeline.vsyncstart,␊
␉␉␉␉␉␉&modeline.vsyncend, &modeline.vtotal, FALSE);␊
␉␉␉␊
␉␉␉mode_timing[idx].usH_Active = *x;␊
␉␉␉mode_timing[idx].usH_Active_minus_One = *x - 1;␊
␉␉␉mode_timing[idx].usH_Active_minus_One_ = *x - 1;␊
␉␉␉␊
␉␉␉mode_timing[idx].usV_Active = *y;␊
␉␉␉mode_timing[idx].usV_Active_minus_One = *y - 1;␊
␉␉␉mode_timing[idx].usV_Active_minus_One_ = *y - 1;␊
␉␉␉␊
␉␉␉mode_timing[idx].usH_Total = modeline.htotal;␊
␉␉␉mode_timing[idx].usH_SyncStart = modeline.hsyncstart;␊
␉␉␉mode_timing[idx].usH_SyncEnd = modeline.hsyncend;␊
␉␉␉␊
␉␉␉mode_timing[idx].usV_Total = modeline.vtotal;␊
␉␉␉mode_timing[idx].usV_SyncStart = modeline.vsyncstart;␊
␉␉␉mode_timing[idx].usV_SyncEnd = modeline.vsyncend;␊
␉␉␉␊
␉␉␉mode_timing[idx].usPixel_Clock = modeline.clock;␊
␉␉}␊
␉␉␊
␉␉*x = mode_timing[idx + 1].usH_Active;␊
␉␉if ((*x != 0) && (*y != 0) && ( mode_timing[idx].h_disp >= 640 )) {␊
␉␉␉␊
␉␉␉verbose("Mode %dx%d -> %dx%d ", mode_timing[idx].h_disp, mode_timing[idx].v_disp,␊
␉␉␉␉ *x, *y);␊
␉␉␉␉␉*x, *y);␊
␉␉␉␊
␉␉␉generic_modeline modeline;␊
␉␉␉␊
␉␉␉cvt_timings(*x, *y, 60, &modeline.clock,␊
␉␉␉␉␉␉&modeline.hsyncstart, &modeline.hsyncend,␊
␉␉␉␉␉␉&modeline.htotal, &modeline.vsyncstart,␊
␉␉␉␉␉␉&modeline.vsyncend, &modeline.vtotal, TRUE);␊
␉␉␉␊
␉␉␉mode_timing[idx].h_disp = *x;␊
␉␉␉mode_timing[idx].v_disp = *y;␊
␉␉␉mode_timing[idx].h_blank = modeline.htotal - *x;␊
␉␉␉mode_timing[idx].h_syncoffset = modeline.hsyncstart - *x;␊
␉␉␉mode_timing[idx].h_syncwidth = modeline.hsyncend - modeline.hsyncstart;␊
␉␉␉mode_timing[idx].v_blank = modeline.vtotal - *y;␊
␉␉}␊
␉␉␊
␉␉*x = mode_timing[idx + 1].h_disp;␊

Archive Download the corresponding diff file

Revision: 133