Chameleon

Chameleon Commit Details

Date:2011-08-14 18:03:41 (8 years 2 months ago)
Author:Azimutz
Commit:1380
Parents: 1379
Message:Delete Package folders and sync the rest with trunk (r1379), on these two.
Changes:
D/branches/azimutz/trunkAutoResolution/package
D/branches/azimutz/trunkGraphicsEnablerModules/package
M/branches/azimutz/trunkGraphicsEnablerModules/i386/boot2/boot.c
M/branches/azimutz/trunkGraphicsEnablerModules/i386/modules/GraphicsEnabler/AMDGraphicsEnabler/ati.c
M/branches/azimutz/trunkGraphicsEnablerModules/i386/boot2/boot.h
M/branches/azimutz/trunkGraphicsEnablerModules/i386/libsaio/stringTable.c
M/branches/azimutz/trunkGraphicsEnablerModules/i386/libsaio/pci_root.c
M/branches/azimutz/trunkAutoResolution
M/branches/azimutz/trunkGraphicsEnablerModules/i386/libsaio/aml_generator.c
M/branches/azimutz/trunkAutoResolution/i386/boot2/boot.c
M/branches/azimutz/trunkGraphicsEnablerModules/Makefile
M/branches/azimutz/trunkGraphicsEnablerModules/i386/libsaio/acpi_patcher.c
M/branches/azimutz/trunkAutoResolution/i386/boot2/boot.h
M/branches/azimutz/trunkGraphicsEnablerModules/i386/libsaio/cpu.c
M/branches/azimutz/trunkGraphicsEnablerModules/i386/boot2/gui.c
M/branches/azimutz/trunkAutoResolution/i386/libsaio/ati.c
M/branches/azimutz/trunkAutoResolution/i386/libsaio/pci_root.c
M/branches/azimutz/trunkAutoResolution/i386/libsaio/stringTable.c
M/branches/azimutz/trunkAutoResolution/i386/libsaio/aml_generator.c
M/branches/azimutz/trunkGraphicsEnablerModules/i386/libsaio/fake_efi.c
M/branches/azimutz/trunkGraphicsEnablerModules/version
M/branches/azimutz/trunkGraphicsEnablerModules/i386/libsaio/disk.c
M/branches/azimutz/trunkAutoResolution/Makefile
M/branches/azimutz/trunkAutoResolution/i386/modules/Makefile
M/branches/azimutz/trunkAutoResolution/i386/libsaio/acpi_patcher.c
M/branches/azimutz/trunkAutoResolution/i386/libsaio/cpu.c
M/branches/azimutz/trunkAutoResolution/i386/boot2/gui.c
M/branches/azimutz/trunkAutoResolution/version
M/branches/azimutz/trunkAutoResolution/i386/libsaio/fake_efi.c
M/branches/azimutz/trunkGraphicsEnablerModules
M/branches/azimutz/trunkAutoResolution/i386/libsaio/disk.c

File differences

branches/azimutz/trunkAutoResolution/version
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2.0-RC5 trunkAutoResolution
2.0 trunkAutoResolution
branches/azimutz/trunkAutoResolution/i386/libsaio/acpi_patcher.c
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0x01, 0x17, 0x50, 0x6D, 0x52, 0x65, 0x66, 0x41, /* ..PmRefA */
0x43, 0x70, 0x75, 0x43, 0x73, 0x74, 0x00, 0x00, /* CpuCst.. */
0x00, 0x10, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* ....INTL */
0x31, 0x03, 0x10, 0x20 /* 1.._*/
0x31, 0x03, 0x10, 0x20/* 1.._*/
};
char resource_template_register_fixedhw[] =
char resource_template_register_fixedhw[] =
{
0x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x7F,
0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x7F,
0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x01, 0x79, 0x00
};
char resource_template_register_systemio[] =
char resource_template_register_systemio[] =
{
0x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x01,
0x08, 0x00, 0x00, 0x15, 0x04, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x79, 0x00,
};
0x08, 0x00, 0x00, 0x15, 0x04, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x79, 0x00,
};
if (Platform.CPU.Vendor != 0x756E6547) {
verbose ("Not an Intel platform: C-States will not be generated !!!\n");
return NULL;
return NULL;
}
if (acpi_cpu_count == 0)
if (acpi_cpu_count == 0)
get_acpi_cpu_names((void*)dsdt, dsdt->Length);
if (acpi_cpu_count > 0)
if (acpi_cpu_count > 0)
{
bool c2_enabled = false;
bool c3_enabled = false;
bool c4_enabled = false;
bool cst_using_sustemio = false;
bool cst_using_systemio = false;
getBoolForKey(kEnableC2State, &c2_enabled, &bootInfo->chameleonConfig);
getBoolForKey(kEnableC3State, &c3_enabled, &bootInfo->chameleonConfig);
getBoolForKey(kEnableC4State, &c4_enabled, &bootInfo->chameleonConfig);
getBoolForKey(kCSTUsingSystemIO, &cst_using_sustemio, &bootInfo->chameleonConfig);
getBoolForKey(kCSTUsingSystemIO, &cst_using_systemio, &bootInfo->chameleonConfig);
c2_enabled = c2_enabled | (fadt->C2_Latency < 100);
c3_enabled = c3_enabled | (fadt->C3_Latency < 1000);
unsigned char cstates_count = 1 + (c2_enabled ? 1 : 0) + (c3_enabled ? 1 : 0);
struct aml_chunk* root = aml_create_node(NULL);
aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
struct aml_chunk* scop = aml_add_scope(root, "\\_PR_");
struct aml_chunk* name = aml_add_name(scop, "CST_");
struct aml_chunk* pack = aml_add_package(name);
aml_add_byte(pack, cstates_count);
aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
struct aml_chunk* scop = aml_add_scope(root, "\\_PR_");
struct aml_chunk* name = aml_add_name(scop, "CST_");
struct aml_chunk* pack = aml_add_package(name);
aml_add_byte(pack, cstates_count);
struct aml_chunk* tmpl = aml_add_package(pack);
if (cst_using_sustemio)
{
// C1
resource_template_register_fixedhw[8] = 0x00;
resource_template_register_fixedhw[9] = 0x00;
resource_template_register_fixedhw[18] = 0x00;
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x01); // C1
aml_add_word(tmpl, 0x0001); // Latency
aml_add_dword(tmpl, 0x000003e8); // Power
uint8_t p_blk_lo, p_blk_hi;
if (c2_enabled) // C2
{
p_blk_lo = acpi_cpu_p_blk + 4;
p_blk_hi = (acpi_cpu_p_blk + 4) >> 8;
tmpl = aml_add_package(pack);
resource_template_register_systemio[11] = p_blk_lo; // C2
resource_template_register_systemio[12] = p_blk_hi; // C2
aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
aml_add_byte(tmpl, 0x02); // C2
aml_add_word(tmpl, 0x0040); // Latency
aml_add_dword(tmpl, 0x000001f4); // Power
}
if (c4_enabled) // C4
{
p_blk_lo = acpi_cpu_p_blk + 5;
p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
tmpl = aml_add_package(pack);
resource_template_register_systemio[11] = p_blk_lo; // C4
resource_template_register_systemio[12] = p_blk_hi; // C4
aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
aml_add_byte(tmpl, 0x04); // C4
aml_add_word(tmpl, 0x0080); // Latency
aml_add_dword(tmpl, 0x000000C8); // Power
}
else if (c3_enabled) // C3
{
p_blk_lo = acpi_cpu_p_blk + 5;
p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
tmpl = aml_add_package(pack);
resource_template_register_systemio[11] = p_blk_lo; // C3
resource_template_register_systemio[12] = p_blk_hi; // C3
aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
aml_add_byte(tmpl, 0x03); // C3
aml_add_word(tmpl, 0x0060); // Latency
aml_add_dword(tmpl, 0x0000015e); // Power
}
}
else
{
// C1
resource_template_register_fixedhw[11] = 0x00; // C1
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x01); // C1
aml_add_word(tmpl, 0x0001); // Latency
aml_add_dword(tmpl, 0x000003e8); // Power
resource_template_register_fixedhw[18] = 0x03;
if (c2_enabled) // C2
{
tmpl = aml_add_package(pack);
resource_template_register_fixedhw[11] = 0x10; // C2
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x02); // C2
aml_add_word(tmpl, 0x0040); // Latency
aml_add_dword(tmpl, 0x000001f4); // Power
}
if (c4_enabled) // C4
{
tmpl = aml_add_package(pack);
resource_template_register_fixedhw[11] = 0x30; // C4
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x04); // C4
aml_add_word(tmpl, 0x0080); // Latency
aml_add_dword(tmpl, 0x000000C8); // Power
}
else if (c3_enabled)
{
tmpl = aml_add_package(pack);
resource_template_register_fixedhw[11] = 0x20; // C3
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x03); // C3
aml_add_word(tmpl, 0x0060); // Latency
aml_add_dword(tmpl, 0x0000015e); // Power
}
}
struct aml_chunk* tmpl = aml_add_package(pack);
if (cst_using_systemio)
{
// C1
resource_template_register_fixedhw[8] = 0x00;
resource_template_register_fixedhw[9] = 0x00;
resource_template_register_fixedhw[18] = 0x00;
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x01); // C1
aml_add_word(tmpl, 0x0001); // Latency
aml_add_dword(tmpl, 0x000003e8); // Power
// Aliaces
int i;
for (i = 0; i < acpi_cpu_count; i++)
uint8_t p_blk_lo, p_blk_hi;
if (c2_enabled) // C2
{
char name[9];
sprintf(name, "_PR_%c%c%c%c", acpi_cpu_name[i][0], acpi_cpu_name[i][1], acpi_cpu_name[i][2], acpi_cpu_name[i][3]);
p_blk_lo = acpi_cpu_p_blk + 4;
p_blk_hi = (acpi_cpu_p_blk + 4) >> 8;
scop = aml_add_scope(root, name);
aml_add_alias(scop, "CST_", "_CST");
tmpl = aml_add_package(pack);
resource_template_register_systemio[11] = p_blk_lo; // C2
resource_template_register_systemio[12] = p_blk_hi; // C2
aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
aml_add_byte(tmpl, 0x02); // C2
aml_add_word(tmpl, 0x0040); // Latency
aml_add_dword(tmpl, 0x000001f4); // Power
}
if (c4_enabled) // C4
{
p_blk_lo = acpi_cpu_p_blk + 5;
p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
tmpl = aml_add_package(pack);
resource_template_register_systemio[11] = p_blk_lo; // C4
resource_template_register_systemio[12] = p_blk_hi; // C4
aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
aml_add_byte(tmpl, 0x04); // C4
aml_add_word(tmpl, 0x0080); // Latency
aml_add_dword(tmpl, 0x000000C8); // Power
}
else if (c3_enabled) // C3
{
p_blk_lo = acpi_cpu_p_blk + 5;
p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
tmpl = aml_add_package(pack);
resource_template_register_systemio[11] = p_blk_lo; // C3
resource_template_register_systemio[12] = p_blk_hi; // C3
aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
aml_add_byte(tmpl, 0x03);// C3
aml_add_word(tmpl, 0x0060);// Latency
aml_add_dword(tmpl, 0x0000015e);// Power
}
}
else
{
// C1
resource_template_register_fixedhw[11] = 0x00; // C1
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x01);// C1
aml_add_word(tmpl, 0x0001);// Latency
aml_add_dword(tmpl, 0x000003e8);// Power
resource_template_register_fixedhw[18] = 0x03;
if (c2_enabled) // C2
{
tmpl = aml_add_package(pack);
resource_template_register_fixedhw[11] = 0x10; // C2
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x02);// C2
aml_add_word(tmpl, 0x0040);// Latency
aml_add_dword(tmpl, 0x000001f4);// Power
}
if (c4_enabled) // C4
{
tmpl = aml_add_package(pack);
resource_template_register_fixedhw[11] = 0x30; // C4
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x04);// C4
aml_add_word(tmpl, 0x0080);// Latency
aml_add_dword(tmpl, 0x000000C8);// Power
}
else if (c3_enabled)
{
tmpl = aml_add_package(pack);
resource_template_register_fixedhw[11] = 0x20; // C3
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x03);// C3
aml_add_word(tmpl, 0x0060);// Latency
aml_add_dword(tmpl, 0x0000015e);// Power
}
}
// Aliaces
int i;
for (i = 0; i < acpi_cpu_count; i++)
{
char name[9];
sprintf(name, "_PR_%c%c%c%c", acpi_cpu_name[i][0], acpi_cpu_name[i][1], acpi_cpu_name[i][2], acpi_cpu_name[i][3]);
scop = aml_add_scope(root, name);
aml_add_alias(scop, "CST_", "_CST");
}
aml_calculate_size(root);
struct acpi_2_ssdt *ssdt = (struct acpi_2_ssdt *)AllocateKernelMemory(root->Size);
aml_write_node(root, (void*)ssdt, 0);
ssdt->Length = root->Size;
aml_destroy_node(root);
//dumpPhysAddr("C-States SSDT content: ", ssdt, ssdt->Length);
verbose ("SSDT with CPU C-States generated successfully\n");
return ssdt;
}
else
else
{
verbose ("ACPI CPUs not found: C-States not generated !!!\n");
}
return NULL;
}
case CPU_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65xx
case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
case CPU_MODEL_SANDY:// Intel Core i3, i5, i7 LGA1155 (32nm)
case CPU_MODEL_SANDY_XEON:// Intel Xeon E3
case CPU_MODEL_SANDY:// Intel Core i3, i5, i7 LGA1155 (32nm)
case CPU_MODEL_SANDY_XEON:// Intel Xeon E3
{
maximum.Control = rdmsr64(MSR_IA32_PERF_STATUS) & 0xff; // Seems it always contains maximum multiplier value (with turbo, that's we need)...
minimum.Control = (rdmsr64(MSR_PLATFORM_INFO) >> 40) & 0xff;
branches/azimutz/trunkAutoResolution/i386/libsaio/pci_root.c
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int getPciRootUID(void)
{
char dsdt_dirSpec[128];
void *new_dsdt;
const char *val;
int len,fsize;
goto out;
}
int fd = search_and_get_acpi_fd("DSDT.aml", &dsdt_filename);
// Try using the file specified with the DSDT option
if (getValueForKey(kDSDT, &dsdt_filename, &len, &bootInfo->chameleonConfig))
{
sprintf(dsdt_dirSpec, dsdt_filename);
}
else
{
sprintf(dsdt_dirSpec, "DSDT.aml");
}
int fd = search_and_get_acpi_fd(dsdt_dirSpec, &dsdt_filename);
// Check booting partition
if (fd<0)
branches/azimutz/trunkAutoResolution/i386/libsaio/aml_generator.c
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}
return offset;
}
}
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333371
334
372
335373
374
375
376
377
378
379
336380
381
337382
383
338384
385
339386
340
341387
342388
343389
344390
345391
392
346393
347394
348395
396
349397
350398
351399
400
352401
402
353403
404
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358410
359
360411
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361414
362
415
363416
417
364418
365
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366421
367
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424
368425
369426
370427
371
372
428
429
373430
374431
375
432
376433
377434
378435
436
379437
438
439
380440
381441
382
383442
384443
385444
386445
387
388446
389447
448
449
390450
391451
452
392453
454
393455
456
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394458
395
396459
397460
461
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398463
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399467
468
400469
401
402
403470
404471
472
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474
405475
406476
407
408477
409478
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480
411481
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413
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414484
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415493
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421498
422
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427501
428
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429503
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433510
434511
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437512
513
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438519
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520
441521
442522
523
524
525
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443531
444
445
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450
532
451533
452
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454534
455535
536
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456540
541
457542
543
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546
458547
459
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461
548
549
462550
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551
466552
467
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553
470554
471
555
472556
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474558
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569
475570
476571
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573
478574
479575
480576
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482578
483579
580
484581
485582
583
486584
487585
586
488587
489588
589
490590
491591
492592
593
493594
494595
495596
......
499600
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603
502604
503605
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609
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611
507612
508613
509614
615
510616
617
511618
512619
513620
621
514622
515623
516624
......
525633
526634
527635
636
528637
529
530638
639
531640
532
533641
534642
535643
......
539647
540648
541649
542
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650
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547652
548
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549656
550
551
657
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552659
553
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660
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555662
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557667
558668
559669
......
11931303
11941304
11951305
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11961314
11971315
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11981317
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12031328
12041329
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12101334
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12121339
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12251358
typedef enum {
CHIP_FAMILY_UNKNOW,
/* IGP */
CHIP_FAMILY_RS600,
CHIP_FAMILY_RS690,
CHIP_FAMILY_RS740,
CHIP_FAMILY_RS780,
CHIP_FAMILY_RS880,
/* R600 */
CHIP_FAMILY_R600,
CHIP_FAMILY_RV610,
CHIP_FAMILY_RV620,
CHIP_FAMILY_RV630,
CHIP_FAMILY_RV635,
CHIP_FAMILY_RV670,
CHIP_FAMILY_RV620,
CHIP_FAMILY_RV635,
CHIP_FAMILY_RS780,
CHIP_FAMILY_RS880,
/* R700 */
CHIP_FAMILY_RV770,
CHIP_FAMILY_RV710,
CHIP_FAMILY_RV730,
CHIP_FAMILY_RV710,
CHIP_FAMILY_RV740,
CHIP_FAMILY_RV770,
/* Evergreen */
CHIP_FAMILY_CEDAR,
CHIP_FAMILY_REDWOOD,
CHIP_FAMILY_JUNIPER,
CHIP_FAMILY_CYPRESS,
CHIP_FAMILY_HEMLOCK,
CHIP_FAMILY_JUNIPER,
CHIP_FAMILY_REDWOOD,
/* Northern Islands */
CHIP_FAMILY_BARTS,
CHIP_FAMILY_CAICOS,
static const char *chip_family_name[] = {
"UNKNOW",
/* IGP */
"RS600",
"RS690",
"RS740",
"RS780",
"RS880",
/* R600 */
"R600",
"RV610",
"RV620",
"RV630",
"RV635",
"RV670",
"RV620",
"RV635",
"RS780",
"RS880",
/* R700 */
"RV770",
"RV710",
"RV730",
"RV710",
"RV740",
"RV770",
/* Evergreen */
"Cedar",// RV810
"Redwood",// RV830
"Juniper",// RV840
"Cypress",// RV870
"Cedar",
"Cypress",
"Hemlock",
"Juniper",
"Redwood",
/* Northern Islands */
"Barts",
"Caicos",
static radeon_card_info_t radeon_cards[] = {
/* Earlier cards are not supported */
// Earlier cards are not supported
//
// Layout is device_id, subsys_id (subsystem id plus vendor id), chip_family_name, display name, frame buffer
// Cards are grouped by device id and vendor id then sorted by subsystem id to make it easier to add new cards
//
{ 0x9400,0x25521002, CHIP_FAMILY_R600,"ATI Radeon HD 2900 XT",kNull},
{ 0x9400,0x30001002, CHIP_FAMILY_R600,"ATI Radeon HD 2900 PRO",kNull},
{ 0x9400,0x25521002, CHIP_FAMILY_R600,"ATI Radeon HD 2900 XT",kNull},
{ 0x9440,0x24401682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot},
{ 0x9440,0x24411682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot},
{ 0x9441,0x24401682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870 X2",kMotmot},
{ 0x9442,0x080110B0, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot},
{ 0x9442,0x24701682, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot},
{ 0x9442,0x24711682, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot},
{ 0x9442,0x080110B0, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot},
{ 0x9442,0xE104174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot},
{ 0x944A,0x30001682, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x30001043, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x30001458, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x30001462, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x30001545, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x30001682, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x3000174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x30001787, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x3000174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x300017AF, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944C,0x24801682, CHIP_FAMILY_RV770,"ATI Radeon HD 4830",kMotmot},
{ 0x944E,0x3260174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4810 Series",kMotmot},
{ 0x944E,0x3261174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4810 series",kMotmot},
{ 0x944E,0x30001787, CHIP_FAMILY_RV770,"ATI Radeon HD 4730 Series",kMotmot},
{ 0x944E,0x30101787, CHIP_FAMILY_RV770,"ATI Radeon HD 4810 Series",kMotmot},
{ 0x944E,0x31001787, CHIP_FAMILY_RV770,"ATI Radeon HD 4820",kMotmot},
{ 0x9480,0x3628103C,CHIP_FAMILY_RV730,"ATI Radeon HD 4650M",kGliff},
{ 0x9480,0x9035104D,CHIP_FAMILY_RV730,"ATI Radeon HD 4650M",kGliff},
{ 0x9480,0x3628103C, CHIP_FAMILY_RV730,"ATI Radeon HD 4650M",kGliff},
{ 0x9480,0x9035104D, CHIP_FAMILY_RV730,"ATI Radeon HD 4650M",kGliff},
{ 0x9490,0x4710174B, CHIP_FAMILY_RV730,"ATI Radeon HD 4710",kNull},
{ 0x9490,0x20031787, CHIP_FAMILY_RV730,"ATI Radeon HD 4670",kFlicker},
{ 0x9490,0x30501787, CHIP_FAMILY_RV730,"ATI Radeon HD 4710",kNull},
{ 0x9490,0x4710174B, CHIP_FAMILY_RV730,"ATI Radeon HD 4710",kNull},
{ 0x9490,0x300017AF, CHIP_FAMILY_RV730,"ATI Radeon HD 4710",kNull},
{ 0x9498,0x30501787, CHIP_FAMILY_RV730,"ATI Radeon HD 4700",kNull},
{ 0x9498,0x31001787, CHIP_FAMILY_RV730,"ATI Radeon HD 4720",kNull},
{ 0x9498,0x21CF1458, CHIP_FAMILY_RV730,"ATI Radeon HD 4600 Series",kNull},
{ 0x9498,0x24511682, CHIP_FAMILY_RV730,"ATI Radeon HD 4650",kNull},
{ 0x9498,0x24521682, CHIP_FAMILY_RV730,"ATI Radeon HD 4650",kNull},
{ 0x9498,0x24541682, CHIP_FAMILY_RV730,"ATI Radeon HD 4650",kNull},
{ 0x9498,0x29331682, CHIP_FAMILY_RV730,"ATI Radeon HD 4670",kNull},
{ 0x9498,0x29341682, CHIP_FAMILY_RV730,"ATI Radeon HD 4670",kNull},
{ 0x9498,0x21CF1458, CHIP_FAMILY_RV730,"ATI Radeon HD 4600 Series",kNull},
{ 0x9498,0x30501787, CHIP_FAMILY_RV730,"ATI Radeon HD 4700",kNull},
{ 0x9498,0x31001787, CHIP_FAMILY_RV730,"ATI Radeon HD 4720",kNull},
{ 0x94B3,0x0D001002, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker},
{ 0x94B3,0x29001682, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker},
{ 0x94B3,0x1170174B, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker},
{ 0x94B3,0x10020D00, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker},
{ 0x94C1,0x0D021002, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x10021002, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Pro",kNull},
{ 0x94C1,0x0D021002, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x0D021028, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Pro",kNull},
{ 0x94C1,0x0D021028, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x21741458, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x10331462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x10401462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x10331462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x10331462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x11101462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C3,0x37161642, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x30001642, CHIP_FAMILY_RV610,"ATI Radeon HD 3410",kNull},
{ 0x94C3,0x03421002, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x30001025, CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull},
{ 0x94C3,0x04021028, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull},
{ 0x94C3,0x03021028, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x04021028, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x216A1458, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x21721458, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x30001458, CHIP_FAMILY_RV610,"ATI Radeon HD 3410",kNull},
{ 0x94C3,0x10321462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x10411462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull},
{ 0x94C3,0x11041462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull},
{ 0x94C3,0x10411462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull},
{ 0x94C3,0x11051462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull},
{ 0x94C3,0x10321462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x30001462, CHIP_FAMILY_RV610,"ATI Radeon HD 3410",kNull},
{ 0x94C3,0x2247148C, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 LE",kNull},
{ 0x94C3,0x3000148C, CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull},
{ 0x94C3,0x2247148C, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 LE",kNull},
{ 0x94C3,0x30001642, CHIP_FAMILY_RV610,"ATI Radeon HD 3410",kNull},
{ 0x94C3,0x37161642, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x3000174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull},
{ 0x94C3,0xE400174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0xE370174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0xE400174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0xE370174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0xE400174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x203817AF, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull},
{ 0x94C3,0x22471787, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 LE",kNull},
{ 0x94C3,0x30001787, CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull},
{ 0x94C3,0x22471787, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 LE",kNull},
{ 0x94C3,0x01011A93, CHIP_FAMILY_RV610,"Qimonda Radeon HD 2400 PRO",kNull},
{ 0x9501,0x25421002, CHIP_FAMILY_RV670,"ATI Radeon HD 3870",kNull},
{ 0x9501,0x30001002, CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull},
{ 0x9501,0x25421002, CHIP_FAMILY_RV670,"ATI Radeon HD 3870",kNull},
{ 0x9501,0x3000174B, CHIP_FAMILY_RV670,"Sapphire Radeon HD 3690",kNull},
{ 0x9501,0x4750174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9501,0x3000174B, CHIP_FAMILY_RV670,"Sapphire Radeon HD 3690",kNull},
{ 0x9501,0x30001787, CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull},
{ 0x9505,0x25421002, CHIP_FAMILY_RV670,"ATI Radeon HD 3850",kNull},
{ 0x9505,0x30001002, CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull},
{ 0x9505,0x25421002, CHIP_FAMILY_RV670,"ATI Radeon HD 3850",kNull},
{ 0x9505,0x30011043, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull},
{ 0x9505,0x3000148C, CHIP_FAMILY_RV670,"ATI Radeon HD 3850",kNull},
{ 0x9505,0x3001148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull},
{ 0x9505,0x3002148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull},
{ 0x9505,0x3001148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull},
{ 0x9505,0x3003148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9505,0x3004148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9505,0x3000174B, CHIP_FAMILY_RV670,"Sapphire Radeon HD 3690",kNull},
{ 0x9505,0x3001174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9505,0x3010174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9505,0x4730174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull},
{ 0x9505,0x3010174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9505,0x3001174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9505,0x3000174B, CHIP_FAMILY_RV670,"Sapphire Radeon HD 3690",kNull},
{ 0x9505,0x30001787, CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull},
{ 0x9505,0x301017AF, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9540,0x4590174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4590",kNull},
{ 0x9540,0x30501787, CHIP_FAMILY_RV710,"ATI Radeon HD 4590",kNull},
{ 0x954F,0x29201682, CHIP_FAMILY_RV710,"ATI Radeon HD 4550",kNull},
{ 0x954F,0x29211682, CHIP_FAMILY_RV710,"ATI Radeon HD 4550",kNull},
{ 0x954F,0x30901682, CHIP_FAMILY_RV710,"XFX Radeon HD 4570",kNull},
{ 0x954F,0x30501787, CHIP_FAMILY_RV710,"ATI Radeon HD 4450",kNull},
{ 0x954F,0x31001787, CHIP_FAMILY_RV710,"ATI Radeon HD 4520",kNull},
{ 0x954F,0x301017AF, CHIP_FAMILY_RV710,"ATI Radeon HD 4450",kNull},
{ 0x954F,0x3000174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4520",kNull},
{ 0x954F,0x4450174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4450",kNull},
{ 0x954F,0x3000174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4520",kNull},
{ 0x954F,0x4570174B, CHIP_FAMILY_RV710,"Sapphire Radeon HD 4570",kNull},
{ 0x954F,0xE990174B,CHIP_FAMILY_RV710,"Sapphire Radeon HD 4350",kNull},
{ 0x954F,0xE990174B, CHIP_FAMILY_RV710,"Sapphire Radeon HD 4350",kNull},
{ 0x954F,0x301017AF, CHIP_FAMILY_RV710,"ATI Radeon HD 4450",kNull},
{ 0x9552,0x04341028, CHIP_FAMILY_RV710,"ATI Mobility Radeon 4330",kShrike},
{ 0x9552,0x308B103C, CHIP_FAMILY_RV710,"ATI Mobility Radeon HD 4300 Series", kShrike},
{ 0x9552,0x3000148C, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull},
{ 0x9552,0x3000174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull},
{ 0x9552,0x30001787, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull},
{ 0x9552,0x300017AF, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull},
{ 0x9552,0x04341028, CHIP_FAMILY_RV710,"ATI Mobility Radeon 4330",kShrike},
{ 0x9553,0x18751043, CHIP_FAMILY_RV710,"ATI Mobility Radeon HD 4570",kShrike},
{ 0x9553,0x1B321043, CHIP_FAMILY_RV710,"ATI Mobility Radeon HD 4570",kShrike},
{ 0x9581,0x95811002, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull},
{ 0x9581,0x3000148C, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull},
{ 0x9583,0x3000148C, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull},
{ 0x9588,0x01021A93, CHIP_FAMILY_RV630,"Qimonda Radeon HD 2600 XT",kNull},
{ 0x9589,0x30001462, CHIP_FAMILY_RV630,"ATI Radeon HD 3610",kNull},
{ 0x9589,0x30001642, CHIP_FAMILY_RV630,"ATI Radeon HD 3610",kNull},
{ 0x9589,0x0E41174B, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull},
{ 0x9589,0x30001787, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull},
{ 0x9589,0x01001A93, CHIP_FAMILY_RV630,"Qimonda Radeon HD 2600 PRO",kNull},
{ 0x9591,0x2303148C, CHIP_FAMILY_RV635,"ATI Radeon HD 3600 Series",kNull},
//Azi: most of the 9598 are rv630, according to http://developer.amd.com/gpu_assets/ATI_Device_IDs_xxx_xx.txt
{ 0x9598,0xB3831002, CHIP_FAMILY_RV635,"ATI All-in-Wonder HD",kNull},
{ 0x9598,0x30001043, CHIP_FAMILY_RV635,"HD3730",kNull},
{ 0x9598,0x30011043, CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull},
{ 0x9598,0x30001043, CHIP_FAMILY_RV635,"HD3730",kNull},
{ 0x9598,0x3000148C, CHIP_FAMILY_RV635,"ATI Radeon HD 3730",kNull},
{ 0x9598,0x3001148C, CHIP_FAMILY_RV635,"ATI Radeon HD 4580",kNull},
{ 0x9598,0x3031148C, CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull},
{ 0x9598,0x3001148C, CHIP_FAMILY_RV635,"ATI Radeon HD 4580",kNull},
{ 0x9598,0x30001545, CHIP_FAMILY_RV635,"VisionTek Radeon HD 2600 XT",kNull},
{ 0x9598,0x30011545, CHIP_FAMILY_RV635,"VisionTek Radeon HD 2600 Pro",kNull},
{ 0x9598,0x30001545, CHIP_FAMILY_RV635,"VisionTek Radeon HD 2600 XT",kNull},
{ 0x9598,0x3000174B, CHIP_FAMILY_RV635,"Sapphire Radeon HD 3730",kNull},
{ 0x9598,0x3001174B, CHIP_FAMILY_RV635,"Sapphire Radeon HD 3750",kNull},
{ 0x9598,0x4570174B, CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull},
{ 0x9598,0x4580174B, CHIP_FAMILY_RV635,"ATI Radeon HD 4580",kNull},
{ 0x9598,0x4610174B, CHIP_FAMILY_RV635,"ATI Radeon HD 4610",kNull},
{ 0x9598,0x3000174B, CHIP_FAMILY_RV635,"Sapphire Radeon HD 3730",kNull},
{ 0x9598,0x3001174B, CHIP_FAMILY_RV635,"Sapphire Radeon HD 3750",kNull},
{ 0x9598,0x300117AF, CHIP_FAMILY_RV635,"ATI Radeon HD 3750",kNull},
{ 0x9598,0x301017AF, CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull},
{ 0x9598,0x301117AF, CHIP_FAMILY_RV635,"ATI Radeon HD 4580",kNull},
{ 0x9598,0x300117AF, CHIP_FAMILY_RV635,"ATI Radeon HD3750",kNull},
{ 0x9598,0x30501787, CHIP_FAMILY_RV635,"ATI Radeon HD 4610",kNull},
{ 0x95C0,0x3000148C, CHIP_FAMILY_RV620,"ATI Radeon HD 3550",kNull},
{ 0x95C0,0xE3901745, CHIP_FAMILY_RV620,"ATI Radeon HD 3550",kNull},
{ 0x95C0,0x3000174B, CHIP_FAMILY_RV620,"Sapphire Radeon HD 3550",kNull},
{ 0x95C0,0x3002174B, CHIP_FAMILY_RV620,"ATI Radeon HD 3570",kNull},
{ 0x95C0,0x3020174B, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C0,0x3000174B, CHIP_FAMILY_RV620,"Sapphire Radeon HD 3550",kNull},
{ 0x95C5,0x3000148C, CHIP_FAMILY_RV620,"ATI Radeon HD 3450",kNull},
{ 0x95C5,0x3001148C, CHIP_FAMILY_RV620,"ATI Radeon HD 3550",kNull},
{ 0x95C5,0x3002148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4230",kNull},
{ 0x95C5,0x3033148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4230",kNull},
{ 0x95C5,0x3003148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C5,0x3032148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C5,0x3033148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4230",kNull},
{ 0x95C5,0x3010174B, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C5,0x4250174B, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C5,0x30501787, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C5,0x301017AF, CHIP_FAMILY_RV620,"ATI Radeon HD 4230",kNull},
{ 0x95C5,0x01041A93, CHIP_FAMILY_RV620,"Qimonda Radeon HD 3450",kNull},
{ 0x95C5,0x01051A93, CHIP_FAMILY_RV620,"Qimonda Radeon HD 3450",kNull},
{ 0x95C5,0x01041A93, CHIP_FAMILY_RV620,"Qimonda Radeon HD 3450",kNull},
/* Evergreen */
{ 0x6898,0x0B001002, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kZonalis},
{ 0x6898,0x032E1043, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kUakari},
{ 0x6898,0x00D0106B, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kLangur},
{ 0x6898,0xE140174B, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kUakari},
{ 0x6898,0x29611682, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kUakari},
{ 0x6898,0x0B001002, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kZonalis},
{ 0x6898,0x00D0106B, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kLangur},
{ 0x6899,0x21E41458, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari},
{ 0x6899,0xE140174B, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari},
{ 0x6899,0x200A1787, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari},
{ 0x6899,0x22901787, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari},
{ 0x6899,0xE140174B, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari},
{ 0x689C,0x03521043, CHIP_FAMILY_HEMLOCK,"ASUS ARES",kUakari},
{ 0x689C,0x039E1043, CHIP_FAMILY_HEMLOCK,"ASUS EAH5870 Series",kUakari},
{ 0x689C,0x30201682, CHIP_FAMILY_HEMLOCK,"ATI Radeon HD 5970",kUakari},
{ 0x68A8,0x050E1025,CHIP_FAMILY_CYPRESS,"AMD Radeon HD 6850M",kUakari}, // issue #89
{ 0x68A1,0x144D103C,CHIP_FAMILY_CYPRESS,"ATI Mobility Radeon HD 5800",kNomascus},
{ 0x68A8,0x050E1025, CHIP_FAMILY_CYPRESS,"AMD Radeon HD 6850M",kUakari},
{ 0x68B8,0x00CF106B, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kHoolock},
{ 0x68B8,0x29901682, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x29911682, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x1482174B, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0xE147174B, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x21D71458, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x1482174B, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x29901682, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x29911682, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x200B1787, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x22881787, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x00CF106B, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kHoolock},
{ 0x68C0,0x1594103C,CHIP_FAMILY_REDWOOD,"AMD Radeon HD 6570M",kNull}, // issue #91
//Azi: from Slice { 0x100268C0, "ATI Radeon 5670 Series", "Galago"}
// http://www.insanelymac.com/forum/index.php?s=&showtopic=255866&view=findpost&p=1695482
{ 0x68C0,0x1594103C, CHIP_FAMILY_REDWOOD,"AMD Radeon HD 6570M",kNull},
{ 0x68C1,0x033E1025,CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5650",kNull},
{ 0x68C1,0x033E1025, CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5650",kNull},
{ 0x68D8,0x301117AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5690",kNull},
{ 0x68D8,0x301017AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull},
{ 0x68D8,0x30001787, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull},
{ 0x68C8,0x2306103C, CHIP_FAMILY_REDWOOD,"ATI FirePro V4800 (FireGL)",kNull},
{ 0x68D8,0x03561043, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kBaboon},
{ 0x68D8,0x21D91458, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kBaboon},
{ 0x68D8,0x5690174B, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5690",kNull},
{ 0x68D8,0x5730174B, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull},
{ 0x68D8,0x21D91458, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kBaboon},
{ 0x68D8,0x03561043, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kBaboon},
{ 0x68D8,0xE151174B, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kBaboon},
{ 0x68D8,0x30001787, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull},
{ 0x68D8,0x301017AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull},
{ 0x68D8,0x301117AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5690",kNull},
{ 0x68D9,0x301017AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull},
{ 0x68DA,0x301017AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull},
{ 0x68DA,0x30001787, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull},
{ 0x68DA,0x5630174B, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull},
{ 0x68DA,0x30001787, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull},
{ 0x68DA,0x301017AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull},
{ 0x68E0,0x04561028, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470M",kEulemur},
{ 0x68E0,0x1433103C, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470M",kEulemur},
{ 0x68E1,0x1426103C, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5430M",kEulemur},
{ 0x68E0,0x1433103C, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470M",kEulemur},
{ 0x68E0,0x04561028, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470M",kEulemur},
{ 0x68F9, 0x20091787, CHIP_FAMILY_CEDAR, "ATI Radeon HD 5450", kEulemur },
{ 0x68F9, 0x22911787, CHIP_FAMILY_CEDAR, "ATI Radeon HD 5450", kEulemur },
{ 0x68F9,0x301317AF, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull},
{ 0x68F9,0x301117AF, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull},
{ 0x68F9,0x30001787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull},
{ 0x68F9,0x5470174B, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull},
{ 0x68F9,0x301217AF, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5490",kNull},
{ 0x68F9,0x30021787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5490",kNull},
{ 0x68F9,0x5490174B, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5490",kNull},
{ 0x68F9,0x5530174B, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5530",kNull},
{ 0x68F9,0x20091787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5450",kEulemur},
{ 0x68F9,0x22911787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5450",kEulemur},
{ 0x68F9,0x30001787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull},
{ 0x68F9,0x30011787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5530",kNull},
{ 0x68F9,0x30021787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5490",kNull},
{ 0x68F9,0x301117AF, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull},
{ 0x68F9,0x301217AF, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5490",kNull},
{ 0x68F9,0x301317AF, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull},
/* Northen Islands */
{ 0x6718,0x0B001002,CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6970",kNull},
{ 0x6718,0x31301682,CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6970",kNull},
{ 0x6718,0x67181002,CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6970",kNull},
{ 0x6718,0x0B001002, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6970",kNull},
{ 0x6718,0x67181002, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6970",kNull},
{ 0x6738,0x67381002,CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed},
{ 0x6739,0x67391002,CHIP_FAMILY_BARTS,"AMD Radeon HD 6850",kDuckweed},
{ 0x6739,0x21F81458,CHIP_FAMILY_BARTS,"AMD Radeon HD 6850",kDuckweed},
{ 0x6718,0x31301682, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6970",kNull},
{ 0x6741,0x050E1025,CHIP_FAMILY_TURKS,"AMD Radeon HD 6650M",kNull}, // issue 121
{ 0x6741,0x05131025,CHIP_FAMILY_TURKS,"AMD Radeon HD 6650M",kNull}, // Nai22
{ 0x6741,0x1646103C,CHIP_FAMILY_TURKS,"AMD Radeon HD 6750M",kNull}, // issue 88
{ 0x6738,0x67381002, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed},
{ 0x6759,0xE193174B,CHIP_FAMILY_TURKS,"AMD Radeon HD 6570",kNull},
{ 0x6739,0x67391002, CHIP_FAMILY_BARTS,"AMD Radeon HD 6850",kDuckweed},
{ 0x6760,0x1CB21043,CHIP_FAMILY_RV730,"AMD Radeon HD 6470M",kNull},
{ 0x6739,0x21F81458, CHIP_FAMILY_BARTS,"AMD Radeon HD 6850",kDuckweed},
{ 0x6740,0x1657103C, CHIP_FAMILY_TURKS,"AMD Radeon HD 6770M",kNull},
{ 0x6741,0x050E1025, CHIP_FAMILY_TURKS,"AMD Radeon HD 6650M",kNull},
{ 0x6741,0x05131025, CHIP_FAMILY_TURKS,"AMD Radeon HD 6650M",kNull},
{ 0x6741,0x1646103C, CHIP_FAMILY_TURKS,"AMD Radeon HD 6750M",kNull},
{ 0x6759,0xE193174B, CHIP_FAMILY_TURKS,"AMD Radeon HD 6570",kNull},
{ 0x6760,0x1CB21043, CHIP_FAMILY_RV730,"AMD Radeon HD 6470M",kNull},
/* standard/default models */
{ 0x9400,0x00000000, CHIP_FAMILY_R600,"ATI Radeon HD 2900 XT",kNull},
{ 0x9405,0x00000000, CHIP_FAMILY_R600,"ATI Radeon HD 2900 GT",kNull},
{ 0x9440,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x9441,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4870 X2",kMotmot},
{ 0x9442,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x9443,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4850 X2",kMotmot},
{ 0x944C,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944E,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4700 Series",kMotmot},
{ 0x9450,0x00000000, CHIP_FAMILY_RV770,"AMD FireStream 9270",kMotmot},
{ 0x9452,0x00000000, CHIP_FAMILY_RV770,"AMD FireStream 9250",kMotmot},
{ 0x9460,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x9462,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x9490,0x00000000, CHIP_FAMILY_RV730,"ATI Radeon HD 4600 Series",kFlicker},
{ 0x9498,0x00000000, CHIP_FAMILY_RV730,"ATI Radeon HD 4600 Series",kFlicker},
{ 0x94B3,0x00000000, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker},
{ 0x94B4,0x00000000, CHIP_FAMILY_RV740,"ATI Radeon HD 4700 Series",kFlicker},
{ 0x94B5,0x00000000, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker},
{ 0x94C1,0x00000000, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Series",kIago},
{ 0x94C3,0x00000000, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Series",kIago},
{ 0x94C7,0x00000000, CHIP_FAMILY_RV610,"ATI Radeon HD 2350",kIago},
{ 0x9505,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3800 Series",kMegalodon},
{ 0x9507,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3830",kMegalodon},
{ 0x950F,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3870 X2",kMegalodon},
{ 0x9513,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3850 X2",kMegalodon},
{ 0x9519,0x00000000, CHIP_FAMILY_RV670,"AMD FireStream 9170",kMegalodon},
{ 0x9540,0x00000000, CHIP_FAMILY_RV710,"ATI Radeon HD 4550",kNull},
{ 0x954F,0x00000000, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull},
{ 0x9553,0x00000000, CHIP_FAMILY_RV710,"ATI Mobility Radeon HD 4500/5100 Series",kShrike},
{ 0x9553,0x00000000, CHIP_FAMILY_RV710,"ATI Mobility Radeon HD 4500/5100 Series",kShrike },
{ 0x9588,0x00000000, CHIP_FAMILY_RV630,"ATI Radeon HD 2600 XT",kLamna},
{ 0x9589,0x00000000, CHIP_FAMILY_RV630,"ATI Radeon HD 2600 PRO",kLamna},
{ 0x958A,0x00000000, CHIP_FAMILY_RV630,"ATI Radeon HD 2600 X2 Series",kLamna},
{ 0x9598,0x00000000, CHIP_FAMILY_RV635,"ATI Radeon HD 3600 Series",kMegalodon},
{ 0x95C0,0x00000000, CHIP_FAMILY_RV620,"ATI Radeon HD 3400 Series",kIago},
{ 0x95C5,0x00000000, CHIP_FAMILY_RV620,"ATI Radeon HD 3400 Series",kIago},
/* IGP */
{ 0x9610,0x00000000, CHIP_FAMILY_RS780,"ATI Radeon HD 3200 Graphics",kNull},
{ 0x9611,0x00000000, CHIP_FAMILY_RS780,"ATI Radeon 3100 Graphics",kNull},
{ 0x9614,0x00000000, CHIP_FAMILY_RS780,"ATI Radeon HD 3300 Graphics",kNull},
{ 0x6898,0x00000000, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5800 Series",kUakari},
{ 0x6899,0x00000000, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5800 Series",kUakari},
{ 0x689C,0x00000000, CHIP_FAMILY_HEMLOCK,"ATI Radeon HD 5900 Series",kUakari},
{ 0x689E,0x00000000, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5800 Series",kUakari},
{ 0x689C,0x00000000, CHIP_FAMILY_HEMLOCK,"ATI Radeon HD 5900 Series",kUakari},
{ 0x68B8,0x00000000, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5700 Series",kVervet},
{ 0x68B9,0x00000000, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5600 Series",kVervet},
{ 0x68B8,0x00000000, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5700 Series",kVervet},
{ 0x68BE,0x00000000, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5700 Series",kVervet},
{ 0x68D8,0x00000000, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5600 Series",kBaboon},
{ 0x68F9,0x00000000, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5400 Series",kNull},
/* Northen Islands */
{ 0x6718,0x00000000,CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6970 Series",kNull},
{ 0x6719, 0x00000000, CHIP_FAMILY_CAYMAN, "AMD Radeon HD 6950 Series", kNull },
{ 0x6738, 0x00000000, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870 Series",kDuckweed},
{ 0x6739,0x00000000,CHIP_FAMILY_BARTS,"AMD Radeon HD 6850 Series",kDuckweed},
{ 0x673E,0x00000000,CHIP_FAMILY_BARTS,"AMD Radeon HD 6790 Series",kNull},
{ 0x6718,0x00000000, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6970 Series",kNull},
{ 0x6719,0x00000000, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6950 Series",kNull},
{ 0x6741,0x00000000,CHIP_FAMILY_TURKS,"AMD Radeon HD 6600M/6700M Series",kNull},
{ 0x6738,0x00000000, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870 Series",kDuckweed},
{ 0x6739,0x00000000, CHIP_FAMILY_BARTS,"AMD Radeon HD 6850 Series",kDuckweed},
{ 0x673E,0x00000000, CHIP_FAMILY_BARTS,"AMD Radeon HD 6790 Series",kNull},
{ 0x6758,0x00000000,CHIP_FAMILY_TURKS,"AMD Radeon HD 6670 Series",kNull},
{ 0x6759,0x00000000,CHIP_FAMILY_TURKS,"AMD Radeon HD 6500 Series",kNull},
{ 0x6740,0x00000000, CHIP_FAMILY_TURKS,"AMD Radeon HD 6700M Series",kNull},
{ 0x6741,0x00000000, CHIP_FAMILY_TURKS,"AMD Radeon HD 6600M/6700M Series", kNull},
{ 0x6770,0x00000000,CHIP_FAMILY_CAICOS,"AMD Radeon HD 6400 Series",kNull},
{ 0x6779,0x00000000,CHIP_FAMILY_CAICOS,"AMD Radeon HD 6450 Series",kNull},
{ 0x6758,0x00000000, CHIP_FAMILY_TURKS,"AMD Radeon HD 6670 Series",kNull},
{ 0x6759,0x00000000, CHIP_FAMILY_TURKS,"AMD Radeon HD 6500 Series",kNull},
{ 0x0000,0x00000000,CHIP_FAMILY_UNKNOW,NULL,kNull}
{ 0x6770,0x00000000, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6400 Series",kNull},
{ 0x6779,0x00000000, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6450 Series",kNull},
{ 0x0000,0x00000000, CHIP_FAMILY_UNKNOW,NULL,kNull}
};
typedef struct {
}
}
//card->ports = 2; // default - Azi: default is card_configs
if (card->info->chip_family >= CHIP_FAMILY_CEDAR)
{
card->flags |= EVERGREEN;
//card->ports = 3; //Azi: use the AtiPorts key if needed
}
//atN = 0;
// Check AtiConfig key for a framebuffer name,
card->cfg_name = getStringForKey(kAtiConfig, &bootInfo->chameleonConfig);
// if none,
if (!card->cfg_name)
{
// use the device fb key on radeon_cards, to retrive the default name from card_configs.
card->cfg_name = card_configs[card->info->cfg_name].name;
card->ports = card_configs[card->info->cfg_name].ports;
// and leave ports alone!
//card->ports = card_configs[card->info->cfg_name].ports;
// which means one of the fb's or kNull
verbose("Framebuffer set to device's default: %s\n", card->cfg_name);
}
else
{
for (i = 0; i < kCfgEnd; i++)
if (strcmp(card->cfg_name, card_configs[i].name) == 0)
card->ports = card_configs[i].ports;
// else, use the fb name returned by AtiConfig.
verbose("(AtiConfig) Framebuffer set to: %s\n", card->cfg_name);
}
if (card->info->chip_family >= CHIP_FAMILY_CEDAR)
// Check AtiPorts key for nr of ports,
card->ports = getIntForKey(kAtiPorts, &n_ports, &bootInfo->chameleonConfig);
// if a value bigger than 0 ?? is found, (do we need >= 0 ?? that's null FB on card_configs)
if (n_ports > 0)
{
card->flags |= EVERGREEN;
card->ports = 3; //Azi: not sure of the usefulness ??
card->ports = n_ports; // use it.
verbose("(AtiPorts) Nr of ports set to: %d\n", card->ports);
}
else// if (card->cfg_name > 0) // do we want 0 ports if fb is kNull or mistyped ?
{
// else, match fb name with card_configs list and retrive default nr of ports.
for (i = 0; i < kCfgEnd; i++)
if (strcmp(card->cfg_name, card_configs[i].name) == 0)
card->ports = card_configs[i].ports; // default
verbose("Nr of ports set to framebuffer's default: %d\n", card->ports);
}
//else
//card->ports = 2/1 ?; // set a min if 0 ports ?
//verbose("Nr of ports set to min: %d\n", card->ports);
getIntForKey(kAtiPorts, &n_ports, &bootInfo->bootConfig);
if (n_ports > 0){
card->ports = n_ports;
verbose("AtiPorts set to %d\n",n_ports); //AniV
}
sprintf(name, "ATY,%s", card->cfg_name);
aty_name.type = kStr;
aty_name.size = strlen(name) + 1;
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/*
* Copyright 2008 Islam Ahmed Zaid. All rights reserved. <azismed@gmail.com>
* Copyright 2008 Islam Ahmed Zaid. All rights reserved. <azismed@gmail.com>
* AsereBLN: 2009: cleanup and bugfix
*/
*/
static uint64_t measure_tsc_frequency(void)
{
uint64_t tscStart;
uint64_t tscEnd;
uint64_t tscDelta = 0xffffffffffffffffULL;
unsigned long pollCount;
uint64_t retval = 0;
int i;
/* Time how many TSC ticks elapse in 30 msec using the 8254 PIT
* counter 2. We run this loop 3 times to make sure the cache
* is hot and we take the minimum delta from all of the runs.
* That is to say that we're biased towards measuring the minimum
* number of TSC ticks that occur while waiting for the timer to
* expire. That theoretically helps avoid inconsistencies when
* running under a VM if the TSC is not virtualized and the host
* steals time. The TSC is normally virtualized for VMware.
*/
for(i = 0; i < 10; ++i)
{
enable_PIT2();
set_PIT2_mode0(CALIBRATE_LATCH);
tscStart = rdtsc64();
pollCount = poll_PIT2_gate();
tscEnd = rdtsc64();
/* The poll loop must have run at least a few times for accuracy */
if(pollCount <= 1)
continue;
/* The TSC must increment at LEAST once every millisecond. We
* should have waited exactly 30 msec so the TSC delta should
* be >= 30. Anything less and the processor is way too slow.
*/
if((tscEnd - tscStart) <= CALIBRATE_TIME_MSEC)
continue;
// tscDelta = MIN(tscDelta, (tscEnd - tscStart))
if( (tscEnd - tscStart) < tscDelta )
tscDelta = tscEnd - tscStart;
}
/* tscDelta is now the least number of TSC ticks the processor made in
* a timespan of 0.03 s (e.g. 30 milliseconds)
* Linux thus divides by 30 which gives the answer in kiloHertz because
* 1 / ms = kHz. But we're xnu and most of the rest of the code uses
* Hz so we need to convert our milliseconds to seconds. Since we're
* dividing by the milliseconds, we simply multiply by 1000.
*/
/* Unlike linux, we're not limited to 32-bit, but we do need to take care
* that we're going to multiply by 1000 first so we do need at least some
* arithmetic headroom. For now, 32-bit should be enough.
* Also unlike Linux, our compiler can do 64-bit integer arithmetic.
*/
if(tscDelta > (1ULL<<32))
retval = 0;
else
{
retval = tscDelta * 1000 / 30;
}
disable_PIT2();
return retval;
uint64_t tscStart;
uint64_t tscEnd;
uint64_t tscDelta = 0xffffffffffffffffULL;
unsigned long pollCount;
uint64_t retval = 0;
int i;
/* Time how many TSC ticks elapse in 30 msec using the 8254 PIT
* counter 2. We run this loop 3 times to make sure the cache
* is hot and we take the minimum delta from all of the runs.
* That is to say that we're biased towards measuring the minimum
* number of TSC ticks that occur while waiting for the timer to
* expire. That theoretically helps avoid inconsistencies when
* running under a VM if the TSC is not virtualized and the host
* steals time. The TSC is normally virtualized for VMware.
*/
for(i = 0; i < 10; ++i)
{
enable_PIT2();
set_PIT2_mode0(CALIBRATE_LATCH);
tscStart = rdtsc64();
pollCount = poll_PIT2_gate();
tscEnd = rdtsc64();
/* The poll loop must have run at least a few times for accuracy */
if (pollCount <= 1)
continue;
/* The TSC must increment at LEAST once every millisecond.
* We should have waited exactly 30 msec so the TSC delta should
* be >= 30. Anything less and the processor is way too slow.
*/
if ((tscEnd - tscStart) <= CALIBRATE_TIME_MSEC)
continue;
// tscDelta = MIN(tscDelta, (tscEnd - tscStart))
if ( (tscEnd - tscStart) < tscDelta )
tscDelta = tscEnd - tscStart;
}
/* tscDelta is now the least number of TSC ticks the processor made in
* a timespan of 0.03 s (e.g. 30 milliseconds)
* Linux thus divides by 30 which gives the answer in kiloHertz because
* 1 / ms = kHz. But we're xnu and most of the rest of the code uses
* Hz so we need to convert our milliseconds to seconds. Since we're
* dividing by the milliseconds, we simply multiply by 1000.
*/
/* Unlike linux, we're not limited to 32-bit, but we do need to take care
* that we're going to multiply by 1000 first so we do need at least some
* arithmetic headroom. For now, 32-bit should be enough.
* Also unlike Linux, our compiler can do 64-bit integer arithmetic.
*/
if (tscDelta > (1ULL<<32))
retval = 0;
else
{
retval = tscDelta * 1000 / 30;
}
disable_PIT2();
return retval;
}
#if 0
/*
* DFE: Measures the Max Performance Frequency in Hz (64-bit)
*/
static uint64_t measure_mperf_frequency(void)
{
uint64_t mperfStart;
uint64_t mperfEnd;
uint64_t mperfDelta = 0xffffffffffffffffULL;
unsigned long pollCount;
uint64_t retval = 0;
int i;
/* Time how many MPERF ticks elapse in 30 msec using the 8254 PIT
* counter 2. We run this loop 3 times to make sure the cache
* is hot and we take the minimum delta from all of the runs.
* That is to say that we're biased towards measuring the minimum
* number of MPERF ticks that occur while waiting for the timer to
* expire.
*/
for(i = 0; i < 10; ++i)
{
enable_PIT2();
set_PIT2_mode0(CALIBRATE_LATCH);
mperfStart = rdmsr64(MSR_AMD_MPERF);
pollCount = poll_PIT2_gate();
mperfEnd = rdmsr64(MSR_AMD_MPERF);
/* The poll loop must have run at least a few times for accuracy */
if(pollCount <= 1)
continue;
/* The MPERF must increment at LEAST once every millisecond. We
* should have waited exactly 30 msec so the MPERF delta should
* be >= 30. Anything less and the processor is way too slow.
*/
if((mperfEnd - mperfStart) <= CALIBRATE_TIME_MSEC)
continue;
// tscDelta = MIN(tscDelta, (tscEnd - tscStart))
if( (mperfEnd - mperfStart) < mperfDelta )
mperfDelta = mperfEnd - mperfStart;
}
/* mperfDelta is now the least number of MPERF ticks the processor made in
* a timespan of 0.03 s (e.g. 30 milliseconds)
*/
if(mperfDelta > (1ULL<<32))
retval = 0;
else
{
retval = mperfDelta * 1000 / 30;
}
disable_PIT2();
return retval;
}
#endif
/*
* Original comment/code:
* "DFE: Measures the Max Performance Frequency in Hz (64-bit)"
*
* Measures the Actual Performance Frequency in Hz (64-bit)
* (just a naming change, mperf --> aperf )
*/
static uint64_t measure_aperf_frequency(void)
{
uint64_t aperfStart;
uint64_t aperfEnd;
uint64_t aperfDelta = 0xffffffffffffffffULL;
unsigned long pollCount;
uint64_t retval = 0;
int i;
/* Time how many APERF ticks elapse in 30 msec using the 8254 PIT
* counter 2. We run this loop 3 times to make sure the cache
* is hot and we take the minimum delta from all of the runs.
* That is to say that we're biased towards measuring the minimum
* number of APERF ticks that occur while waiting for the timer to
* expire.
*/
for(i = 0; i < 10; ++i)
{
enable_PIT2();
set_PIT2_mode0(CALIBRATE_LATCH);
aperfStart = rdmsr64(MSR_AMD_APERF);
pollCount = poll_PIT2_gate();
aperfEnd = rdmsr64(MSR_AMD_APERF);
/* The poll loop must have run at least a few times for accuracy */
if(pollCount <= 1)
continue;
/* The TSC must increment at LEAST once every millisecond. We
* should have waited exactly 30 msec so the APERF delta should
* be >= 30. Anything less and the processor is way too slow.
*/
if((aperfEnd - aperfStart) <= CALIBRATE_TIME_MSEC)
continue;
// tscDelta = MIN(tscDelta, (tscEnd - tscStart))
if( (aperfEnd - aperfStart) < aperfDelta )
aperfDelta = aperfEnd - aperfStart;
}
/* mperfDelta is now the least number of MPERF ticks the processor made in
* a timespan of 0.03 s (e.g. 30 milliseconds)
*/
if(aperfDelta > (1ULL<<32))
retval = 0;
else
{
retval = aperfDelta * 1000 / 30;
}
disable_PIT2();
return retval;
uint64_t aperfStart;
uint64_t aperfEnd;
uint64_t aperfDelta = 0xffffffffffffffffULL;
unsigned long pollCount;
uint64_t retval = 0;
int i;
/* Time how many APERF ticks elapse in 30 msec using the 8254 PIT
* counter 2. We run this loop 3 times to make sure the cache
* is hot and we take the minimum delta from all of the runs.
* That is to say that we're biased towards measuring the minimum
* number of APERF ticks that occur while waiting for the timer to
* expire.
*/
for(i = 0; i < 10; ++i)
{
enable_PIT2();
set_PIT2_mode0(CALIBRATE_LATCH);
aperfStart = rdmsr64(MSR_AMD_APERF);
pollCount = poll_PIT2_gate();
aperfEnd = rdmsr64(MSR_AMD_APERF);
/* The poll loop must have run at least a few times for accuracy */
if (pollCount <= 1)
continue;
/* The TSC must increment at LEAST once every millisecond.
* We should have waited exactly 30 msec so the APERF delta should
* be >= 30. Anything less and the processor is way too slow.
*/
if ((aperfEnd - aperfStart) <= CALIBRATE_TIME_MSEC)
continue;
// tscDelta = MIN(tscDelta, (tscEnd - tscStart))
if ( (aperfEnd - aperfStart) < aperfDelta )
aperfDelta = aperfEnd - aperfStart;
}
/* mperfDelta is now the least number of MPERF ticks the processor made in
* a timespan of 0.03 s (e.g. 30 milliseconds)
*/
if (aperfDelta > (1ULL<<32))
retval = 0;
else
{
retval = aperfDelta * 1000 / 30;
}
disable_PIT2();
return retval;
}
/*
* Calculates the FSB and CPU frequencies using specific MSRs for each CPU
* - multi. is read from a specific MSR. In the case of Intel, there is:
* a max multi. (used to calculate the FSB freq.),
* and a current multi. (used to calculate the CPU freq.)
* a max multi. (used to calculate the FSB freq.),
* and a current multi. (used to calculate the CPU freq.)
* - fsbFrequency = tscFrequency / multi
* - cpuFrequency = fsbFrequency * multi
*/
void scan_cpu(PlatformInfo_t *p)
{
uint64_ttscFrequency, fsbFrequency, cpuFrequency;
uint64_tmsr, flex_ratio;
uint8_tmaxcoef, maxdiv, currcoef, bus_ratio_max, currdiv;
const char *newratio;
int len, myfsb;
uint8_t bus_ratio_min;
uint32_t max_ratio, min_ratio;
const char*newratio;
intlen, myfsb;
uint8_tbus_ratio_min;
uint32_tmax_ratio, min_ratio;
max_ratio = min_ratio = myfsb = bus_ratio_min = 0;
maxcoef = maxdiv = bus_ratio_max = currcoef = currdiv = 0;
/* get cpuid values */
do_cpuid(0x00000000, p->CPU.CPUID[CPUID_0]);
do_cpuid(0x00000001, p->CPU.CPUID[CPUID_1]);
do_cpuid(0x00000002, p->CPU.CPUID[CPUID_2]);
do_cpuid(0x00000003, p->CPU.CPUID[CPUID_3]);
do_cpuid2(0x00000004, 0, p->CPU.CPUID[CPUID_4]);
do_cpuid2(0x00000004, 0, p->CPU.CPUID[CPUID_4]);
do_cpuid(0x80000000, p->CPU.CPUID[CPUID_80]);
if ((p->CPU.CPUID[CPUID_80][0] & 0x0000000f) >= 8) {
do_cpuid(0x80000008, p->CPU.CPUID[CPUID_88]);
do_cpuid(0x80000001, p->CPU.CPUID[CPUID_81]);
if ((p->CPU.CPUID[CPUID_80][0] & 0x0000000f) >= 8) {
do_cpuid(0x80000008, p->CPU.CPUID[CPUID_88]);
do_cpuid(0x80000001, p->CPU.CPUID[CPUID_81]);
}
else if ((p->CPU.CPUID[CPUID_80][0] & 0x0000000f) >= 1) {
else if ((p->CPU.CPUID[CPUID_80][0] & 0x0000000f) >= 1) {
do_cpuid(0x80000001, p->CPU.CPUID[CPUID_81]);
}
#if DEBUG_CPU
{
inti;
printf("CPUID Raw Values:\n");
for (i=0; i<CPUID_MAX; i++) {
printf("%02d: %08x-%08x-%08x-%08x\n", i,
p->CPU.CPUID[i][0], p->CPU.CPUID[i][1],
p->CPU.CPUID[i][2], p->CPU.CPUID[i][3]);
p->CPU.CPUID[i][0], p->CPU.CPUID[i][1],
p->CPU.CPUID[i][2], p->CPU.CPUID[i][3]);
}
}
#endif
p->CPU.Vendor= p->CPU.CPUID[CPUID_0][1];
p->CPU.Signature= p->CPU.CPUID[CPUID_1][0];
p->CPU.Stepping= bitfield(p->CPU.CPUID[CPUID_1][0], 3, 0);
p->CPU.ExtModel= bitfield(p->CPU.CPUID[CPUID_1][0], 19, 16);
p->CPU.ExtFamily= bitfield(p->CPU.CPUID[CPUID_1][0], 27, 20);
p->CPU.Model += (p->CPU.ExtModel << 4);
if (p->CPU.Vendor == CPUID_VENDOR_INTEL &&
p->CPU.Family == 0x06 &&
p->CPU.Model >= CPUID_MODEL_NEHALEM &&
p->CPU.Model != CPUID_MODEL_ATOM // MSR is *NOT* available on the Intel Atom CPU
)
{
msr = rdmsr64(MSR_CORE_THREAD_COUNT);// Undocumented MSR in Nehalem and newer CPUs
p->CPU.NoCores= bitfield((uint32_t)msr, 31, 16);// Using undocumented MSR to get actual values
p->CPU.NoThreads= bitfield((uint32_t)msr, 15, 0);// Using undocumented MSR to get actual values
p->CPU.Model += (p->CPU.ExtModel << 4);
if (p->CPU.Vendor == CPUID_VENDOR_INTEL &&
p->CPU.Family == 0x06 &&
p->CPU.Model >= CPUID_MODEL_NEHALEM &&
p->CPU.Model != CPUID_MODEL_ATOM// MSR is *NOT* available on the Intel Atom CPU
)
{
msr = rdmsr64(MSR_CORE_THREAD_COUNT);// Undocumented MSR in Nehalem and newer CPUs
p->CPU.NoCores= bitfield((uint32_t)msr, 31, 16);// Using undocumented MSR to get actual values
p->CPU.NoThreads= bitfield((uint32_t)msr, 15, 0);// Using undocumented MSR to get actual values
}
else if (p->CPU.Vendor == CPUID_VENDOR_AMD)
{
p->CPU.NoThreads= bitfield(p->CPU.CPUID[CPUID_1][1], 23, 16);
p->CPU.NoCores= bitfield(p->CPU.CPUID[CPUID_88][2], 7, 0) + 1;
}
else
{
p->CPU.NoThreads= bitfield(p->CPU.CPUID[CPUID_1][1], 23, 16);// Use previous method for Cores and Threads
p->CPU.NoCores= bitfield(p->CPU.CPUID[CPUID_4][0], 31, 26) + 1;
else if (p->CPU.Vendor == CPUID_VENDOR_AMD)
{
p->CPU.NoThreads= bitfield(p->CPU.CPUID[CPUID_1][1], 23, 16);
p->CPU.NoCores= bitfield(p->CPU.CPUID[CPUID_88][2], 7, 0) + 1;
}
else
{
// Use previous method for Cores and Threads
p->CPU.NoThreads= bitfield(p->CPU.CPUID[CPUID_1][1], 23, 16);
p->CPU.NoCores= bitfield(p->CPU.CPUID[CPUID_4][0], 31, 26) + 1;
}
/* get brand string (if supported) */
/* Copyright: from Apple's XNU cpuid.c */
if (p->CPU.CPUID[CPUID_80][0] > 0x80000004) {
uint32_treg[4];
char str[128], *s;
charstr[128], *s;
/*
* The brand string 48 bytes (max), guaranteed to
* be NULL terminated.
if (*s != ' ') break;
}
strlcpy(p->CPU.BrandString,s, sizeof(p->CPU.BrandString));
strlcpy(p->CPU.BrandString, s, sizeof(p->CPU.BrandString));
if (!strncmp(p->CPU.BrandString, CPU_STRING_UNKNOWN, MIN(sizeof(p->CPU.BrandString), strlen(CPU_STRING_UNKNOWN) + 1))) {
/*
* This string means we have a firmware-programmable brand string,
* and the firmware couldn't figure out what sort of CPU we have.
*/
p->CPU.BrandString[0] = '\0';
}
/*
* This string means we have a firmware-programmable brand string,
* and the firmware couldn't figure out what sort of CPU we have.
*/
p->CPU.BrandString[0] = '\0';
}
}
/* setup features */
if (p->CPU.NoThreads > p->CPU.NoCores) {
p->CPU.Features |= CPU_FEATURE_HTT;
}
tscFrequency = measure_tsc_frequency();
fsbFrequency = 0;
cpuFrequency = 0;
if ((p->CPU.Vendor == CPUID_VENDOR_INTEL) && ((p->CPU.Family == 0x06) || (p->CPU.Family == 0x0f))) {
int intelCPU = p->CPU.Model;
if ((p->CPU.Family == 0x06 && p->CPU.Model >= 0x0c) || (p->CPU.Family == 0x0f && p->CPU.Model >= 0x03)) {
/* Nehalem CPU model */
if (p->CPU.Family == 0x06 && (p->CPU.Model == CPU_MODEL_NEHALEM ||
p->CPU.Model == CPU_MODEL_FIELDS ||
p->CPU.Model == CPU_MODEL_DALES ||
p->CPU.Model == CPU_MODEL_DALES_32NM ||
p->CPU.Model == CPU_MODEL_WESTMERE ||
p->CPU.Model == CPU_MODEL_NEHALEM_EX ||
p->CPU.Model == CPU_MODEL_WESTMERE_EX ||
p->CPU.Model == CPU_MODEL_SANDY ||
p->CPU.Model == CPU_MODEL_SANDY_XEON)) {
if (p->CPU.Family == 0x06 && (p->CPU.Model == CPU_MODEL_NEHALEM ||
p->CPU.Model == CPU_MODEL_FIELDS ||
p->CPU.Model == CPU_MODEL_DALES ||
p->CPU.Model == CPU_MODEL_DALES_32NM ||
p->CPU.Model == CPU_MODEL_WESTMERE ||
p->CPU.Model == CPU_MODEL_NEHALEM_EX ||
p->CPU.Model == CPU_MODEL_WESTMERE_EX ||
p->CPU.Model == CPU_MODEL_SANDY ||
p->CPU.Model == CPU_MODEL_SANDY_XEON)) {
msr = rdmsr64(MSR_PLATFORM_INFO);
DBG("msr(%d): platform_info %08x\n", __LINE__, bitfield(msr, 31, 0));
bus_ratio_max = bitfield(msr, 14, 8);
bus_ratio_min = bitfield(msr, 46, 40); //valv: not sure about this one (Remarq.1)
DBG("msr(%d): platform_info %08x\n", __LINE__, bitfield(msr, 31, 0));
bus_ratio_max = bitfield(msr, 14, 8);
bus_ratio_min = bitfield(msr, 46, 40); //valv: not sure about this one (Remarq.1)
msr = rdmsr64(MSR_FLEX_RATIO);
DBG("msr(%d): flex_ratio %08x\n", __LINE__, bitfield(msr, 31, 0));
if (bitfield(msr, 16, 16)) {
flex_ratio = bitfield(msr, 14, 8);
DBG("msr(%d): flex_ratio %08x\n", __LINE__, bitfield(msr, 31, 0));
if (bitfield(msr, 16, 16)) {
flex_ratio = bitfield(msr, 14, 8);
/* bcc9: at least on the gigabyte h67ma-ud2h,
where the cpu multipler can't be changed to
allow overclocking, the flex_ratio msr has unexpected (to OSX)
contents. These contents cause mach_kernel to
fail to compute the bus ratio correctly, instead
causing the system to crash since tscGranularity
is inadvertently set to 0.
*/
where the cpu multipler can't be changed to
allow overclocking, the flex_ratio msr has unexpected (to OSX)
contents.These contents cause mach_kernel to
fail to compute the bus ratio correctly, instead
causing the system to crash since tscGranularity
is inadvertently set to 0.
*/
if (flex_ratio == 0) {
/* Clear bit 16 (evidently the
presence bit) */
/* Clear bit 16 (evidently the presence bit) */
wrmsr64(MSR_FLEX_RATIO, (msr & 0xFFFFFFFFFFFEFFFFULL));
msr = rdmsr64(MSR_FLEX_RATIO);
verbose("Unusable flex ratio detected. Patched MSR now %08x\n", bitfield(msr, 31, 0));
verbose("Unusable flex ratio detected. Patched MSR now %08x\n", bitfield(msr, 31, 0));
} else {
if (bus_ratio_max > flex_ratio) {
bus_ratio_max = flex_ratio;
}
}
}
if (bus_ratio_max) {
fsbFrequency = (tscFrequency / bus_ratio_max);
}
max_ratio = atoi(newratio);
max_ratio = (max_ratio * 10);
if (len >= 3) max_ratio = (max_ratio + 5);
verbose("Bus-Ratio: min=%d, max=%s\n", bus_ratio_min, newratio);
// extreme overclockers may love 320 ;)
if ((max_ratio >= min_ratio) && (max_ratio <= 320)) {
cpuFrequency = (fsbFrequency * max_ratio) / 10;
}
}
//valv: to be uncommented if Remarq.1 didn't stick
/*if(bus_ratio_max > 0) bus_ratio = flex_ratio;*/
/*if (bus_ratio_max > 0) bus_ratio = flex_ratio;*/
p->CPU.MaxRatio = max_ratio;
p->CPU.MinRatio = min_ratio;
myfsb = fsbFrequency / 1000000;
verbose("Sticking with [BCLK: %dMhz, Bus-Ratio: %d]\n", myfsb, max_ratio);
currcoef = bus_ratio_max;
} else {
msr = rdmsr64(MSR_IA32_PERF_STATUS);
DBG("msr(%d): ia32_perf_stat 0x%08x\n", __LINE__, bitfield(msr, 31, 0));
currcoef = bitfield(msr, 12, 8);
DBG("msr(%d): ia32_perf_stat 0x%08x\n", __LINE__, bitfield(msr, 31, 0));
currcoef = bitfield(msr, 12, 8);
/* Non-integer bus ratio for the max-multi*/
maxdiv = bitfield(msr, 46, 46);
maxdiv = bitfield(msr, 46, 46);
/* Non-integer bus ratio for the current-multi (undocumented)*/
currdiv = bitfield(msr, 14, 14);
if ((p->CPU.Family == 0x06 && p->CPU.Model >= 0x0e) || (p->CPU.Family == 0x0f)) // This will always be model >= 3
currdiv = bitfield(msr, 14, 14);
// This will always be model >= 3
if ((p->CPU.Family == 0x06 && p->CPU.Model >= 0x0e) || (p->CPU.Family == 0x0f))
{
/* On these models, maxcoef defines TSC freq */
maxcoef = bitfield(msr, 44, 40);
maxcoef = bitfield(msr, 44, 40);
} else {
/* On lower models, currcoef defines TSC freq */
/* XXX */
maxcoef = currcoef;
}
if (maxcoef) {
if (maxdiv) {
fsbFrequency = ((tscFrequency * 2) / ((maxcoef * 2) + 1));
p->CPU.Features |= CPU_FEATURE_MOBILE;
}
}
else if((p->CPU.Vendor == CPUID_VENDOR_AMD) && (p->CPU.Family == 0x0f))
{
switch(p->CPU.ExtFamily)
{
case 0x00: /* K8 */
msr = rdmsr64(K8_FIDVID_STATUS);
maxcoef = bitfield(msr, 21, 16) / 2 + 4;
currcoef = bitfield(msr, 5, 0) / 2 + 4;
break;
case 0x01: /* K10 */
msr = rdmsr64(K10_COFVID_STATUS);
do_cpuid2(0x00000006, 0, p->CPU.CPUID[CPUID_6]);
if(bitfield(p->CPU.CPUID[CPUID_6][2], 0, 0) == 1) // EffFreq: effective frequency interface
{
//uint64_t mperf = measure_mperf_frequency();
uint64_t aperf = measure_aperf_frequency();
cpuFrequency = aperf;
}
// NOTE: tsc runs at the maccoeff (non turbo)
// *not* at the turbo frequency.
maxcoef = bitfield(msr, 54, 49) / 2 + 4;
currcoef = bitfield(msr, 5, 0) + 0x10;
currdiv = 2 << bitfield(msr, 8, 6);
break;
case 0x05: /* K14 */
msr = rdmsr64(K10_COFVID_STATUS);
currcoef = (bitfield(msr, 54, 49) + 0x10) << 2;
currdiv = (bitfield(msr, 8, 4) + 1) << 2;
currdiv += bitfield(msr, 3, 0);
break;
case 0x02: /* K11 */
// not implimented
break;
}
if (maxcoef)
{
if (currdiv)
{
if(!currcoef) currcoef = maxcoef;
if(!cpuFrequency)
fsbFrequency = ((tscFrequency * currdiv) / currcoef);
else
fsbFrequency = ((cpuFrequency * currdiv) / currcoef);
DBG("%d.%d\n", currcoef / currdiv, ((currcoef % currdiv) * 100) / currdiv);
} else {
if(!cpuFrequency)
fsbFrequency = (tscFrequency / maxcoef);
else
fsbFrequency = (cpuFrequency / maxcoef);
DBG("%d\n", currcoef);
}
}
else if (currcoef)
{
if (currdiv)
{
fsbFrequency = ((tscFrequency * currdiv) / currcoef);
DBG("%d.%d\n", currcoef / currdiv, ((currcoef % currdiv) * 100) / currdiv);
} else {
fsbFrequency = (tscFrequency / currcoef);
DBG("%d\n", currcoef);
}
}
if(!cpuFrequency) cpuFrequency = tscFrequency;
}
else if ((p->CPU.Vendor == CPUID_VENDOR_AMD) && (p->CPU.Family == 0x0f))
{
switch(p->CPU.ExtFamily)
{
case 0x00: /* K8 */
msr = rdmsr64(K8_FIDVID_STATUS);
maxcoef = bitfield(msr, 21, 16) / 2 + 4;
currcoef = bitfield(msr, 5, 0) / 2 + 4;
break;
case 0x01: /* K10 */
msr = rdmsr64(K10_COFVID_STATUS);
do_cpuid2(0x00000006, 0, p->CPU.CPUID[CPUID_6]);
// EffFreq: effective frequency interface
if (bitfield(p->CPU.CPUID[CPUID_6][2], 0, 0) == 1)
{
//uint64_t mperf = measure_mperf_frequency();
uint64_t aperf = measure_aperf_frequency();
cpuFrequency = aperf;
}
// NOTE: tsc runs at the maccoeff (non turbo)
//*not* at the turbo frequency.
maxcoef = bitfield(msr, 54, 49) / 2 + 4;
currcoef = bitfield(msr, 5, 0) + 0x10;
currdiv = 2 << bitfield(msr, 8, 6);
break;
case 0x05: /* K14 */
msr = rdmsr64(K10_COFVID_STATUS);
currcoef = (bitfield(msr, 54, 49) + 0x10) << 2;
currdiv = (bitfield(msr, 8, 4) + 1) << 2;
currdiv += bitfield(msr, 3, 0);
break;
case 0x02: /* K11 */
// not implimented
break;
}
if (maxcoef)
{
if (currdiv)
{
if (!currcoef) currcoef = maxcoef;
if (!cpuFrequency)
fsbFrequency = ((tscFrequency * currdiv) / currcoef);
else
fsbFrequency = ((cpuFrequency * currdiv) / currcoef);
DBG("%d.%d\n", currcoef / currdiv, ((currcoef % currdiv) * 100) / currdiv);
} else {
if (!cpuFrequency)
fsbFrequency = (tscFrequency / maxcoef);
else
fsbFrequency = (cpuFrequency / maxcoef);
DBG("%d\n", currcoef);
}
}
else if (currcoef)
{
if (currdiv)
{
fsbFrequency = ((tscFrequency * currdiv) / currcoef);
DBG("%d.%d\n", currcoef / currdiv, ((currcoef % currdiv) * 100) / currdiv);
} else {
fsbFrequency = (tscFrequency / currcoef);
DBG("%d\n", currcoef);
}
}
if (!cpuFrequency) cpuFrequency = tscFrequency;
}
#if 0
if (!fsbFrequency) {
fsbFrequency = (DEFAULT_FSB * 1000);
cpuFrequency = tscFrequency;
DBG("0 ! using the default value for FSB !\n");
}
if (!fsbFrequency) {
fsbFrequency = (DEFAULT_FSB * 1000);
cpuFrequency = tscFrequency;
DBG("0 ! using the default value for FSB !\n");
}
#endif
p->CPU.MaxCoef = maxcoef;
p->CPU.MaxDiv = maxdiv;
p->CPU.CurrCoef = currcoef;
p->CPU.CurrDiv = currdiv;
p->CPU.TSCFrequency = tscFrequency;
p->CPU.FSBFrequency = fsbFrequency;
p->CPU.CPUFrequency = cpuFrequency;
DBG("CPU: Brand String: %s\n",p->CPU.BrandString);
DBG("CPU: Vendor/Family/ExtFamily: 0x%x/0x%x/0x%x\n",p->CPU.Vendor, p->CPU.Family, p->CPU.ExtFamily);
DBG("CPU: Model/ExtModel/Stepping: 0x%x/0x%x/0x%x\n",p->CPU.Model, p->CPU.ExtModel, p->CPU.Stepping);
DBG("CPU: MaxCoef/CurrCoef: 0x%x/0x%x\n",p->CPU.MaxCoef, p->CPU.CurrCoef);
DBG("CPU: MaxDiv/CurrDiv: 0x%x/0x%x\n",p->CPU.MaxDiv, p->CPU.CurrDiv);
DBG("CPU: TSCFreq: %dMHz\n",p->CPU.TSCFrequency / 1000000);
DBG("CPU: FSBFreq: %dMHz\n",p->CPU.FSBFrequency / 1000000);
DBG("CPU: CPUFreq: %dMHz\n",p->CPU.CPUFrequency / 1000000);
DBG("CPU: NoCores/NoThreads: %d/%d\n",p->CPU.NoCores, p->CPU.NoThreads);
DBG("CPU: Features: 0x%08x\n",p->CPU.Features);
p->CPU.MaxCoef = maxcoef;
p->CPU.MaxDiv = maxdiv;
p->CPU.CurrCoef = currcoef;
p->CPU.CurrDiv = currdiv;
p->CPU.TSCFrequency = tscFrequency;
p->CPU.FSBFrequency = fsbFrequency;
p->CPU.CPUFrequency = cpuFrequency;
// keep formatted with spaces instead of tabs
DBG("CPU: Brand String: %s\n", p->CPU.BrandString);
DBG("CPU: Vendor/Family/ExtFamily: 0x%x/0x%x/0x%x\n", p->CPU.Vendor, p->CPU.Family, p->CPU.ExtFamily);
DBG("CPU: Model/ExtModel/Stepping: 0x%x/0x%x/0x%x\n", p->CPU.Model, p->CPU.ExtModel, p->CPU.Stepping);
DBG("CPU: MaxCoef/CurrCoef: 0x%x/0x%x\n", p->CPU.MaxCoef, p->CPU.CurrCoef);
DBG("CPU: MaxDiv/CurrDiv: 0x%x/0x%x\n", p->CPU.MaxDiv, p->CPU.CurrDiv);
DBG("CPU: TSCFreq: %dMHz\n", p->CPU.TSCFrequency / 1000000);
DBG("CPU: FSBFreq: %dMHz\n", p->CPU.FSBFrequency / 1000000);
DBG("CPU: CPUFreq: %dMHz\n", p->CPU.CPUFrequency / 1000000);
DBG("CPU: NoCores/NoThreads: %d/%d\n", p->CPU.NoCores, p->CPU.NoThreads);
DBG("CPU: Features: 0x%08x\n", p->CPU.Features);
#if DEBUG_CPU
pause();
pause();
#endif
}
branches/azimutz/trunkAutoResolution/i386/libsaio/disk.c
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static const struct NamedValue fdiskTypes[] =
{
{ FDISK_NTFS, "Windows NTFS" },
{ FDISK_DOS12, "Windows FAT12" },
{ FDISK_DOS16B, "Windows FAT16" },
{ FDISK_DOS16S, "Windows FAT16" },
{ FDISK_DOS16SLBA, "Windows FAT16" },
{ FDISK_SMALLFAT32, "Windows FAT32" },
{ FDISK_FAT32, "Windows FAT32" },
{ FDISK_LINUX, "Linux" },
{ FDISK_UFS, "Apple UFS" },
{ FDISK_HFS, "Apple HFS" },
{ FDISK_BOOTER, "Apple Boot/UFS" },
{ 0xCD, "CD-ROM" },
{ 0x00, 0 } /* must be last */
{ FDISK_NTFS,"Windows NTFS" },
{ FDISK_DOS12,"Windows FAT12" },
{ FDISK_DOS16B,"Windows FAT16" },
{ FDISK_DOS16S,"Windows FAT16" },
{ FDISK_DOS16SLBA,"Windows FAT16" },
{ FDISK_SMALLFAT32,"Windows FAT32" },
{ FDISK_FAT32,"Windows FAT32" },
{ FDISK_LINUX,"Linux" },
{ FDISK_UFS,"Apple UFS" },
{ FDISK_HFS,"Apple HFS" },
{ FDISK_BOOTER,"Apple Boot/UFS" },
{ 0xCD,"CD-ROM" },
{ 0x00,0 } /* must be last */
};
//==========================================================================
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}
if ((strlen(match) == key_len)
&& strncmp(match, key, key_len) == 0) {
*matchval = value;
// create a new string
char* newstr = malloc(value_len + 1);
strncpy(newstr, value, value_len);
newstr[value_len] = 0;
*matchval = newstr;
*len = value_len;
retval = true;
/* Continue to look for this key; last one wins. */
}
}
return retval;
}
branches/azimutz/trunkAutoResolution/i386/libsaio/fake_efi.c
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Node *node;
SMBEntryPoint *origeps;
void *tableAddress;
node = DT__FindNode("/efi/platform", false);
if (!node)
{
verbose("/efi/platform node not found\n");
return;
}
origeps = getSmbios(SMBIOS_ORIGINAL);
if (!origeps)
{
return;
}
tableAddress = (void *)AllocateKernelMemory(origeps->dmi.tableLength);
if (!tableAddress)
{
return;
}
memcpy(tableAddress, (void *)origeps->dmi.tableAddress, origeps->dmi.tableLength);
DT__AddProperty(node, "SMBIOS", origeps->dmi.tableLength, tableAddress);
}
}
/*
* Entrypoint from boot.c
setup_pci_devs(root_pci_dev);
readSMBIOSInfo(getSmbios(SMBIOS_ORIGINAL));
// load smbios.plist file if any
setupSmbiosConfigFile("smbios.plist");
// Initialize the device tree
setupEfiDeviceTree();
saveOriginalSMBIOS();
saveOriginalSMBIOS();
// Add configuration table entries to both the services table and the device tree
setupEfiConfigurationTable();
}
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880873
* Portions Copyright (c) 1999-2003 Apple Computer, Inc. All Rights
* Reserved. This file contains Original Code and/or Modifications of
* Original Code as defined in and that are subject to the Apple Public
* Source License Version 2.0 (the "License"). You may not use this file
* Source License Version 2.0 (the "License").You may not use this file
* except in compliance with the License. Please obtain a copy of the
* License at http://www.apple.com/publicsource and read it before using
* this file.
*
* @APPLE_LICENSE_HEADER_END@
*/
/*
* Mach Operating System
* Copyright (c) 1990 Carnegie-Mellon University
* Copyright (c) 1989 Carnegie-Mellon University
* All rights reserved. The CMU software License Agreement specifies
* All rights reserved. The CMU software License Agreement specifies
* the terms and conditions for use and redistribution.
*/
/*
* INTEL CORPORATION PROPRIETARY INFORMATION
*INTEL CORPORATION PROPRIETARY INFORMATION
*
* This software is supplied under the terms of a license agreement or
* nondisclosure agreement with Intel Corporation and may not be copied
* nor disclosed except in accordance with the terms of that agreement.
*This software is supplied under the terms of a licenseagreement or
*nondisclosure agreement with Intel Corporation and may not be copied
*nor disclosed except in accordance with the terms of that agreement.
*
* Copyright 1988, 1989 by Intel Corporation
*Copyright 1988, 1989 by Intel Corporation
*/
/*
* Copyright 1993 NeXT Computer, Inc.
* All rights reserved.
*/
/*
* Completely reworked by Sam Streeper (sam_s@NeXT.com)
* Reworked again by Curtis Galloway (galloway@NeXT.com)
*/
#include "boot.h"
#include "bootstruct.h"
#include "fake_efi.h"
#include "edid.h"//||
#include "modules.h"
long gBootMode; /* defaults to 0 == kBootModeNormal */
bool gOverrideKernel;
static char gBootKernelCacheFile[512];
static char gCacheNameAdler[64 + 256];
char *gPlatformName = gCacheNameAdler;
char gRootDevice[512];
char gMKextName[512];
char gMacOSVersion[8];
bool gEnableCDROMRescan;
bool gScanSingleDrive;
int bvCount = 0;
//intmenucount = 0;
int gDeviceCount = 0;
BVRef bvr;
BVRef menuBVR;
BVRef bvChain;
bool useGUI;
//static void selectBiosDevice(void);
static unsigned long Adler32(unsigned char *buffer, long length);
static bool checkOSVersion(const char * version);
static bool getOSVersion();
static bool gUnloadPXEOnExit = false;
/*
* How long to wait (in seconds) to load the
* kernel after displaying the "boot:" prompt.
*/
#define kBootErrorTimeout 5
boolgOverrideKernel, gEnableCDROMRescan, gScanSingleDrive, useGUI;
static boolgUnloadPXEOnExit = false;
static chargCacheNameAdler[64 + 256];
char*gPlatformName = gCacheNameAdler;
chargRootDevice[512];
chargMKextName[512];
chargMacOSVersion[8];
static chargBootKernelCacheFile[512];
intbvCount = 0, gDeviceCount = 0;
//intmenucount = 0;
longgBootMode; /* defaults to 0 == kBootModeNormal */
BVRefbvr, menuBVR, bvChain;
static boolcheckOSVersion(const char * version);
static boolgetOSVersion();
static unsigned longAdler32(unsigned char *buffer, long length);
//static voidselectBiosDevice(void);
//==========================================================================
// Zero the BSS.
{
extern char _DATA__bss__begin, _DATA__bss__end;
extern char _DATA__common__begin, _DATA__common__end;
bzero(&_DATA__bss__begin, (&_DATA__bss__end - &_DATA__bss__begin));
bzero(&_DATA__common__begin, (&_DATA__common__end - &_DATA__common__begin));
}
static void malloc_error(char *addr, size_t size, const char *file, int line)
{
stop("\nMemory allocation error! Addr=0x%x, Size=0x%x, File=%s, Line=%d\n", (unsigned)addr, (unsigned)size, file, line);
stop("\nMemory allocation error! Addr: 0x%x, Size: 0x%x, File: %s, Line: %d\n",
(unsigned)addr, (unsigned)size, file, line);
}
//==========================================================================
//Initializes the runtime. Right now this means zeroing the BSS and initializing malloc.
//Initializes the runtime. Right now this means zeroing the BSS and initializing malloc.
//
void initialize_runtime(void)
{
static int ExecKernel(void *binary)
{
entry_t kernelEntry;
int ret;
intret;
entry_tkernelEntry;
bootArgs->kaddr = bootArgs->ksize = 0;
execute_hook("ExecKernel", (void*)binary, NULL, NULL, NULL);
// Notify modules that the kernel has been decoded
execute_hook("DecodedKernel", (void*)binary, NULL, NULL, NULL);
setupFakeEfi();
setupFakeEfi();
// Load boot drivers from the specifed root path.
//if (!gHaveKernelCache)
LoadDrivers("/");
//if (!gHaveKernelCache)
LoadDrivers("/");
execute_hook("DriversLoaded", (void*)binary, NULL, NULL, NULL);
execute_hook("DriversLoaded", (void*)binary, NULL, NULL, NULL);
clearActivityIndicator();
if (gErrors) {
printf("Pausing %d seconds...\n", kBootErrorTimeout);
sleep(kBootErrorTimeout);
}
md0Ramdisk();
verbose("Starting Darwin %s\n",( archCpuType == CPU_TYPE_I386 ) ? "x86" : "x86_64");
// on closeVbios().. the more i think, the less sense it makes doing it there!!
//autoresolution - end
if (checkOSVersion("10.7"))
{
execute_hook("Kernel Start", (void*)kernelEntry, (void*)bootArgs, NULL, NULL);// Notify modules that the kernel is about to be started
}
else
{
execute_hook("Kernel Start", (void*)kernelEntry, (void*)bootArgsPreLion, NULL, NULL);// Notify modules that the kernel is about to be started
}
// Notify modules that the kernel is about to be started
if (checkOSVersion("10.7"))
{
execute_hook("Kernel Start", (void*)kernelEntry, (void*)bootArgs, NULL, NULL);
}
else
{
execute_hook("Kernel Start", (void*)kernelEntry, (void*)bootArgsPreLion, NULL, NULL);
}
// If we were in text mode, switch to graphics mode.
// This will draw the boot graphics unless we are in
// verbose mode.
if(gVerboseMode)
setVideoMode( GRAPHICS_MODE, 0 );
if (gVerboseMode)
setVideoMode( GRAPHICS_MODE, 0 );
else
drawBootGraphics();
drawBootGraphics();
setupBooterLog();
finalizeBootStruct();
if (checkOSVersion("10.7")) {
// Jump to kernel's entry point. There's no going back now.
if (checkOSVersion("10.7")) {
// Masking out so that Lion doesn't doublefault
outb(0x21, 0xff);/* Maskout all interrupts Pic1 */
outb(0xa1, 0xff);/* Maskout all interrupts Pic2 */
// Jump to kernel's entry point. There's no going back now.
startprog( kernelEntry, bootArgs );
}
else {
// Jump to kernel's entry point. There's no going back now.
startprog( kernelEntry, bootArgsPreLion );
}
// from a block device, or by the network booter.
//
// arguments:
// biosdev - Value passed from boot1/NBP to specify the device
// that the booter was loaded from.
// biosdev - Value passed from boot1/NBP to specify the device
// that the booter was loaded from.
//
// If biosdev is kBIOSDevNetwork, then this function will return if
// booting was unsuccessful. This allows the PXE firmware to try the
// next boot device on its list.
void common_boot(int biosdev)
{
int status;
char *bootFile;
unsigned long adler32;
bool quiet;
bool firstRun = true;
bool instantMenu;
bool rescanPrompt;
unsigned int allowBVFlags = kBVFlagSystemVolume | kBVFlagForeignBoot;
unsigned int denyBVFlags = kBVFlagEFISystem;
// Set reminder to unload the PXE base code. Neglect to unload
// the base code will result in a hang or kernel panic.
gUnloadPXEOnExit = true;
// Record the device that the booter was loaded from.
gBIOSDev = biosdev & kBIOSDevMask;
// Initialize boot info structure.
initKernBootStruct();
bool quiet;
bool firstRun = true;
bool instantMenu;
bool rescanPrompt;
char *bootFile;
intstatus;
unsigned intallowBVFlags = kBVFlagSystemVolume | kBVFlagForeignBoot;
unsigned intdenyBVFlags = kBVFlagEFISystem;
unsigned longadler32;
// Set reminder to unload the PXE base code. Neglect to unload
// the base code will result in a hang or kernel panic.
gUnloadPXEOnExit = true;
// Record the device that the booter was loaded from.
gBIOSDev = biosdev & kBIOSDevMask;
// Initialize boot info structure.
initKernBootStruct();
initBooterLog();
// Setup VGA text mode.
// Not sure if it is safe to call setVideoMode() before the
// config table has been loaded. Call video_mode() instead.
// Setup VGA text mode.
// Not sure if it is safe to call setVideoMode() before the
// config table has been loaded. Call video_mode() instead.
#if DEBUG
printf("before video_mode\n");
printf("before video_mode\n");
#endif
video_mode( 2 ); // 80x25 mono text mode.
video_mode( 2 ); // 80x25 mono text mode.
#if DEBUG
printf("after video_mode\n");
printf("after video_mode\n");
#endif
// Scan and record the system's hardware information.
scan_platform();
// First get info for boot volume.
scanBootVolumes(gBIOSDev, 0);
bvChain = getBVChainForBIOSDev(gBIOSDev);
setBootGlobals(bvChain);
// Load boot.plist config file
status = loadChameleonConfig(&bootInfo->chameleonConfig);
if (getBoolForKey(kQuietBootKey, &quiet, &bootInfo->chameleonConfig) && quiet) {
gBootMode |= kBootModeQuiet;
}
// Override firstRun to get to the boot menu instantly by setting "Instant Menu"=y in system config
if (getBoolForKey(kInsantMenuKey, &instantMenu, &bootInfo->chameleonConfig) && instantMenu) {
firstRun = false;
}
// Loading preboot ramdisk if exists.
loadPrebootRAMDisk();
// Disable rescan option by default
gEnableCDROMRescan = false;
// Enable it with Rescan=y in system config
if (getBoolForKey(kRescanKey, &gEnableCDROMRescan, &bootInfo->chameleonConfig) && gEnableCDROMRescan) {
gEnableCDROMRescan = true;
}
// Ask the user for Rescan option by setting "Rescan Prompt"=y in system config.
rescanPrompt = false;
if (getBoolForKey(kRescanPromptKey, &rescanPrompt , &bootInfo->chameleonConfig) && rescanPrompt && biosDevIsCDROM(gBIOSDev)) {
gEnableCDROMRescan = promptForRescanOption();
}
// Enable touching a single BIOS device only if "Scan Single Drive"=y is set in system config.
if (getBoolForKey(kScanSingleDriveKey, &gScanSingleDrive, &bootInfo->chameleonConfig) && gScanSingleDrive) {
gScanSingleDrive = true;
}
// Create a list of partitions on device(s).
if (gScanSingleDrive) {
scanBootVolumes(gBIOSDev, &bvCount);
} else {
scanDisks(gBIOSDev, &bvCount);
}
// Create a separated bvr chain using the specified filters.
bvChain = newFilteredBVChain(0x80, 0xFF, allowBVFlags, denyBVFlags, &gDeviceCount);
gBootVolume = selectBootVolume(bvChain);
// Scan and record the system's hardware information.
scan_platform();
// First get info for boot volume.
scanBootVolumes(gBIOSDev, 0);
bvChain = getBVChainForBIOSDev(gBIOSDev);
setBootGlobals(bvChain);
// Load boot.plist config file
status = loadChameleonConfig(&bootInfo->chameleonConfig);
if (getBoolForKey(kQuietBootKey, &quiet, &bootInfo->chameleonConfig) && quiet) {
gBootMode |= kBootModeQuiet;
}
// Override firstRun to get to the boot menu instantly by setting "Instant Menu"=y in system config
if (getBoolForKey(kInstantMenuKey, &instantMenu, &bootInfo->chameleonConfig) && instantMenu) {
firstRun = false;
}
// Loading preboot ramdisk if exists.
loadPrebootRAMDisk();
// Disable rescan option by default
gEnableCDROMRescan = false;
// Enable it with Rescan=y in system config
if (getBoolForKey(kRescanKey, &gEnableCDROMRescan, &bootInfo->chameleonConfig)
&& gEnableCDROMRescan) {
gEnableCDROMRescan = true;
}
// Ask the user for Rescan option by setting "Rescan Prompt"=y in system config.
rescanPrompt = false;
if (getBoolForKey(kRescanPromptKey, &rescanPrompt , &bootInfo->chameleonConfig)
&& rescanPrompt && biosDevIsCDROM(gBIOSDev))
{
gEnableCDROMRescan = promptForRescanOption();
}
// Enable touching a single BIOS device only if "Scan Single Drive"=y is set in system config.
if (getBoolForKey(kScanSingleDriveKey, &gScanSingleDrive, &bootInfo->chameleonConfig)
&& gScanSingleDrive) {
gScanSingleDrive = true;
}
// Create a list of partitions on device(s).
if (gScanSingleDrive) {
scanBootVolumes(gBIOSDev, &bvCount);
} else {
scanDisks(gBIOSDev, &bvCount);
}
// Create a separated bvr chain using the specified filters.
bvChain = newFilteredBVChain(0x80, 0xFF, allowBVFlags, denyBVFlags, &gDeviceCount);
gBootVolume = selectBootVolume(bvChain);
// Intialize module system
init_module_system();
#if DEBUG
printf(" Default: %d, ->biosdev: %d, ->part_no: %d ->flags: %d\n", gBootVolume, gBootVolume->biosdev, gBootVolume->part_no, gBootVolume->flags);
printf(" bt(0,0): %d, ->biosdev: %d, ->part_no: %d ->flags: %d\n", gBIOSBootVolume, gBIOSBootVolume->biosdev, gBIOSBootVolume->part_no, gBIOSBootVolume->flags);
getchar();
printf(" Default: %d, ->biosdev: %d, ->part_no: %d ->flags: %d\n",
gBootVolume, gBootVolume->biosdev, gBootVolume->part_no, gBootVolume->flags);
printf(" bt(0,0): %d, ->biosdev: %d, ->part_no: %d ->flags: %d\n",
gBIOSBootVolume, gBIOSBootVolume->biosdev, gBIOSBootVolume->part_no, gBIOSBootVolume->flags);
getchar();
#endif
useGUI = true;
// Override useGUI default
getBoolForKey(kGUIKey, &useGUI, &bootInfo->chameleonConfig);
// initGUI() returned with an error, disabling GUI.
useGUI = false;
}
setBootGlobals(bvChain);
// Parse args, load and start kernel.
while (1) {
const char *val;
int len;
int trycache;
long flags, cachetime, kerneltime, exttime, sleeptime, time;
int ret = -1;
void *binary = (void *)kLoadAddr;
bool tryresume;
bool tryresumedefault;
bool forceresume;
bool usecache = false;//true;
// additional variable for testing alternate kernel image locations on boot helper partitions.
char bootFileSpec[512];
setBootGlobals(bvChain);
// Parse args, load and start kernel.
while (1)
{
booltryresume, tryresumedefault, forceresume;
boolusecache = false;//true;
const char*val;
intlen, trycache, ret = -1;
longflags, cachetime, kerneltime, exttime, sleeptime, time;
void*binary = (void *)kLoadAddr;
// Initialize globals.
sysConfigValid = false;
gErrors = false;
status = getBootOptions(firstRun);
firstRun = false;
if (status == -1) continue;
// additional variable for testing alternate kernel image locations on boot helper partitions.
charbootFileSpec[512];
// Initialize globals.
sysConfigValid = false;
gErrors = false;
status = getBootOptions(firstRun);
firstRun = false;
if (status == -1) continue;
status = processBootOptions();
// Status==1 means to chainboot
if ( status == 1 ) break;
// Status==-1 means that the config file couldn't be loaded or that gBootVolume is NULL
if ( status == -1 )
{
// gBootVolume == NULL usually means the user hit escape.
if(gBootVolume == NULL)
{
freeFilteredBVChain(bvChain);
if (gEnableCDROMRescan)
rescanBIOSDevice(gBIOSDev);
bvChain = newFilteredBVChain(0x80, 0xFF, allowBVFlags, denyBVFlags, &gDeviceCount);
setBootGlobals(bvChain);
setupDeviceList(&bootInfo->themeConfig);
}
continue;
}
status = processBootOptions();
// Status == 1 means to chainboot
if ( status ==1 ) break;
// Status == -1 means that the config file couldn't be loaded or that gBootVolume is NULL
if ( status == -1 )
{
// gBootVolume == NULL usually means the user hit escape.
if (gBootVolume == NULL)
{
freeFilteredBVChain(bvChain);
if (gEnableCDROMRescan)
rescanBIOSDevice(gBIOSDev);
bvChain = newFilteredBVChain(0x80, 0xFF, allowBVFlags, denyBVFlags, &gDeviceCount);
setBootGlobals(bvChain);
setupDeviceList(&bootInfo->themeConfig);
}
continue;
}
// Other status (e.g. 0) means that we should proceed with boot.
// Other status (e.g. 0) means that we should proceed with boot.
// Turn off any GUI elements
if( bootArgs->Video.v_display == GRAPHICS_MODE )
if ( bootArgs->Video.v_display == GRAPHICS_MODE )
{
gui.devicelist.draw = false;
gui.bootprompt.draw = false;
// Find out which version mac os we're booting.
getOSVersion();
if (platformCPUFeature(CPU_FEATURE_EM64T)) {
archCpuType = CPU_TYPE_X86_64;
} else {
archCpuType = CPU_TYPE_I386;
}
}
if (getValueForKey(kKernelArchKey, &val, &len, &bootInfo->chameleonConfig)) {
if (getValueForKey(kKernelArchKey, &val, &len, &bootInfo->chameleonConfig)) {
if (strncmp(val, "i386", 4) == 0) {
archCpuType = CPU_TYPE_I386;
}
}
// Notify modules that we are attempting to boot
execute_hook("PreBoot", NULL, NULL, NULL, NULL);
if (!getBoolForKey (kWake, &tryresume, &bootInfo->chameleonConfig)) {
tryresume = true;
tryresumedefault = true;
} else {
tryresumedefault = false;
}
if (!getBoolForKey (kForceWake, &forceresume, &bootInfo->chameleonConfig)) {
forceresume = false;
}
const char *tmp;
BVRef bvr;
if (!getValueForKey(kWakeImage, &val, &len, &bootInfo->chameleonConfig))
val="/private/var/vm/sleepimage";
val = "/private/var/vm/sleepimage";
// Do this first to be sure that root volume is mounted
ret = GetFileInfo(0, val, &flags, &sleeptime);
if ((bvr = getBootVolumeRef(val, &tmp)) == NULL)
break;
break;
if (!forceresume && ((sleeptime+3)<bvr->modTime)) {
#if DEBUG
printf ("Hibernate image is too old by %d seconds. Use ForceWake=y to override\n",bvr->modTime-sleeptime);
#endif
#if DEBUG
printf ("Hibernate image is too old by %d seconds. Use ForceWake=y to override\n",
bvr->modTime-sleeptime);
#endif
break;
}
HibernateBoot((char *)val);
break;
}
getBoolForKey(kUseKernelCache, &usecache, &bootInfo->chameleonConfig);
if(usecache) {
if (usecache) {
if (getValueForKey(kKernelCacheKey, &val, &len, &bootInfo->bootConfig)) {
if(val[0] == '\\')
{
len--;
val++;
}
strlcpy(gBootKernelCacheFile, val, len+1);
if (val[0] == '\\')
{
len--;
val++;
}
strlcpy(gBootKernelCacheFile, val, len + 1);
}
else {
//Lion
}
// Snow Leopard
else if (checkOSVersion("10.6")) {
sprintf(gBootKernelCacheFile, "kernelcache_%s", (archCpuType == CPU_TYPE_I386) ? "i386" : "x86_64");
sprintf(gBootKernelCacheFile, "kernelcache_%s", (archCpuType == CPU_TYPE_I386)
? "i386" : "x86_64");
int lnam = sizeof(gBootKernelCacheFile) + 9; //with adler32
//Slice - TODO ???
// e.g. kernelcache_i386.E102928C.qSs0 = "unsaved" cache file.
//
// See kext_tools-180.2.1/kextcache_main.c:
// "Source directory has changed since starting; "
// "not saving cache file %s."
// or
// "Source kernel has changed since starting; "
// "not saving cache file %s."
char* name;
long prev_time = 0;
while(readdir(cacheDir, (const char**)&name, &flags, &time) >= 0)
{
if(((flags & kFileTypeMask) != kFileTypeDirectory) && time > prev_time && strstr(name, gBootKernelCacheFile) && (name[lnam] != '.'))
if (((flags & kFileTypeMask) != kFileTypeDirectory) && time > prev_time
&& strstr(name, gBootKernelCacheFile) && (name[lnam] != '.'))
{
sprintf(gBootKernelCacheFile, "%s%s", kDefaultCachePathSnow, name);
prev_time = time;
}
}
}
// Check for cache file.
trycache = (usecache &&
// Check for cache file.
trycache = (usecache &&
((gBootMode & kBootModeSafe) == 0) &&
!gOverrideKernel &&
(gBootFileType == kBlockDeviceType) &&
(gMKextName[0] == '\0') &&
(gBootKernelCacheFile[0] != '\0'));
!gOverrideKernel &&
(gBootFileType == kBlockDeviceType) &&
(gMKextName[0] == '\0') &&
(gBootKernelCacheFile[0] != '\0'));
verbose("Loading Darwin %s\n", gMacOSVersion);
if (trycache) do {
ret = GetFileInfo(NULL, bootInfo->bootFile, &flags, &kerneltime);
if(ret != 0) kerneltime = 0;
else if ((flags & kFileTypeMask) != kFileTypeFlat) {
trycache = 0;
break;
}
if (trycache) do {
ret = GetFileInfo(NULL, bootInfo->bootFile, &flags, &kerneltime);
if (ret != 0) kerneltime = 0;
else if ((flags & kFileTypeMask) != kFileTypeFlat) {
trycache = 0;
break;
}
ret = GetFileInfo(NULL, gBootKernelCacheFile, &flags, &cachetime);
if ((ret != 0) || ((flags & kFileTypeMask) != kFileTypeFlat)
|| (cachetime < kerneltime)) {
trycache = 0;
break;
}
ret = GetFileInfo("/System/Library/", "Extensions", &flags, &exttime);
if ((ret == 0) && ((flags & kFileTypeMask) == kFileTypeDirectory)
&& (cachetime < exttime)) {
trycache = 0;
break;
}
if (ret == 0 && kerneltime > exttime) {
exttime = kerneltime;
}
if (ret == 0 && cachetime != (exttime + 1)) {
trycache = 0;
break;
}
} while (0);
ret = GetFileInfo(NULL, gBootKernelCacheFile, &flags, &cachetime);
if ((ret != 0) || ((flags & kFileTypeMask) != kFileTypeFlat)
|| (cachetime < kerneltime)) {
trycache = 0;
break;
}
ret = GetFileInfo("/System/Library/", "Extensions", &flags, &exttime);
if ((ret == 0) && ((flags & kFileTypeMask) == kFileTypeDirectory)
&& (cachetime < exttime)) {
trycache = 0;
break;
}
if (ret == 0 && kerneltime > exttime) {
exttime = kerneltime;
}
if (ret == 0 && cachetime != (exttime + 1)) {
trycache = 0;
break;
}
} while (0);
do {
if (trycache) {
bootFile = gBootKernelCacheFile;
do {
if (trycache) {
bootFile = gBootKernelCacheFile;
verbose("Loading kernel cache %s\n", bootFile);
if (checkOSVersion("10.7")) {
ret = LoadThinFatFile(bootFile, &binary);
if (checkOSVersion("10.7")) {
ret = LoadThinFatFile(bootFile, &binary);
}
else {
ret = LoadFile(bootFile);
ret = LoadFile(bootFile);
binary = (void *)kLoadAddr;
}
if (ret >= 0)
break;
if (ret >= 0)
break;
verbose("Kernel cache did not load %s\n ", bootFile);
}
if (checkOSVersion("10.7")) {
bootFile = gBootKernelCacheFile;
}
else {
sprintf(bootFile, "\%s", bootInfo->bootFile);
}
// Try to load kernel image from alternate locations on boot helper partitions.
sprintf(bootFileSpec, "com.apple.boot.P%s", bootFile);
ret = GetFileInfo(NULL, bootFileSpec, &flags, &time);
if (ret == -1)
{
sprintf(bootFileSpec, "com.apple.boot.R%s", bootFile);
ret = GetFileInfo(NULL, bootFileSpec, &flags, &time);
if (ret == -1)
{
sprintf(bootFileSpec, "com.apple.boot.S%s", bootFile);
ret = GetFileInfo(NULL, bootFileSpec, &flags, &time);
if (ret == -1)
{
// No alternate location found, using the original kernel image path.
strcpy(bootFileSpec, bootInfo->bootFile);
}
}
}
if (checkOSVersion("10.7"))
{
//Lion, dont load kernel if haz cache
if (!trycache)
{
verbose("Loading kernel %s\n", bootFileSpec);
ret = LoadThinFatFile(bootFileSpec, &binary);
if (ret <= 0 && archCpuType == CPU_TYPE_X86_64)
{
archCpuType = CPU_TYPE_I386;
ret = LoadThinFatFile(bootFileSpec, &binary);
}
}
}
if (checkOSVersion("10.7")) {
bootFile = gBootKernelCacheFile;
}
else {
sprintf(bootFile, "\%s", bootInfo->bootFile);
}
// Try to load kernel image from alternate locations on boot helper partitions.
sprintf(bootFileSpec, "com.apple.boot.P%s", bootFile);
ret = GetFileInfo(NULL, bootFileSpec, &flags, &time);
if (ret == -1)
{
sprintf(bootFileSpec, "com.apple.boot.R%s", bootFile);
ret = GetFileInfo(NULL, bootFileSpec, &flags, &time);
if (ret == -1)
{
sprintf(bootFileSpec, "com.apple.boot.S%s", bootFile);
ret = GetFileInfo(NULL, bootFileSpec, &flags, &time);
if (ret == -1)
{
// No alternate location found, using the original kernel image path.
strcpy(bootFileSpec, bootInfo->bootFile);
}
}
}
if (checkOSVersion("10.7"))
{
//Lion, dont load kernel if haz cache
if (!trycache)
{
verbose("Loading kernel %s\n", bootFileSpec);
ret = LoadThinFatFile(bootFileSpec, &binary);
if (ret <= 0 && archCpuType == CPU_TYPE_X86_64)
{
archCpuType = CPU_TYPE_I386;
ret = LoadThinFatFile(bootFileSpec, &binary);
}
}
else ret = 1;
}
}
else
{
//Snow Leopard or older
verbose("Loading kernel %s\n", bootFileSpec);
ret = LoadThinFatFile(bootFileSpec, &binary);
if (ret <= 0 && archCpuType == CPU_TYPE_X86_64)
{
archCpuType = CPU_TYPE_I386;
ret = LoadThinFatFile(bootFileSpec, &binary);
}
}
} while (0);
clearActivityIndicator();
{
//Snow Leopard or older
verbose("Loading kernel %s\n", bootFileSpec);
ret = LoadThinFatFile(bootFileSpec, &binary);
if (ret <= 0 && archCpuType == CPU_TYPE_X86_64)
{
archCpuType = CPU_TYPE_I386;
ret = LoadThinFatFile(bootFileSpec, &binary);
}
}
} while (0);
clearActivityIndicator();
#if DEBUG
printf("Pausing...");
sleep(8);
printf("Pausing...");
sleep(8);
#endif
if (ret <= 0) {
if (ret <= 0) {
printf("Can't find %s\n", bootFile);
sleep(1);
if (gBootFileType == kNetworkDeviceType) {
// Return control back to PXE. Don't unload PXE base code.
gUnloadPXEOnExit = false;
break;
}
} else {
/* Won't return if successful. */
ret = ExecKernel(binary);
}
}
// chainboot
if (status==1) {
if (getVideoMode() == GRAPHICS_MODE) {// if we are already in graphics-mode,
setVideoMode(VGA_TEXT_MODE, 0);// switch back to text mode
if (gBootFileType == kNetworkDeviceType) {
// Return control back to PXE. Don't unload PXE base code.
gUnloadPXEOnExit = false;
break;
}
} else {
/* Won't return if successful. */
ret = ExecKernel(binary);
}
}
}
if ((gBootFileType == kNetworkDeviceType) && gUnloadPXEOnExit) {
// chainboot
if (status == 1) {
// if we are already in graphics-mode,
if (getVideoMode() == GRAPHICS_MODE) {
setVideoMode(VGA_TEXT_MODE, 0); // switch back to text mode.
}
}
if ((gBootFileType == kNetworkDeviceType) && gUnloadPXEOnExit) {
nbpUnloadBaseCode();
}
}
}
/*!
Selects a new BIOS device, taking care to update the global state appropriately.
Selects a new BIOS device, taking care to update the global state appropriately.
*/
/*
static void selectBiosDevice(void)
{
struct DiskBVMap *oldMap = diskResetBootVolumes(gBIOSDev);
CacheReset();
diskFreeMap(oldMap);
oldMap = NULL;
int dev = selectAlternateBootDevice(gBIOSDev);
BVRef bvchain = scanBootVolumes(dev, 0);
BVRef bootVol = selectBootVolume(bvchain);
gBootVolume = bootVol;
setRootVolume(bootVol);
gBIOSDev = dev;
struct DiskBVMap *oldMap = diskResetBootVolumes(gBIOSDev);
CacheReset();
diskFreeMap(oldMap);
oldMap = NULL;
int dev = selectAlternateBootDevice(gBIOSDev);
BVRef bvchain = scanBootVolumes(dev, 0);
BVRef bootVol = selectBootVolume(bvchain);
gBootVolume = bootVol;
setRootVolume(bootVol);
gBIOSDev = dev;
}
*/
bool checkOSVersion(const char * version)
{
return ((gMacOSVersion[0] == version[0]) && (gMacOSVersion[1] == version[1]) && (gMacOSVersion[2] == version[2]) && (gMacOSVersion[3] == version[3]));
return ((gMacOSVersion[0] == version[0]) && (gMacOSVersion[1] == version[1])
&& (gMacOSVersion[2] == version[2]) && (gMacOSVersion[3] == version[3]));
}
bool getOSVersion()
{
bool valid = false;
config_file_t systemVersion;
const char *val;
int len;
boolvalid = false;
const char*val;
intlen;
config_file_tsystemVersion;
if (!loadConfigFile("System/Library/CoreServices/SystemVersion.plist", &systemVersion))
{
if (valid)
{
if (getValueForKey(kProductVersion, &val, &len, &systemVersion))
if(getValueForKey(kProductVersion, &val, &len, &systemVersion))
{
// getValueForKey uses const char for val
// so copy it and trim
#define NMAX 5000
// NMAX (was 5521) the largest n such that 255n(n+1)/2 + (n+1)(BASE-1) <= 2^32-1
#define DO1(buf,i) {s1 += buf[i]; s2 += s1;}
#define DO2(buf,i) DO1(buf,i); DO1(buf,i+1);
#define DO4(buf,i) DO2(buf,i); DO2(buf,i+2);
#define DO8(buf,i) DO4(buf,i); DO4(buf,i+4);
#define DO16(buf) DO8(buf,0); DO8(buf,8);
#define DO1(buf, i){s1 += buf[i]; s2 += s1;}
#define DO2(buf, i)DO1(buf, i); DO1(buf, i + 1);
#define DO4(buf, i)DO2(buf, i); DO2(buf, i + 2);
#define DO8(buf, i)DO4(buf, i); DO4(buf, i + 4);
#define DO16(buf)DO8(buf, 0); DO8(buf, 8);
unsigned long Adler32(unsigned char *buf, long len)
{
unsigned long s1 = 1; // adler & 0xffff;
unsigned long s2 = 0; // (adler >> 16) & 0xffff;
unsigned long result;
int k;
while (len > 0) {
k = len < NMAX ? len : NMAX;
len -= k;
while (k >= 16) {
DO16(buf);
buf += 16;
k -= 16;
}
if (k != 0) do {
s1 += *buf++;
s2 += s1;
} while (--k);
s1 %= BASE;
s2 %= BASE;
}
result = (s2 << 16) | s1;
return OSSwapHostToBigInt32(result);
unsigned long s1 = 1; // adler & 0xffff;
unsigned long s2 = 0; // (adler >> 16) & 0xffff;
unsigned long result;
int k;
while (len > 0) {
k = len < NMAX ? len : NMAX;
len -= k;
while (k >= 16) {
DO16(buf);
buf += 16;
k -= 16;
}
if (k != 0) do {
s1 += *buf++;
s2 += s1;
} while (--k);
s1 %= BASE;
s2 %= BASE;
}
result = (s2 << 16) | s1;
return OSSwapHostToBigInt32(result);
}
branches/azimutz/trunkAutoResolution/i386/boot2/boot.h
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#define kRescanPromptKey"Rescan Prompt"
#define kRescanKey "Rescan"
#define kScanSingleDriveKey"Scan Single Drive"
#define kInsantMenuKey"Instant Menu"
#define kInstantMenuKey"Instant Menu"
#define kDefaultKernel"mach_kernel"
#define kGUIKey"GUI"
#define kBootBannerKey"Boot Banner"
branches/azimutz/trunkAutoResolution/i386/boot2/gui.c
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if (gui.menu.draw)
drawInfoMenuItems();
//Azi: make this info more accessible.
getBoolForKey(kShowInfoKey, &shoWinfo, &bootInfo->chameleonConfig);
if (shoWinfo && showBootBanner) // no boot banner, no showinfo.
{
// keep formatted with spaces instead of tabs
gui.debug.cursor = pos( 10, 100);
dprintf( &gui.screen, "label: %s\n", param->label );
dprintf( &gui.screen, "biosdev: 0x%x\n", param->biosdev );
}
// draw prev indicator
if(start)
if (start)
blend( images[iDeviceScrollPrev].image, gui.devicelist.pixmap, centeredAt( images[iDeviceScrollPrev].image, p_prev ) );
// draw next indicator
if( end < gDeviceCount - 1 )
if ( end < gDeviceCount - 1 )
blend( images[iDeviceScrollNext].image, gui.devicelist.pixmap, centeredAt( images[iDeviceScrollNext].image, p_next ) );
gui.redraw = true;
branches/azimutz/trunkAutoResolution/i386/modules/Makefile
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DEFINES=
CONFIG = hd
LIBSAIODIR = $(SRCROOT)/i386/libsaio
INC = -I$(LIBSAIODIR)
INC = -I$(LIBSAIODIR)
ifeq (${CONFIG_MODULES}, y)
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@hdiutil makehybrid -iso -joliet -hfs -hfs-volume-name \
${CDLABEL} -eltorito-boot ${CDBOOT} -no-emul-boot -ov -o \
"${ISOIMAGE}" ${IMGROOT} -quiet
@echo "\t[GZ] ${DISTFILE}.tar.gz"
@echo "\t[GZ] ${DISTFILE}.tgz"
@rm -f ${DISTFILE}.tar.gz
@cd ${SYMROOT} && tar -cf ${DISTFILE}.tar ${DISTROOT}
@gzip --best ${DISTFILE}.tar
@mv ${DISTFILE}.tar.gz ${DISTFILE}.tgz
pkg installer: all
@# TODO: remove sudo
sudo ${SRCROOT}/package/buildpkg.sh ${SYMROOT}/package;
${SRCROOT}/package/buildpkg.sh ${SYMROOT}/package;
@echo "\t[GZ] ${DISTFILE}.pkg"
@gzip --best ${DISTFILE}.pkg
$(SYMROOT)/i386/vers.h: version
@echo "#define I386BOOT_VERSION \"5.0.132\"" > $@
@echo "#define I386BOOT_BUILDDATE \"`date \"+%Y-%m-%d %H:%M:%S\"`\"" >> $@
branches/azimutz/trunkGraphicsEnablerModules/version
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2.0-RC5 trunkGraphicsEnabler
2.0 trunkGraphicsEnabler
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0x01, 0x17, 0x50, 0x6D, 0x52, 0x65, 0x66, 0x41, /* ..PmRefA */
0x43, 0x70, 0x75, 0x43, 0x73, 0x74, 0x00, 0x00, /* CpuCst.. */
0x00, 0x10, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* ....INTL */
0x31, 0x03, 0x10, 0x20 /* 1.._*/
0x31, 0x03, 0x10, 0x20/* 1.._*/
};
char resource_template_register_fixedhw[] =
char resource_template_register_fixedhw[] =
{
0x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x7F,
0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x7F,
0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x01, 0x79, 0x00
};
char resource_template_register_systemio[] =
char resource_template_register_systemio[] =
{
0x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x01,
0x08, 0x00, 0x00, 0x15, 0x04, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x79, 0x00,
};
0x08, 0x00, 0x00, 0x15, 0x04, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x79, 0x00,
};
if (Platform.CPU.Vendor != 0x756E6547) {
verbose ("Not an Intel platform: C-States will not be generated !!!\n");
return NULL;
return NULL;
}
if (acpi_cpu_count == 0)
if (acpi_cpu_count == 0)
get_acpi_cpu_names((void*)dsdt, dsdt->Length);
if (acpi_cpu_count > 0)
if (acpi_cpu_count > 0)
{
bool c2_enabled = false;
bool c3_enabled = false;
bool c4_enabled = false;
bool cst_using_sustemio = false;
bool cst_using_systemio = false;
getBoolForKey(kEnableC2State, &c2_enabled, &bootInfo->chameleonConfig);
getBoolForKey(kEnableC3State, &c3_enabled, &bootInfo->chameleonConfig);
getBoolForKey(kEnableC4State, &c4_enabled, &bootInfo->chameleonConfig);
getBoolForKey(kCSTUsingSystemIO, &cst_using_sustemio, &bootInfo->chameleonConfig);
getBoolForKey(kCSTUsingSystemIO, &cst_using_systemio, &bootInfo->chameleonConfig);
c2_enabled = c2_enabled | (fadt->C2_Latency < 100);
c3_enabled = c3_enabled | (fadt->C3_Latency < 1000);
unsigned char cstates_count = 1 + (c2_enabled ? 1 : 0) + (c3_enabled ? 1 : 0);
struct aml_chunk* root = aml_create_node(NULL);
aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
struct aml_chunk* scop = aml_add_scope(root, "\\_PR_");
struct aml_chunk* name = aml_add_name(scop, "CST_");
struct aml_chunk* pack = aml_add_package(name);
aml_add_byte(pack, cstates_count);
aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
struct aml_chunk* scop = aml_add_scope(root, "\\_PR_");
struct aml_chunk* name = aml_add_name(scop, "CST_");
struct aml_chunk* pack = aml_add_package(name);
aml_add_byte(pack, cstates_count);
struct aml_chunk* tmpl = aml_add_package(pack);
if (cst_using_sustemio)
{
// C1
resource_template_register_fixedhw[8] = 0x00;
resource_template_register_fixedhw[9] = 0x00;
resource_template_register_fixedhw[18] = 0x00;
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x01); // C1
aml_add_word(tmpl, 0x0001); // Latency
aml_add_dword(tmpl, 0x000003e8); // Power
uint8_t p_blk_lo, p_blk_hi;
if (c2_enabled) // C2
{
p_blk_lo = acpi_cpu_p_blk + 4;
p_blk_hi = (acpi_cpu_p_blk + 4) >> 8;
tmpl = aml_add_package(pack);
resource_template_register_systemio[11] = p_blk_lo; // C2
resource_template_register_systemio[12] = p_blk_hi; // C2
aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
aml_add_byte(tmpl, 0x02); // C2
aml_add_word(tmpl, 0x0040); // Latency
aml_add_dword(tmpl, 0x000001f4); // Power
}
if (c4_enabled) // C4
{
p_blk_lo = acpi_cpu_p_blk + 5;
p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
tmpl = aml_add_package(pack);
resource_template_register_systemio[11] = p_blk_lo; // C4
resource_template_register_systemio[12] = p_blk_hi; // C4
aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
aml_add_byte(tmpl, 0x04); // C4
aml_add_word(tmpl, 0x0080); // Latency
aml_add_dword(tmpl, 0x000000C8); // Power
}
else if (c3_enabled) // C3
{
p_blk_lo = acpi_cpu_p_blk + 5;
p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
tmpl = aml_add_package(pack);
resource_template_register_systemio[11] = p_blk_lo; // C3
resource_template_register_systemio[12] = p_blk_hi; // C3
aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
aml_add_byte(tmpl, 0x03); // C3
aml_add_word(tmpl, 0x0060); // Latency
aml_add_dword(tmpl, 0x0000015e); // Power
}
}
else
{
// C1
resource_template_register_fixedhw[11] = 0x00; // C1
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x01); // C1
aml_add_word(tmpl, 0x0001); // Latency
aml_add_dword(tmpl, 0x000003e8); // Power
resource_template_register_fixedhw[18] = 0x03;
if (c2_enabled) // C2
{
tmpl = aml_add_package(pack);
resource_template_register_fixedhw[11] = 0x10; // C2
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x02); // C2
aml_add_word(tmpl, 0x0040); // Latency
aml_add_dword(tmpl, 0x000001f4); // Power
}
if (c4_enabled) // C4
{
tmpl = aml_add_package(pack);
resource_template_register_fixedhw[11] = 0x30; // C4
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x04); // C4
aml_add_word(tmpl, 0x0080); // Latency
aml_add_dword(tmpl, 0x000000C8); // Power
}
else if (c3_enabled)
{
tmpl = aml_add_package(pack);
resource_template_register_fixedhw[11] = 0x20; // C3
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x03); // C3
aml_add_word(tmpl, 0x0060); // Latency
aml_add_dword(tmpl, 0x0000015e); // Power
}
}
struct aml_chunk* tmpl = aml_add_package(pack);
if (cst_using_systemio)
{
// C1
resource_template_register_fixedhw[8] = 0x00;
resource_template_register_fixedhw[9] = 0x00;
resource_template_register_fixedhw[18] = 0x00;
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x01); // C1
aml_add_word(tmpl, 0x0001); // Latency
aml_add_dword(tmpl, 0x000003e8); // Power
// Aliaces
int i;
for (i = 0; i < acpi_cpu_count; i++)
uint8_t p_blk_lo, p_blk_hi;
if (c2_enabled) // C2
{
char name[9];
sprintf(name, "_PR_%c%c%c%c", acpi_cpu_name[i][0], acpi_cpu_name[i][1], acpi_cpu_name[i][2], acpi_cpu_name[i][3]);
p_blk_lo = acpi_cpu_p_blk + 4;
p_blk_hi = (acpi_cpu_p_blk + 4) >> 8;
scop = aml_add_scope(root, name);
aml_add_alias(scop, "CST_", "_CST");