#define PATCH_ROM_FAILED␉␉␉0␊ |
#define MAX_NUM_DCB_ENTRIES␉␉␉16␊ |
#define TYPE_GROUPED␉␉␉␉0xff␊ |
#define READ_BYTE(rom, offset) (*(u_char *)(rom + offset))␊ |
#define READ_LE_SHORT(rom, offset) (READ_BYTE(rom, offset+1) << 8 | READ_BYTE(rom, offset))␊ |
#define READ_LE_INT(rom, offset) (READ_LE_SHORT(rom, offset+2) << 16 | READ_LE_SHORT(rom, offset))␊ |
#define WRITE_LE_SHORT(data) (((data) << 8 & 0xff00) | ((data) >> 8 & 0x00ff ))␊ |
#define WRITE_LE_INT(data) (WRITE_LE_SHORT(data) << 16 | WRITE_LE_SHORT(data >> 16))␊ |
␊ |
extern uint32_t devices_number;␊ |
␊ |
|
␉// 12D0 - 12DF␊ |
␉// 12E0 - 12EF␊ |
␉// 12F0 - 12FF␊ |
␊ |
};␊ |
␊ |
#define READ_BYTE(rom, offset) (*(u_char *)(rom + offset))␊ |
#define READ_LE_SHORT(rom, offset) (READ_BYTE(rom, offset+1) << 8 | READ_BYTE(rom, offset))␊ |
#define READ_LE_INT(rom, offset) (READ_LE_SHORT(rom, offset+2) << 16 | READ_LE_SHORT(rom, offset))␊ |
#define WRITE_LE_SHORT(data) (((data) << 8 & 0xff00) | ((data) >> 8 & 0x00ff ))␊ |
#define WRITE_LE_INT(data) (WRITE_LE_SHORT(data) << 16 | WRITE_LE_SHORT(data >> 16))␊ |
␊ |
static int patch_nvidia_rom(uint8_t *rom)␊ |
{␊ |
|
␉{␊ |
␉␉uint32_t connection;␊ |
␉␉connection = READ_LE_INT(dcbtable,headerlength + recordlength * i);␊ |
␊ |
␉␉/* Should we allow discontinuous DCBs? Certainly DCB I2C tables can be discontinuous */␊ |
␉␉if ((connection & 0x0000000f) == 0x0000000f) /* end of records */ ␊ |
␉␉␉continue;␊ |
|
␉return vram_size;␊ |
}␊ |
␊ |
static bool checkNvRomSig(uint8_t * aRom){␊ |
return aRom != NULL && (aRom[0] == 0x55 && aRom[1] == 0xaa);␊ |
}␊ |
␊ |
bool setup_nvidia_devprop(pci_dt_t *nvda_dev)␊ |
{␊ |
␉struct DevPropDevice␉*device;␊ |
|
␉␉// Otherwise read bios from card␊ |
␉␉nvBiosOveride = 0;␊ |
␉␉␊ |
␉␉// TODO: we should really check for the signature before copying the rom, i think.␊ |
␉␉␊ |
␉␉// PRAMIN first␊ |
␊ |
// PROM next␊ |
// Enable PROM access␊ |
(REG32(NV_PBUS_PCI_NV_20)) = NV_PBUS_PCI_NV_20_ROM_SHADOW_DISABLED;␊ |
␊ |
nvRom = (uint8_t*)®s[NV_PROM_OFFSET];␊ |
bcopy((uint8_t *)nvRom, rom, NVIDIA_ROM_SIZE);␊ |
␊ |
// disable PROM access␊ |
(REG32(NV_PBUS_PCI_NV_20)) = NV_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED;␊ |
␊ |
␉␉// Valid Signature ?␊ |
␉␉if (rom[0] != 0x55 && rom[1] != 0xaa)␊ |
// PROM first␊ |
// Enable PROM access␊ |
(REG32(NV_PBUS_PCI_NV_20)) = NV_PBUS_PCI_NV_20_ROM_SHADOW_DISABLED;␊ |
nvRom = (uint8_t*)®s[NV_PROM_OFFSET];␊ |
␊ |
// Valid Signature ?␊ |
␉␉if (checkNvRomSig(nvRom))␊ |
␉␉{␊ |
// PRAMIN first␊ |
nvRom = (uint8_t*)®s[NV_PRAMIN_OFFSET];␊ |
bcopy((uint32_t *)nvRom, rom, NVIDIA_ROM_SIZE);␊ |
bcopy((uint8_t *)nvRom, rom, NVIDIA_ROM_SIZE);␊ |
DBG("PROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);␊ |
}␊ |
else␊ |
{␊ |
␊ |
␉␉␉// Valid Signature ?␊ |
␉␉␉if (rom[0] != 0x55 && rom[1] != 0xaa)␊ |
␉␉␉{␊ |
// disable PROM access␊ |
(REG32(NV_PBUS_PCI_NV_20)) = NV_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED;␊ |
␊ |
␉␉ //PRAM next␊ |
nvRom = (uint8_t*)®s[NV_PRAMIN_OFFSET];␊ |
␊ |
if(checkNvRomSig(nvRom))␊ |
{␊ |
bcopy((uint32_t *)nvRom, rom, NVIDIA_ROM_SIZE);␊ |
DBG("PRAM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);␊ |
}␊ |
else␊ |
␉␉{␊ |
␉␉␉␉// 0xC0000 last␊ |
␉␉␉␉bcopy((char *)0xc0000, rom, NVIDIA_ROM_SIZE);␊ |
␉␉␉␉␊ |
␉␉␉␉// Valid Signature ?␊ |
␉␉␉␉if (rom[0] != 0x55 && rom[1] != 0xaa)␊ |
␉␉␉␉if (!checkNvRomSig(rom))␊ |
␉␉␉␉{␊ |
␉␉␉␉␉printf("ERROR: Unable to locate nVidia Video BIOS\n");␊ |
␉␉␉␉␉return false;␊ |
␉␉␉␉}␊ |
␉␉␉␉else␊ |
␉␉␉␉{␊ |
␉␉␉␉␉DBG("ROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);␊ |
␉␉␉␉}␊ |
␉␉␉}␊ |
␉␉␉else␊ |
␉␉␉{␊ |
␉␉␉␉DBG("PROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);␊ |
␉␉␉}␊ |
␉␉}␊ |
␉␉else␊ |
␉␉{␊ |
␉␉␉DBG("PRAM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);␊ |
␉␉}␊ |
␉}␊ |
else␊ |
{␊ |
DBG("ROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);␊ |
}␊ |
␊ |
␉␉␉}//end PRAM check␊ |
␊ |
}//end PROM check␊ |
␊ |
␉}//end load rom from bios␊ |
␉␊ |
␉if ((nvPatch = patch_nvidia_rom(rom)) == PATCH_ROM_FAILED) {␊ |
␉␉printf("ERROR: nVidia ROM Patching Failed!\n");␊ |
|
␉devprop_add_value(device, "VRAM,totalsize", (uint8_t*)&videoRam, 4);␊ |
␉devprop_add_value(device, "model", (uint8_t*)model, strlen(model) + 1);␊ |
␉devprop_add_value(device, "rom-revision", (uint8_t*)biosVersion, strlen(biosVersion) + 1);␊ |
//␉devprop_add_value(device, "@1,connector-type", connector_type_1, 4); // fixme␊ |
//␉devprop_add_value(device, "@0,display-cfg", display_cfg_0, 4);␊ |
//␉devprop_add_value(device, "@1,display-cfg", display_cfg_1, 4);␊ |
␉devprop_add_value(device, "@0,display-cfg", default_dcfg_0, DCFG0_LEN);␊ |
␉devprop_add_value(device, "@1,display-cfg", default_dcfg_1, DCFG1_LEN);␊ |
␉␊ |
␉//add HDMI Audio back to nvidia␊ |
␉//http://forge.voodooprojects.org/p/chameleon/issues/67/␊ |
//␉uint8_t connector_type_1[]= {0x00, 0x08, 0x00, 0x00};␊ |
//␉devprop_add_value(device, "@1,connector-type",connector_type_1, 4);␊ |
␉//end Nvidia HDMI Audio␊ |
␉␊ |
␊ |
␉if (getBoolForKey(kVBIOS, &doit, &bootInfo->chameleonConfig) && doit)␊ |
␉{␊ |
␉␉devprop_add_value(device, "vbios", rom, (nvBiosOveride > 0) ? nvBiosOveride : (rom[2] * 512));␊ |
␉}␊ |
␉␊ |
␉//add HDMI Audio back to nvidia␊ |
␉doit = false;␊ |
␉//http://forge.voodooprojects.org/p/chameleon/issues/67/␊ |
␉if(getBoolForKey(kEnableHDMIAudio, &doit, &bootInfo->chameleonConfig) && doit){␊ |
␉␉uint8_t connector_type_1[]= {0x00, 0x08, 0x00, 0x00};␊ |
␉␉devprop_add_value(device, "@1,connector-type",connector_type_1, 4);␊ |
␉}␊ |
␉//end Nvidia HDMI Audio␊ |
␊ |
␉stringdata = malloc(sizeof(uint8_t) * string->length);␊ |
␉memcpy(stringdata, (uint8_t*)devprop_generate_string(string), string->length);␊ |
␉stringlength = string->length;␊ |