| ␉␉ROUND64(SAMPLE_MULTIPLIER/(double)(SAMPLE_CLKS_INT-5))␊ |
| };␊ |
| ␊ |
| //int_enabled = ml_set_interrupts_enabled(FALSE);␊ |
| ␊ |
| restart:␊ |
| if (attempts >= 9) // increase to up to 9 attempts.␊ |
| // This will flash-reboot. TODO: Use tscPanic instead.␊ |
|
| set_PIT2(0);␉␉␉// reset timer 2 to be zero␊ |
| disable_PIT2();␉␉␉// turn off PIT 2␊ |
| ␉␊ |
| //ml_set_interrupts_enabled(int_enabled);␊ |
| return intermediate;␊ |
| }␊ |
| ␊ |
|
| ␉}␊ |
| ␉␊ |
| ␉tscFrequency = measure_tsc_frequency();␊ |
| ␉DBG("cpu freq classic = 0x%016llx\n", tscFrequency);␊ |
| ␉/* if usual method failed */␊ |
| ␉if ( tscFrequency < 1000 )␊ |
| ␉if ( tscFrequency < 1000 )//TEST␊ |
| ␉{␊ |
| ␉tscFrequency = timeRDTSC() * 20;␊ |
| ␉tscFrequency = timeRDTSC() * 20;//measure_tsc_frequency();␊ |
| ␉// DBG("cpu freq timeRDTSC = 0x%016llx\n", tscFrequency);␊ |
| ␉}␊ |
| ␉else{␊ |
| ␉// DBG("cpu freq timeRDTSC = 0x%016llxn", timeRDTSC() * 20);␊ |
| ␉}␊ |
| ␉fsbFrequency = 0;␊ |
| ␉cpuFrequency = 0;␊ |
| ␉␊ |
|
| ␉␉cpuFrequency = tscFrequency;␊ |
| ␉␉DBG("0 ! using the default value for FSB !\n");␊ |
| ␉}␊ |
| ␊ |
| ␉DBG("cpu freq = 0x%016llxn", timeRDTSC() * 20);␊ |
| ␊ |
| #endif␊ |
| ␉␊ |
| ␉p->CPU.MaxCoef = maxcoef;␊ |
