static struct nv_chipsets_t NVKnownChipsets[] = {␊ |
␉{ 0x00000000, "Unknown" },␊ |
//========================================␊ |
␉// 0040 - 004F␉␊ |
␉// 0040 - 004F␊ |
␉{ 0x10DE0040, "GeForce 6800 Ultra" },␊ |
␉{ 0x10DE0041, "GeForce 6800" },␊ |
␉{ 0x10DE0042, "GeForce 6800 LE" },␊ |
|
␉{ 0x10DE004D, "Quadro FX 3400" },␊ |
␉{ 0x10DE004E, "Quadro FX 4000" },␊ |
␉// 0050 - 005F␊ |
␉// 0060 - 006F␉␊ |
␉// 0070 - 007F␉␊ |
␉// 0080 - 008F␉␊ |
␉// 0090 - 009F␉␊ |
␉// 0060 - 006F␊ |
␉// 0070 - 007F␊ |
␉// 0080 - 008F␊ |
␉// 0090 - 009F␊ |
␉{ 0x10DE0090, "GeForce 7800 GTX" },␊ |
␉{ 0x10DE0091, "GeForce 7800 GTX" },␊ |
␉{ 0x10DE0092, "GeForce 7800 GT" },␊ |
|
␉{ 0x10DE0098, "GeForce Go 7800" },␊ |
␉{ 0x10DE0099, "GeForce Go 7800 GTX" },␊ |
␉{ 0x10DE009D, "Quadro FX 4500" },␊ |
␉// 00A0 - 00AF␉␊ |
␉// 00B0 - 00BF␉␊ |
␉// 00C0 - 00CF␉␊ |
␉// 00A0 - 00AF␊ |
␉// 00B0 - 00BF␊ |
␉// 00C0 - 00CF␊ |
␉{ 0x10DE00C0, "GeForce 6800 GS" },␊ |
␉{ 0x10DE00C1, "GeForce 6800" },␊ |
␉{ 0x10DE00C2, "GeForce 6800 LE" },␊ |
|
␉{ 0x10DE00CC, "Quadro FX Go1400" },␊ |
␉{ 0x10DE00CD, "Quadro FX 3450/4000 SDI" },␊ |
␉{ 0x10DE00CE, "Quadro FX 1400" },␊ |
␉// 00D0 - 00DF␉␊ |
␉// 00E0 - 00EF␉␊ |
␉// 00F0 - 00FF␉␊ |
␉// 00D0 - 00DF␊ |
␉// 00E0 - 00EF␊ |
␉// 00F0 - 00FF␊ |
␉{ 0x10DE00F1, "GeForce 6600 GT" },␊ |
␉{ 0x10DE00F2, "GeForce 6600" },␊ |
␉{ 0x10DE00F3, "GeForce 6200" },␊ |
|
␉{ 0x10DE00F6, "GeForce 6800 GS/XT" },␊ |
␉{ 0x10DE00F8, "Quadro FX 3400/4400" },␊ |
␉{ 0x10DE00F9, "GeForce 6800 Series GPU" },␊ |
␉// 0100 - 010F␉␊ |
␉// 0110 - 011F␉␊ |
␉// 0120 - 012F␉␊ |
␉// 0130 - 013F␉␊ |
␉// 0140 - 014F␉␊ |
␉// 0100 - 010F␊ |
␉// 0110 - 011F␊ |
␉// 0120 - 012F␊ |
␉// 0130 - 013F␊ |
␉// 0140 - 014F␊ |
␉{ 0x10DE0140, "GeForce 6600 GT" },␊ |
␉{ 0x10DE0141, "GeForce 6600" },␊ |
␉{ 0x10DE0142, "GeForce 6600 LE" },␊ |
|
␉{ 0x10DE014D, "Quadro FX 550" },␊ |
␉{ 0x10DE014E, "Quadro FX 540" },␊ |
␉{ 0x10DE014F, "GeForce 6200" },␊ |
␉// 0150 - 015F␉␊ |
␉// 0160 - 016F␉␊ |
␉// 0150 - 015F␊ |
␉// 0160 - 016F␊ |
␉{ 0x10DE0160, "GeForce 6500" },␊ |
␉{ 0x10DE0161, "GeForce 6200 TurboCache(TM)" },␊ |
␉{ 0x10DE0162, "GeForce 6200SE TurboCache(TM)" },␊ |
|
␉{ 0x10DE0168, "GeForce Go 6400" },␊ |
␉{ 0x10DE0169, "GeForce 6250" },␊ |
␉{ 0x10DE016A, "GeForce 7100 GS" },␊ |
␉// 0170 - 017F␉␊ |
␉// 0180 - 018F␉␊ |
␉// 0190 - 019F␉␉␊ |
␉// 0170 - 017F␊ |
␉// 0180 - 018F␊ |
␉// 0190 - 019F␊ |
␉{ 0x10DE0191, "GeForce 8800 GTX" },␊ |
␉{ 0x10DE0193, "GeForce 8800 GTS" },␊ |
␉{ 0x10DE0194, "GeForce 8800 Ultra" },␊ |
␉{ 0x10DE0197, "Tesla C870" },␊ |
␉{ 0x10DE019D, "Quadro FX 5600" },␊ |
␉{ 0x10DE019E, "Quadro FX 4600" },␊ |
␉// 01A0 - 01AF␉␊ |
␉// 01B0 - 01BF␉␊ |
␉// 01C0 - 01CF␉␊ |
␉// 01D0 - 01DF␉␉␊ |
␉// 01A0 - 01AF␊ |
␉// 01B0 - 01BF␊ |
␉// 01C0 - 01CF␊ |
␉// 01D0 - 01DF␊ |
␉{ 0x10DE01D0, "GeForce 7350 LE" },␊ |
␉{ 0x10DE01D1, "GeForce 7300 LE" },␊ |
␉{ 0x10DE01D2, "GeForce 7550 LE" },␊ |
|
␉{ 0x10DE01DD, "GeForce 7500 LE" },␊ |
␉{ 0x10DE01DE, "Quadro FX 350" },␊ |
␉{ 0x10DE01DF, "GeForce 7300 GS" },␊ |
␉// 01E0 - 01EF␉␊ |
␉// 01E0 - 01EF␊ |
␉// 01F0 - 01FF␊ |
␉// 0200 - 020F␉␊ |
␉// 0210 - 021F␉␊ |
␉// 0200 - 020F␊ |
␉// 0210 - 021F␊ |
␉{ 0x10DE0211, "GeForce 6800" },␊ |
␉{ 0x10DE0212, "GeForce 6800 LE" },␊ |
␉{ 0x10DE0215, "GeForce 6800 GT" },␊ |
␉{ 0x10DE0218, "GeForce 6800 XT" },␊ |
␉// 0220 - 022F␉␊ |
␉// 0220 - 022F␊ |
␉{ 0x10DE0221, "GeForce 6200" },␊ |
␉{ 0x10DE0222, "GeForce 6200 A-LE" },␊ |
␉// 0230 - 023F␉␊ |
␉// 0240 - 024F␉␊ |
␉// 0230 - 023F␊ |
␉// 0240 - 024F␊ |
␉{ 0x10DE0240, "GeForce 6150" },␊ |
␉{ 0x10DE0241, "GeForce 6150 LE" },␊ |
␉{ 0x10DE0242, "GeForce 6100" },␊ |
␉{ 0x10DE0244, "GeForce Go 6150" },␊ |
␉{ 0x10DE0245, "Quadro NVS 210S / GeForce 6150LE" },␊ |
␉{ 0x10DE0247, "GeForce Go 6100" },␊ |
␉// 0250 - 025F␉␊ |
␉// 0260 - 026F␉␊ |
␉// 0270 - 027F␉␊ |
␉// 0280 - 028F␉␉␊ |
␉// 0290 - 029F␉␊ |
␉// 0250 - 025F␊ |
␉// 0260 - 026F␊ |
␉// 0270 - 027F␊ |
␉// 0280 - 028F␊ |
␉// 0290 - 029F␊ |
␉{ 0x10DE0290, "GeForce 7900 GTX" },␊ |
␉{ 0x10DE0291, "GeForce 7900 GT/GTO" },␊ |
␉{ 0x10DE0292, "GeForce 7900 GS" },␊ |
|
␉{ 0x10DE029D, "Quadro FX 3500" },␊ |
␉{ 0x10DE029E, "Quadro FX 1500" },␊ |
␉{ 0x10DE029F, "Quadro FX 4500 X2" },␊ |
␉// 02A0 - 02AF␉␊ |
␉// 02B0 - 02BF␉␊ |
␉// 02C0 - 02CF␉␊ |
␉// 02D0 - 02DF␉␉␊ |
␉// 02E0 - 02EF␉␉␊ |
␉// 02A0 - 02AF␊ |
␉// 02B0 - 02BF␊ |
␉// 02C0 - 02CF␊ |
␉// 02D0 - 02DF␊ |
␉// 02E0 - 02EF␊ |
␉{ 0x10DE02E0, "GeForce 7600 GT" },␊ |
␉{ 0x10DE02E1, "GeForce 7600 GS" },␊ |
␉{ 0x10DE02E2, "GeForce 7300 GT" },␊ |
␉{ 0x10DE02E3, "GeForce 7900 GS" },␊ |
␉{ 0x10DE02E4, "GeForce 7950 GT" },␊ |
␉// 02F0 - 02FF␉␉␊ |
␉// 0300 - 030F␉␉␊ |
␉// 02F0 - 02FF␊ |
␉// 0300 - 030F␊ |
␉{ 0x10DE0301, "GeForce FX 5800 Ultra" },␊ |
␉{ 0x10DE0302, "GeForce FX 5800" },␊ |
␉{ 0x10DE0308, "Quadro FX 2000" },␊ |
␉{ 0x10DE0309, "Quadro FX 1000" },␊ |
␉// 0310 - 031F␉␉␊ |
␉// 0310 - 031F␊ |
␉{ 0x10DE0311, "GeForce FX 5600 Ultra" },␊ |
␉{ 0x10DE0312, "GeForce FX 5600" },␊ |
␉{ 0x10DE0314, "GeForce FX 5600XT" },␊ |
␉{ 0x10DE031A, "GeForce FX Go5600" },␊ |
␉{ 0x10DE031B, "GeForce FX Go5650" },␊ |
␉{ 0x10DE031C, "Quadro FX Go700" },␊ |
␉// 0320 - 032F␉␉␊ |
␉// 0320 - 032F␊ |
␉{ 0x10DE0324, "GeForce FX Go5200" },␊ |
␉{ 0x10DE0325, "GeForce FX Go5250" },␊ |
␉{ 0x10DE0326, "GeForce FX 5500" },␊ |
|
␉{ 0x10DE0348, "GeForce FX Go5700" },␊ |
␉{ 0x10DE034C, "Quadro FX Go1000" },␊ |
␉{ 0x10DE034E, "Quadro FX 1100" },␊ |
␉// 0350 - 035F␉␊ |
␉// 0360 - 036F␉␊ |
␉// 0370 - 037F␉␊ |
␉// 0380 - 038F␉␉␉␊ |
␉// 0350 - 035F␊ |
␉// 0360 - 036F␊ |
␉// 0370 - 037F␊ |
␉// 0380 - 038F␊ |
␉{ 0x10DE038B, "GeForce 7650 GS" },␊ |
␉// 0390 - 039F␊ |
␉{ 0x10DE0390, "GeForce 7650 GS" },␊ |
|
␉{ 0x10DE039B, "GeForce Go 7900 SE" },␊ |
␉{ 0x10DE039C, "Quadro FX 550M" },␊ |
␉{ 0x10DE039E, "Quadro FX 560" },␊ |
␉// 03A0 - 03AF␉␊ |
␉// 03B0 - 03BF␉␊ |
␉// 03C0 - 03CF␉␊ |
␉// 03D0 - 03DF␉␉␉␊ |
␉// 03A0 - 03AF␊ |
␉// 03B0 - 03BF␊ |
␉// 03C0 - 03CF␊ |
␉// 03D0 - 03DF␊ |
␉{ 0x10DE03D0, "GeForce 6150SE nForce 430" },␊ |
␉{ 0x10DE03D1, "GeForce 6100 nForce 405" },␊ |
␉{ 0x10DE03D2, "GeForce 6100 nForce 400" },␊ |
|
␉{ 0x10DE03D6, "GeForce 7025 / nForce 630a" },␊ |
␉// 03E0 - 03EF␊ |
␉// 03F0 - 03FF␊ |
␉// 0400 - 040F␉␉␊ |
␉// 0400 - 040F␊ |
␉{ 0x10DE0400, "GeForce 8600 GTS" },␊ |
␉{ 0x10DE0401, "GeForce 8600 GT" },␊ |
␉{ 0x10DE0402, "GeForce 8600 GT" },␊ |
|
␉{ 0x10DE040D, "Quadro FX 1600M" },␊ |
␉{ 0x10DE040E, "Quadro FX 570" },␊ |
␉{ 0x10DE040F, "Quadro FX 1700" },␊ |
␉// 0410 - 041F␉␊ |
␉// 0410 - 041F␊ |
␉{ 0x10DE0410, "GeForce GT 330" },␊ |
␉// 0420 - 042F␉␊ |
␉// 0420 - 042F␊ |
␉{ 0x10DE0420, "GeForce 8400 SE" },␊ |
␉{ 0x10DE0421, "GeForce 8500 GT" },␊ |
␉{ 0x10DE0422, "GeForce 8400 GS" },␊ |
|
␉// 04D0 - 04DF␊ |
␉// 04E0 - 04EF␊ |
␉// 04F0 - 04FF␊ |
␉// 0500 - 050F␉␊ |
␉// 0510 - 051F␉␊ |
␉// 0520 - 052F␉␊ |
␉// 0530 - 053F␉␊ |
␉// 0500 - 050F␊ |
␉// 0510 - 051F␊ |
␉// 0520 - 052F␊ |
␉// 0530 - 053F␊ |
␉{ 0x10DE053A, "GeForce 7050 PV / nForce 630a" },␊ |
␉{ 0x10DE053B, "GeForce 7050 PV / nForce 630a" },␊ |
␉{ 0x10DE053E, "GeForce 7025 / nForce 630a" },␊ |
|
␉// 05B0 - 05BF␊ |
␉// 05C0 - 05CF␊ |
␉// 05D0 - 05DF␊ |
␉// 05E0 - 05EF␉␊ |
␉// 05E0 - 05EF␊ |
␉{ 0x10DE05E0, "GeForce GTX 295" },␊ |
␉{ 0x10DE05E1, "GeForce GTX 280" },␊ |
␉{ 0x10DE05E2, "GeForce GTX 260" },␊ |
␉{ 0x10DE05E3, "GeForce GTX 285" },␊ |
␉{ 0x10DE05E6, "GeForce GTX 275" },␊ |
{ 0x10DE05E7, "Tesla C1060" }, ␊ |
␉{ 0x10DE05E7, "Tesla C1060 / M1060" },␊ |
␉// { 0x10DE05E7, 0x0595, "Tesla C1060" },␊ |
␉// { 0x10DE05E7, 0x068F, "Tesla C1060" },␊ |
␉// { 0x10DE05E7, 0x0697, "Tesla M1060" },␊ |
␉// { 0x10DE05E7, 0x0743, "Tesla M1060" },␊ |
␉{ 0x10DE05EA, "GeForce GTX 260" },␊ |
␉{ 0x10DE05EB, "GeForce GTX 295" },␊ |
␉{ 0x10DE05ED, "Quadroplex 2200 D2" },␊ |
␉// 05F0 - 05FF␉␉␊ |
␉// 05F0 - 05FF␊ |
␉{ 0x10DE05F8, "Quadroplex 2200 S4" },␊ |
␉{ 0x10DE05F9, "Quadro CX" },␊ |
␉{ 0x10DE05FD, "Quadro FX 5800" },␊ |
␉{ 0x10DE05FE, "Quadro FX 4800" },␊ |
␉{ 0x10DE05FF, "Quadro FX 3800" },␊ |
␉// 0600 - 060F␉␊ |
␉// 0600 - 060F␊ |
␉{ 0x10DE0600, "GeForce 8800 GTS 512" },␊ |
␉{ 0x10DE0601, "GeForce 9800 GT" },␊ |
␉{ 0x10DE0602, "GeForce 8800 GT" },␊ |
|
␉{ 0x10DE060C, "GeForce 8800M GTX" },␊ |
␉{ 0x10DE060D, "GeForce 8800 GS" },␊ |
␉{ 0x10DE060F, "GeForce GTX 285M" },␊ |
␉// 0610 - 061F␉␊ |
␉// 0610 - 061F␊ |
␉{ 0x10DE0610, "GeForce 9600 GSO" },␊ |
␉{ 0x10DE0611, "GeForce 8800 GT" },␊ |
␉{ 0x10DE0612, "GeForce 9800 GTX" },␊ |
|
␉{ 0x10DE061B, "Quadro VX 200" },␊ |
␉{ 0x10DE061C, "Quadro FX 3600M" },␊ |
␉{ 0x10DE061D, "Quadro FX 2800M" },␊ |
{ 0x10DE061E, "Quadro FX 3700M" },␊ |
␉{ 0x10DE061E, "Quadro FX 3700M" },␊ |
␉{ 0x10DE061F, "Quadro FX 3800M" },␊ |
␉// 0620 - 062F␉␊ |
{ 0x10DE0621, "GeForce GT 230" }, ␊ |
␉// 0620 - 062F␊ |
␉{ 0x10DE0621, "GeForce GT 230" },␊ |
␉{ 0x10DE0622, "GeForce 9600 GT" },␊ |
␉{ 0x10DE0623, "GeForce 9600 GS" },␊ |
␉{ 0x10DE0625, "GeForce 9600 GSO 512"},␊ |
|
␉{ 0x10DE0627, "GeForce GT 140" },␊ |
␉{ 0x10DE0628, "GeForce 9800M GTS" },␊ |
␉{ 0x10DE062A, "GeForce 9700M GTS" },␊ |
{ 0x10DE062B, "GeForce 9800M GS" },␊ |
␉{ 0x10DE062B, "GeForce 9800M GS" },␊ |
␉{ 0x10DE062C, "GeForce 9800M GTS" },␊ |
␉{ 0x10DE062D, "GeForce 9600 GT" },␊ |
␉{ 0x10DE062E, "GeForce 9600 GT" },␊ |
␉// 0630 - 063F␉␊ |
␉// 0630 - 063F␊ |
␉{ 0x10DE0631, "GeForce GTS 160M" },␊ |
␉{ 0x10DE0632, "GeForce GTS 150M" },␊ |
␉{ 0x10DE0635, "GeForce 9600 GSO" },␊ |
␉{ 0x10DE0637, "GeForce 9600 GT" },␊ |
␉{ 0x10DE0638, "Quadro FX 1800" },␊ |
␉{ 0x10DE063A, "Quadro FX 2700M" },␊ |
␉// 0640 - 064F␉␊ |
␉// 0640 - 064F␊ |
␉{ 0x10DE0640, "GeForce 9500 GT" },␊ |
␉{ 0x10DE0641, "GeForce 9400 GT" },␊ |
␉{ 0x10DE0642, "GeForce 8400 GS" },␊ |
|
␉{ 0x10DE064A, "GeForce 9700M GT" },␊ |
␉{ 0x10DE064B, "GeForce 9500M G" },␊ |
␉{ 0x10DE064C, "GeForce 9650M GT" },␊ |
␉// 0650 - 065F␉␉␊ |
␉// 0650 - 065F␊ |
␉{ 0x10DE0651, "GeForce G 110M" },␊ |
␉{ 0x10DE0652, "GeForce GT 130M" },␊ |
␉{ 0x10DE0653, "GeForce GT 120M" },␊ |
␉{ 0x10DE0654, "GeForce GT 220M" },␊ |
{ 0x10DE0655, "GeForce GT 120" },␊ |
␉{ 0x10DE0655, "GeForce GT 120" },␊ |
␉{ 0x10DE0656, "GeForce 9650 S" },␊ |
␉{ 0x10DE0658, "Quadro FX 380" },␊ |
␉{ 0x10DE0659, "Quadro FX 580" },␊ |
|
␉{ 0x10DE06CA, "GeForce GTX 480M" },␊ |
␉{ 0x10DE06CD, "GeForce GTX 470" },␊ |
␉// 06D0 - 06DF␊ |
␉{ 0x10DE06D1, "Tesla C2050" },␉// TODO: sub-device id: 0x0771␊ |
␉{ 0x10DE06D1, "Tesla C2070" },␉// TODO: sub-device id: 0x0772␊ |
␉{ 0x10DE06D2, "Tesla M2070" },␊ |
␉{ 0x10DE06D1, "Tesla C2050 / C2070" },␊ |
␉// { 0x10DE06D1, 0x0771, "Tesla C2050" },␊ |
␉// { 0x10DE06D1, 0x0772, "Tesla C2070" },␊ |
␉{ 0x10DE06D2, "Tesla M2070 / M2070" },␊ |
␉// { 0x10DE06D2, 0x082F, "Tesla M2050" },␊ |
␉// { 0x10DE06D2, 0x082F, "Tesla M2070" },␊ |
␉{ 0x10DE06D8, "Quadro 6000" },␊ |
␉{ 0x10DE06D9, "Quadro 5000" },␊ |
␉{ 0x10DE06DA, "Quadro 5000M" },␊ |
␉{ 0x10DE06DC, "Quadro 6000" },␊ |
␉{ 0x10DE06DD, "Quadro 4000" },␊ |
␉{ 0x10DE06DE, "Tesla M2050" },␉// TODO: sub-device id: 0x0846␊ |
␉{ 0x10DE06DE, "Tesla M2070" },␉// TODO: sub-device id: ?␉␊ |
␉{ 0x10DE06DE, "Tesla M2050" },␊ |
␉// { 0x10DE06DE, 0x082F, "Tesla M2050" },␊ |
␉// { 0x10DE06DE, 0x0846, "Tesla M2050" },␊ |
␉{ 0x10DE06DF, "Tesla M2070-Q" },␊ |
␉// 0x10DE06DE also applies to misc S2050, X2070, M2050, M2070␊ |
␉// 06E0 - 06EF␉␊ |
␉// 06E0 - 06EF␊ |
␉{ 0x10DE06E0, "GeForce 9300 GE" },␊ |
␉{ 0x10DE06E1, "GeForce 9300 GS" },␊ |
␉{ 0x10DE06E2, "GeForce 8400" },␊ |
|
␉{ 0x10DE06EB, "Quadro NVS 160M" },␊ |
␉{ 0x10DE06EC, "GeForce G 105M" },␊ |
␉{ 0x10DE06EF, "GeForce G 103M" },␊ |
␉// 06F0 - 06FF␉␊ |
{ 0x10DE06F1, "GeForce G105M" }, ␊ |
␉// 06F0 - 06FF␊ |
␉{ 0x10DE06F1, "GeForce G105M" },␊ |
␉{ 0x10DE06F8, "Quadro NVS 420" },␊ |
␉{ 0x10DE06F9, "Quadro FX 370 LP" },␊ |
␉{ 0x10DE06FA, "Quadro NVS 450" },␊ |
␉{ 0x10DE06FB, "Quadro FX 370M" },␊ |
␉{ 0x10DE06FD, "Quadro NVS 295" },␊ |
{ 0x10DE06FF, "HICx16 + Graphics" },␊ |
␉{ 0x10DE06FF, "HICx16 + Graphics" },␊ |
␉// 0700 - 070F␊ |
␉// 0710 - 071F␊ |
␉// 0720 - 072F␊ |
|
␉// 07A0 - 07AF␊ |
␉// 07B0 - 07BF␊ |
␉// 07C0 - 07CF␊ |
␉// 07D0 - 07DF␉␊ |
␉// 07E0 - 07EF␉␉␊ |
␉// 07D0 - 07DF␊ |
␉// 07E0 - 07EF␊ |
␉{ 0x10DE07E0, "GeForce 7150 / nForce 630i" },␊ |
␉{ 0x10DE07E1, "GeForce 7100 / nForce 630i" },␊ |
␉{ 0x10DE07E2, "GeForce 7050 / nForce 630i" },␊ |
␉{ 0x10DE07E3, "GeForce 7050 / nForce 610i" },␊ |
␉{ 0x10DE07E5, "GeForce 7050 / nForce 620i" },␊ |
␉// 07F0 - 07FF␉␊ |
␉// 07F0 - 07FF␊ |
␉// 0800 - 080F␊ |
␉// 0810 - 081F␊ |
␉// 0820 - 082F␊ |
␉// 0830 - 083F␊ |
␉// 0840 - 084F␊ |
{ 0x10DE0840, "GeForce 8200M" }, ␊ |
␉{ 0x10DE0840, "GeForce 8200M" },␊ |
␉{ 0x10DE0844, "GeForce 9100M G" },␊ |
␉{ 0x10DE0845, "GeForce 8200M G" },␊ |
␉{ 0x10DE0846, "GeForce 9200" },␊ |
|
␉{ 0x10DE084D, "nForce 750a SLI" },␊ |
␉{ 0x10DE084F, "GeForce 8100 / nForce 720a" },␊ |
␉// 0850 - 085F␊ |
␉// 0860 - 086F␉␊ |
␉// 0860 - 086F␊ |
␉{ 0x10DE0860, "GeForce 9400" },␊ |
␉{ 0x10DE0861, "GeForce 9400" },␊ |
␉{ 0x10DE0862, "GeForce 9400M G" },␊ |
|
␉{ 0x10DE0866, "GeForce 9400M G" },␊ |
␉{ 0x10DE0867, "GeForce 9400" },␊ |
␉{ 0x10DE0868, "nForce 760i SLI" },␊ |
{ 0x10DE0869, "GeForce 9400" }, ␊ |
␉{ 0x10DE0869, "GeForce 9400" },␊ |
␉{ 0x10DE086A, "GeForce 9400" },␊ |
␉{ 0x10DE086C, "GeForce 9300 / nForce 730i" },␊ |
␉{ 0x10DE086D, "GeForce 9200" },␊ |
␉{ 0x10DE086E, "GeForce 9100M G" },␊ |
␉{ 0x10DE086F, "GeForce 8200M G" },␊ |
␉// 0870 - 087F␉␊ |
␉// 0870 - 087F␊ |
␉{ 0x10DE0870, "GeForce 9400M" },␊ |
␉{ 0x10DE0871, "GeForce 9200" },␊ |
␉{ 0x10DE0872, "GeForce G102M" },␊ |
␉{ 0x10DE0873, "GeForce G102M" },␊ |
␉{ 0x10DE0874, "ION 9300M" },␉␊ |
␉{ 0x10DE0874, "ION" },␊ |
␉{ 0x10DE0876, "ION" },␊ |
␉{ 0x10DE087A, "GeForce 9400" },␊ |
␉{ 0x10DE087D, "ION 9400M" },␊ |
␉{ 0x10DE087D, "ION" },␊ |
␉{ 0x10DE087E, "ION LE" },␊ |
␉{ 0x10DE087F, "ION LE" },␊ |
␉// 0880 - 088F␊ |
␉// 0890 - 089F␊ |
␉// 08A0 - 08AF␊ |
{ 0x10DE08A0, "GeForce 320M" }, ␊ |
␉{ 0x10DE08A0, "GeForce 320M" },␊ |
␉{ 0x10DE08A4, "GeForce 320M" },␊ |
␉{ 0x10DE08A5, "GeForce 320M" }, ␊ |
␉{ 0x10DE08A5, "GeForce 320M" },␊ |
␉// 08B0 - 08BF␊ |
␉// 08C0 - 08CF␊ |
␉// 08D0 - 08DF␉␊ |
␉// 08E0 - 08EF␉␉␉␊ |
␉// 08D0 - 08DF␊ |
␉// 08E0 - 08EF␊ |
␉// 08F0 - 08FF␊ |
␉// 0900 - 090F␊ |
␉// 0910 - 091F␊ |
|
␉// 09A0 - 09AF␊ |
␉// 09B0 - 09BF␊ |
␉// 09C0 - 09CF␊ |
␉// 09D0 - 09DF␉␊ |
␉// 09D0 - 09DF␊ |
␉// 09E0 - 09EF␊ |
␉// 09F0 - 09FF␊ |
␉// 0A00 - 0A0F␊ |
|
␉{ 0x10DE0A20, "GeForce GT220" },␊ |
␉{ 0x10DE0A22, "GeForce 315" },␊ |
␉{ 0x10DE0A23, "GeForce 210" },␊ |
{ 0x10DE0A26, "GeForce 405" }, ␊ |
␉{ 0x10DE0A26, "GeForce 405" },␊ |
␉{ 0x10DE0A27, "GeForce 405" },␊ |
␉{ 0x10DE0A28, "GeForce GT 230M" },␊ |
␉{ 0x10DE0A29, "GeForce GT 330M" },␊ |
␉{ 0x10DE0A2A, "GeForce GT 230M" },␊ |
␉{ 0x10DE0A2B, "GeForce GT 330M" },␊ |
␉{ 0x10DE0A2C, "NVS 5100M" },␊ |
␉{ 0x10DE0A2D, "GeForce GT 320M" },␉␊ |
␉// 0A30 - 0A3F␉␊ |
␉{ 0x10DE0A2D, "GeForce GT 320M" },␊ |
␉// 0A30 - 0A3F␊ |
␉{ 0x10DE0A34, "GeForce GT 240M" },␊ |
␉{ 0x10DE0A35, "GeForce GT 325M" },␊ |
{ 0x10DE0A38, "Quadro 400" },␊ |
␉{ 0x10DE0A38, "Quadro 400" },␊ |
␉{ 0x10DE0A3C, "Quadro FX 880M" },␊ |
␉// 0A40 - 0A4F␊ |
␉// 0A50 - 0A5F␊ |
|
␉{ 0x10DE0A6A, "NVS 2100M" },␊ |
␉{ 0x10DE0A6C, "NVS 3100M" },␊ |
␉{ 0x10DE0A6E, "GeForce 305M" },␊ |
␉{ 0x10DE0A6F, "ION" },␉␊ |
␉{ 0x10DE0A6F, "ION" },␊ |
␉// 0A70 - 0A7F␊ |
␉{ 0x10DE0A70, "GeForce 310M" },␊ |
␉{ 0x10DE0A71, "GeForce 305M" },␊ |
␉{ 0x10DE0A72, "GeForce 310M" },␊ |
␉{ 0x10DE0A73, "GeForce 305M" },␊ |
␉{ 0x10DE0A74, "GeForce G210M" },␊ |
␉{ 0x10DE0A75, "GeForce G310M" },␊ |
{ 0x10DE0A76, "ION" },␊ |
␉{ 0x10DE0A75, "GeForce 310M" },␊ |
␉{ 0x10DE0A76, "ION" },␊ |
␉{ 0x10DE0A78, "Quadro FX 380 LP" },␊ |
{ 0x10DE0A7A, "GeForce 315M" }, ␊ |
␉{ 0x10DE0A7A, "GeForce 315M" },␊ |
␉{ 0x10DE0A7C, "Quadro FX 380M" },␊ |
␉// 0A80 - 0A8F␊ |
␉// 0A90 - 0A9F␊ |
␉// 0AA0 - 0AAF␊ |
␉// 0AB0 - 0ABF␊ |
␉// 0AC0 - 0ACF␊ |
␉// 0AD0 - 0ADF␉␊ |
␉// 0AD0 - 0ADF␊ |
␉// 0AE0 - 0AEF␊ |
␉// 0AF0 - 0AFF␊ |
␉// 0B00 - 0B0F␊ |
|
␉// 0BA0 - 0BAF␊ |
␉// 0BB0 - 0BBF␊ |
␉// 0BC0 - 0BCF␊ |
␉// 0BD0 - 0BDF␉␊ |
␉// 0BD0 - 0BDF␊ |
␉// 0BE0 - 0BEF␊ |
␉// 0BF0 - 0BFF␊ |
␉// 0C00 - 0C0F␊ |
|
␉{ 0x10DE0CA2, "GeForce GT 320" },␊ |
␉{ 0x10DE0CA3, "GeForce GT 240" },␊ |
␉{ 0x10DE0CA4, "GeForce GT 340" },␊ |
{ 0x10DE0CA5, "GeForce GT 220" },␊ |
␉{ 0x10DE0CA5, "GeForce GT 220" },␊ |
␉{ 0x10DE0CA7, "GeForce GT 330" },␊ |
␉{ 0x10DE0CA8, "GeForce GTS 260M" },␊ |
␉{ 0x10DE0CA9, "GeForce GTS 250M" },␊ |
␉{ 0x10DE0CAC, "GeForce GT 220" },␊ |
␉{ 0x10DE0CAF, "GeForce GT 335M" },␊ |
␉// 0CB0 - 0CBF␉␊ |
␉// 0CB0 - 0CBF␊ |
␉{ 0x10DE0CB0, "GeForce GTS 350M" },␊ |
␉{ 0x10DE0CB1, "GeForce GTS 360M" },␊ |
␉{ 0x10DE0CBC, "Quadro FX 1800M" },␊ |
␉// 0CC0 - 0CCF␊ |
␉// 0CD0 - 0CDF␉␊ |
␉// 0CD0 - 0CDF␊ |
␉// 0CE0 - 0CEF␊ |
␉// 0CF0 - 0CFF␊ |
␉// 0D00 - 0D0F␊ |
|
␉// 0D70 - 0D7F␊ |
␉// 0D80 - 0D8F␊ |
␉// 0D90 - 0D9F␊ |
␉// 0DA0 - 0DAF␉␊ |
␉// 0DA0 - 0DAF␊ |
␉// 0DB0 - 0DBF␊ |
␉// 0DC0 - 0DCF␊ |
␉{ 0x10DE0DC0, "GeForce GT 440" },␊ |
|
␉{ 0x10DE0DCA, "GF10x" },␊ |
␉{ 0x10DE0DCD, "GeForce GT 555M" },␊ |
␉{ 0x10DE0DCE, "GeForce GT 555M" },␊ |
␉// 0DD0 - 0DDF␉␊ |
␉// 0DD0 - 0DDF␊ |
␉{ 0x10DE0DD1, "GeForce GTX 460M" },␊ |
␉{ 0x10DE0DD2, "GeForce GT 445M" },␊ |
␉{ 0x10DE0DD3, "GeForce GT 435M" },␊ |
|
␉{ 0x10DE0DDA, "Quadro 2000M" },␊ |
␉{ 0x10DE0DDE, "GF106-ES" },␊ |
␉{ 0x10DE0DDF, "GF106-INT" },␊ |
␉// 0DE0 - 0DEF␉␊ |
␉// 0DE0 - 0DEF␊ |
␉{ 0x10DE0DE0, "GeForce GT 440" },␊ |
␉{ 0x10DE0DE1, "GeForce GT 430" },␊ |
␉{ 0x10DE0DE2, "GeForce GT 420" },␊ |
|
␉{ 0x10DE0DEC, "GeForce GT 525M" },␊ |
␉{ 0x10DE0DED, "GeForce GT 520M" },␊ |
␉{ 0x10DE0DEE, "GeForce GT 415M" },␊ |
␉// 0DF0 - 0DFF␉␊ |
␉// 0DF0 - 0DFF␊ |
␉{ 0x10DE0DF0, "GeForce GT 425M" },␊ |
␉{ 0x10DE0DF1, "GeForce GT 420M" },␊ |
␉{ 0x10DE0DF2, "GeForce GT 435M" },␊ |
␉{ 0x10DE0DF3, "GeForce GT 420M" },␊ |
␉{ 0x10DE0DF4, "GeForce GT 540M" }, ␊ |
␉{ 0x10DE0DF4, "GeForce GT 540M" },␊ |
␉{ 0x10DE0DF5, "GeForce GT 525M" },␊ |
␉{ 0x10DE0DF6, "GeForce GT 550M" },␊ |
␉{ 0x10DE0DF7, "GeForce GT 520M" },␉␊ |
␉{ 0x10DE0DF7, "GeForce GT 520M" },␊ |
␉{ 0x10DE0DF8, "Quadro 600" },␊ |
␉{ 0x10DE0DFA, "Quadro 1000M" },␊ |
␉{ 0x10DE0DFC, "NVS 5200M" },␊ |
|
␉{ 0x10DE0E23, "GeForce GTX 460 SE" },␊ |
␉{ 0x10DE0E24, "GeForce GTX 460" },␊ |
␉{ 0x10DE0E25, "D12U-50" },␊ |
␉// 0E30 - 0E3F␉␊ |
␉// 0E30 - 0E3F␊ |
␉{ 0x10DE0E30, "GeForce GTX 470M" },␊ |
␉{ 0x10DE0E31, "GeForce GTX 485M" },␊ |
␉{ 0x10DE0E38, "GF104GL" },␊ |
|
␉{ 0x10DE0E3B, "Quadro 4000M" },␊ |
␉{ 0x10DE0E3E, "GF104-ES" },␊ |
␉{ 0x10DE0E3F, "GF104-INT" },␊ |
␉// 0E40 - 0E4F␉␊ |
␉// 0E40 - 0E4F␊ |
␉// 0E50 - 0E5F␊ |
␉// 0E60 - 0E6F␊ |
␉// 0E70 - 0E7F␊ |
|
␉// 0EA0 - 0EAF␊ |
␉// 0EB0 - 0EBF␊ |
␉// 0EC0 - 0ECF␊ |
␉// 0ED0 - 0EDF␉␊ |
␉// 0ED0 - 0EDF␊ |
␉// 0EE0 - 0EEF␊ |
␉// 0EF0 - 0EFF␊ |
␉// 0F00 - 0F0F␊ |
|
␉{ 0x10DE1049, "GeForce GT 620" },␊ |
␉// 1050 - 105F␊ |
␉{ 0x10DE1050, "GeForce GT 520M" },␊ |
{ 0x10DE1051, "GeForce GT 520MX" },␊ |
␉{ 0x10DE1051, "GeForce GT 520MX" },␊ |
␉{ 0x10DE1054, "GeForce GT 410M" },␊ |
␉{ 0x10DE1055, "GeForce 410M" },␊ |
␉{ 0x10DE1056, "Quadro NVS 4200M" },␊ |
|
␉{ 0x10DE1081, "GeForce GTX 570" },␊ |
␉{ 0x10DE1082, "GeForce GTX 560 Ti" },␊ |
␉{ 0x10DE1083, "D13U" },␊ |
{ 0x10DE1084, "GeForce GTX 560" }, ␊ |
␉{ 0x10DE1084, "GeForce GTX 560" },␊ |
␉{ 0x10DE1086, "GeForce GTX 570" },␊ |
{ 0x10DE1087, "GeForce GTX 560 Ti 448 Cores" },␊ |
␉{ 0x10DE1087, "GeForce GTX 560 Ti 448" },␊ |
␉{ 0x10DE1088, "GeForce GTX 590" },␊ |
{ 0x10DE1089, "GeForce GTX 580" }, ␊ |
␉{ 0x10DE108B, "GeForce GTX 590" }, ␊ |
␉// 1090 - 109F␉␊ |
{ 0x10DE1091, "Tesla M2090" },␊ |
␉{ 0x10DE1089, "GeForce GTX 580" },␊ |
␉{ 0x10DE108B, "GeForce GTX 590" },␊ |
␉// 1090 - 109F␊ |
␉{ 0x10DE1091, "Tesla M2090 / X2090" },␊ |
␉// { 0x10DE1091, 0x0974, "Tesla X2090" },␊ |
␉{ 0x10DE1094, "Tesla M2075" },␊ |
␉{ 0x10DE1096, "Tesla C2075" },␊ |
␉{ 0x10DE1098, "D13U" },␊ |
␉{ 0x10DE109A, "Quadro 5010M" }, ␊ |
␉{ 0x10DE109B, "Quadro 7000" }, ␊ |
␉{ 0x10DE109A, "Quadro 5010M" },␊ |
␉{ 0x10DE109B, "Quadro 7000" },␊ |
␉// 10A0 - 10AF␊ |
␉// 10B0 - 10BF␊ |
␉// 10C0 - 10CF␊ |
{ 0x10DE10C0, "GeForce 9300 GS" },␊ |
␉{ 0x10DE10C0, "GeForce 9300 GS" },␊ |
␉{ 0x10DE10C3, "GeForce 8400 GS" },␊ |
␉{ 0x10DE10C5, "GeForce 405" },␊ |
// 10D0 - 10DF␊ |
{ 0x10DE10D8, "NVS 300" },␊ |
␉// 10D0 - 10DF␊ |
␉{ 0x10DE10D8, "NVS 300" },␊ |
␉// 10E0 - 10EF␊ |
␉// 10F0 - 10FF␊ |
␉// 1100 - 110F␊ |
|
␉// 1220 - 122F␊ |
␉// 1230 - 123F␊ |
␉// 1240 - 124F␊ |
{ 0x10DE1241, "GeForce GT 545" }, ␊ |
␉{ 0x10DE1243, "GeForce GT 545" }, ␊ |
␉{ 0x10DE1241, "GeForce GT 545" },␊ |
␉{ 0x10DE1243, "GeForce GT 545" },␊ |
␉{ 0x10DE1244, "GeForce GTX 550 Ti" },␊ |
␉{ 0x10DE1245, "GeForce GTS 450" },␊ |
␉{ 0x10DE1247, "GeForce GT 555M" },␊ |
␉{ 0x10DE1247, "GeForce GT 555M / GT 635M" },␊ |
␉// { 0x10DE1247, 0x212A, "GT 635M" },␊ |
␉// { 0x10DE1247, 0x212B, "GT 635M" },␊ |
␉// { 0x10DE1247, 0x212C, "GT 635M" },␊ |
␉// 1250 - 125F␊ |
␉{ 0x10DE1251, "GeForce GTX 560M" },␊ |
␉// 1260 - 126F␊ |
|
␉␉␉headerlength = dcbtable[1];␊ |
␉␉␉numentries␉ = dcbtable[2];␊ |
␉␉␉recordlength = dcbtable[3];␊ |
␉␉␉␊ |
␊ |
␉␉␉sig = *(uint32_t *)&dcbtable[6];␊ |
␉␉}␊ |
␉␉else␊ |
|
␉{␊ |
␉␉uint32_t connection;␊ |
␉␉connection = *(uint32_t *)&dcbtable[headerlength + recordlength * i];␊ |
␉␉␊ |
␊ |
␉␉/* Should we allow discontinuous DCBs? Certainly DCB I2C tables can be discontinuous */␊ |
␉␉if ((connection & 0x0000000f) == 0x0000000f) /* end of records */ ␊ |
␉␉␉continue;␊ |
|
␉␉return 0;␊ |
␉if (devices_number == 1)␊ |
␉{␊ |
␉␉if (!DP_ADD_TEMP_VAL(device, nvidia_device_type))␊ |
␉␉␉return 0;␊ |
if (!DP_ADD_TEMP_VAL(device, nvidia_device_type))␊ |
return 0;␊ |
␉}␊ |
␉else␊ |
␉{␊ |
|
␉␉vram_size *= REG32(NVC0_MEM_CTRLR_COUNT);␊ |
␉}␊ |
␉␊ |
␉// Workaround for 9600M GT, GT 420/430/440 & GT 525M/540M␊ |
␉// Workaround for wrong RAM size detected␊ |
␉switch (nvda_dev->device_id)␊ |
␉{␊ |
␉␉case 0x0649: vram_size = 512*1024*1024; break;␉// 9600M GT␊ |
␉␉case 0x0DE0: vram_size = 1024*1024*1024; break; // GT 440␊ |
␉␉case 0x0DE1: vram_size = 1024*1024*1024; break; // GT 430␊ |
␉␉case 0x0DE2: vram_size = 1024*1024*1024; break; // GT 420␊ |
␉␉case 0x0DEC: vram_size = 1024*1024*1024; break; // GT 525M␊ |
␉␉case 0x0DF4: vram_size = 1024*1024*1024; break; // GT 540M␊ |
case 0x0DF5: vram_size = 1024*1024*1024; break; // GT 525M␊ |
␉␉default: break;␊ |
␉␉case 0x0649: // 9600M GT␊ |
vram_size = 512*1024*1024; // 512 MB␊ |
break;␊ |
␉␉case 0x0DE0: // GT 440␊ |
␉␉case 0x0DE1: // GT 430␊ |
␉␉case 0x0DE2: // GT 420␊ |
␉␉case 0x0DEC: // GT 525M␊ |
␉␉case 0x0DF4: // GT 540M␊ |
␉␉case 0x0DF5: // GT 525M␊ |
vram_size = 1024*1024*1024; // 1 GB␊ |
␉␉␉break;␊ |
␉␉default:␊ |
break;␊ |
␉}␊ |
␉␊ |
␉return vram_size;␊ |
|
␉model = get_nvidia_model((nvda_dev->vendor_id << 16) | nvda_dev->device_id);␊ |
␉␊ |
␉verbose("nVidia %s %dMB NV%02x [%04x:%04x] :: %s\n",␊ |
␉␉␉model, (uint32_t)(videoRam / 1024 / 1024),␊ |
␉␉␉(REG32(0) >> 20) & 0x1ff, nvda_dev->vendor_id, nvda_dev->device_id,␊ |
␉␉␉devicepath);␊ |
model, (uint32_t)(videoRam / 1024 / 1024),␊ |
(REG32(0) >> 20) & 0x1ff, nvda_dev->vendor_id, nvda_dev->device_id,␊ |
devicepath);␊ |
␉␊ |
␉rom = malloc(NVIDIA_ROM_SIZE);␊ |
␉sprintf(nvFilename, "/Extra/%04x_%04x.rom", (uint16_t)nvda_dev->vendor_id,␊ |
|
␉boot_display = 1;␊ |
␉if (devices_number == 1)␊ |
␉{␊ |
␉␉devprop_add_value(device, "@0,AAPL,boot-display", (uint8_t*)&boot_display, 4);␊ |
devprop_add_value(device, "@0,AAPL,boot-display", (uint8_t*)&boot_display, 4);␊ |
␉}␊ |
␉␊ |
␉if (nvPatch == PATCH_ROM_SUCCESS_HAS_LVDS) {␊ |
␉␉uint8_t built_in = 0x01;␊ |
␉␉devprop_add_value(device, "@0,built-in", &built_in, 1);␊ |
␉}␊ |
␉␊ |
␊ |
␉// get bios version␊ |
␉const int MAX_BIOS_VERSION_LENGTH = 32;␊ |
␉char* version_str = (char*)malloc(MAX_BIOS_VERSION_LENGTH);␊ |