Chameleon

Chameleon Commit Details

Date:2012-11-18 01:46:47 (7 years 10 months ago)
Author:ErmaC
Commit:2126
Parents: 2125
Message:Add new nVidia IDs and SubIDs for GTX650, 670MX, 675MX, Quadro K5000 and K4000. Add CPU define for new CPUs (thx Slice from Clover).
Changes:
M/branches/ErmaC/Trunk/i386/libsaio/platform.h
M/branches/ErmaC/Trunk/i386/libsaio/nvidia.c
M/branches/ErmaC/Trunk/i386/libsaio/cpu.h
M/branches/ErmaC/Trunk/i386/libsaio/acpi.h

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branches/ErmaC/Trunk/i386/libsaio/nvidia.c
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{ 0x10DE11A0,0x15580372,"Clevo GeForce GTX 680M" },
{ 0x10DE11A0,0x15585105,"Clevo GeForce GTX 680M" },
{ 0x10DE11A0,0x15587102,"Clevo GeForce GTX 680M" },
{ 0x10DE11A1,0x104310AD,"Asus GeForce GTX 670MX" },
{ 0x10DE11A1,0x104321AB,"Asus GeForce GTX 670MX" },
{ 0x10DE11A1,0x15580270,"Clevo GeForce GTX 670MX" },
{ 0x10DE11A1,0x15580371,"Clevo GeForce GTX 670MX" },
{ 0x10DE11A1,0x15585105,"Clevo GeForce GTX 670MX" },
{ 0x10DE11A1,0x15587102,"Clevo N13E-GR" },
{ 0x10DE11A7,0x15585105,"Clevo GeForce GTX 675MX" },
{ 0x10DE11A7,0x15587102,"Clevo GeForce GTX 675MX" },
// 11B0 - 11BF
{ 0x10DE11BC,0x1028053F,"Dell Quadro K5000M" },
{ 0x10DE11BC,0x1028153F,"Dell Quadro K5000M" },
{ 0x10DE0FC0,NV_SUB_IDS,"GeForce GT 640" },
{ 0x10DE0FC1,NV_SUB_IDS,"GeForce GT 640" },
{ 0x10DE0FC2,NV_SUB_IDS,"GeForce GT 630" },
{ 0x10DE0FC6,NV_SUB_IDS,"GeForce GTX 650" },
// 0FD0 - 0FDF
{ 0x10DE0FD1,NV_SUB_IDS,"GeForce GT 650M" },
{ 0x10DE0FD2,NV_SUB_IDS,"GeForce GT 640M" },
// 1190 - 119F
// 11A0 - 11AF
{ 0x10DE11A0,NV_SUB_IDS,"GeForce GTX 680M" },
{ 0x10DE11A1,NV_SUB_IDS,"GeForce GTX 670MX" },
{ 0x10DE11A7,NV_SUB_IDS,"GeForce GTX 675MX" },
// 11B0 - 11BF
{ 0x10DE11BA,NV_SUB_IDS,"Quadro K5000" },
{ 0x10DE11BC,NV_SUB_IDS,"Quadro K5000M" },
{ 0x10DE11BD,NV_SUB_IDS,"Quadro K4000M" },
{ 0x10DE11BE,NV_SUB_IDS,"Quadro K3000M" },
// 11C0 - 11CF
{ 0x10DE11C0,NV_SUB_IDS,"GeForce GTX 660" },
{ 0x10DE11C6,NV_SUB_IDS,"GeForce GTX 650" },
// 11D0 - 11DF
// 11E0 - 11EF
// 11F0 - 11FF
{ 0x10DE11FA,NV_SUB_IDS,"Quadro K4000" },
// 1200 - 120F
{ 0x10DE1200,NV_SUB_IDS,"GeForce GTX 560 Ti" },
{ 0x10DE1201,NV_SUB_IDS,"GeForce GTX 560" },
branches/ErmaC/Trunk/i386/libsaio/acpi.h
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/* Per ACPI 3.0a spec */
// TODO Migrate
struct acpi_2_rsdp {
char Signature[8];
uint8_t Checksum;
char OEMID[6];
uint8_t Revision;
uint32_t RsdtAddress;
uint32_t Length;
uint64_t XsdtAddress;
uint8_t ExtendedChecksum;
char Reserved[3];
struct acpi_2_rsdp
{
charSignature[8];
uint8_tChecksum;
charOEMID[6];
uint8_tRevision;
uint32_tRsdtAddress;
uint32_tLength;
uint64_tXsdtAddress;
uint8_tExtendedChecksum;
charReserved[3];
} __attribute__((packed));
// TODO Migrate
struct acpi_2_rsdt {
char Signature[4];
uint32_t Length;
uint8_t Revision;
uint8_t Checksum;
char OEMID[6];
char OEMTableId[8];
uint32_t OEMRevision;
uint32_t CreatorId;
uint32_t CreatorRevision;
struct acpi_2_rsdt
{
charSignature[4];
uint32_tLength;
uint8_tRevision;
uint8_tChecksum;
charOEMID[6];
charOEMTableId[8];
uint32_tOEMRevision;
uint32_tCreatorId;
uint32_tCreatorRevision;
} __attribute__((packed));
// TODO Migrate
struct acpi_2_xsdt {
char Signature[4];
uint32_t Length;
uint8_t Revision;
uint8_t Checksum;
char OEMID[6];
char OEMTableId[8];
uint32_t OEMRevision;
uint32_t CreatorId;
uint32_t CreatorRevision;
struct acpi_2_xsdt
{
charSignature[4];
uint32_tLength;
uint8_tRevision;
uint8_tChecksum;
charOEMID[6];
charOEMTableId[8];
uint32_tOEMRevision;
uint32_tCreatorId;
uint32_tCreatorRevision;
} __attribute__((packed));
// TODO Migrate
struct acpi_2_ssdt {
char Signature[4];
uint32_t Length;
uint8_t Revision;
uint8_t Checksum;
char OEMID[6];
char OEMTableId[8];
uint32_t OEMRevision;
uint32_t CreatorId;
uint32_t CreatorRevision;
struct acpi_2_ssdt
{
charSignature[4];
uint32_tLength;
uint8_tRevision;
uint8_tChecksum;
charOEMID[6];
charOEMTableId[8];
uint32_tOEMRevision;
uint32_tCreatorId;
uint32_tCreatorRevision;
} __attribute__((packed));
// TODO Migrate
struct acpi_2_dsdt {
char Signature[4];
uint32_t Length;
uint8_t Revision;
uint8_t Checksum;
char OEMID[6];
char OEMTableId[8];
uint32_t OEMRevision;
uint32_t CreatorId;
uint32_t CreatorRevision;
struct acpi_2_dsdt
{
charSignature[4];
uint32_tLength;
uint8_tRevision;
uint8_tChecksum;
charOEMID[6];
charOEMTableId[8];
uint32_tOEMRevision;
uint32_tCreatorId;
uint32_tCreatorRevision;
} __attribute__((packed));
// TODO Migrate
struct acpi_2_fadt {
char Signature[4];
uint32_t Length;
uint8_t Revision;
uint8_t Checksum;
char OEMID[6];
char OEMTableId[8];
uint32_t OEMRevision;
uint32_t CreatorId;
uint32_t CreatorRevision;
uint32_t FIRMWARE_CTRL;
uint32_t DSDT;
uint8_t Model;// JrCs
uint8_t PM_Profile;// JrCs
struct acpi_2_fadt
{
charSignature[4];
uint32_tLength;
uint8_tRevision;
uint8_tChecksum;
charOEMID[6];
charOEMTableId[8];
uint32_tOEMRevision;
uint32_tCreatorId;
uint32_tCreatorRevision;
uint32_tFIRMWARE_CTRL;
uint32_tDSDT;
uint8_tModel;// JrCs
uint8_tPM_Profile;// JrCs
uint16_tSCI_Interrupt;
uint32_tSMI_Command_Port;
uint8_tACPI_Enable;
branches/ErmaC/Trunk/i386/libsaio/platform.h
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#define CPUID_889
#define CPUID_MAX10
#define CPU_MODEL_PRESCOTT0x03// Celeron D, Pentium 4 (90nm)
#define CPU_MODEL_NOCONA0x04// Xeon Nocona, Irwindale (90nm)
#define CPU_MODEL_PRESLER0x06// Pentium 4, Pentium D (65nm)
#define CPU_MODEL_PENTIUM_M0x09// Banias
#define CPU_MODEL_DOTHAN0x0D// Dothan
#define CPU_MODEL_YONAH0x0E// Sossaman, Yonah
#define CPU_MODEL_MEROM0x0F// Allendale, Conroe, Kentsfield, Woodcrest, Clovertown, Tigerton, Merom
#define CPU_MODEL_CONROE0x0F
#define CPU_MODEL_CELERON0x16
#define CPU_MODEL_CONROE0x0F//
#define CPU_MODEL_CELERON0x16//
#define CPU_MODEL_PENRYN0x17// Wolfdale, Yorkfield, Harpertown, Penryn
#define CPU_MODEL_WOLFDALE0x17
#define CPU_MODEL_WOLFDALE0x17//
#define CPU_MODEL_NEHALEM0x1A// Bloomfield. Nehalem-EP, Nehalem-WS, Gainestown
#define CPU_MODEL_ATOM0x1C// Atom
#define CPU_MODEL_XEON_MP0x1D
#define CPU_MODEL_XEON_MP0x1D// MP 7400
#define CPU_MODEL_FIELDS0x1E// Lynnfield, Clarksfield, Jasper Forest
#define CPU_MODEL_DALES0x1F// Havendale, Auburndale
#define CPU_MODEL_CLARKDALE0x25// Clarkdale, Arrandale
#define CPU_MODEL_ATOM_SAN0x26//
#define CPU_MODEL_LINCROFT0x27//
#define CPU_MODEL_SANDYBRIDGE0x2A// Sandy Bridge
#define CPU_MODEL_WESTMERE0x2C// Gulftown, Westmere-EP, Westmere-WS
#define CPU_MODEL_JAKETOWN0x2D// Sandy Bridge-E, Sandy Bridge-EP
#define CPU_MODEL_NEHALEM_EX0x2E// Beckton
#define CPU_MODEL_WESTMERE_EX0x2F// Westmere-EX
#define CPU_MODEL_ATOM_20000x36//
#define CPU_MODEL_IVYBRIDGE0x3A// Ivy Bridge
#define CPU_MODEL_HASWELL0x3C//
#define CPU_MODEL_IVY_BRIDGE_E50x3E//
/* CPU Features */
#define CPU_FEATURE_MMX0x00000001// MMX Instruction Set
branches/ErmaC/Trunk/i386/libsaio/cpu.h
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#ifndef __LIBSAIO_CPU_H
#define __LIBSAIO_CPU_H
//#include "libsaio.h"
#include "platform.h"
extern void scan_cpu(PlatformInfo_t *);
// CPUID Values
#define CPUID_MODEL_PRESCOTT3// Celeron D, Pentium 4 (90nm)
#define CPUID_MODEL_NOCONA4// Xeon Nocona, Irwindale (90nm)
#define CPUID_MODEL_PRESLER6// Pentium 4, Pentium D (65nm)
#define CPUID_MODEL_DOTHAN13// Dothan
#define CPUID_MODEL_YONAH14// Intel Mobile Core Solo, Duo
#define CPUID_MODEL_MEROM15// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
#define CPUID_MODEL_CONROE15
#define CPUID_MODEL_CELERON22
#define CPUID_MODEL_PENRYN23// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
#define CPUID_MODEL_WOLFDALE23
#define CPUID_MODEL_NEHALEM26// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
#define CPUID_MODEL_ATOM28// Intel Atom (45nm) Pineview, Silverthorne
#define CPUID_MODEL_XEON_MP29
#define CPUID_MODEL_FIELDS30// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm),(Clarksfiled, Lynnfield, Jasper Forest)
#define CPUID_MODEL_DALES31// Havendale, Auburndale
#define CPUID_MODEL_CLARKDALE37// Intel Core i3, i5 LGA1156 (32nm), (Arrandale, Clarksdale)
#define CPUID_MODEL_LINCROFT38// Intel Atom (45nm) Z6xx (single core)
#define CPUID_MODEL_SANDYBRIDGE42// Intel Core i3, i5, i7 LGA1155 (32nm)
#define CPUID_MODEL_WESTMERE44// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
#define CPUID_MODEL_JAKETOWN45// Intel Xeon E5 LGA2011 (32nm), SandyBridge-E, SandyBridge-EN, SandyBridge-EP
#define CPUID_MODEL_NEHALEM_EX46// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x
#define CPUID_MODEL_WESTMERE_EX47// Intel Xeon E7
#define CPUID_MODEL_CEDARVIEW54// Intel Atom (32nm)
#define CPUID_MODEL_IVYBRIDGE58// Intel Core i5, i7 LGA1155 (22nm)
#define CPUID_MODEL_PRESCOTT3 // 0x03 Celeron D, Pentium 4 (90nm)
#define CPUID_MODEL_NOCONA4 // 0x04 Xeon Nocona, Irwindale (90nm)
#define CPUID_MODEL_PRESLER6 // 0x06 Pentium 4, Pentium D (65nm)
#define CPUID_MODEL_PENTIUM_M9 // 0x09
#define CPUID_MODEL_DOTHAN13 // 0x0D Dothan
#define CPUID_MODEL_YONAH14 // 0x0E Intel Mobile Core Solo, Duo
#define CPUID_MODEL_MEROM15 // 0x0F Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
#define CPUID_MODEL_CONROE15 // 0x0F
#define CPUID_MODEL_CELERON22 // 0x16
#define CPUID_MODEL_PENRYN23 // 0x17 Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
#define CPUID_MODEL_WOLFDALE23 // 0x17
#define CPUID_MODEL_NEHALEM26 // 0x1A Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
#define CPUID_MODEL_ATOM28 // 0x1C Intel Atom (45nm) Pineview, Silverthorne
#define CPUID_MODEL_XEON_MP29 // 0x1D MP 7400
#define CPUID_MODEL_FIELDS30 // 0x1E Intel Core i5, i7, Xeon X34xx LGA1156 (45nm),(Clarksfiled, Lynnfield, Jasper Forest)
#define CPUID_MODEL_DALES31 // 0x1F Havendale, Auburndale
#define CPUID_MODEL_CLARKDALE37 // 0x25 Intel Core i3, i5 LGA1156 (32nm), (Arrandale, Clarksdale)
#define CPUID_MODEL_ATOM_SAN38 // 0x26
#define CPUID_MODEL_LINCROFT39 // 0x27 Intel Atom (45nm) Z6xx (single core)
#define CPUID_MODEL_SANDYBRIDGE42 // 0x2A Intel Core i3, i5, i7 LGA1155 (32nm)
#define CPUID_MODEL_WESTMERE44 // 0x2C Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
#define CPUID_MODEL_JAKETOWN45 // 0x2D Intel Xeon E5 LGA2011 (32nm), SandyBridge-E, SandyBridge-EN, SandyBridge-EP
#define CPUID_MODEL_NEHALEM_EX46 // 0x2E Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x
#define CPUID_MODEL_WESTMERE_EX47 // 0x2F Intel Xeon E7
#define CPUID_MODEL_ATOM_200054 // 0x36 Intel Atom (32nm) Cedarview
#define CPUID_MODEL_IVYBRIDGE58 // 0x3A Intel Core i5, i7 LGA1155 (22nm)
#define CPUID_MODEL_HASWELL60 // 0x3C
#define CPUID_MODEL_IVY_BRIDGE_E562 // 0x3E
static inline uint64_t rdtsc64(void)
{

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Revision: 2126