Chameleon

Chameleon Commit Details

Date:2013-06-21 17:36:45 (10 years 8 months ago)
Author:MacMan
Commit:2250
Parents: 2249
Message:Added back the two missing modules in latest commit.
Changes:
A/branches/Chimera/i386/modules/Resolution
A/branches/Chimera/i386/modules/FileNVRAM/LICENSE
A/branches/Chimera/i386/modules/FileNVRAM/include
A/branches/Chimera/i386/modules/FileNVRAM/FileNVRAM.dylib
A/branches/Chimera/i386/modules/Resolution/Cconfig
A/branches/Chimera/i386/modules/Resolution/Readme.txt
A/branches/Chimera/i386/modules/FileNVRAM/include/FileNVRAM.h
A/branches/Chimera/i386/modules/FileNVRAM/README
A/branches/Chimera/i386/modules/Resolution/Makefile
A/branches/Chimera/i386/modules/Resolution/include/edid.h
A/branches/Chimera/i386/modules/FileNVRAM
A/branches/Chimera/i386/modules/Resolution/915resolution.c
A/branches/Chimera/i386/modules/Resolution/shortatombios.h
A/branches/Chimera/i386/modules/Resolution/include
A/branches/Chimera/i386/modules/Resolution/Resolution.c
A/branches/Chimera/i386/modules/Resolution/edid.c
A/branches/Chimera/i386/modules/FileNVRAM/Cconfig
A/branches/Chimera/i386/modules/Resolution/915resolution.h
A/branches/Chimera/i386/modules/FileNVRAM/NEWS
A/branches/Chimera/i386/modules/FileNVRAM/Makefile

File differences

branches/Chimera/i386/modules/FileNVRAM/LICENSE
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branches/Chimera/i386/modules/FileNVRAM/include/FileNVRAM.h
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//
// FileNVRAM.h
// FileNVRAM
//
// Created by Evan Lojewski on 1/18/13.
// Copyright (c) 2013 xZenue LLC. All rights reserved.
//
#ifndef FILENVRAM_H
#define FILENVRAM_H
#include <libsaio.h>
#include <xml.h>
TagPtr getNVRAMVariable(char* key);
void addNVRAMVariable(char* key, TagPtr entry);
void removeNVRAMVariable(char* key);
#endif /* FILENVRAM_H */
branches/Chimera/i386/modules/FileNVRAM/Cconfig
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#
# Chameleon Modules
#
config FILENVRAM_MODULE
bool "FileNVRAM Module"
default y
---help---
Say Y here if you want to enable to use of this module.
branches/Chimera/i386/modules/FileNVRAM/NEWS
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FileNVRAM Release Notes
========= Version 1.1.3 =======
* Fixed an potential issue where boot-args could get mangled.
* Fixed an issue where certain legacy variables were saved incorrectly.
* Fixed an issue where certain nvram variables not write to the file immediately.
========= Version 1.1.2 =======
* Fixed a regression in 1.1.1 causing sleep to break.
========= Version 1.1.1 =======
* Fixed an issue where non-root users could delete variables
* Fixed a potential issue with sleep
* Fixed a potential issue with 10.8.3
* Fixed an issue where boot-args remain after deleted on the command line.
* Update ROM generation to generate a random value.
branches/Chimera/i386/modules/FileNVRAM/Makefile
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MODULE_NAME = FileNVRAM
MODULE_AUTHOR = xZenue LLC.
MODULE_DESCRIPTION = FileNVRAM module for preloading NVRAM values
MODULE_VERSION = "1.1.0"
MODULE_COMPAT_VERSION = "1.0.0"
MODULE_START = $(MODULE_NAME)_start
MODULE_DEPENDENCIES =
DIR = FileNVRAM
include ../MakeInc.dir
$(SYMROOT)/modules/$(MODULE_NAME).dylib:
@echo "\t[CP] $(MODULE_NAME).dylib"
@cp $(MODULE_NAME).dylib $(SRCROOT)/sym/i386/modules/$(MODULE_NAME).dylib
$(SRCROOT)/sym/i386/boot_modules.c:
@
branches/Chimera/i386/modules/FileNVRAM/README
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===================
= FileNVRAM.dylib =
===================
FileNVRAM copyright © 2013 xZeneu LLC.
FileNVRAM is licensed under the Attribution-NonCommercial 3.0 Unported license.
Please see the license file for details
===================
= Bugs =
===================
Please report any bugs at https://public.xzenue.com/bugzilla/
===================
= Requirements =
===================
- Chameleon r2181 or newer
===================
= Usage =
===================
- Install the FileNVRAM.dylib to /Extra/modules/
- Reboot
Use the nvram command to manipulate variables
branches/Chimera/i386/modules/Resolution/915resolution.c
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/*
* resolution.h
*
*NOTE: I don't beleive this code is production ready / should be in trunk
* Atleast, not in it's current state.
*
* Created by Evan Lojewski on 3/4/10.
* Copyright 2009. All rights reserved.
*
*/
#ifndef _RESOLUTION_H_
#define _RESOLUTION_H_
//#include "libsaio.h"
//#include "edid.h" //included
#include "915resolution.h"
void patchVideoBios()
{
UInt32 x = 0, y = 0, bp = 0;
verbose("Resolution:\n");
getResolution(&x, &y, &bp);
if (x != 0 &&
y != 0 &&
bp != 0)
{
vbios_map * map;
map = open_vbios(CT_UNKNOWN);
if(map)
{
unlock_vbios(map);
set_mode(map, x, y, bp, 0, 0);
relock_vbios(map);
close_vbios(map);
}
}
}
/* Copied from 915 resolution created by steve tomljenovic
*
* This code is based on the techniques used in :
*
* - 855patch. Many thanks to Christian Zietz (czietz gmx net)
* for demonstrating how to shadow the VBIOS into system RAM
* and then modify it.
*
* - 1280patch by Andrew Tipton (andrewtipton null li).
*
* - 855resolution by Alain Poirier
*
* This source code is into the public domain.
*/
/**
**
**/
#define CONFIG_MECH_ONE_ADDR0xCF8
#define CONFIG_MECH_ONE_DATA0xCFC
int freqs[] = { 60, 75, 85 };
UInt32 get_chipset_id(void)
{
outl(CONFIG_MECH_ONE_ADDR, 0x80000000);
return inl(CONFIG_MECH_ONE_DATA);
}
chipset_type get_chipset(UInt32 id)
{
chipset_type type;
switch (id) {
case 0x35758086:
type = CT_830;
break;
case 0x25608086:
type = CT_845G;
break;
case 0x35808086:
type = CT_855GM;
break;
case 0x25708086:
type = CT_865G;
break;
case 0x25808086:
type = CT_915G;
break;
case 0x25908086:
type = CT_915GM;
break;
case 0x27708086:
type = CT_945G;
break;
case 0x27a08086:
type = CT_945GM;
break;
case 0x27ac8086:
type = CT_945GME;
break;
case 0x29708086:
type = CT_946GZ;
break;
case 0x27748086:
type = CT_955X;
break;
case 0x277c8086:
type = CT_975X;
break;
case 0x29a08086:
type = CT_G965;
break;
case 0x29908086:
type = CT_Q965;
break;
case 0x81008086:
type = CT_500;
break;
case 0x2e108086:
case 0X2e908086:
type = CT_B43;
break;
case 0x2e208086:
type = CT_P45;
break;
case 0x2e308086:
type = CT_G41;
break;
case 0x29c08086:
type = CT_G31;
break;
case 0x29208086:
type = CT_G45;
break;
case 0xA0108086:// mobile
case 0xA0008086:// desktop
type = CT_3150;
break;
case 0x2a008086:
type = CT_965GM;
break;
case 0x29e08086:
type = CT_X48;
break;
case 0x2a408086:
type = CT_GM45;
break;
//
// Core processors
// http://pci-ids.ucw.cz/read/PC/8086
//
case 0x00408086: // Core Processor DRAM Controller
case 0x00448086: // Core Processor DRAM Controller
case 0x00488086: // Core Processor DRAM Controller
case 0x00698086: // Core Processor DRAM Controller
case 0x01008086: // 2nd Generation Core Processor Family DRAM Controller
case 0x01048086: // 2nd Generation Core Processor Family DRAM Controller
case 0x01088086: // Xeon E3-1200 2nd Generation Core Processor Family DRAM Controller
case 0x010c8086: // Xeon E3-1200 2nd Generation Core Processor Family DRAM Controller
case 0x01508086: // 3rd Generation Core Processor Family DRAM Controller
case 0x01548086: // 3rd Generation Core Processor Family DRAM Controller
case 0x01588086: // 3rd Generation Core Processor Family DRAM Controller
case 0x015c8086: // 3rd Generation Core Processor Family DRAM Controller
verbose(" core proc identified\n");
type = CT_CORE_PROC;
break;
default:
if((id & 0x0000FFFF) == 0x00008086) // Intel chipset
{
//printf("Unknown chipset 0x%llX, please email id to meklort@gmail.com", id);
//getc();
type = CT_UNKNOWN_INTEL;
//type = CT_UNKNOWN;
}
else
{
type = CT_UNKNOWN;
}
break;
}
return type;
}
vbios_resolution_type1 * map_type1_resolution(vbios_map * map, UInt16 res)
{
vbios_resolution_type1 * ptr = ((vbios_resolution_type1*)(map->bios_ptr + res));
return ptr;
}
vbios_resolution_type2 * map_type2_resolution(vbios_map * map, UInt16 res)
{
vbios_resolution_type2 * ptr = ((vbios_resolution_type2*)(map->bios_ptr + res));
return ptr;
}
vbios_resolution_type3 * map_type3_resolution(vbios_map * map, UInt16 res)
{
vbios_resolution_type3 * ptr = ((vbios_resolution_type3*)(map->bios_ptr + res));
return ptr;
}
char detect_bios_type(vbios_map * map, char modeline, int entry_size)
{
UInt32 i;
UInt16 r1, r2;
r1 = r2 = 32000;
for (i=0; i < map->mode_table_size; i++)
{
if (map->mode_table[i].resolution <= r1)
{
r1 = map->mode_table[i].resolution;
}
else
{
if (map->mode_table[i].resolution <= r2)
{
r2 = map->mode_table[i].resolution;
}
}
/*printf("r1 = %d r2 = %d\n", r1, r2);*/
}
return (r2-r1-6) % entry_size == 0;
}
void close_vbios(vbios_map * map);
char detect_ati_bios_type(vbios_map * map)
{
return map->mode_table_size % sizeof(ATOM_MODE_TIMING) == 0;
}
vbios_map * open_vbios(chipset_type forced_chipset)
{
UInt32 z;
vbios_map * map = malloc(sizeof(vbios_map));
for(z=0; z<sizeof(vbios_map); z++) ((char*)map)[z]=0;
/*
* Determine chipset
*/
if (forced_chipset == CT_UNKNOWN)
{
map->chipset_id = get_chipset_id();
map->chipset = get_chipset(map->chipset_id);
}
else if (forced_chipset != CT_UNKNOWN)
{
map->chipset = forced_chipset;
}
if (map->chipset == CT_UNKNOWN)
{
verbose(" Unknown chipset type: %08x.\n", map->chipset_id);
//verbose("915resolution only works with Intel 800/900 series graphic chipsets.\n");
//verbose("Chipset Id: %x\n", map->chipset_id);
close_vbios(map);
return 0;
} else {
verbose(" Detected chipset/proc id (DRAM controller): %08x\n", map->chipset_id);
}
verbose(" VBios: ");
/*
* Map the video bios to memory
*/
map->bios_ptr=(char*)VBIOS_START;
/*
* check if we have ATI Radeon
*/
map->ati_tables.base = map->bios_ptr;
map->ati_tables.AtomRomHeader = (ATOM_ROM_HEADER *) (map->bios_ptr + *(unsigned short *) (map->bios_ptr + OFFSET_TO_POINTER_TO_ATOM_ROM_HEADER));
if (strcmp ((char *) map->ati_tables.AtomRomHeader->uaFirmWareSignature, "ATOM") == 0)
{
verbose("ATI");
// ATI Radeon Card
map->bios = BT_ATI_1;
map->ati_tables.MasterDataTables = (unsigned short *) &((ATOM_MASTER_DATA_TABLE *) (map->bios_ptr + map->ati_tables.AtomRomHeader->usMasterDataTableOffset))->ListOfDataTables;
unsigned short std_vesa_offset = (unsigned short) ((ATOM_MASTER_LIST_OF_DATA_TABLES *)map->ati_tables.MasterDataTables)->StandardVESA_Timing;
ATOM_STANDARD_VESA_TIMING * std_vesa = (ATOM_STANDARD_VESA_TIMING *) (map->bios_ptr + std_vesa_offset);
map->ati_mode_table = (char *) &std_vesa->aModeTimings;
if (map->ati_mode_table == 0)
{
printf("Unable to locate the mode table.\n");
printf("Please run the program 'dump_bios' as root and\n");
printf("email the file 'vbios.dmp' to stomljen@yahoo.com.\n");
printf("Chipset: %d\n", map->chipset);
close_vbios(map);
return 0;
}
map->mode_table_size = std_vesa->sHeader.usStructureSize - sizeof(ATOM_COMMON_TABLE_HEADER);
if (!detect_ati_bios_type(map)) map->bios = BT_ATI_2;
if (map->bios == BT_ATI_1) {
verbose(", BT_ATI_1\n");
} else {
verbose(", BT_ATI_2\n");
}
}
else {
/*
* check if we have NVIDIA
*/
int i = 0;
while (i < 512)
{ // we don't need to look through the whole bios, just the first 512 bytes
if ((map->bios_ptr[i] == 'N')
&& (map->bios_ptr[i+1] == 'V')
&& (map->bios_ptr[i+2] == 'I')
&& (map->bios_ptr[i+3] == 'D'))
{
verbose("nVidia\n");
map->bios = BT_NVDA;
unsigned short nv_data_table_offset = 0;
unsigned short * nv_data_table;
NV_VESA_TABLE * std_vesa;
int i = 0;
while (i < 0x300)
{ //We don't need to look for the table in the whole bios, the 768 first bytes only
if ((map->bios_ptr[i] == 0x44)
&& (map->bios_ptr[i+1] == 0x01)
&& (map->bios_ptr[i+2] == 0x04)
&& (map->bios_ptr[i+3] == 0x00))
{
nv_data_table_offset = (unsigned short) (map->bios_ptr[i+4] | (map->bios_ptr[i+5] << 8));
break;
}
i++;
}
nv_data_table = (unsigned short *) (map->bios_ptr + (nv_data_table_offset + OFFSET_TO_VESA_TABLE_INDEX));
std_vesa = (NV_VESA_TABLE *) (map->bios_ptr + *nv_data_table);
map->nv_mode_table = (char *) std_vesa->sModelines;
if (map->nv_mode_table == 0)
{
printf("Unable to locate the mode table.\n");
printf("Please run the program 'dump_bios' as root and\n");
printf("email the file 'vbios.dmp' to stomljen@yahoo.com.\n");
printf("Chipset: %s\n", map->chipset);
close_vbios(map);
return 0;
}
map->mode_table_size = std_vesa->sHeader.usTable_Size;
break;
}
i++;
}
}
/*
* check if we have Intel
*/
/*if (map->chipset == CT_UNKNOWN && memmem(map->bios_ptr, VBIOS_SIZE, INTEL_SIGNATURE, strlen(INTEL_SIGNATURE))) {
printf( "Intel chipset detected. However, 915resolution was unable to determine the chipset type.\n");
printf("Chipset Id: %x\n", map->chipset_id);
printf("Please report this problem to stomljen@yahoo.com\n");
close_vbios(map);
return 0;
}*/
/*
* check for others
*/
/*
* Figure out where the mode table is
*/
if ((map->bios != BT_ATI_1) && (map->bios != BT_ATI_2) && (map->bios != BT_NVDA))
{
char* p = map->bios_ptr + 16;
char* limit = map->bios_ptr + VBIOS_SIZE - (3 * sizeof(vbios_mode));
verbose("Other");
while (p < limit && map->mode_table == 0)
{
vbios_mode * mode_ptr = (vbios_mode *) p;
if (((mode_ptr[0].mode & 0xf0) == 0x30) && ((mode_ptr[1].mode & 0xf0) == 0x30) &&
((mode_ptr[2].mode & 0xf0) == 0x30) && ((mode_ptr[3].mode & 0xf0) == 0x30))
{
map->mode_table = mode_ptr;
}
p++;
}
if (map->mode_table == 0)
{
close_vbios(map);
return 0;
}
}
/*
* Determine size of mode table
*/
if ((map->bios != BT_ATI_1) && (map->bios != BT_ATI_2) && (map->bios != BT_NVDA))
{
vbios_mode * mode_ptr = map->mode_table;
while (mode_ptr->mode != 0xff)
{
map->mode_table_size++;
mode_ptr++;
}
}
/*
* Figure out what type of bios we have
* order of detection is important
*/
if ((map->bios != BT_ATI_1) && (map->bios != BT_ATI_2) && (map->bios != BT_NVDA))
{
if (detect_bios_type(map, TRUE, sizeof(vbios_modeline_type3)))
{
map->bios = BT_3;
verbose(", BT_3\n");
}
else if (detect_bios_type(map, TRUE, sizeof(vbios_modeline_type2)))
{
map->bios = BT_2;
verbose(", BT_2\n");
}
else if (detect_bios_type(map, FALSE, sizeof(vbios_resolution_type1)))
{
map->bios = BT_1;
verbose(", BT_1\n");
}
else {
verbose(" - unknown\n");
return 0;
}
}
return map;
}
void close_vbios(vbios_map * map)
{
free(map);
}
void unlock_vbios(vbios_map * map)
{
map->unlocked = TRUE;
switch (map->chipset) {
case CT_UNKNOWN:
break;
case CT_830:
case CT_855GM:
outl(CONFIG_MECH_ONE_ADDR, 0x8000005a);
map->b1 = inb(CONFIG_MECH_ONE_DATA + 2);
outl(CONFIG_MECH_ONE_ADDR, 0x8000005a);
outb(CONFIG_MECH_ONE_DATA + 2, 0x33);
break;
case CT_845G:
case CT_865G:
case CT_915G:
case CT_915GM:
case CT_945G:
case CT_945GM:
case CT_945GME:
case CT_946GZ:
case CT_G965:
case CT_Q965:
case CT_965GM:
case CT_975X:
case CT_P35:
case CT_955X:
case CT_X48:
case CT_B43:
case CT_Q45:
case CT_P45:
case CT_GM45:
case CT_G45:
case CT_G41:
case CT_G31:
case CT_500:
case CT_3150:
outl(CONFIG_MECH_ONE_ADDR, 0x80000090);
map->b1 = inb(CONFIG_MECH_ONE_DATA + 1);
map->b2 = inb(CONFIG_MECH_ONE_DATA + 2);
outl(CONFIG_MECH_ONE_ADDR, 0x80000090);
outb(CONFIG_MECH_ONE_DATA + 1, 0x33);
outb(CONFIG_MECH_ONE_DATA + 2, 0x33);
break;
case CT_CORE_PROC: // Core procs - PAM regs are 80h - 86h
case CT_UNKNOWN_INTEL:// Assume newer intel chipset is the same as before
outl(CONFIG_MECH_ONE_ADDR, 0x80000080);
map->b1 = inb(CONFIG_MECH_ONE_DATA + 1);
map->b2 = inb(CONFIG_MECH_ONE_DATA + 2);
outl(CONFIG_MECH_ONE_ADDR, 0x80000080);
outb(CONFIG_MECH_ONE_DATA + 1, 0x33);
outb(CONFIG_MECH_ONE_DATA + 2, 0x33);
break;
}
#if DEBUG
{
UInt32 t = inl(CONFIG_MECH_ONE_DATA);
verbose("unlock PAM: (0x%08x)\n", t);
}
#endif
}
void relock_vbios(vbios_map * map)
{
map->unlocked = FALSE;
switch (map->chipset)
{
case CT_UNKNOWN:
break;
case CT_830:
case CT_855GM:
outl(CONFIG_MECH_ONE_ADDR, 0x8000005a);
outb(CONFIG_MECH_ONE_DATA + 2, map->b1);
break;
case CT_845G:
case CT_865G:
case CT_915G:
case CT_915GM:
case CT_945G:
case CT_945GM:
case CT_945GME:
case CT_946GZ:
case CT_G965:
case CT_955X:
case CT_G45:
case CT_Q965:
case CT_965GM:
case CT_975X:
case CT_P35:
case CT_X48:
case CT_B43:
case CT_Q45:
case CT_P45:
case CT_GM45:
case CT_G41:
case CT_G31:
case CT_500:
case CT_3150:
outl(CONFIG_MECH_ONE_ADDR, 0x80000090);
outb(CONFIG_MECH_ONE_DATA + 1, map->b1);
outb(CONFIG_MECH_ONE_DATA + 2, map->b2);
break;
case CT_CORE_PROC:
case CT_UNKNOWN_INTEL:
outl(CONFIG_MECH_ONE_ADDR, 0x80000080);
outb(CONFIG_MECH_ONE_DATA + 1, map->b1);
outb(CONFIG_MECH_ONE_DATA + 2, map->b2);
break;
}
#if DEBUG
{
UInt32 t = inl(CONFIG_MECH_ONE_DATA);
verbose("relock PAM: (0x%08x)\n", t);
}
#endif
}
int getMode(edid_mode *mode)
{
char* edidInfo = readEDID();
if(!edidInfo) return 1;
//Slice
if(!fb_parse_edid((struct EDID *)edidInfo, mode) || !mode->h_active)
{
free( edidInfo );
return 1;
}
/*mode->pixel_clock = (edidInfo[55] << 8) | edidInfo[54];
mode->h_active = edidInfo[56] | ((edidInfo[58] & 0xF0) << 4);
mode->h_blanking = ((edidInfo[58] & 0x0F) << 8) | edidInfo[57];
mode->v_active = edidInfo[59] | ((edidInfo[61] & 0xF0) << 4);
mode->v_blanking = ((edidInfo[61] & 0x0F) << 8) | edidInfo[60];
mode->h_sync_offset = ((edidInfo[65] & 0xC0) >> 2) | edidInfo[62];
mode->h_sync_width = (edidInfo[65] & 0x30) | edidInfo[63];
mode->v_sync_offset = (edidInfo[65] & 0x0C) | ((edidInfo[64] & 0x0C) >> 2);
mode->v_sync_width = ((edidInfo[65] & 0x3) << 2) | (edidInfo[64] & 0x03);
*/
free( edidInfo );
return 0;
}
static void gtf_timings(UInt32 x, UInt32 y, UInt32 freq,
unsigned long *clock,
UInt16 *hsyncstart, UInt16 *hsyncend, UInt16 *hblank,
UInt16 *vsyncstart, UInt16 *vsyncend, UInt16 *vblank)
{
UInt32 hbl, vbl, vfreq;
vbl = y + (y+1)/(20000.0/(11*freq) - 1) + 1.5;
vfreq = vbl * freq;
hbl = 16 * (int)(x * (30.0 - 300000.0 / vfreq) /
+ (70.0 + 300000.0 / vfreq) / 16.0 + 0.5);
*vsyncstart = y;
*vsyncend = y + 3;
*vblank = vbl - 1;
*hsyncstart = x + hbl / 2 - (x + hbl + 50) / 100 * 8 - 1;
*hsyncend = x + hbl / 2 - 1;
*hblank = x + hbl - 1;
*clock = (x + hbl) * vfreq / 1000;
}
void set_mode(vbios_map * map, /*UInt32 mode,*/ UInt32 x, UInt32 y, UInt32 bp, UInt32 htotal, UInt32 vtotal) {
UInt32 xprev, yprev;
UInt32 i = 0, j;
// patch first available mode
//for (i=0; i < map->mode_table_size; i++) {
//if (map->mode_table[0].mode == mode) {
verbose(" Patching: ");
switch(map->bios) {
case BT_INTEL:
verbose("BT_INTEL - not supported\n");
return;
case BT_1:
{
verbose("BT_1 patched.\n");
vbios_resolution_type1 * res = map_type1_resolution(map, map->mode_table[i].resolution);
if (bp) {
map->mode_table[i].bits_per_pixel = bp;
}
res->x2 = (htotal?(((htotal-x) >> 8) & 0x0f) : (res->x2 & 0x0f)) | ((x >> 4) & 0xf0);
res->x1 = (x & 0xff);
res->y2 = (vtotal?(((vtotal-y) >> 8) & 0x0f) : (res->y2 & 0x0f)) | ((y >> 4) & 0xf0);
res->y1 = (y & 0xff);
if (htotal)
res->x_total = ((htotal-x) & 0xff);
if (vtotal)
res->y_total = ((vtotal-y) & 0xff);
break;
}
case BT_2:
{
vbios_resolution_type2 * res = map_type2_resolution(map, map->mode_table[i].resolution);
res->xchars = x / 8;
res->ychars = y / 16 - 1;
xprev = res->modelines[0].x1;
yprev = res->modelines[0].y1;
for(j=0; j < 3; j++) {
vbios_modeline_type2 * modeline = &res->modelines[j];
if (modeline->x1 == xprev && modeline->y1 == yprev) {
modeline->x1 = modeline->x2 = x-1;
modeline->y1 = modeline->y2 = y-1;
gtf_timings(x, y, freqs[j], &modeline->clock,
&modeline->hsyncstart, &modeline->hsyncend,
&modeline->hblank, &modeline->vsyncstart,
&modeline->vsyncend, &modeline->vblank);
if (htotal)
modeline->htotal = htotal;
else
modeline->htotal = modeline->hblank;
if (vtotal)
modeline->vtotal = vtotal;
else
modeline->vtotal = modeline->vblank;
}
}
verbose("BT_1 patched.\n");
break;
}
case BT_3:
{
vbios_resolution_type3 * res = map_type3_resolution(map, map->mode_table[i].resolution);
xprev = res->modelines[0].x1;
yprev = res->modelines[0].y1;
for (j=0; j < 3; j++) {
vbios_modeline_type3 * modeline = &res->modelines[j];
if (modeline->x1 == xprev && modeline->y1 == yprev) {
modeline->x1 = modeline->x2 = x-1;
modeline->y1 = modeline->y2 = y-1;
gtf_timings(x, y, freqs[j], &modeline->clock,
&modeline->hsyncstart, &modeline->hsyncend,
&modeline->hblank, &modeline->vsyncstart,
&modeline->vsyncend, &modeline->vblank);
if (htotal)
modeline->htotal = htotal;
else
modeline->htotal = modeline->hblank;
if (vtotal)
modeline->vtotal = vtotal;
else
modeline->vtotal = modeline->vblank;
modeline->timing_h = y-1;
modeline->timing_v = x-1;
}
}
verbose("BT_3 patched.\n");
break;
}
case BT_ATI_1:
{
verbose("BT_ATI_1");
edid_mode mode;
ATOM_MODE_TIMING *mode_timing = (ATOM_MODE_TIMING *) map->ati_mode_table;
//if (mode.pixel_clock && (mode.h_active == x) && (mode.v_active == y) && !force) {
if (!getMode(&mode)) {
verbose("\n Edid detailed timing descriptor found: %dx%d\n vbios mode 0 patched!\n", mode.h_active, mode.v_active);
mode_timing->usCRTC_H_Total = mode.h_active + mode.h_blanking;
mode_timing->usCRTC_H_Disp = mode.h_active;
mode_timing->usCRTC_H_SyncStart = mode.h_active + mode.h_sync_offset;
mode_timing->usCRTC_H_SyncWidth = mode.h_sync_width;
mode_timing->usCRTC_V_Total = mode.v_active + mode.v_blanking;
mode_timing->usCRTC_V_Disp = mode.v_active;
mode_timing->usCRTC_V_SyncStart = mode.v_active + mode.v_sync_offset;
mode_timing->usCRTC_V_SyncWidth = mode.v_sync_width;
mode_timing->usPixelClock = mode.pixel_clock;
} else {
verbose(" Edid not found or invalid - vbios not patched!\n");
}
/*else
{
vbios_modeline_type2 modeline;
cvt_timings(x, y, freqs[0], &modeline.clock,
&modeline.hsyncstart, &modeline.hsyncend,
&modeline.hblank, &modeline.vsyncstart,
&modeline.vsyncend, &modeline.vblank, 0);
mode_timing->usCRTC_H_Total = x + modeline.hblank;
mode_timing->usCRTC_H_Disp = x;
mode_timing->usCRTC_H_SyncStart = modeline.hsyncstart;
mode_timing->usCRTC_H_SyncWidth = modeline.hsyncend - modeline.hsyncstart;
mode_timing->usCRTC_V_Total = y + modeline.vblank;
mode_timing->usCRTC_V_Disp = y;
mode_timing->usCRTC_V_SyncStart = modeline.vsyncstart;
mode_timing->usCRTC_V_SyncWidth = modeline.vsyncend - modeline.vsyncstart;
mode_timing->usPixelClock = modeline.clock;
}*/
break;
}
case BT_ATI_2:
{
verbose("BT_ATI_2");
edid_mode mode;
ATOM_DTD_FORMAT *mode_timing = (ATOM_DTD_FORMAT *) map->ati_mode_table;
/*if (mode.pixel_clock && (mode.h_active == x) && (mode.v_active == y) && !force) {*/
if (!getMode(&mode)) {
verbose("\n Edid detailed timing descriptor found: %dx%d\n vbios mode 0 patched!\n", mode.h_active, mode.v_active);
mode_timing->usHBlanking_Time = mode.h_blanking;
mode_timing->usHActive = mode.h_active;
mode_timing->usHSyncOffset = mode.h_sync_offset;
mode_timing->usHSyncWidth = mode.h_sync_width;
mode_timing->usVBlanking_Time = mode.v_blanking;
mode_timing->usVActive = mode.v_active;
mode_timing->usVSyncOffset = mode.v_sync_offset;
mode_timing->usVSyncWidth = mode.v_sync_width;
mode_timing->usPixClk = mode.pixel_clock;
} else {
verbose(" Edid not found or invalid - vbios not patched!\n");
}
/*else
{
vbios_modeline_type2 modeline;
cvt_timings(x, y, freqs[0], &modeline.clock,
&modeline.hsyncstart, &modeline.hsyncend,
&modeline.hblank, &modeline.vsyncstart,
&modeline.vsyncend, &modeline.vblank, 0);
mode_timing->usHBlanking_Time = modeline.hblank;
+mode_timing->usHActive = x;
+mode_timing->usHSyncOffset = modeline.hsyncstart - x;
+mode_timing->usHSyncWidth = modeline.hsyncend - modeline.hsyncstart;
+
+mode_timing->usVBlanking_Time = modeline.vblank;
+mode_timing->usVActive = y;
+mode_timing->usVSyncOffset = modeline.vsyncstart - y;
+mode_timing->usVSyncWidth = modeline.hsyncend - modeline.hsyncstart;
+
+mode_timing->usPixClk = modeline.clock;
+}*/
break;
}
case BT_NVDA:
{
verbose("BT_NVDA");
edid_mode mode;
NV_MODELINE *mode_timing = (NV_MODELINE *) map->nv_mode_table;
/*if (mode.pixel_clock && (mode.h_active == x) && (mode.v_active == y) && !force) {*/
if (!getMode(&mode)) {
verbose("\n Edid detailed timing descriptor found: %dx%d\n vbios mode %d patched!\n", mode.h_active, mode.v_active, i);
mode_timing[i].usH_Total = mode.h_active + mode.h_blanking;
mode_timing[i].usH_Active = mode.h_active;
mode_timing[i].usH_SyncStart = mode.h_active + mode.h_sync_offset;
mode_timing[i].usH_SyncEnd = mode.h_active + mode.h_sync_offset + mode.h_sync_width;
mode_timing[i].usV_Total = mode.v_active + mode.v_blanking;
mode_timing[i].usV_Active = mode.v_active;
mode_timing[i].usV_SyncStart = mode.v_active + mode.v_sync_offset;
mode_timing[i].usV_SyncEnd = mode.v_active + mode.v_sync_offset + mode.v_sync_width;
mode_timing[i].usPixel_Clock = mode.pixel_clock;
} else {
verbose(" Edid not found or invalid - vbios not patched!\n");
}
/*else
{
vbios_modeline_type2 modeline;
cvt_timings(x, y, freqs[0], &modeline.clock,
&modeline.hsyncstart, &modeline.hsyncend,
&modeline.hblank, &modeline.vsyncstart,
&modeline.vsyncend, &modeline.vblank, 0);
mode_timing[i].usH_Total = x + modeline.hblank - 1;
mode_timing[i].usH_Active = x;
mode_timing[i].usH_SyncStart = modeline.hsyncstart - 1;
mode_timing[i].usH_SyncEnd = modeline.hsyncend - 1;
mode_timing[i].usV_Total = y + modeline.vblank - 1;
mode_timing[i].usV_Active = y;
mode_timing[i].usV_SyncStart = modeline.vsyncstart - 1;
mode_timing[i].usV_SyncEnd = modeline.vsyncend - 1;
mode_timing[i].usPixel_Clock = modeline.clock;
}*/
break;
}
case BT_UNKNOWN:
{
verbose(" Unknown - vbios not patched\n");
break;
}
}
//}
//}
}
#endif // _RESOLUTION_H_
branches/Chimera/i386/modules/Resolution/include/edid.h
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/*
* edid.h
*
*
* Created by Evan Lojewski on 12/1/09.
* Copyright 2009. All rights reserved.
*
* Slice 2010, based on Joblo works
*/
//#ifndef __EDID_H__
//#define __EDID_H__
#include "libsaio.h"
#define EDID_BLOCK_SIZE128
#define EDID_V1_BLOCKS_TO_GO_OFFSET 126
//Slice - some more info about EDID
#define EDID_LENGTH0x80
#define EDID_HEADER0x00
#define EDID_HEADER_END0x07
#define ID_MANUFACTURER_NAME0x08
#define ID_MANUFACTURER_NAME_END0x09
#define ID_MODEL0x0a
#define ID_SERIAL_NUMBER0x0c
#define MANUFACTURE_WEEK0x10
#define MANUFACTURE_YEAR0x11
#define EDID_STRUCT_VERSION0x12
#define EDID_STRUCT_REVISION0x13
#define EDID_STRUCT_DISPLAY 0x14
#define DPMS_FLAGS0x18
#define ESTABLISHED_TIMING_10x23
#define ESTABLISHED_TIMING_20x24
#define MANUFACTURERS_TIMINGS0x25
/* standard timings supported */
#define STD_TIMING 8
#define STD_TIMING_DESCRIPTION_SIZE 2
#define STD_TIMING_DESCRIPTIONS_START 0x26
#define DETAILED_TIMING_DESCRIPTIONS_START0x36
#define DETAILED_TIMING_DESCRIPTION_SIZE18
#define NO_DETAILED_TIMING_DESCRIPTIONS4
#define DETAILED_TIMING_DESCRIPTION_10x36
#define DETAILED_TIMING_DESCRIPTION_20x48
#define DETAILED_TIMING_DESCRIPTION_30x5a
#define DETAILED_TIMING_DESCRIPTION_40x6c
#define DESCRIPTOR_DATA5
#define UPPER_NIBBLE( x ) \
(((128|64|32|16) & (x)) >> 4)
#define LOWER_NIBBLE( x ) \
((1|2|4|8) & (x))
#define COMBINE_HI_8LO( hi, lo ) \
( (((unsigned)hi) << 8) | (unsigned)lo )
#define COMBINE_HI_4LO( hi, lo ) \
( (((unsigned)hi) << 4) | (unsigned)lo )
#define PIXEL_CLOCK_LO (unsigned)block[ 0 ]
#define PIXEL_CLOCK_HI (unsigned)block[ 1 ]
#define PIXEL_CLOCK (COMBINE_HI_8LO( PIXEL_CLOCK_HI,PIXEL_CLOCK_LO )*10000)
#define H_ACTIVE_LO (unsigned)block[ 2 ]
#define H_BLANKING_LO (unsigned)block[ 3 ]
#define H_ACTIVE_HI UPPER_NIBBLE( (unsigned)block[ 4 ] )
#define H_ACTIVE COMBINE_HI_8LO( H_ACTIVE_HI, H_ACTIVE_LO )
#define H_BLANKING_HI LOWER_NIBBLE( (unsigned)block[ 4 ] )
#define H_BLANKING COMBINE_HI_8LO( H_BLANKING_HI, H_BLANKING_LO )
#define V_ACTIVE_LO (unsigned)block[ 5 ]
#define V_BLANKING_LO (unsigned)block[ 6 ]
#define V_ACTIVE_HI UPPER_NIBBLE( (unsigned)block[ 7 ] )
#define V_ACTIVE COMBINE_HI_8LO( V_ACTIVE_HI, V_ACTIVE_LO )
#define V_BLANKING_HI LOWER_NIBBLE( (unsigned)block[ 7 ] )
#define V_BLANKING COMBINE_HI_8LO( V_BLANKING_HI, V_BLANKING_LO )
#define H_SYNC_OFFSET_LO (unsigned)block[ 8 ]
#define H_SYNC_WIDTH_LO (unsigned)block[ 9 ]
#define V_SYNC_OFFSET_LO UPPER_NIBBLE( (unsigned)block[ 10 ] )
#define V_SYNC_WIDTH_LO LOWER_NIBBLE( (unsigned)block[ 10 ] )
#define V_SYNC_WIDTH_HI ((unsigned)block[ 11 ] & (1|2))
#define V_SYNC_OFFSET_HI (((unsigned)block[ 11 ] & (4|8)) >> 2)
#define H_SYNC_WIDTH_HI (((unsigned)block[ 11 ] & (16|32)) >> 4)
#define H_SYNC_OFFSET_HI (((unsigned)block[ 11 ] & (64|128)) >> 6)
#define V_SYNC_WIDTH COMBINE_HI_4LO( V_SYNC_WIDTH_HI, V_SYNC_WIDTH_LO )
#define V_SYNC_OFFSET COMBINE_HI_4LO( V_SYNC_OFFSET_HI, V_SYNC_OFFSET_LO )
#define H_SYNC_WIDTH COMBINE_HI_4LO( H_SYNC_WIDTH_HI, H_SYNC_WIDTH_LO )
#define H_SYNC_OFFSET COMBINE_HI_4LO( H_SYNC_OFFSET_HI, H_SYNC_OFFSET_LO )
#define H_SIZE_LO (unsigned)block[ 12 ]
#define V_SIZE_LO (unsigned)block[ 13 ]
#define H_SIZE_HI UPPER_NIBBLE( (unsigned)block[ 14 ] )
#define V_SIZE_HI LOWER_NIBBLE( (unsigned)block[ 14 ] )
#define H_SIZE COMBINE_HI_8LO( H_SIZE_HI, H_SIZE_LO )
#define V_SIZE COMBINE_HI_8LO( V_SIZE_HI, V_SIZE_LO )
#define H_BORDER (unsigned)block[ 15 ]
#define V_BORDER (unsigned)block[ 16 ]
#define FLAGS (unsigned)block[ 17 ]
#define INTERLACED (FLAGS&128)
#define SYNC_TYPE (FLAGS&3<<3)/* bits 4,3 */
#define SYNC_SEPARATE (3<<3)
#define HSYNC_POSITIVE (FLAGS & 4)
#define VSYNC_POSITIVE (FLAGS & 2)
#define V_MIN_RATE block[ 5 ]
#define V_MAX_RATE block[ 6 ]
#define H_MIN_RATE block[ 7 ]
#define H_MAX_RATE block[ 8 ]
#define MAX_PIXEL_CLOCK (((int)block[ 9 ]) * 10)
#define GTF_SUPPORTblock[10]
#define DPMS_ACTIVE_OFF(1 << 5)
#define DPMS_SUSPEND(1 << 6)
#define DPMS_STANDBY(1 << 7)
struct EDID
{
UInt8header[8];//0
UInt8vendorProduct[4];//8
UInt8serialNumber[4];//12
UInt8weekOfManufacture;//16
UInt8yearOfManufacture;//17
UInt8version;//18
UInt8revision;//19
UInt8displayParams[5];//20
UInt8colorCharacteristics[10];//25
UInt8establishedTimings[3];//35
UInt16standardTimings[8];//38
UInt8detailedTimings[72];//54
UInt8extension;//126
UInt8checksum;//127
};
typedef struct _edid_mode {
unsigned short pixel_clock;
unsigned short h_active;
unsigned short h_blanking;
unsigned short v_active;
unsigned short v_blanking;
unsigned short h_sync_offset;
unsigned short h_sync_width;
unsigned short v_sync_offset;
unsigned short v_sync_width;
} edid_mode;
char* readEDID();
void getResolution(UInt32* x, UInt32* y, UInt32* bp);
int fb_parse_edid(struct EDID *edid, edid_mode* var);
int getEDID( void * edidBlock, UInt8 block);
//#endif
branches/Chimera/i386/modules/Resolution/shortatombios.h
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/****************************************************************************/
/*Portion I: Definitions shared between VBIOS and Driver */
/****************************************************************************/
#ifndef _SHORT_ATOMBIOS_H
#define _SHORT_ATOMBIOS_H
#define ATOM_VERSION_MAJOR 0x00020000
#define ATOM_VERSION_MINOR 0x00000002
#define ATOM_HEADER_VERSION (ATOM_VERSION_MAJOR | ATOM_VERSION_MINOR)
typedef unsigned charBOOLEAN;
typedef signed charINT8;
typedef unsigned charUINT8;
typedef signed shortINT16;
typedef unsigned shortUINT16;
typedef signed longINT32;
typedef unsigned longUINT32;
typedef unsigned charCHAR8;
typedef unsigned shortCHAR16;
typedef unsigned shortUSHORT;
typedef unsigned charUCHAR;
typedefunsigned longULONG;
#pragma pack(1) /* BIOS data must use byte aligment */
/* Define offset to location of ROM header. */
#define OFFSET_TO_POINTER_TO_ATOM_ROM_HEADER0x00000048L
#define OFFSET_TO_ATOM_ROM_IMAGE_SIZE 0x00000002L
typedef struct _ATOM_COMMON_TABLE_HEADER
{
USHORT usStructureSize;
UCHAR ucTableFormatRevision; /*Change it when the Parser is not backward compatible */
UCHAR ucTableContentRevision; /*Change it only when the table needs to change but the firmware */
/*Image can't be updated, while Driver needs to carry the new table! */
} ATOM_COMMON_TABLE_HEADER;
typedef struct _ATOM_ROM_HEADER
{
ATOM_COMMON_TABLE_HEADERsHeader;
UCHAR uaFirmWareSignature[4]; /*Signature to distinguish between Atombios and non-atombios,
+ atombios should init it as "ATOM", don't change the position */
USHORT usBiosRuntimeSegmentAddress;
USHORT usProtectedModeInfoOffset;
USHORT usConfigFilenameOffset;
USHORT usCRC_BlockOffset;
USHORT usBIOS_BootupMessageOffset;
USHORT usInt10Offset;
USHORT usPciBusDevInitCode;
USHORT usIoBaseAddress;
USHORT usSubsystemVendorID;
USHORT usSubsystemID;
USHORT usPCI_InfoOffset;
USHORT usMasterCommandTableOffset; /*Offset for SW to get all command table offsets, Don't change the position */
USHORT usMasterDataTableOffset; /*Offset for SW to get all data table offsets, Don't change the position */
UCHAR ucExtendedFunctionCode;
UCHAR ucReserved;
} ATOM_ROM_HEADER;
/****************************************************************************/
// Structure used in Data.mtb
/****************************************************************************/
typedef struct _ATOM_MASTER_LIST_OF_DATA_TABLES
{
USHORT UtilityPipeLine; // Offest for the utility to get parser info,Don't change this position!
USHORT MultimediaCapabilityInfo; // Only used by MM Lib,latest version 1.1, not configuable from Bios, need to include the table to build Bios
USHORT MultimediaConfigInfo; // Only used by MM Lib,latest version 2.1, not configuable from Bios, need to include the table to build Bios
USHORT StandardVESA_Timing; // Only used by Bios
USHORT FirmwareInfo; // Shared by various SW components,latest version 1.4
USHORT DAC_Info; // Will be obsolete from R600
USHORT LVDS_Info; // Shared by various SW components,latest version 1.1
USHORT TMDS_Info; // Will be obsolete from R600
USHORT AnalogTV_Info; // Shared by various SW components,latest version 1.1
USHORT SupportedDevicesInfo; // Will be obsolete from R600
USHORT GPIO_I2C_Info; // Shared by various SW components,latest version 1.2 will be used from R600
USHORT VRAM_UsageByFirmware; // Shared by various SW components,latest version 1.3 will be used from R600
USHORT GPIO_Pin_LUT; // Shared by various SW components,latest version 1.1
USHORT VESA_ToInternalModeLUT; // Only used by Bios
USHORT ComponentVideoInfo; // Shared by various SW components,latest version 2.1 will be used from R600
USHORT PowerPlayInfo; // Shared by various SW components,latest version 2.1,new design from R600
USHORT CompassionateData; // Will be obsolete from R600
USHORT SaveRestoreInfo; // Only used by Bios
USHORT PPLL_SS_Info; // Shared by various SW components,latest version 1.2, used to call SS_Info, change to new name because of int ASIC SS info
USHORT OemInfo; // Defined and used by external SW, should be obsolete soon
USHORT XTMDS_Info; // Will be obsolete from R600
USHORT MclkSS_Info; // Shared by various SW components,latest version 1.1, only enabled when ext SS chip is used
USHORT Object_Header; // Shared by various SW components,latest version 1.1
USHORT IndirectIOAccess; // Only used by Bios,this table position can't change at all!!
USHORT MC_InitParameter; // Only used by command table
USHORT ASIC_VDDC_Info;// Will be obsolete from R600
USHORT ASIC_InternalSS_Info;// New tabel name from R600, used to be called "ASIC_MVDDC_Info"
USHORT TV_VideoMode;// Only used by command table
USHORT VRAM_Info;// Only used by command table, latest version 1.3
USHORT MemoryTrainingInfo;// Used for VBIOS and Diag utility for memory training purpose since R600. the new table rev start from 2.1
USHORT IntegratedSystemInfo;// Shared by various SW components
USHORT ASIC_ProfilingInfo;// New table name from R600, used to be called "ASIC_VDDCI_Info" for pre-R600
USHORT VoltageObjectInfo;// Shared by various SW components, latest version 1.1
USHORTPowerSourceInfo;// Shared by various SW components, latest versoin 1.1
} ATOM_MASTER_LIST_OF_DATA_TABLES;
typedef struct _ATOM_MASTER_DATA_TABLE
{
ATOM_COMMON_TABLE_HEADER sHeader;
ATOM_MASTER_LIST_OF_DATA_TABLES ListOfDataTables;
} ATOM_MASTER_DATA_TABLE;
typedef union _ATOM_MODE_MISC_INFO_ACCESS
{
USHORT usAccess;
} ATOM_MODE_MISC_INFO_ACCESS;
/****************************************************************************/
// Structure used in StandardVESA_TimingTable
// AnalogTV_InfoTable
// ComponentVideoInfoTable
/****************************************************************************/
typedef struct _ATOM_MODE_TIMING
{
USHORT usCRTC_H_Total;
USHORT usCRTC_H_Disp;
USHORT usCRTC_H_SyncStart;
USHORT usCRTC_H_SyncWidth;
USHORT usCRTC_V_Total;
USHORT usCRTC_V_Disp;
USHORT usCRTC_V_SyncStart;
USHORT usCRTC_V_SyncWidth;
USHORT usPixelClock; //in 10Khz unit
ATOM_MODE_MISC_INFO_ACCESS susModeMiscInfo;
USHORT usCRTC_OverscanRight;
USHORT usCRTC_OverscanLeft;
USHORT usCRTC_OverscanBottom;
USHORT usCRTC_OverscanTop;
USHORT usReserve;
UCHAR ucInternalModeNumber;
UCHAR ucRefreshRate;
} ATOM_MODE_TIMING;
typedef struct _ATOM_DTD_FORMAT
{
USHORT usPixClk;
USHORT usHActive;
USHORT usHBlanking_Time;
USHORT usVActive;
USHORT usVBlanking_Time;
USHORT usHSyncOffset;
USHORT usHSyncWidth;
USHORT usVSyncOffset;
USHORT usVSyncWidth;
USHORT usImageHSize;
USHORT usImageVSize;
UCHAR ucHBorder;
UCHAR ucVBorder;
ATOM_MODE_MISC_INFO_ACCESS susModeMiscInfo;
UCHAR ucInternalModeNumber;
UCHAR ucRefreshRate;
} ATOM_DTD_FORMAT;
typedef struct _ATOM_LVDS_INFO_V12
{
ATOM_COMMON_TABLE_HEADER sHeader;
ATOM_DTD_FORMAT sLCDTiming;
USHORT usExtInfoTableOffset;
USHORT usSupportedRefreshRate; //Refer to panel info table in ATOMBIOS extension Spec.
USHORT usOffDelayInMs;
UCHAR ucPowerSequenceDigOntoDEin10Ms;
UCHAR ucPowerSequenceDEtoBLOnin10Ms;
UCHAR ucLVDS_Misc; // Bit0:{=0:single, =1:dual},Bit1 {=0:666RGB, =1:888RGB},Bit2:3:{Grey level}
// Bit4:{=0:LDI format for RGB888, =1 FPDI format for RGB888}
// Bit5:{=0:Spatial Dithering disabled;1 Spatial Dithering enabled}
// Bit6:{=0:Temporal Dithering disabled;1 Temporal Dithering enabled}
UCHAR ucPanelDefaultRefreshRate;
UCHAR ucPanelIdentification;
UCHAR ucSS_Id;
USHORT usLCDVenderID;
USHORT usLCDProductID;
UCHAR ucLCDPanel_SpecialHandlingCap;
UCHARucPanelInfoSize;// start from ATOM_DTD_FORMAT to end of panel info, include ExtInfoTable
UCHAR ucReserved[2];
} ATOM_LVDS_INFO_V12;
typedef struct _ATOM_STANDARD_VESA_TIMING
{
ATOM_COMMON_TABLE_HEADER sHeader;
char * aModeTimings; // 16 is not the real array number, just for initial allocation
} ATOM_STANDARD_VESA_TIMING;
#endif
branches/Chimera/i386/modules/Resolution/Resolution.c
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/*
* Copyright (c) 2009 Evan Lojewski. All rights reserved.
*
*/
#include "915resolution.h"
#include "gui.h"
void Resolution_start()
{
UInt32 bp = 0;
UInt32 x, y;
patchVideoBios();
getResolution(&x, &y, &bp);
gui.screen.width = x;
gui.screen.height = y;
}
branches/Chimera/i386/modules/Resolution/edid.c
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/*
* edid.c
*
*
* Created by Evan Lojewski on 12/1/09.
* Copyright 2009. All rights reserved.
*
*Slice 2010, based on Joblo works
*/
//#include "libsaio.h"
#include "edid.h"
#include "vbe.h"
#include "graphics.h"
#include "boot.h"
//----------------------------------------------------------------------------------
#define FBMON_FIX_HEADER 1
#define FBMON_FIX_INPUT 2
#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
//----------------------------------------------------------------------------------
/*
struct broken_edid {
const char manufacturer[4];
UInt32 model;
UInt32 fix;
};
//----------------------------------------------------------------------------------
broken_edid brokendb[] = {
// DEC FR-PCXAV-YZ *
{ "DEC", 0x073a, FBMON_FIX_HEADER,},
// ViewSonic PF775a *
{ "VSC", 0x5a44, FBMON_FIX_INPUT,}
};
//----------------------------------------------------------------------------------
*/
const unsigned char edid_v1_header[] = { 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00};
//----------------------------------------------------------------------------------
int edid_compare(unsigned char *edid1, unsigned char *edid2)
{
int result = 0;
unsigned char *block = edid1 + ID_MANUFACTURER_NAME, manufacturer1[4], manufacturer2[4];;
manufacturer1[0] = ((block[0] & 0x7c) >> 2) + '@';
manufacturer1[1] = ((block[0] & 0x03) << 3) + ((block[1] & 0xe0) >> 5) + '@';
manufacturer1[2] = (block[1] & 0x1f) + '@';
manufacturer1[3] = 0;
block = edid2 + ID_MANUFACTURER_NAME;
manufacturer2[0] = ((block[0] & 0x7c) >> 2) + '@';
manufacturer2[1] = ((block[0] & 0x03) << 3) + ((block[1] & 0xe0) >> 5) + '@';
manufacturer2[2] = (block[1] & 0x1f) + '@';
manufacturer2[3] = 0;
int x;
for(x = 0; x < 4; x++)
{
if(manufacturer1[x] == manufacturer2[x])
result++;
}
return result;
}
int check_edid(unsigned char *edid)
{
unsigned char *block = edid + ID_MANUFACTURER_NAME, manufacturer[4];
//unsigned char *b;
UInt32 model;
//int i, fix = 0, ret = 0;
manufacturer[0] = ((block[0] & 0x7c) >> 2) + '@';
manufacturer[1] = ((block[0] & 0x03) << 3) +
((block[1] & 0xe0) >> 5) + '@';
manufacturer[2] = (block[1] & 0x1f) + '@';
manufacturer[3] = 0;
model = block[2] + (block[3] << 8);
/*
for (i = 0; i < (int)ARRAY_SIZE(brokendb); i++) {
if (!strncmp((const char *)manufacturer, brokendb[i].manufacturer, 4) &&
brokendb[i].model == model) {
DEBG("ATIFB: The EDID Block of "
"Manufacturer: %s Model: 0x%08lx is known to "
"be broken,\n", manufacturer, model);
fix = brokendb[i].fix;
break;
}
}
switch (fix) {
case FBMON_FIX_HEADER:
for (i = 0; i < 8; i++) {
if (edid[i] != edid_v1_header[i])
ret = fix;
}
break;
case FBMON_FIX_INPUT:
b = edid + EDID_STRUCT_DISPLAY;
/// Only if display is GTF capable will
//the input type be reset to analog *
if (b[4] & 0x01 && b[0] & 0x80)
ret = fix;
break;
}
*/
return 0; //ret;
}
//----------------------------------------------------------------------------------
static void fix_edid(unsigned char *edid, int fix)
{
unsigned char *b;
switch (fix) {
case FBMON_FIX_HEADER:
msglog("EDID: trying a header reconstruct\n");
memcpy(edid, edid_v1_header, 8);
break;
case FBMON_FIX_INPUT:
msglog("EDID: trying to fix input type\n");
b = edid + EDID_STRUCT_DISPLAY;
b[0] &= ~0x80;
edid[127] += 0x80;
}
}
//----------------------------------------------------------------------------------
int edid_checksum(unsigned char *edid)
{
unsigned char i, csum = 0, all_null = 0;
int err = 0, fix = check_edid(edid);
if (fix)
fix_edid(edid, fix);
for (i = 0; i < EDID_LENGTH; i++) {
csum += edid[i];
all_null |= edid[i];
}
if (csum == 0x00 && all_null) {
/* checksum passed, everything's good */
err = 1;
}
return err;
}
//----------------------------------------------------------------------------------
static int edid_check_header(unsigned char *edid)
{
int i, err = 1, fix = check_edid(edid);
if (fix)
fix_edid(edid, fix);
for (i = 0; i < 8; i++) {
if (edid[i] != edid_v1_header[i])
err = 0;
}
return err;
}
//------------------------------------------------------------------------
bool verifyEDID(unsigned char *edid)
{
if (edid == NULL || !edid_checksum(edid) ||!edid_check_header(edid))
{
return false;
}
return true;
}
int edid_is_timing_block(unsigned char *block)
{
if ((block[0] != 0x00) || (block[1] != 0x00) ||
(block[2] != 0x00) || (block[4] != 0x00))
return 1;
else
return 0;
}
//----------------------------------------------------------------------------------
int fb_parse_edid(struct EDID *edid, edid_mode* var) //(struct EDID *edid, UInt32* x, UInt32* y)
{
int i;
unsigned char *block;
if(!verifyEDID((unsigned char *)edid)) return 0;
block = (unsigned char *)edid + DETAILED_TIMING_DESCRIPTIONS_START; //54
for (i = 0; i < 4; i++, block += DETAILED_TIMING_DESCRIPTION_SIZE) {
if (edid_is_timing_block(block)) {
var->h_active = H_ACTIVE;
var->v_active = V_ACTIVE;
var->h_sync_offset = H_SYNC_OFFSET;
var->h_sync_width = H_SYNC_WIDTH;
var->h_blanking = H_BLANKING;
var->v_blanking = V_BLANKING;
var->pixel_clock = PIXEL_CLOCK;
var->v_sync_offset = V_SYNC_OFFSET;
var->v_sync_width = V_SYNC_WIDTH;
/*
var->xres = var->xres_virtual = H_ACTIVE;
var->yres = var->yres_virtual = V_ACTIVE;
var->height = var->width = -1;
var->right_margin = H_SYNC_OFFSET;
var->left_margin = (H_ACTIVE + H_BLANKING) -
(H_ACTIVE + H_SYNC_OFFSET + H_SYNC_WIDTH);
var->upper_margin = V_BLANKING - V_SYNC_OFFSET -
V_SYNC_WIDTH;
var->lower_margin = V_SYNC_OFFSET;
var->hsync_len = H_SYNC_WIDTH;
var->vsync_len = V_SYNC_WIDTH;
var->pixclock = PIXEL_CLOCK;
var->pixclock /= 1000;
var->pixclock = KHZ2PICOS(var->pixclock);
if (HSYNC_POSITIVE)
var->sync |= FB_SYNC_HOR_HIGH_ACT;
if (VSYNC_POSITIVE)
var->sync |= FB_SYNC_VERT_HIGH_ACT;
*/
return 1;
}
}
return 0;
}
void getResolution(UInt32* x, UInt32* y, UInt32* bp)
{
//int val;
static UInt32 xResolution, yResolution, bpResolution;
/*
if(getIntForKey(kScreenWidth, &val, &bootInfo->chameleonConfig))
{
xResolution = val;
}
if(getIntForKey(kScreenHeight, &val, &bootInfo->chameleonConfig))
{
yResolution = val;
}
*/
bpResolution = 32;// assume 32bits
if(!xResolution || !yResolution || !bpResolution)
{
char* edidInfo = readEDID();
if(!edidInfo) return;
edid_mode mode;
// TODO: check *all* resolutions reported and either use the highest, or the native resolution (if there is a flag for that)
//xResolution = edidInfo[56] | ((edidInfo[58] & 0xF0) << 4);
//yResolution = edidInfo[59] | ((edidInfo[61] & 0xF0) << 4);
//Slice - done here
if(fb_parse_edid((struct EDID *)edidInfo, &mode) == 0)
{
xResolution = DEFAULT_SCREEN_WIDTH;
yResolution = DEFAULT_SCREEN_HEIGHT;
}
else {
xResolution = mode.h_active;
yResolution = mode.v_active;
}
/*
0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0x00 0x32 0x0C
0x00 0xDF 0x00 0x00 0x00 0x00 0xFF 0xFF 0xFF 0x00
0x0C 0xDF 0x00 0x00 0x12 0x03 0x21 0x78 0xE9 0x99
0x53 0x28 0xFF 0xFF 0x32 0xDF 0x00 0x12 0x80 0x78
0xD5 0x53 0x26 0x00 0x01 0x01 0x01 0x01 0xFF 0x00
0xDF 0x00 0x03 0x78 0x99 0x28 0x00 0x01 0x01 0x01
0x01 0x21 0x84 0x20 0xFF 0x0C 0x00 0x03 0x0A 0x53
0x54 0x01 0x01 0x01 0xDE 0x84 0x56 0x00 0xA0 0x30
0xFF 0xDF 0x12 0x78 0x53 0x00 0x01 0x01 0x01 0x84
0x00 0x18 0x84 0x00 0x00 0x57 0xFF 0x00 0x80 0x99
0x54 0x01 0x01 0x21 0x20 0x00 0x50 0x00 0x00 0x35
0x57 0xFE 0x00 0x00 0x78 0x28 0x01 0x01 0x21 0x20
0x18 0x30 0x00 0x57 0x34 0xFE 0xAA 0x9A
*/
//msglog("H Active = %d ", edidInfo[56] | ((edidInfo[58] & 0xF0) << 4) );
//msglog("V Active = %d \n", edidInfo[59] | ((edidInfo[61] & 0xF0) << 4) );
free( edidInfo );
//if(!xResolution) xResolution = DEFAULT_SCREEN_WIDTH;
//if(!yResolution) yResolution = DEFAULT_SCREEN_HEIGHT;
}
*x = xResolution;
*y = yResolution;
*bp = bpResolution;
}
char* readEDID()
{
SInt16 last_reported = -1;
UInt8 edidInfo[EDID_BLOCK_SIZE];
UInt8 header1[] = {0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00};
UInt8 header2[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
SInt16 status;
UInt16 blocks_left = 1;
//msglog("readEDID\n");
do
{
// TODO: This currently only retrieves the *last* block, make the block buffer expand as needed / calculated from the first block
bzero( edidInfo, EDID_BLOCK_SIZE);
status = getEDID(edidInfo, blocks_left);
/*
msglog("Buffer location: 0x%X status: %d\n", SEG(edidInfo) << 16 | OFF(edidInfo), status);
int j, i;
for (j = 0; j < 8; j++) {
for(i = 0; i < 16; i++) msglog(" 0x%02X", edidInfo[((i+1) * (j + 1)) - 1]);
msglog("\n");
}
*/
if(status == 0)
{
//if( edidInfo[0] == 0x00 || edidInfo[0] == 0xFF)
if((memcmp(edidInfo, header1, sizeof(header1)) != 0) ||
(memcmp(edidInfo, header2, sizeof(header2)) != 0) )
{
blocks_left--;
int reported = edidInfo[ EDID_V1_BLOCKS_TO_GO_OFFSET ];
if ( reported > blocks_left )
{
msglog("EDID claims %d more blocks left\n", reported);
}
if ( (last_reported <= reported && last_reported != -1)
|| reported == 0xff
/* 0xff frequently comes up in corrupt edids */
//|| reported == MAGIC
)
{
msglog("Last reported %d\n", last_reported);
msglog("EDID blocks left is wrong.\n"
"Your EDID is probably invalid.\n");
return 0;
}
else
{
//printf("Reading EDID block\n");
//printf("H Active = %d", ebiosInfo[56] | ((ebiosInfo[58] & 0xF0) << 4) );
//printf("V Active = %d", ebiosInfo[59] | ((ebiosInfo[61] & 0xF0) << 4) );
last_reported = reported;
blocks_left = reported;
}
}
else
{
msglog("Invalid block %d\n", blocks_left);
msglog("Header1 = %d", memcmp(edidInfo, header1, sizeof(header1)) );
msglog("Header2 = %d", memcmp(edidInfo, header2, sizeof(header2)) );
return 0;
}
}
blocks_left = 0;
} while(blocks_left);
char* ret = malloc(sizeof(edidInfo));
memcpy(ret, edidInfo, sizeof(edidInfo));
return ret;
}
int getEDID( void * edidBlock, UInt8 block)
{
biosBuf_t bb;
bzero(&bb, sizeof(bb));
bb.intno = 0x10;
bb.eax.rr = 0x4F15;
bb.ebx.r.l= 0x01;
bb.edx.rr = block;
bb.es = SEG( edidBlock );
bb.edi.rr = OFF( edidBlock );
bios( &bb );
return(bb.eax.r.h);
}
branches/Chimera/i386/modules/Resolution/915resolution.h
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/*
* resolution.h
*
*
* Created by Evan Lojewski on 3/4/10.
* Copyright 2009. All rights reserved.
*
*/
#ifndef __RESOLUTION_H
#define __RESOLUTION_H
#include "shortatombios.h"
#include "edid.h"
//Slice - moved to edid.h
/*
typedef struct _edid_mode {
unsigned short pixel_clock;
unsigned short h_active;
unsigned short h_blanking;
unsigned short v_active;
unsigned short v_blanking;
unsigned short h_sync_offset;
unsigned short h_sync_width;
unsigned short v_sync_offset;
unsigned short v_sync_width;
} edid_mode;
*/
void patchVideoBios();
/* Copied from 915 resolution created by steve tomljenovic
*
* This code is based on the techniques used in :
*
* - 855patch. Many thanks to Christian Zietz (czietz gmx net)
* for demonstrating how to shadow the VBIOS into system RAM
* and then modify it.
*
* - 1280patch by Andrew Tipton (andrewtipton null li).
*
* - 855resolution by Alain Poirier
*
* This source code is into the public domain.
*/
#define VBIOS_START 0xc0000
#define VBIOS_SIZE 0x10000
#define FALSE 0
#define TRUE 1
#define MODE_TABLE_OFFSET_845G 617
#define ATI_SIGNATURE1 "ATI MOBILITY RADEON"
#define ATI_SIGNATURE2 "ATI Technologies Inc"
#define NVIDIA_SIGNATURE "NVIDIA Corp"
#define INTEL_SIGNATURE "Intel Corp"
/*
* NVidia Defines and structures
*/
#define OFFSET_TO_VESA_TABLE_INDEX 2
typedef struct {
unsigned charucTable_Major;
unsigned charucTable_Minor;
unsigned charucTable_Rev;
unsigned shortusTable_Size;
} NV_COMMON_TABLE_HEADER;
typedef struct {
short reserved1;
short reserved2;
short reserved3;
} NV_RESERVED;
typedef struct {
unsigned shortusPixel_Clock;
unsigned shortusH_Active;
NV_RESERVEDreserved1;
unsigned shortusH_SyncStart;
unsigned shortusH_SyncEnd;
unsigned shortusH_Total;
unsigned shortusV_Active;
NV_RESERVEDreserved2;
unsigned shortusV_SyncStart;
unsigned shortusV_SyncEnd;
unsigned shortusV_Total;
unsigned shortreserved3;
} NV_MODELINE;
typedef struct {
NV_COMMON_TABLE_HEADERsHeader;
NV_MODELINE*sModelines;
} NV_VESA_TABLE;
/*---*/
typedef enum {
CT_UNKNOWN, CT_UNKNOWN_INTEL, CT_830, CT_845G, CT_855GM, CT_865G,
CT_915G, CT_915GM, CT_945G, CT_945GM, CT_945GME, CT_946GZ,
CT_955X, CT_G965, CT_Q965, CT_965GM, CT_975X,
CT_P35, CT_X48, CT_B43, CT_Q45, CT_P45,
CT_GM45, CT_G41, CT_G31, CT_G45, CT_500, CT_3150,
CT_CORE_PROC
} chipset_type;
typedef enum {
BT_UNKNOWN, BT_1, BT_2, BT_3, BT_ATI_1, BT_ATI_2, BT_NVDA, BT_INTEL
} bios_type;
typedef struct {
char *base;
ATOM_ROM_HEADER *AtomRomHeader;
unsigned short *MasterCommandTables;
unsigned short *MasterDataTables;
} bios_tables_t;
typedef struct {
UInt8 mode;
UInt8 bits_per_pixel;
UInt16 resolution;
UInt8 unknown;
} __attribute__((packed)) vbios_mode;
typedef struct {
UInt8 unknow1[2];
UInt8 x1;
UInt8 x_total;
UInt8 x2;
UInt8 y1;
UInt8 y_total;
UInt8 y2;
} __attribute__((packed)) vbios_resolution_type1;
typedef struct {
unsigned long clock;
UInt16 x1;
UInt16 htotal;
UInt16 x2;
UInt16 hblank;
UInt16 hsyncstart;
UInt16 hsyncend;
UInt16 y1;
UInt16 vtotal;
UInt16 y2;
UInt16 vblank;
UInt16 vsyncstart;
UInt16 vsyncend;
} __attribute__((packed)) vbios_modeline_type2;
typedef struct {
UInt8 xchars;
UInt8 ychars;
UInt8 unknown[4];
vbios_modeline_type2 modelines[];
} __attribute__((packed)) vbios_resolution_type2;
typedef struct {
unsigned long clock;
UInt16 x1;
UInt16 htotal;
UInt16 x2;
UInt16 hblank;
UInt16 hsyncstart;
UInt16 hsyncend;
UInt16 y1;
UInt16 vtotal;
UInt16 y2;
UInt16 vblank;
UInt16 vsyncstart;
UInt16 vsyncend;
UInt16 timing_h;
UInt16 timing_v;
UInt8 unknown[6];
} __attribute__((packed)) vbios_modeline_type3;
typedef struct {
unsigned char unknown[6];
vbios_modeline_type3 modelines[];
} __attribute__((packed)) vbios_resolution_type3;
typedef struct {
UInt32 chipset_id;
chipset_type chipset;
bios_type bios;
bios_tables_t ati_tables;
UInt32 bios_fd;
char* bios_ptr;
vbios_mode * mode_table;
char * ati_mode_table;
char * nv_mode_table;
UInt32 mode_table_size;
UInt8 b1, b2;
UInt8 unlocked;
} vbios_map;
vbios_map * open_vbios(chipset_type);
void close_vbios (vbios_map*);
void unlock_vbios(vbios_map*);
void relock_vbios(vbios_map*);
void set_mode(vbios_map*, UInt32, UInt32, UInt32, UInt32, UInt32);
#endif //__RESOLUTION_H
branches/Chimera/i386/modules/Resolution/Cconfig
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#
# Chameleon Modules
#
config RESOLUTION_MODULE
tristate "Resolution Module"
default m
---help---
Say Y here if you want to enable the use of this module.
branches/Chimera/i386/modules/Resolution/Readme.txt
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Module:Resolution
Description: This module reads the edid information from the monitor attached to the main display. The module is currently not integrated into trunk and has minimal uses as it stands. Additionally, the module will patch the vesa modes available in pre intel hd graphics cards to provide proper resolution while booting.
Dependencies: none
branches/Chimera/i386/modules/Resolution/Makefile
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MODULE_NAME = Resolution
MODULE_AUTHOR = Chameleon
MODULE_DESCRIPTION = This module reads the edid information from the monitor attached to the main display. The module will also patch the vesa modes available in pre intel hd graphics cards to provide proper resolution while booting.
MODULE_VERSION = "1.0.0"
MODULE_COMPAT_VERSION = "1.0.0"
MODULE_START = $(MODULE_NAME)_start
MODULE_DEPENDENCIES =
DIR = Resolution
MODULE_OBJS = Resolution.o edid.o 915resolution.o
include ../MakeInc.dir

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Revision: 2250