Chameleon

Chameleon Commit Details

Date:2013-09-18 22:47:27 (10 years 7 months ago)
Author:ErmaC
Commit:2263
Parents: 2262
Message:- Embedded the HDAEnabler injector from module. (The modules is not needed anymore REMOVE IT). - Update Ati card list (thx Clover team)
Changes:
A/trunk/i386/libsaio/hda.h
A/trunk/i386/libsaio/hda.c
M/trunk/i386/libsaio/ati.h
M/trunk/i386/modules/Makefile
M/trunk/doc/BootHelp.txt
M/trunk/i386/libsaio/gma.c
M/trunk/i386/boot2/boot.h
M/trunk/i386/libsaio/device_inject.c
M/trunk/i386/libsaio/pci.c
M/trunk/i386/libsaio/pci_setup.c
M/trunk/i386/libsaio/Makefile
M/trunk/i386/libsaio/ati.c
M/trunk/i386/modules/Cconfig

File differences

trunk/i386/libsaio/Makefile
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␉smbios.o smbios_getters.o smbios_decode.o \␊
␉fake_efi.o ext2fs.o \␊
␉hpet.o dram_controllers.o spd.o usb.o pci_setup.o \␊
␉device_inject.o nvidia_helper.o nvidia.o ati.o gma.o pci_root.o \␊
␉device_inject.o nvidia_helper.o nvidia.o ati.o gma.o hda.o pci_root.o \␊
␉convert.o aml_generator.o console.o exfat.o base64-decode.o␊
␊
SAIO_OBJS := $(addprefix $(OBJROOT)/, $(SAIO_OBJS))␊
trunk/i386/libsaio/gma.c
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␉{ 0x08,0x00,0x2e,0x0a },␉// 15 "AAPL,ig-platform-id" //FB: 64MB, Pipes: 3, Ports: 3, FBMem: 3 - ULT reserved GT3␊
};␊
␊
/*␊
platform-Id␊
00 00 06 04␉//Intel Haswell Mobile (GT1)␊
00 00 16 04␉//Intel Haswell Mobile (GT2)␊
00 00 26 04␉//Intel Haswell Mobile (GT3)␊
00 00 16 0A␉//Intel Haswell ULT Mobile (GT2)␊
00 00 26 0A␉//Intel Haswell ULT Mobile (GT3)␊
00 00 26 0D␉//Intel Haswell CRW Mobile (GT3) - ???␊
00 00 26 0C␉//Intel Haswell SDV Mobile (GT3) - Software Development Vehicle␊
00 00 16 0C␉//Intel Haswell SDV Mobile HD 4600 (GT2) - Software Development Vehicle␊
00 00 06 0C␉//Intel Haswell SDV Mobile (GT1) - Software Development Vehicle␊
00 00 26 0A␉//Intel Haswell ULT Mobile (GT3)␊
*/␊
␊
uint8_t HD2000_vals[16][4] = {␊
␉{ 0x00,0x00,0x00,0x00 }, //0 "AAPL00,PixelFormat"␊
␉{ 0x00,0x00,0x00,0x00 }, //1 "AAPL00,T1"␊
␉{ 0x0c,0x00,0x00,0x00 } //14 "graphics-options"␊
};␊
␊
// http://www.insanelymac.com/forum/topic/286092-guide-1st-generation-intel-hd-graphics-qeci/␊
uint8_t HDx000_os_info[20] = {␊
␉0x30,0x49,0x01,0x11,0x01,0x10,0x08,0x00,0x00,0x01,␊
␉0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF␊
};␊
␊
uint8_t HD2000_tbl_info[18] = {␊
␉0x30,0x44,0x02,0x02,0x02,0x02,0x00,0x00,0x00,␊
␉0x00,0x01,0x02,0x02,0x02,0x00,0x01,0x02,0x02␊
␊
␉switch ((device_id << 16) | vendor_id)␊
␉{␊
case GMA_IRONLAKE_D_G: // 0042␊
case GMA_IRONLAKE_M_G: // 0046␊
devprop_add_value(device, "built-in", &BuiltIn, 1);␊
devprop_add_value(device, "class-code", ClassFix, 4);␊
devprop_add_value(device, "hda-gfx",␉␉␉(uint8_t *)"onboard-1", 10);␊
devprop_add_value(device, "AAPL,os-info",␉␉␉HDx000_os_info, 20);␊
break;␊
/* 27A2, 27AE, 27A6, A001, A011, A012, */␊
case GMA_I945_GM: // Mobile GMA950 Mobile GMA3150␊
case GMA_I945_GME:␊
trunk/i386/libsaio/device_inject.c
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␊
char *efi_inject_get_devprop_string(uint32_t *len)␊
{␊
␉if(string) {␊
␉if(string)␊
␉{␊
␉␉*len = string->length;␊
␉␉return devprop_generate_string(string);␊
␉}␊
/* Use the static "device-properties" boot config key contents if available,␊
* otheriwse use the generated one.␊
*/ ␊
if (!getValueForKey(kDeviceProperties, &val, &cnt, &bootInfo->chameleonConfig) && string)␊
{␊
val = (const char*)string;␊
cnt = strlength * 2;␊
} ␊
␊
if (cnt > 1)␊
{␊
binStr = convertHexStr2Binary(val, &cnt2);␊
if (cnt2 > 0) DT__AddProperty(node, DEVICE_PROPERTIES_PROP, cnt2, binStr);␊
}␊
␉if (!getValueForKey(kDeviceProperties, &val, &cnt, &bootInfo->chameleonConfig) && string)␊
␉{␊
␉␉val = (const char*)string;␊
␉␉cnt = strlength * 2;␊
␉}␊
␊
␉if (cnt > 1)␊
␉{␊
␉␉binStr = convertHexStr2Binary(val, &cnt2);␊
␉␉if (cnt2 > 0)␊
␉␉{␊
␉␉␉DT__AddProperty(node, DEVICE_PROPERTIES_PROP, cnt2, binStr);␊
␉␉}␊
␉}␊
}␊
␊
struct DevPropString *devprop_create_string(void)␊
␉uint8_t *data = (uint8_t*)malloc(length);␊
␉{␊
␉␉if(!data)␊
␉␉{␊
␉␉␉return 0;␊
␉␉␊
␉␉}␊
␊
␉␉memset(data, 0, length);␊
␉␉uint32_t off= 0;␊
␉␉data[off+1] = ((strlen(nm) * 2) + 6) >> 8;␊
␉␉{␊
␉␉␉data[off] = *nm++;␊
␉␉}␊
␉␉␊
␊
␉␉off += 2;␊
␉␉l = len;␊
␉␉uint32_t *datalength = (uint32_t*)&data[off];␊
␉␊
␉uint8_t *newdata = (uint8_t*)malloc((length + offset));␊
␉if(!newdata)␊
␉{␊
␉␉return 0;␊
␉}␊
␉if(device->data)␊
␉{␊
␉␉if(offset > 1)␊
␉␉{␊
␉␉␉memcpy(newdata, device->data, offset);␊
␉␉}␊
␉}␊
␊
␉memcpy(newdata + offset, data, length);␊
␉␊
␉device->length += length;␊
␉device->string->length += length;␊
␉device->numentries++;␊
␉␊
␊
␉if(!device->data)␊
␉{␊
␉␉device->data = (uint8_t*)malloc(sizeof(uint8_t));␊
␉}␊
␉else␊
␉{␊
␉␉free(device->data);␊
␉␊
␉}␊
␊
␉free(data);␊
␉device->data = newdata;␊
␉␊
␊
␉return 1;␊
}␊
␊
{␊
␉char *buffer = (char*)malloc(string->length * 2);␊
␉char *ptr = buffer;␊
␉␊
␊
␉if(!buffer)␊
␉{␊
␉␉return NULL;␊
␉}␊
␊
␉sprintf(buffer, "%08x%08x%04x%04x", dp_swap32(string->length), string->WHAT2,␊
␉␉␉dp_swap16(string->numentries), string->WHAT3);␊
␊
void devprop_free_string(struct DevPropString *string)␊
{␊
␊
␉if(!string)␊
␉{␊
␉␉return;␊
␉}␊
␊
␉int i;␊
␉for(i = 0; i < string->numentries; i++)␊
trunk/i386/libsaio/hda.c
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/*␊
*␉HDA injector / Audio Enabler␊
*␊
*␉Copyright (C) 2012␉Chameleon Team␊
*␉Edit by Fabio (ErmaC)␊
*␊
*␉HDA injector is free software: you can redistribute it and/or modify␊
*␉it under the terms of the GNU General Public License as published by␊
*␉the Free Software Foundation, either version 3 of the License, or␊
*␉(at your option) any later version.␊
*␊
*␉HDA injector is distributed in the hope that it will be useful,␊
*␉but WITHOUT ANY WARRANTY; without even the implied warranty of␊
*␉MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the␊
*␉GNU General Public License for more details.␊
*␊
*␉Alternatively you can choose to comply with APSL␊
*␊
*␉Permission is hereby granted, free of charge, to any person obtaining a␊
*␉copy of this software and associated documentation files (the "Software"),␊
*␉to deal in the Software without restriction, including without limitation␊
*␉the rights to use, copy, modify, merge, publish, distribute, sublicense,␊
*␉and/or sell copies of the Software, and to permit persons to whom the␊
*␉Software is furnished to do so, subject to the following conditions:␊
*␊
*␉The above copyright notice and this permission notice shall be included in␊
*␉all copies or substantial portions of the Software.␊
*␊
******************************************************************************␊
* http://www.leidinger.net/FreeBSD/dox/dev_sound/html/df/d54/hdac_8c_source.html␊
*␊
* Copyright (c) 2006 Stephane E. Potvin <sepotvin@videotron.ca>␊
* Copyright (c) 2006 Ariff Abdullah <ariff@FreeBSD.org>␊
* Copyright (c) 2008-2012 Alexander Motin <mav@FreeBSD.org>␊
* All rights reserved.␊
*␊
* Redistribution and use in source and binary forms, with or without␊
* modification, are permitted provided that the following conditions␊
* are met:␊
* 1. Redistributions of source code must retain the above copyright␊
* notice, this list of conditions and the following disclaimer.␊
* 2. Redistributions in binary form must reproduce the above copyright␊
* notice, this list of conditions and the following disclaimer in the␊
* documentation and/or other materials provided with the distribution.␊
*␊
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND␊
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE␊
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE␊
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE␊
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL␊
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS␊
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)␊
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT␊
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY␊
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF␊
* SUCH DAMAGE.␊
*␊
* Intel High Definition Audio (Controller) driver for FreeBSD.␊
*␊
******************************************************************************/␊
␊
#include "boot.h"␊
#include "bootstruct.h"␊
#include "pci.h"␊
#include "pci_root.h"␊
#include "platform.h"␊
#include "device_inject.h"␊
#include "hda.h"␊
#include "aml_generator.h"␊
␊
#ifndef DEBUG_HDA␊
#define DEBUG_HDA 0␊
#endif␊
␊
#if DEBUG_HDA␊
#define DBG(x...) verbose(x)␊
#else␊
#define DBG(x...)␊
#endif␊
␊
extern uint32_t devices_number;␊
␊
const char *hda_slot_name[]␉␉=␉{ "AAPL,slot-name", "Built In" };␊
␊
uint8_t default_HDEF_layout_id[]␉␉=␉{0x0C, 0x00, 0x00, 0x00};␊
#define HDEF_LEN ( sizeof(default_HDEF_layout_id) / sizeof(uint8_t) )␊
uint8_t default_HDAU_layout_id[]␉␉=␉{0x01, 0x00, 0x00, 0x00};␊
#define HDAU_LEN ( sizeof(default_HDAU_layout_id) / sizeof(uint8_t) )␊
uint8_t connector_type_value[] =␉{0x00, 0x08, 0x00, 0x00};␊
␊
/* Structures */␊
␊
static hda_controller_devices know_hda_controller[] = {␊
␉//8086 Intel Corporation␊
␉{ HDA_INTEL_HASWELL, "Haswell" },␊
␉{ HDA_INTEL_CRYSTAL, "Crystal Well" },␊
␉{ HDA_INTEL_CPT, "6 Series/C200 Series Chipset Family" },␊
␉{ HDA_INTEL_PATSBURG,"C600/X79 series chipset" },␊
␉{ HDA_INTEL_PPT1, "7 Series/C210 Series Chipset Family" },␊
␉{ HDA_INTEL_82801F, "82801FB/FBM/FR/FW/FRW (ICH6 Family)" },␊
␉{ HDA_INTEL_63XXESB, "631x/631xESB/632xESB" },␊
␉{ HDA_INTEL_82801G, "NM10/ICH7 Family" },␊
␉{ HDA_INTEL_82801H, "82801H (ICH8 Family)" },␊
␉{ HDA_INTEL_82801I, "82801I (ICH9 Family)" },␊
␉{ HDA_INTEL_82801JI, "82801JI (ICH10 Family)" },␊
␉{ HDA_INTEL_82801JD, "82801JD/DO (ICH10 Family) " },␊
␉{ HDA_INTEL_PCH, "5 Series/3400 Series" },␊
␉{ HDA_INTEL_PCH2, "5 Series/3400 Series" },␊
␉{ HDA_INTEL_SCH, "System Controller Hub (SCH Poulsbo)" },␊
␉{ HDA_INTEL_LPT1, "Lynx Point" },␊
␉{ HDA_INTEL_LPT2, "Lynx Point" },␊
␉{ HDA_INTEL_LYNX, "Lynx Point-LP" },␊
␉{ HDA_INTEL_LYNX2, "Lynx Point-LP" },␊
␉//10de NVIDIA Corporation␊
␉{ HDA_NVIDIA_MCP51, "MCP51" },␊
␉{ HDA_NVIDIA_MCP55, "MCP55" },␊
␉{ HDA_NVIDIA_MCP61_1, "MCP61" },␊
␉{ HDA_NVIDIA_MCP61_2, "MCP61" },␊
␉{ HDA_NVIDIA_MCP65_1, "MCP65" },␊
␉{ HDA_NVIDIA_MCP65_2, "MCP65" },␊
␉{ HDA_NVIDIA_MCP67_1, "MCP67" },␊
␉{ HDA_NVIDIA_MCP67_2, "MCP67" },␊
␉{ HDA_NVIDIA_MCP73_1, "MCP73" },␊
␉{ HDA_NVIDIA_MCP73_2, "MCP73" },␊
␉{ HDA_NVIDIA_MCP78_1, "MCP78" },␊
␉{ HDA_NVIDIA_MCP78_2, "MCP78" },␊
␉{ HDA_NVIDIA_MCP78_3, "MCP78" },␊
␉{ HDA_NVIDIA_MCP78_4, "MCP78" },␊
␉{ HDA_NVIDIA_MCP79_1, "MCP79" },␊
␉{ HDA_NVIDIA_MCP79_2, "MCP79" },␊
␉{ HDA_NVIDIA_MCP79_3, "MCP79" },␊
␉{ HDA_NVIDIA_MCP79_4, "MCP79" },␊
␉{ HDA_NVIDIA_MCP89_1, "MCP89" },␊
␉{ HDA_NVIDIA_MCP89_2, "MCP89" },␊
␉{ HDA_NVIDIA_MCP89_3, "MCP89" },␊
␉{ HDA_NVIDIA_MCP89_4, "MCP89" },␊
␉{ HDA_NVIDIA_0BE2, "(0x0be2)" },␊
␉{ HDA_NVIDIA_0BE3, "(0x0be3)" },␊
␉{ HDA_NVIDIA_0BE4, "(0x0be4)" },␊
␉{ HDA_NVIDIA_GT100, "GT100" },␊
␉{ HDA_NVIDIA_GT104, "GT104" },␊
␉{ HDA_NVIDIA_GT106, "GT106" },␊
␉{ HDA_NVIDIA_GT108, "GT108" },␊
␉{ HDA_NVIDIA_GT116, "GT116" },␊
␉{ HDA_NVIDIA_GF119, "GF119" },␊
␉{ HDA_NVIDIA_GF110, "GF110" },␊
␉{ HDA_NVIDIA_GF114, "GF114" }, // HDMi␊
␉{ HDA_NVIDIA_GK110, "GK110" },␊
␉{ HDA_NVIDIA_GK106, "GK106" },␊
␉{ HDA_NVIDIA_GK107, "GK107" },␊
␉{ HDA_NVIDIA_GK104, "GK104" },␊
␉//1002 Advanced Micro Devices [AMD] nee ATI Technologies Inc␊
␉{ HDA_ATI_SB450, "IXP SB4x0" },␊
␉{ HDA_ATI_SB600, "SB600" },␊
␉{ HDA_ATI_RS600, "RS600" },␊
␉{ HDA_ATI_RS690, "RS690" },␊
␉{ HDA_ATI_RS780, "RS780" },␊
␉{ HDA_ATI_RS880, "RS880" },␊
␉{ HDA_ATI_TRINITY, "Trinity" },␊
␉{ HDA_ATI_R600, "R600" },␊
␉{ HDA_ATI_RV610, "RV610" },␊
␉{ HDA_ATI_RV620, "RV620" },␊
␉{ HDA_ATI_RV630, "RV630" },␊
␉{ HDA_ATI_RV635, "RV635" },␊
␉{ HDA_ATI_RV710, "RV710" },␊
␉{ HDA_ATI_RV730, "RV730" },␊
␉{ HDA_ATI_RV740, "RV740" },␊
␉{ HDA_ATI_RV770, "RV770" },␊
␉{ HDA_ATI_RV810, "RV810" },␊
␉{ HDA_ATI_RV830, "RV830" },␊
␉{ HDA_ATI_RV840, "RV840" },␊
␉{ HDA_ATI_RV870, "RV870" },␊
␉{ HDA_ATI_RV910, "Caicos" },␊
␉{ HDA_ATI_RV930, "RV930" },␊
␉{ HDA_ATI_RV940, "RV940" },␊
␉{ HDA_ATI_RV970, "RV970" },␊
␉{ HDA_ATI_R1000, "Tahiti XT" }, // HDMi␊
␉{ HDA_ATI_VERDE, "Cape Verde" }, // HDMi␊
␉//17f3 RDC Semiconductor, Inc.␊
␉{ HDA_RDC_M3010, "M3010" },␊
␉//1106 VIA Technologies, Inc.␊
␉{ HDA_VIA_VT82XX, "VT8251/8237A" },␊
␉//1039 Silicon Integrated Systems [SiS]␊
␉{ HDA_SIS_966, "966" },␊
␉//10b9 ULi Electronics Inc.(Split off ALi Corporation in 2003)␊
␉{ HDA_ULI_M5461, "M5461" },␊
␉/* Unknown */␊
␉{ HDA_INTEL_ALL, "Unknown Intel device" },␊
␉{ HDA_NVIDIA_ALL, "Unknown NVIDIA device" },␊
␉{ HDA_ATI_ALL, "Unknown ATI device" },␊
␉{ HDA_VIA_ALL, "Unknown VIA device" },␊
␉{ HDA_SIS_ALL, "Unknown SiS device" },␊
␉{ HDA_ULI_ALL, "Unknown ULI device" },␊
};␊
#define HDAC_DEVICES_LEN (sizeof(know_hda_controller) / sizeof(know_hda_controller[0]))␊
␊
/* CODECs */␊
␊
// ErmaC: TODO build function to probe the codecID␊
/*␊
static hdacc_codecs know_codecs[] = {␊
{ HDA_CODEC_CS4206, 0, "Cirrus Logic CS4206" },␊
{ HDA_CODEC_CS4207, 0, "Cirrus Logic CS4207" },␊
{ HDA_CODEC_CS4210, 0, "Cirrus Logic CS4210" },␊
{ HDA_CODEC_ALC221, 0, "Realtek ALC221" },␊
{ HDA_CODEC_ALC260, 0, "Realtek ALC260" },␊
{ HDA_CODEC_ALC262, 0, "Realtek ALC262" },␊
{ HDA_CODEC_ALC267, 0, "Realtek ALC267" },␊
{ HDA_CODEC_ALC268, 0, "Realtek ALC268" },␊
{ HDA_CODEC_ALC269, 0, "Realtek ALC269" },␊
{ HDA_CODEC_ALC270, 0, "Realtek ALC270" },␊
{ HDA_CODEC_ALC272, 0, "Realtek ALC272" },␊
{ HDA_CODEC_ALC273, 0, "Realtek ALC273" },␊
{ HDA_CODEC_ALC275, 0, "Realtek ALC275" },␊
{ HDA_CODEC_ALC276, 0, "Realtek ALC276" },␊
{ HDA_CODEC_ALC660, 0, "Realtek ALC660-VD" },␊
{ HDA_CODEC_ALC662, 0x0002, "Realtek ALC662 rev2" },␊
{ HDA_CODEC_ALC662, 0, "Realtek ALC662" },␊
{ HDA_CODEC_ALC663, 0, "Realtek ALC663" },␊
{ HDA_CODEC_ALC665, 0, "Realtek ALC665" },␊
{ HDA_CODEC_ALC670, 0, "Realtek ALC670" },␊
{ HDA_CODEC_ALC680, 0, "Realtek ALC680" },␊
{ HDA_CODEC_ALC861, 0x0340, "Realtek ALC660" },␊
{ HDA_CODEC_ALC861, 0, "Realtek ALC861" },␊
{ HDA_CODEC_ALC861VD, 0, "Realtek ALC861-VD" },␊
{ HDA_CODEC_ALC880, 0, "Realtek ALC880" },␊
{ HDA_CODEC_ALC882, 0, "Realtek ALC882" },␊
{ HDA_CODEC_ALC883, 0, "Realtek ALC883" },␊
{ HDA_CODEC_ALC885, 0x0101, "Realtek ALC889A" },␊
{ HDA_CODEC_ALC885, 0x0103, "Realtek ALC889A" },␊
{ HDA_CODEC_ALC885, 0, "Realtek ALC885" },␊
{ HDA_CODEC_ALC887, 0, "Realtek ALC887" },␊
{ HDA_CODEC_ALC888, 0x0101, "Realtek ALC1200" },␊
{ HDA_CODEC_ALC888, 0, "Realtek ALC888" },␊
{ HDA_CODEC_ALC889, 0, "Realtek ALC889" },␊
{ HDA_CODEC_ALC892, 0, "Realtek ALC892" },␊
{ HDA_CODEC_ALC898, 0, "Realtek ALC898" },␊
{ HDA_CODEC_ALC899, 0, "Realtek ALC899" },␊
{ HDA_CODEC_AD1882, 0, "Analog Devices AD1882" },␊
{ HDA_CODEC_AD1882A, 0, "Analog Devices AD1882A" },␊
{ HDA_CODEC_AD1883, 0, "Analog Devices AD1883" },␊
{ HDA_CODEC_AD1884, 0, "Analog Devices AD1884" },␊
{ HDA_CODEC_AD1884A, 0, "Analog Devices AD1884A" },␊
{ HDA_CODEC_AD1981HD, 0, "Analog Devices AD1981HD" },␊
{ HDA_CODEC_AD1983, 0, "Analog Devices AD1983" },␊
{ HDA_CODEC_AD1984, 0, "Analog Devices AD1984" },␊
{ HDA_CODEC_AD1984A, 0, "Analog Devices AD1984A" },␊
{ HDA_CODEC_AD1984B, 0, "Analog Devices AD1984B" },␊
{ HDA_CODEC_AD1986A, 0, "Analog Devices AD1986A" },␊
{ HDA_CODEC_AD1987, 0, "Analog Devices AD1987" },␊
{ HDA_CODEC_AD1988, 0, "Analog Devices AD1988A" },␊
{ HDA_CODEC_AD1988B, 0, "Analog Devices AD1988B" },␊
{ HDA_CODEC_AD1989A, 0, "Analog Devices AD1989A" },␊
{ HDA_CODEC_AD1989B, 0, "Analog Devices AD1989B" },␊
{ HDA_CODEC_CA0110, 0, "Creative CA0110-IBG" },␊
{ HDA_CODEC_CA0110_2, 0, "Creative CA0110-IBG" },␊
{ HDA_CODEC_CA0132, 0, "Creative CA0132" },␊
{ HDA_CODEC_SB0880, 0, "Creative SB0880 X-Fi" },␊
{ HDA_CODEC_CMI9880, 0, "CMedia CMI9880" },␊
{ HDA_CODEC_CMI98802, 0, "CMedia CMI9880" },␊
{ HDA_CODEC_CXD9872RDK, 0, "Sigmatel CXD9872RD/K" },␊
{ HDA_CODEC_CXD9872AKD, 0, "Sigmatel CXD9872AKD" },␊
{ HDA_CODEC_STAC9200D, 0, "Sigmatel STAC9200D" },␊
{ HDA_CODEC_STAC9204X, 0, "Sigmatel STAC9204X" },␊
{ HDA_CODEC_STAC9204D, 0, "Sigmatel STAC9204D" },␊
{ HDA_CODEC_STAC9205X, 0, "Sigmatel STAC9205X" },␊
{ HDA_CODEC_STAC9205D, 0, "Sigmatel STAC9205D" },␊
{ HDA_CODEC_STAC9220, 0, "Sigmatel STAC9220" },␊
{ HDA_CODEC_STAC9220_A1, 0, "Sigmatel STAC9220_A1" },␊
{ HDA_CODEC_STAC9220_A2, 0, "Sigmatel STAC9220_A2" },␊
{ HDA_CODEC_STAC9221, 0, "Sigmatel STAC9221" },␊
{ HDA_CODEC_STAC9221_A2, 0, "Sigmatel STAC9221_A2" },␊
{ HDA_CODEC_STAC9221D, 0, "Sigmatel STAC9221D" },␊
{ HDA_CODEC_STAC922XD, 0, "Sigmatel STAC9220D/9223D" },␊
{ HDA_CODEC_STAC9227X, 0, "Sigmatel STAC9227X" },␊
{ HDA_CODEC_STAC9227D, 0, "Sigmatel STAC9227D" },␊
{ HDA_CODEC_STAC9228X, 0, "Sigmatel STAC9228X" },␊
{ HDA_CODEC_STAC9228D, 0, "Sigmatel STAC9228D" },␊
{ HDA_CODEC_STAC9229X, 0, "Sigmatel STAC9229X" },␊
{ HDA_CODEC_STAC9229D, 0, "Sigmatel STAC9229D" },␊
{ HDA_CODEC_STAC9230X, 0, "Sigmatel STAC9230X" },␊
{ HDA_CODEC_STAC9230D, 0, "Sigmatel STAC9230D" },␊
{ HDA_CODEC_STAC9250, 0, "Sigmatel STAC9250" },␊
{ HDA_CODEC_STAC9251, 0, "Sigmatel STAC9251" },␊
{ HDA_CODEC_STAC9255, 0, "Sigmatel STAC9255" },␊
{ HDA_CODEC_STAC9255D, 0, "Sigmatel STAC9255D" },␊
{ HDA_CODEC_STAC9254, 0, "Sigmatel STAC9254" },␊
{ HDA_CODEC_STAC9254D, 0, "Sigmatel STAC9254D" },␊
{ HDA_CODEC_STAC9271X, 0, "Sigmatel STAC9271X" },␊
{ HDA_CODEC_STAC9271D, 0, "Sigmatel STAC9271D" },␊
{ HDA_CODEC_STAC9272X, 0, "Sigmatel STAC9272X" },␊
{ HDA_CODEC_STAC9272D, 0, "Sigmatel STAC9272D" },␊
{ HDA_CODEC_STAC9273X, 0, "Sigmatel STAC9273X" },␊
{ HDA_CODEC_STAC9273D, 0, "Sigmatel STAC9273D" },␊
{ HDA_CODEC_STAC9274, 0, "Sigmatel STAC9274" },␊
{ HDA_CODEC_STAC9274D, 0, "Sigmatel STAC9274D" },␊
{ HDA_CODEC_STAC9274X5NH, 0, "Sigmatel STAC9274X5NH" },␊
{ HDA_CODEC_STAC9274D5NH, 0, "Sigmatel STAC9274D5NH" },␊
{ HDA_CODEC_STAC9872AK, 0, "Sigmatel STAC9872AK" },␊
{ HDA_CODEC_IDT92HD005, 0, "IDT 92HD005" },␊
{ HDA_CODEC_IDT92HD005D, 0, "IDT 92HD005D" },␊
{ HDA_CODEC_IDT92HD206X, 0, "IDT 92HD206X" },␊
{ HDA_CODEC_IDT92HD206D, 0, "IDT 92HD206D" },␊
{ HDA_CODEC_IDT92HD66B1X5, 0, "IDT 92HD66B1X5" },␊
{ HDA_CODEC_IDT92HD66B2X5, 0, "IDT 92HD66B2X5" },␊
{ HDA_CODEC_IDT92HD66B3X5, 0, "IDT 92HD66B3X5" },␊
{ HDA_CODEC_IDT92HD66C1X5, 0, "IDT 92HD66C1X5" },␊
{ HDA_CODEC_IDT92HD66C2X5, 0, "IDT 92HD66C2X5" },␊
{ HDA_CODEC_IDT92HD66C3X5, 0, "IDT 92HD66C3X5" },␊
{ HDA_CODEC_IDT92HD66B1X3, 0, "IDT 92HD66B1X3" },␊
{ HDA_CODEC_IDT92HD66B2X3, 0, "IDT 92HD66B2X3" },␊
{ HDA_CODEC_IDT92HD66B3X3, 0, "IDT 92HD66B3X3" },␊
{ HDA_CODEC_IDT92HD66C1X3, 0, "IDT 92HD66C1X3" },␊
{ HDA_CODEC_IDT92HD66C2X3, 0, "IDT 92HD66C2X3" },␊
{ HDA_CODEC_IDT92HD66C3_65, 0, "IDT 92HD66C3_65" },␊
{ HDA_CODEC_IDT92HD700X, 0, "IDT 92HD700X" },␊
{ HDA_CODEC_IDT92HD700D, 0, "IDT 92HD700D" },␊
{ HDA_CODEC_IDT92HD71B5, 0, "IDT 92HD71B5" },␊
{ HDA_CODEC_IDT92HD71B5_2, 0, "IDT 92HD71B5" },␊
{ HDA_CODEC_IDT92HD71B6, 0, "IDT 92HD71B6" },␊
{ HDA_CODEC_IDT92HD71B6_2, 0, "IDT 92HD71B6" },␊
{ HDA_CODEC_IDT92HD71B7, 0, "IDT 92HD71B7" },␊
{ HDA_CODEC_IDT92HD71B7_2, 0, "IDT 92HD71B7" },␊
{ HDA_CODEC_IDT92HD71B8, 0, "IDT 92HD71B8" },␊
{ HDA_CODEC_IDT92HD71B8_2, 0, "IDT 92HD71B8" },␊
{ HDA_CODEC_IDT92HD73C1, 0, "IDT 92HD73C1" },␊
{ HDA_CODEC_IDT92HD73D1, 0, "IDT 92HD73D1" },␊
{ HDA_CODEC_IDT92HD73E1, 0, "IDT 92HD73E1" },␊
{ HDA_CODEC_IDT92HD75B3, 0, "IDT 92HD75B3" },␊
{ HDA_CODEC_IDT92HD75BX, 0, "IDT 92HD75BX" },␊
{ HDA_CODEC_IDT92HD81B1C, 0, "IDT 92HD81B1C" },␊
{ HDA_CODEC_IDT92HD81B1X, 0, "IDT 92HD81B1X" },␊
{ HDA_CODEC_IDT92HD83C1C, 0, "IDT 92HD83C1C" },␊
{ HDA_CODEC_IDT92HD83C1X, 0, "IDT 92HD83C1X" },␊
{ HDA_CODEC_IDT92HD87B1_3, 0, "IDT 92HD87B1/3" },␊
{ HDA_CODEC_IDT92HD87B2_4, 0, "IDT 92HD87B2/4" },␊
{ HDA_CODEC_IDT92HD89C3, 0, "IDT 92HD89C3" },␊
{ HDA_CODEC_IDT92HD89C2, 0, "IDT 92HD89C2" },␊
{ HDA_CODEC_IDT92HD89C1, 0, "IDT 92HD89C1" },␊
{ HDA_CODEC_IDT92HD89B3, 0, "IDT 92HD89B3" },␊
{ HDA_CODEC_IDT92HD89B2, 0, "IDT 92HD89B2" },␊
{ HDA_CODEC_IDT92HD89B1, 0, "IDT 92HD89B1" },␊
{ HDA_CODEC_IDT92HD89E3, 0, "IDT 92HD89E3" },␊
{ HDA_CODEC_IDT92HD89E2, 0, "IDT 92HD89E2" },␊
{ HDA_CODEC_IDT92HD89E1, 0, "IDT 92HD89E1" },␊
{ HDA_CODEC_IDT92HD89D3, 0, "IDT 92HD89D3" },␊
{ HDA_CODEC_IDT92HD89D2, 0, "IDT 92HD89D2" },␊
{ HDA_CODEC_IDT92HD89D1, 0, "IDT 92HD89D1" },␊
{ HDA_CODEC_IDT92HD89F3, 0, "IDT 92HD89F3" },␊
{ HDA_CODEC_IDT92HD89F2, 0, "IDT 92HD89F2" },␊
{ HDA_CODEC_IDT92HD89F1, 0, "IDT 92HD89F1" },␊
{ HDA_CODEC_IDT92HD90BXX, 0, "IDT 92HD90BXX" },␊
{ HDA_CODEC_IDT92HD91BXX, 0, "IDT 92HD91BXX" },␊
{ HDA_CODEC_IDT92HD93BXX, 0, "IDT 92HD93BXX" },␊
{ HDA_CODEC_IDT92HD98BXX, 0, "IDT 92HD98BXX" },␊
{ HDA_CODEC_IDT92HD99BXX, 0, "IDT 92HD99BXX" },␊
{ HDA_CODEC_CX20549, 0, "Conexant CX20549 (Venice)" },␊
{ HDA_CODEC_CX20551, 0, "Conexant CX20551 (Waikiki)" },␊
{ HDA_CODEC_CX20561, 0, "Conexant CX20561 (Hermosa)" },␊
{ HDA_CODEC_CX20582, 0, "Conexant CX20582 (Pebble)" },␊
{ HDA_CODEC_CX20583, 0, "Conexant CX20583 (Pebble HSF)" },␊
{ HDA_CODEC_CX20584, 0, "Conexant CX20584" },␊
{ HDA_CODEC_CX20585, 0, "Conexant CX20585" },␊
{ HDA_CODEC_CX20588, 0, "Conexant CX20588" },␊
{ HDA_CODEC_CX20590, 0, "Conexant CX20590" },␊
{ HDA_CODEC_CX20631, 0, "Conexant CX20631" },␊
{ HDA_CODEC_CX20632, 0, "Conexant CX20632" },␊
{ HDA_CODEC_CX20641, 0, "Conexant CX20641" },␊
{ HDA_CODEC_CX20642, 0, "Conexant CX20642" },␊
{ HDA_CODEC_CX20651, 0, "Conexant CX20651" },␊
{ HDA_CODEC_CX20652, 0, "Conexant CX20652" },␊
{ HDA_CODEC_CX20664, 0, "Conexant CX20664" },␊
{ HDA_CODEC_CX20665, 0, "Conexant CX20665" },␊
{ HDA_CODEC_VT1708_8, 0, "VIA VT1708_8" },␊
{ HDA_CODEC_VT1708_9, 0, "VIA VT1708_9" },␊
{ HDA_CODEC_VT1708_A, 0, "VIA VT1708_A" },␊
{ HDA_CODEC_VT1708_B, 0, "VIA VT1708_B" },␊
{ HDA_CODEC_VT1709_0, 0, "VIA VT1709_0" },␊
{ HDA_CODEC_VT1709_1, 0, "VIA VT1709_1" },␊
{ HDA_CODEC_VT1709_2, 0, "VIA VT1709_2" },␊
{ HDA_CODEC_VT1709_3, 0, "VIA VT1709_3" },␊
{ HDA_CODEC_VT1709_4, 0, "VIA VT1709_4" },␊
{ HDA_CODEC_VT1709_5, 0, "VIA VT1709_5" },␊
{ HDA_CODEC_VT1709_6, 0, "VIA VT1709_6" },␊
{ HDA_CODEC_VT1709_7, 0, "VIA VT1709_7" },␊
{ HDA_CODEC_VT1708B_0, 0, "VIA VT1708B_0" },␊
{ HDA_CODEC_VT1708B_1, 0, "VIA VT1708B_1" },␊
{ HDA_CODEC_VT1708B_2, 0, "VIA VT1708B_2" },␊
{ HDA_CODEC_VT1708B_3, 0, "VIA VT1708B_3" },␊
{ HDA_CODEC_VT1708B_4, 0, "VIA VT1708B_4" },␊
{ HDA_CODEC_VT1708B_5, 0, "VIA VT1708B_5" },␊
{ HDA_CODEC_VT1708B_6, 0, "VIA VT1708B_6" },␊
{ HDA_CODEC_VT1708B_7, 0, "VIA VT1708B_7" },␊
{ HDA_CODEC_VT1708S_0, 0, "VIA VT1708S_0" },␊
{ HDA_CODEC_VT1708S_1, 0, "VIA VT1708S_1" },␊
{ HDA_CODEC_VT1708S_2, 0, "VIA VT1708S_2" },␊
{ HDA_CODEC_VT1708S_3, 0, "VIA VT1708S_3" },␊
{ HDA_CODEC_VT1708S_4, 0, "VIA VT1708S_4" },␊
{ HDA_CODEC_VT1708S_5, 0, "VIA VT1708S_5" },␊
{ HDA_CODEC_VT1708S_6, 0, "VIA VT1708S_6" },␊
{ HDA_CODEC_VT1708S_7, 0, "VIA VT1708S_7" },␊
{ HDA_CODEC_VT1702_0, 0, "VIA VT1702_0" },␊
{ HDA_CODEC_VT1702_1, 0, "VIA VT1702_1" },␊
{ HDA_CODEC_VT1702_2, 0, "VIA VT1702_2" },␊
{ HDA_CODEC_VT1702_3, 0, "VIA VT1702_3" },␊
{ HDA_CODEC_VT1702_4, 0, "VIA VT1702_4" },␊
{ HDA_CODEC_VT1702_5, 0, "VIA VT1702_5" },␊
{ HDA_CODEC_VT1702_6, 0, "VIA VT1702_6" },␊
{ HDA_CODEC_VT1702_7, 0, "VIA VT1702_7" },␊
{ HDA_CODEC_VT1716S_0, 0, "VIA VT1716S_0" },␊
{ HDA_CODEC_VT1716S_1, 0, "VIA VT1716S_1" },␊
{ HDA_CODEC_VT1718S_0, 0, "VIA VT1718S_0" },␊
{ HDA_CODEC_VT1718S_1, 0, "VIA VT1718S_1" },␊
{ HDA_CODEC_VT1802_0, 0, "VIA VT1802_0" },␊
{ HDA_CODEC_VT1802_1, 0, "VIA VT1802_1" },␊
{ HDA_CODEC_VT1812, 0, "VIA VT1812" },␊
{ HDA_CODEC_VT1818S, 0, "VIA VT1818S" },␊
{ HDA_CODEC_VT1828S, 0, "VIA VT1828S" },␊
{ HDA_CODEC_VT2002P_0, 0, "VIA VT2002P_0" },␊
{ HDA_CODEC_VT2002P_1, 0, "VIA VT2002P_1" },␊
{ HDA_CODEC_VT2020, 0, "VIA VT2020" },␊
{ HDA_CODEC_ATIRS600_1, 0, "ATI RS600" },␊
{ HDA_CODEC_ATIRS600_2, 0, "ATI RS600" },␊
{ HDA_CODEC_ATIRS690, 0, "ATI RS690/780" },␊
{ HDA_CODEC_ATIR6XX, 0, "ATI R6xx" },␊
{ HDA_CODEC_NVIDIAMCP67, 0, "NVIDIA MCP67" },␊
{ HDA_CODEC_NVIDIAMCP73, 0, "NVIDIA MCP73" },␊
{ HDA_CODEC_NVIDIAMCP78, 0, "NVIDIA MCP78" },␊
{ HDA_CODEC_NVIDIAMCP78_2, 0, "NVIDIA MCP78" },␊
{ HDA_CODEC_NVIDIAMCP78_3, 0, "NVIDIA MCP78" },␊
{ HDA_CODEC_NVIDIAMCP78_4, 0, "NVIDIA MCP78" },␊
{ HDA_CODEC_NVIDIAMCP7A, 0, "NVIDIA MCP7A" },␊
{ HDA_CODEC_NVIDIAGT220, 0, "NVIDIA GT220" },␊
{ HDA_CODEC_NVIDIAGT21X, 0, "NVIDIA GT21x" },␊
{ HDA_CODEC_NVIDIAMCP89, 0, "NVIDIA MCP89" },␊
{ HDA_CODEC_NVIDIAGT240, 0, "NVIDIA GT240" },␊
{ HDA_CODEC_NVIDIAGTS450, 0, "NVIDIA GTS450" },␊
{ HDA_CODEC_NVIDIAGT440, 0, "NVIDIA GT440" },␊
{ HDA_CODEC_NVIDIAGTX550, 0, "NVIDIA GTX550" },␊
{ HDA_CODEC_NVIDIAGTX570, 0, "NVIDIA GTX570" },␊
{ HDA_CODEC_INTELIP, 0, "Intel Ibex Peak" },␊
{ HDA_CODEC_INTELBL, 0, "Intel Bearlake" },␊
{ HDA_CODEC_INTELCA, 0, "Intel Cantiga" },␊
{ HDA_CODEC_INTELEL, 0, "Intel Eaglelake" },␊
{ HDA_CODEC_INTELIP2, 0, "Intel Ibex Peak" },␊
{ HDA_CODEC_INTELCPT, 0, "Intel Cougar Point" },␊
{ HDA_CODEC_INTELPPT, 0, "Intel Panther Point" },␊
{ HDA_CODEC_INTELCL, 0, "Intel Crestline" },␊
{ HDA_CODEC_SII1390, 0, "Silicon Image SiI1390" },␊
{ HDA_CODEC_SII1392, 0, "Silicon Image SiI1392" },␊
// Unknown CODECs␊
{ HDA_CODEC_ADXXXX, 0, "Analog Devices" },␊
{ HDA_CODEC_AGEREXXXX, 0, "Lucent/Agere Systems" },␊
{ HDA_CODEC_ALCXXXX, 0, "Realtek" },␊
{ HDA_CODEC_ATIXXXX, 0, "ATI" },␊
{ HDA_CODEC_CAXXXX, 0, "Creative" },␊
{ HDA_CODEC_CMIXXXX, 0, "CMedia" },␊
{ HDA_CODEC_CMIXXXX2, 0, "CMedia" },␊
{ HDA_CODEC_CSXXXX, 0, "Cirrus Logic" },␊
{ HDA_CODEC_CXXXXX, 0, "Conexant" },␊
{ HDA_CODEC_CHXXXX, 0, "Chrontel" },␊
{ HDA_CODEC_IDTXXXX, 0, "IDT" },␊
{ HDA_CODEC_INTELXXXX, 0, "Intel" },␊
{ HDA_CODEC_MOTOXXXX, 0, "Motorola" },␊
{ HDA_CODEC_NVIDIAXXXX, 0, "NVIDIA" },␊
{ HDA_CODEC_SIIXXXX, 0, "Silicon Image" },␊
{ HDA_CODEC_STACXXXX, 0, "Sigmatel" },␊
{ HDA_CODEC_VTXXXX, 0, "VIA" },␊
};␊
#define HDACC_CODECS_LEN (sizeof(know_codecs) / sizeof(know_codecs[0]))␊
*/␊
␊
/*****************␊
* Device Methods␊
*****************/␊
␊
/* get HDA device name */␊
static char *get_hda_controller_name(uint16_t controller_device_id, uint16_t controller_vendor_id)␊
{␊
␉int i;␊
␉static char desc[128];␊
␊
␉for (i = 0; i < HDAC_DEVICES_LEN; i++)␊
␉{␊
␉␉if (know_hda_controller[i].model == ((controller_device_id << 16) | controller_vendor_id))␊
␉␉{␊
␉␉␉if(controller_vendor_id == INTEL_VENDORID){␊
␉␉␉␉sprintf(desc, "Intel %s Hight Definition Audio Controller", know_hda_controller[i].desc);␊
␉␉␉␉desc[sizeof(desc) - 1] = '\0';␊
␉␉␉} else if (controller_vendor_id == NVIDIA_VENDORID) {␊
␉␉␉␉sprintf(desc, "nVidia %s HDA Controller (HDMi)", know_hda_controller[i].desc);␊
␉␉␉␉desc[sizeof(desc) - 1] = '\0';␊
␉␉␉} else if (controller_vendor_id == ATI_VENDORID) {␊
␉␉␉␉sprintf(desc, "ATI %s HDA Controller (HDMi)", know_hda_controller[i].desc);␊
␉␉␉␉desc[sizeof(desc) - 1] = '\0';␊
␉␉␉} else if (controller_vendor_id == RDC_VENDORID) {␊
␉␉␉␉sprintf(desc, "RDC %s Hight Definition Audio Controller", know_hda_controller[i].desc);␊
␉␉␉␉desc[sizeof(desc) - 1] = '\0';␊
␉␉␉} else if (controller_vendor_id == VIA_VENDORID) {␊
␉␉␉␉sprintf(desc, "VIA %s HDA Controller", know_hda_controller[i].desc);␊
␉␉␉␉desc[sizeof(desc) - 1] = '\0';␊
␉␉␉} else if (controller_vendor_id == SIS_VENDORID) {␊
␉␉␉␉sprintf(desc, "SiS %s HDA Controller", know_hda_controller[i].desc);␊
␉␉␉␉desc[sizeof(desc) - 1] = '\0';␊
␉␉␉} else if (controller_vendor_id == ULI_VENDORID) {␊
␉␉␉␉sprintf(desc, "ULI %s HDA Controller", know_hda_controller[i].desc);␊
␉␉␉␉desc[sizeof(desc) - 1] = '\0';␊
␉␉␉}␊
␉␉␉return desc;␊
␉␉}␊
␉}␊
␉sprintf(desc, "Unknown HD Audio device");␊
␉desc[sizeof(desc) - 1] = '\0';␊
␉return desc;␊
}␊
␊
static int devprop_add_hda_template(struct DevPropDevice *device)␊
{␊
␉if (!device)␊
␉{␊
␉␉return 0;␊
␉}␊
␉devices_number++;␊
␊
␉return 1;␊
}␊
␊
bool setup_hda_devprop(pci_dt_t *hda_dev)␊
{␊
␉struct␉␉DevPropDevice␉*device = NULL;␊
␉char␉␉*devicepath = NULL;␊
␉char␉␉*controller_name = NULL;␊
␉int len;␊
␉uint8_t␉␉BuiltIn = 0x00;␊
␉uint16_t␉controller_vendor_id = hda_dev->vendor_id;␊
␉uint16_t␉controller_device_id = hda_dev->device_id;␊
␉const char␉*value;␊
␊
␉devicepath = get_pci_dev_path(hda_dev);␊
␉controller_name = get_hda_controller_name(controller_device_id, controller_vendor_id);␊
␊
␉if (!string)␊
␉{␊
␉␉string = devprop_create_string();␊
␉␉if (!string)␊
␉␉{␊
␉␉␉return 0;␊
␉␉}␊
␉}␊
␊
␉if (!devicepath)␊
␉{␊
␉␉return 0;␊
␉}␊
␊
␉device = devprop_add_device(string, devicepath);␊
␉if (!device)␊
␉{␊
␉␉return 0;␊
␉}␊
␉devprop_add_hda_template(device);␊
␊
␉verbose("\n--------------------------------\n");␊
␉verbose("- AUDIO DEVICE INFO -\n");␊
␉verbose("--------------------------------\n");␊
␊
␉switch ((controller_device_id << 16) | controller_vendor_id) {␊
␊
␉/***********************************************************************␊
␉* The above case are intended as for HDEF device at address 0x001B0000␊
␉***********************************************************************/␊
␉␉case HDA_INTEL_HASWELL:␊
␉␉case HDA_INTEL_CRYSTAL:␊
␉␉case HDA_INTEL_CPT:␊
␉␉case HDA_INTEL_PATSBURG:␊
case HDA_INTEL_PPT1:␊
␉␉case HDA_INTEL_82801F:␊
␉␉case HDA_INTEL_63XXESB:␊
␉␉case HDA_INTEL_82801G:␊
␉␉case HDA_INTEL_82801H:␊
case HDA_INTEL_82801I:␊
␉␉case HDA_INTEL_82801JI:␊
␉␉case HDA_INTEL_82801JD:␊
␉␉case HDA_INTEL_PCH:␊
␉␉case HDA_INTEL_PCH2:␊
case HDA_INTEL_SCH:␊
␉␉case HDA_INTEL_LPT1:␊
␉␉case HDA_INTEL_LPT2:␊
␉␉case HDA_INTEL_LYNX:␊
␉␉case HDA_INTEL_LYNX2:␊
␉/* if the key value kHDEFLayoutID as a value set that value, if not will assign a default layout */␊
␉if (getValueForKey(kHDEFLayoutID, &value, &len, &bootInfo->chameleonConfig) && len == HDEF_LEN * 2)␊
␉{␊
␉␉uint8_t new_HDEF_layout_id[HDEF_LEN];␊
␉␉if (hex2bin(value, new_HDEF_layout_id, HDEF_LEN) == 0)␉{␊
␉␉␉memcpy(default_HDEF_layout_id, new_HDEF_layout_id, HDEF_LEN);␊
␉␉␉verbose("Using user supplied HDEF layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n", ␊
␉␉␉␉default_HDEF_layout_id[0], default_HDEF_layout_id[1], default_HDEF_layout_id[2], default_HDEF_layout_id[3]);␊
␉␉}␊
␉}␊
␉else␊
␉{␊
␉␉verbose("Using default HDEF layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",␊
default_HDEF_layout_id[0], default_HDEF_layout_id[1], default_HDEF_layout_id[2], default_HDEF_layout_id[3]);␊
␉}␊
␉devprop_add_value(device, "layout-id", default_HDEF_layout_id, HDEF_LEN);␊
␉devprop_add_value(device, "built-in", &BuiltIn, 1);␊
␉devprop_add_value(device, "hda-gfx", (uint8_t *)"onboard-1", 10);␊
␉break;␊
␊
␉/****************************************************************************************************************␊
␉* The above case are intended as for HDAU (NVIDIA) device onboard audio for GFX card with Audio controller HDMi␊
␉****************************************************************************************************************/␊
␉case HDA_NVIDIA_GK107:␊
␉case HDA_NVIDIA_GF114:␊
␉case HDA_NVIDIA_GK106:␊
␉case HDA_NVIDIA_GK104:␊
␉case HDA_NVIDIA_GF110:␊
␉case HDA_NVIDIA_GF119:␊
case HDA_NVIDIA_GT116:␊
␉case HDA_NVIDIA_GT104:␊
␉case HDA_NVIDIA_GT108:␊
␉case HDA_NVIDIA_GT106:␊
␉case HDA_NVIDIA_GT100:␊
case HDA_NVIDIA_0BE4:␊
␉case HDA_NVIDIA_0BE3:␊
␉case HDA_NVIDIA_0BE2:␊
␊
␉/* if the key value kHDAULayoutID as a value set that value, if not will assign a default layout */␊
␉if (getValueForKey(kHDAULayoutID, &value, &len, &bootInfo->chameleonConfig) && len == HDAU_LEN * 2)␊
␉{␊
␉␉uint8_t new_HDAU_layout_id[HDAU_LEN];␊
␉␉if (hex2bin(value, new_HDAU_layout_id, HDAU_LEN) == 0)␊
␉␉{␊
␉␉␉memcpy(default_HDAU_layout_id, new_HDAU_layout_id, HDAU_LEN);␊
␉␉␉verbose("Using user supplied HDAU layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",␊
default_HDAU_layout_id[0], default_HDAU_layout_id[1], default_HDAU_layout_id[2], default_HDAU_layout_id[3]);␊
␉␉}␊
␉}␊
␉else␊
␉{␊
␉␉verbose("Using default HDAU layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",␊
default_HDAU_layout_id[0], default_HDAU_layout_id[1], default_HDAU_layout_id[2], default_HDAU_layout_id[3]);␊
␉}␊
␊
devprop_add_value(device, "layout-id", default_HDAU_layout_id, HDAU_LEN); /*FIX ME*/␊
devprop_add_value(device, "@0,connector-type", connector_type_value, 4);␊
devprop_add_value(device, "@1,connector-type", connector_type_value, 4);␊
devprop_add_value(device, "hda-gfx", (uint8_t *)"onboard-2", 10);␊
devprop_add_value(device, "built-in", &BuiltIn, 1);␊
break;␊
␊
␉/*************************************************************************************************************␊
␉* The above case are intended as for HDAU (ATi) device onboard audio for GFX card with Audio controller HDMi␊
␉*************************************************************************************************************/␊
␉case HDA_ATI_SB450:␊
␉case HDA_ATI_SB600:␊
␉case HDA_ATI_RS600:␊
␉case HDA_ATI_RS690:␊
␉case HDA_ATI_RS780:␊
␉case HDA_ATI_R600:␊
␉case HDA_ATI_RV630:␊
␉case HDA_ATI_RV610:␊
␉case HDA_ATI_RV670:␊
␉case HDA_ATI_RV635:␊
␉case HDA_ATI_RV620:␊
␉case HDA_ATI_RV770:␊
␉case HDA_ATI_RV730:␊
␉case HDA_ATI_RV710:␊
␉case HDA_ATI_RV740:␊
␉case HDA_ATI_RV870:␊
␉case HDA_ATI_RV840:␊
␉case HDA_ATI_RV830:␊
␉case HDA_ATI_RV810:␊
␉case HDA_ATI_RV970:␊
␉case HDA_ATI_RV940:␊
␉case HDA_ATI_RV930:␊
␉case HDA_ATI_RV910:␊
␉case HDA_ATI_R1000:␊
␉case HDA_ATI_VERDE:␊
␊
/* if the key value kHDAULayoutID as a value set that value, if not will assign a default layout */␊
if (getValueForKey(kHDAULayoutID, &value, &len, &bootInfo->chameleonConfig) && len == HDAU_LEN * 2)␊
{␊
uint8_t new_HDAU_layout_id[HDAU_LEN];␊
if (hex2bin(value, new_HDAU_layout_id, HDAU_LEN) == 0)␊
{␊
memcpy(default_HDAU_layout_id, new_HDAU_layout_id, HDAU_LEN);␊
verbose("Using user supplied HDAU layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",␊
default_HDAU_layout_id[0], default_HDAU_layout_id[1], default_HDAU_layout_id[2], default_HDAU_layout_id[3]);␊
}␊
␉␉␉}␊
␉␉␉else␊
␉␉␉{␊
␉␉␉␉verbose("Using default HDAU layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",␊
default_HDAU_layout_id[0], default_HDAU_layout_id[1], default_HDAU_layout_id[2], default_HDAU_layout_id[3]);␊
}␊
␊
devprop_add_value(device, "layout-id", default_HDAU_layout_id, HDAU_LEN); /*FIX ME*/␊
devprop_add_value(device, "hda-gfx", (uint8_t *)"onboard-2", 10);␊
devprop_add_value(device, "built-in", &BuiltIn, 1);␊
break;␊
␊
default:␊
break;␊
␉}␊
␊
␉verbose("Class code: [%04x]\nModel name: %s [%04x:%04x] (rev %02x)\nSubsystem: [%04x:%04x]\n%s\ndevice number: %d\n",␊
␉hda_dev->class_id, controller_name, hda_dev->vendor_id, hda_dev->device_id, hda_dev->revision_id,␊
␉hda_dev->subsys_id.subsys.vendor_id, hda_dev->subsys_id.subsys.device_id, devicepath, devices_number);␊
␊
␉verbose("--------------------------------\n");␊
␊
␉stringdata = malloc(sizeof(uint8_t) * string->length);␊
␉memcpy(stringdata, (uint8_t*)devprop_generate_string(string), string->length);␊
␉stringlength = string->length;␊
␊
␉return true;␊
}␊
trunk/i386/libsaio/hda.h
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/*␊
*␉HDA injector / Audio Enabler␊
*␊
*␉Copyright (C) 2012␉Chameleon Team␊
*␉Edit by Fabio (ErmaC)␊
*␊
*␉HDA injector is free software: you can redistribute it and/or modify␊
*␉it under the terms of the GNU General Public License as published by␊
*␉the Free Software Foundation, either version 3 of the License, or␊
*␉(at your option) any later version.␊
*␊
*␉HDA injector is distributed in the hope that it will be useful,␊
*␉but WITHOUT ANY WARRANTY; without even the implied warranty of␊
*␉MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the␊
*␉GNU General Public License for more details.␊
*␊
*␉Alternatively you can choose to comply with APSL␊
*␊
*␉Permission is hereby granted, free of charge, to any person obtaining a␊
*␉copy of this software and associated documentation files (the "Software"),␊
*␉to deal in the Software without restriction, including without limitation␊
*␉the rights to use, copy, modify, merge, publish, distribute, sublicense,␊
*␉and/or sell copies of the Software, and to permit persons to whom the␊
*␉Software is furnished to do so, subject to the following conditions:␊
*␊
*␉The above copyright notice and this permission notice shall be included in␊
*␉all copies or substantial portions of the Software.␊
*␊
******************************************************************************␊
* http://www.leidinger.net/FreeBSD/dox/dev_sound/html/df/d54/hdac_8c_source.html␊
*␊
* Copyright (c) 2006 Stephane E. Potvin <sepotvin@videotron.ca>␊
* Copyright (c) 2006 Ariff Abdullah <ariff@FreeBSD.org>␊
* Copyright (c) 2008-2012 Alexander Motin <mav@FreeBSD.org>␊
* All rights reserved.␊
*␊
* Redistribution and use in source and binary forms, with or without␊
* modification, are permitted provided that the following conditions␊
* are met:␊
* 1. Redistributions of source code must retain the above copyright␊
* notice, this list of conditions and the following disclaimer.␊
* 2. Redistributions in binary form must reproduce the above copyright␊
* notice, this list of conditions and the following disclaimer in the␊
* documentation and/or other materials provided with the distribution.␊
*␊
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND␊
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE␊
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE␊
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE␊
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL␊
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS␊
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)␊
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT␊
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY␊
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF␊
* SUCH DAMAGE.␊
*␊
* Intel High Definition Audio (Controller) driver for FreeBSD.␊
*␊
******************************************************************************/␊
␊
#ifndef __LIBSAIO_HDA_H␊
#define __LIBSAIO_HDA_H␊
␊
bool setup_hda_devprop(pci_dt_t *hda_dev);␊
␊
struct hda_controller_devices;␊
typedef struct {␊
␉uint32_t␉model;␊
␉char␉␉*desc;␊
␉// char␉␉quirks_on;␊
␉// char␉␉quirks_off;␊
} hda_controller_devices;␊
␊
/*␊
struct hdacc_codecs;␊
typedef struct {␊
uint32_t cid;␊
uint16_t revid;␊
char *name;␊
} hdacc_codecs;␊
*/␊
␊
/****************************************************************************␊
* Miscellanious defines␊
****************************************************************************/␊
␊
/* Controller models */␊
#define HDA_MODEL_CONSTRUCT(vendor, model) (((uint32_t)(model) << 16) | ((vendor##_VENDORID) & 0xffff))␊
␊
/* Intel */␊
#define INTEL_VENDORID␉␉0x8086␊
#define HDA_INTEL_HASWELL␉HDA_MODEL_CONSTRUCT(INTEL, 0x0c0c)␊
#define HDA_INTEL_CRYSTAL␉HDA_MODEL_CONSTRUCT(INTEL, 0x0d0c)␊
#define HDA_INTEL_CPT␉␉HDA_MODEL_CONSTRUCT(INTEL, 0x1c20)␊
#define HDA_INTEL_PATSBURG␉HDA_MODEL_CONSTRUCT(INTEL, 0x1d20)␊
#define HDA_INTEL_PPT1␉␉HDA_MODEL_CONSTRUCT(INTEL, 0x1e20) // Macmini6,2␊
#define HDA_INTEL_82801F␉HDA_MODEL_CONSTRUCT(INTEL, 0x2668)␊
#define HDA_INTEL_63XXESB␉HDA_MODEL_CONSTRUCT(INTEL, 0x269a)␊
#define HDA_INTEL_82801G␉HDA_MODEL_CONSTRUCT(INTEL, 0x27d8)␊
#define HDA_INTEL_82801H␉HDA_MODEL_CONSTRUCT(INTEL, 0x284b)␊
#define HDA_INTEL_82801I␉HDA_MODEL_CONSTRUCT(INTEL, 0x293e)␊
#define HDA_INTEL_82801JI␉HDA_MODEL_CONSTRUCT(INTEL, 0x3a3e)␊
#define HDA_INTEL_82801JD␉HDA_MODEL_CONSTRUCT(INTEL, 0x3a6e)␊
#define HDA_INTEL_PCH␉␉HDA_MODEL_CONSTRUCT(INTEL, 0x3b56)␊
#define HDA_INTEL_PCH2␉␉HDA_MODEL_CONSTRUCT(INTEL, 0x3b57)␊
#define HDA_INTEL_SCH␉␉HDA_MODEL_CONSTRUCT(INTEL, 0x811b)␊
#define HDA_INTEL_LPT1␉␉HDA_MODEL_CONSTRUCT(INTEL, 0x8d20)␊
#define HDA_INTEL_LPT2␉␉HDA_MODEL_CONSTRUCT(INTEL, 0x8d21)␊
#define HDA_INTEL_LYNX HDA_MODEL_CONSTRUCT(INTEL, 0x9c20)␊
#define HDA_INTEL_LYNX2 HDA_MODEL_CONSTRUCT(INTEL, 0x9c21)␊
#define HDA_INTEL_ALL␉␉HDA_MODEL_CONSTRUCT(INTEL, 0xffff)␊
␊
/* Nvidia */␊
#define NVIDIA_VENDORID␉␉0x10de␊
// AppleHDA binary contain 0a00de10 (10de000a)␊
// AppleHDAController binary contain de10ea0b (10de0bea)␊
#define HDA_NVIDIA_MCP51␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x026c)␊
#define HDA_NVIDIA_MCP55␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x0371)␊
#define HDA_NVIDIA_MCP61_1␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x03e4)␊
#define HDA_NVIDIA_MCP61_2␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x03f0)␊
#define HDA_NVIDIA_MCP65_1␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x044a)␊
#define HDA_NVIDIA_MCP65_2␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x044b)␊
#define HDA_NVIDIA_MCP67_1␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x055c)␊
#define HDA_NVIDIA_MCP67_2␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x055d)␊
#define HDA_NVIDIA_MCP78_1␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x0774)␊
#define HDA_NVIDIA_MCP78_2␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x0775)␊
#define HDA_NVIDIA_MCP78_3␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x0776)␊
#define HDA_NVIDIA_MCP78_4␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x0777)␊
#define HDA_NVIDIA_MCP73_1␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x07fc)␊
#define HDA_NVIDIA_MCP73_2␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x07fd)␊
#define HDA_NVIDIA_MCP79_1␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x0ac0)␊
#define HDA_NVIDIA_MCP79_2␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x0ac1)␊
#define HDA_NVIDIA_MCP79_3␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x0ac2)␊
#define HDA_NVIDIA_MCP79_4␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x0ac3)␊
#define HDA_NVIDIA_0BE2␉␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x0be2)␊
#define HDA_NVIDIA_0BE3␉␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x0be3) // [GeForce 210] HDAcodec␊
#define HDA_NVIDIA_0BE4␉␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x0be4) // [GeForge GT 240] HDACodec 10de000d (0d00de10)␊
#define HDA_NVIDIA_GT100␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x0be5) // [GeForge GTX 470] HDACodec 10de0010 (1000de10)␊
#define HDA_NVIDIA_GT106␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x0be9)␊
#define HDA_NVIDIA_GT108␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x0bea) // HDACodec ␊
#define HDA_NVIDIA_GT104␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x0beb)␊
#define HDA_NVIDIA_GT116␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x0bee)␊
#define HDA_NVIDIA_MCP89_1␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x0d94)␊
#define HDA_NVIDIA_MCP89_2␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x0d95)␊
#define HDA_NVIDIA_MCP89_3␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x0d96)␊
#define HDA_NVIDIA_MCP89_4␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x0d97)␊
#define HDA_NVIDIA_GF119␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x0e08)␊
#define HDA_NVIDIA_GF110␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x0e09)␊
#define HDA_NVIDIA_GK104␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x0e0a)␊
#define HDA_NVIDIA_GK106␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x0e0b)␊
#define HDA_NVIDIA_GF114␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x0e0c) // HDACodec de101600 (10de0016), Controller Binary de100c0e x2␊
#define HDA_NVIDIA_GK110␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x0e1a)␊
#define HDA_NVIDIA_GK107␉HDA_MODEL_CONSTRUCT(NVIDIA, 0x0e1b) // HDACodec de104200 (10de0042)␊
#define HDA_NVIDIA_ALL␉␉HDA_MODEL_CONSTRUCT(NVIDIA, 0xffff)␊
␊
/* ATI */␊
#define ATI_VENDORID␉␉0x1002␊
#define HDA_ATI_SB450␉␉HDA_MODEL_CONSTRUCT(ATI, 0x437b)␊
#define HDA_ATI_SB600␉␉HDA_MODEL_CONSTRUCT(ATI, 0x4383)␊
#define HDA_ATI_RS600␉␉HDA_MODEL_CONSTRUCT(ATI, 0x793b)␊
#define HDA_ATI_RS690␉␉HDA_MODEL_CONSTRUCT(ATI, 0x7919)␊
#define HDA_ATI_RS780␉␉HDA_MODEL_CONSTRUCT(ATI, 0x960f)␊
#define HDA_ATI_RS880␉␉HDA_MODEL_CONSTRUCT(ATI, 0x970f)␊
#define HDA_ATI_TRINITY␉␉HDA_MODEL_CONSTRUCT(ATI, 0x9902)␊
#define HDA_ATI_R600␉␉HDA_MODEL_CONSTRUCT(ATI, 0xaa00)␊
#define HDA_ATI_RV630␉␉HDA_MODEL_CONSTRUCT(ATI, 0xaa08)␊
#define HDA_ATI_RV610␉␉HDA_MODEL_CONSTRUCT(ATI, 0xaa10)␊
#define HDA_ATI_RV670␉␉HDA_MODEL_CONSTRUCT(ATI, 0xaa18)␊
#define HDA_ATI_RV635␉␉HDA_MODEL_CONSTRUCT(ATI, 0xaa20)␊
#define HDA_ATI_RV620␉␉HDA_MODEL_CONSTRUCT(ATI, 0xaa28)␊
#define HDA_ATI_RV770␉␉HDA_MODEL_CONSTRUCT(ATI, 0xaa30)␊
#define HDA_ATI_RV730␉␉HDA_MODEL_CONSTRUCT(ATI, 0xaa38)␊
#define HDA_ATI_RV710␉␉HDA_MODEL_CONSTRUCT(ATI, 0xaa40)␊
#define HDA_ATI_RV740␉␉HDA_MODEL_CONSTRUCT(ATI, 0xaa48)␊
#define HDA_ATI_RV870␉␉HDA_MODEL_CONSTRUCT(ATI, 0xaa50)␊
#define HDA_ATI_RV840␉␉HDA_MODEL_CONSTRUCT(ATI, 0xaa58) // Codec 021001aa (1002aa01)␊
#define HDA_ATI_RV830␉␉HDA_MODEL_CONSTRUCT(ATI, 0xaa60)␊
#define HDA_ATI_RV810␉␉HDA_MODEL_CONSTRUCT(ATI, 0xaa68)␊
#define HDA_ATI_RV970␉␉HDA_MODEL_CONSTRUCT(ATI, 0xaa80)␊
#define HDA_ATI_RV940␉␉HDA_MODEL_CONSTRUCT(ATI, 0xaa88)␊
#define HDA_ATI_RV930␉␉HDA_MODEL_CONSTRUCT(ATI, 0xaa90)␊
#define HDA_ATI_RV910␉␉HDA_MODEL_CONSTRUCT(ATI, 0xaa98)␊
#define HDA_ATI_R1000␉␉HDA_MODEL_CONSTRUCT(ATI, 0xaaa0)␊
#define HDA_ATI_VERDE␉␉HDA_MODEL_CONSTRUCT(ATI, 0xaab0)␊
#define HDA_ATI_ALL␉␉HDA_MODEL_CONSTRUCT(ATI, 0xffff)␊
␊
/* RDC */␊
#define RDC_VENDORID␉␉0x17f3␊
#define HDA_RDC_M3010␉␉HDA_MODEL_CONSTRUCT(RDC, 0x3010)␊
␊
/* VIA */␊
#define VIA_VENDORID␉␉0x1106␊
#define HDA_VIA_VT82XX␉␉HDA_MODEL_CONSTRUCT(VIA, 0x3288)␊
#define HDA_VIA_ALL␉␉HDA_MODEL_CONSTRUCT(VIA, 0xffff)␊
␊
/* SiS */␊
#define SIS_VENDORID␉␉0x1039␊
#define HDA_SIS_966␉␉HDA_MODEL_CONSTRUCT(SIS, 0x7502)␊
#define HDA_SIS_ALL␉␉HDA_MODEL_CONSTRUCT(SIS, 0xffff)␊
␊
/* ULI */␊
#define ULI_VENDORID␉␉0x10b9␊
#define HDA_ULI_M5461␉␉HDA_MODEL_CONSTRUCT(ULI, 0x5461)␊
#define HDA_ULI_ALL␉␉HDA_MODEL_CONSTRUCT(ULI, 0xffff)␊
␊
/* OEM/subvendors */␊
␊
/* Intel */␊
#define INTEL_D101GGC_SUBVENDOR␉HDA_MODEL_CONSTRUCT(INTEL, 0xd600)␊
␊
/* HP/Compaq */␊
#define HP_VENDORID␉␉0x103c␊
#define HP_V3000_SUBVENDOR␉HDA_MODEL_CONSTRUCT(HP, 0x30b5)␊
#define HP_NX7400_SUBVENDOR␉HDA_MODEL_CONSTRUCT(HP, 0x30a2)␊
#define HP_NX6310_SUBVENDOR␉HDA_MODEL_CONSTRUCT(HP, 0x30aa)␊
#define HP_NX6325_SUBVENDOR␉HDA_MODEL_CONSTRUCT(HP, 0x30b0)␊
#define HP_XW4300_SUBVENDOR␉HDA_MODEL_CONSTRUCT(HP, 0x3013)␊
#define HP_3010_SUBVENDOR␉HDA_MODEL_CONSTRUCT(HP, 0x3010)␊
#define HP_DV5000_SUBVENDOR␉HDA_MODEL_CONSTRUCT(HP, 0x30a5)␊
#define HP_DC7700S_SUBVENDOR␉HDA_MODEL_CONSTRUCT(HP, 0x2801)␊
#define HP_DC7700_SUBVENDOR␉HDA_MODEL_CONSTRUCT(HP, 0x2802)␊
#define HP_ALL_SUBVENDOR␉HDA_MODEL_CONSTRUCT(HP, 0xffff)␊
/* What is wrong with XN 2563 anyway? (Got the picture ?) */␊
#define HP_NX6325_SUBVENDORX␉0x103c30b0␊
␊
/* Dell */␊
#define DELL_VENDORID␉␉0x1028␊
#define DELL_D630_SUBVENDOR␉HDA_MODEL_CONSTRUCT(DELL, 0x01f9)␊
#define DELL_D820_SUBVENDOR␉HDA_MODEL_CONSTRUCT(DELL, 0x01cc)␊
#define DELL_V1400_SUBVENDOR␉HDA_MODEL_CONSTRUCT(DELL, 0x0227)␊
#define DELL_V1500_SUBVENDOR␉HDA_MODEL_CONSTRUCT(DELL, 0x0228)␊
#define DELL_I1300_SUBVENDOR␉HDA_MODEL_CONSTRUCT(DELL, 0x01c9)␊
#define DELL_XPSM1210_SUBVENDOR␉HDA_MODEL_CONSTRUCT(DELL, 0x01d7)␊
#define DELL_OPLX745_SUBVENDOR␉HDA_MODEL_CONSTRUCT(DELL, 0x01da)␊
#define DELL_ALL_SUBVENDOR␉HDA_MODEL_CONSTRUCT(DELL, 0xffff)␊
␊
/* Clevo */␊
#define CLEVO_VENDORID␉␉0x1558␊
#define CLEVO_D900T_SUBVENDOR␉HDA_MODEL_CONSTRUCT(CLEVO, 0x0900)␊
#define CLEVO_ALL_SUBVENDOR␉HDA_MODEL_CONSTRUCT(CLEVO, 0xffff)␊
␊
/* Acer */␊
#define ACER_VENDORID␉␉0x1025␊
#define ACER_A5050_SUBVENDOR␉HDA_MODEL_CONSTRUCT(ACER, 0x010f)␊
#define ACER_A4520_SUBVENDOR␉HDA_MODEL_CONSTRUCT(ACER, 0x0127)␊
#define ACER_A4710_SUBVENDOR␉HDA_MODEL_CONSTRUCT(ACER, 0x012f)␊
#define ACER_A4715_SUBVENDOR␉HDA_MODEL_CONSTRUCT(ACER, 0x0133)␊
#define ACER_3681WXM_SUBVENDOR␉HDA_MODEL_CONSTRUCT(ACER, 0x0110)␊
#define ACER_T6292_SUBVENDOR␉HDA_MODEL_CONSTRUCT(ACER, 0x011b)␊
#define ACER_T5320_SUBVENDOR␉HDA_MODEL_CONSTRUCT(ACER, 0x011f)␊
#define ACER_ALL_SUBVENDOR␉HDA_MODEL_CONSTRUCT(ACER, 0xffff)␊
␊
/* Asus */␊
#define ASUS_VENDORID␉␉0x1043␊
#define ASUS_A8X_SUBVENDOR␉HDA_MODEL_CONSTRUCT(ASUS, 0x1153)␊
#define ASUS_U5F_SUBVENDOR␉HDA_MODEL_CONSTRUCT(ASUS, 0x1263)␊
#define ASUS_W6F_SUBVENDOR␉HDA_MODEL_CONSTRUCT(ASUS, 0x1263)␊
#define ASUS_A7M_SUBVENDOR␉HDA_MODEL_CONSTRUCT(ASUS, 0x1323)␊
#define ASUS_F3JC_SUBVENDOR␉HDA_MODEL_CONSTRUCT(ASUS, 0x1338)␊
#define ASUS_G2K_SUBVENDOR␉HDA_MODEL_CONSTRUCT(ASUS, 0x1339)␊
#define ASUS_A7T_SUBVENDOR␉HDA_MODEL_CONSTRUCT(ASUS, 0x13c2)␊
#define ASUS_W2J_SUBVENDOR␉HDA_MODEL_CONSTRUCT(ASUS, 0x1971)␊
#define ASUS_M5200_SUBVENDOR␉HDA_MODEL_CONSTRUCT(ASUS, 0x1993)␊
#define ASUS_P5PL2_SUBVENDOR␉HDA_MODEL_CONSTRUCT(ASUS, 0x817f)␊
#define ASUS_P1AH2_SUBVENDOR␉HDA_MODEL_CONSTRUCT(ASUS, 0x81cb)␊
#define ASUS_M2NPVMX_SUBVENDOR␉HDA_MODEL_CONSTRUCT(ASUS, 0x81cb)␊
#define ASUS_M2V_SUBVENDOR␉HDA_MODEL_CONSTRUCT(ASUS, 0x81e7)␊
#define ASUS_P5BWD_SUBVENDOR␉HDA_MODEL_CONSTRUCT(ASUS, 0x81ec)␊
#define ASUS_M2N_SUBVENDOR␉HDA_MODEL_CONSTRUCT(ASUS, 0x8234)␊
#define ASUS_A8NVMCSM_SUBVENDOR␉HDA_MODEL_CONSTRUCT(NVIDIA, 0xcb84)␊
#define ASUS_ALL_SUBVENDOR␉HDA_MODEL_CONSTRUCT(ASUS, 0xffff)␊
␊
/* IBM / Lenovo */␊
#define IBM_VENDORID␉␉0x1014␊
#define IBM_M52_SUBVENDOR␉HDA_MODEL_CONSTRUCT(IBM, 0x02f6)␊
#define IBM_ALL_SUBVENDOR␉HDA_MODEL_CONSTRUCT(IBM, 0xffff)␊
␊
/* Lenovo */␊
#define LENOVO_VENDORID␉␉0x17aa␊
#define LENOVO_3KN100_SUBVENDOR␉␉HDA_MODEL_CONSTRUCT(LENOVO, 0x2066)␊
#define LENOVO_3KN200_SUBVENDOR␉␉HDA_MODEL_CONSTRUCT(LENOVO, 0x384e)␊
#define LENOVO_B450_SUBVENDOR␉␉HDA_MODEL_CONSTRUCT(LENOVO, 0x3a0d)␊
#define LENOVO_TCA55_SUBVENDOR␉␉HDA_MODEL_CONSTRUCT(LENOVO, 0x1015)␊
#define LENOVO_X300_SUBVENDOR␉␉HDA_MODEL_CONSTRUCT(LENOVO, 0x20ac)␊
#define LENOVO_X1_SUBVENDOR␉␉HDA_MODEL_CONSTRUCT(LENOVO, 0x21e8)␊
#define LENOVO_X1CRBN_SUBVENDOR␉␉HDA_MODEL_CONSTRUCT(LENOVO, 0x21f9)␊
#define LENOVO_X220_SUBVENDOR␉␉HDA_MODEL_CONSTRUCT(LENOVO, 0x21da)␊
#define LENOVO_T420_SUBVENDOR␉␉HDA_MODEL_CONSTRUCT(LENOVO, 0x21ce)␊
#define LENOVO_T430_SUBVENDOR␉␉HDA_MODEL_CONSTRUCT(LENOVO, 0x21f3)␊
#define LENOVO_T430S_SUBVENDOR␉␉HDA_MODEL_CONSTRUCT(LENOVO, 0x21fb)␊
#define LENOVO_T520_SUBVENDOR␉␉HDA_MODEL_CONSTRUCT(LENOVO, 0x21cf)␊
#define LENOVO_T530_SUBVENDOR␉␉HDA_MODEL_CONSTRUCT(LENOVO, 0x21f6)␊
#define LENOVO_ALL_SUBVENDOR␉␉HDA_MODEL_CONSTRUCT(LENOVO, 0xffff)␊
␊
/* Samsung */␊
#define SAMSUNG_VENDORID␉0x144d␊
#define SAMSUNG_Q1_SUBVENDOR␉HDA_MODEL_CONSTRUCT(SAMSUNG, 0xc027)␊
#define SAMSUNG_ALL_SUBVENDOR␉HDA_MODEL_CONSTRUCT(SAMSUNG, 0xffff)␊
␊
/* Medion ? */␊
#define MEDION_VENDORID␉␉␉0x161f␊
#define MEDION_MD95257_SUBVENDOR␉HDA_MODEL_CONSTRUCT(MEDION, 0x203d)␊
#define MEDION_ALL_SUBVENDOR␉␉HDA_MODEL_CONSTRUCT(MEDION, 0xffff)␊
␊
/* Apple Computer Inc. */␊
#define APPLE_VENDORID␉␉0x106b␊
#define APPLE_MB3_SUBVENDOR␉HDA_MODEL_CONSTRUCT(APPLE, 0x00a1)␊
␊
/* Sony */␊
#define SONY_VENDORID␉␉0x104d␊
#define SONY_S5_SUBVENDOR␉HDA_MODEL_CONSTRUCT(SONY, 0x81cc)␊
#define SONY_ALL_SUBVENDOR␉HDA_MODEL_CONSTRUCT(SONY, 0xffff)␊
␊
/*␊
* Apple Intel MacXXXX seems using Sigmatel codec/vendor id␊
* instead of their own, which is beyond my comprehension␊
* (see HDA_CODEC_STAC9221 below).␊
*/␊
#define APPLE_INTEL_MAC␉␉0x76808384␊
#define APPLE_MACBOOKPRO55␉0xcb7910de␊
␊
/* LG Electronics */␊
#define LG_VENDORID␉␉0x1854␊
#define LG_LW20_SUBVENDOR␉HDA_MODEL_CONSTRUCT(LG, 0x0018)␊
#define LG_ALL_SUBVENDOR␉HDA_MODEL_CONSTRUCT(LG, 0xffff)␊
␊
/* Fujitsu Siemens */␊
#define FS_VENDORID␉␉0x1734␊
#define FS_PA1510_SUBVENDOR␉HDA_MODEL_CONSTRUCT(FS, 0x10b8)␊
#define FS_SI1848_SUBVENDOR␉HDA_MODEL_CONSTRUCT(FS, 0x10cd)␊
#define FS_ALL_SUBVENDOR␉HDA_MODEL_CONSTRUCT(FS, 0xffff)␊
␊
/* Fujitsu Limited */␊
#define FL_VENDORID␉␉0x10cf␊
#define FL_S7020D_SUBVENDOR␉HDA_MODEL_CONSTRUCT(FL, 0x1326)␊
#define FL_U1010_SUBVENDOR␉HDA_MODEL_CONSTRUCT(FL, 0x142d)␊
#define FL_ALL_SUBVENDOR␉HDA_MODEL_CONSTRUCT(FL, 0xffff)␊
␊
/* Toshiba */␊
#define TOSHIBA_VENDORID␉0x1179␊
#define TOSHIBA_U200_SUBVENDOR␉HDA_MODEL_CONSTRUCT(TOSHIBA, 0x0001)␊
#define TOSHIBA_A135_SUBVENDOR␉HDA_MODEL_CONSTRUCT(TOSHIBA, 0xff01)␊
#define TOSHIBA_ALL_SUBVENDOR␉HDA_MODEL_CONSTRUCT(TOSHIBA, 0xffff)␊
␊
/* Micro-Star International (MSI) */␊
#define MSI_VENDORID␉␉0x1462␊
#define MSI_MS1034_SUBVENDOR␉HDA_MODEL_CONSTRUCT(MSI, 0x0349)␊
#define MSI_MS034A_SUBVENDOR␉HDA_MODEL_CONSTRUCT(MSI, 0x034a)␊
#define MSI_ALL_SUBVENDOR␉HDA_MODEL_CONSTRUCT(MSI, 0xffff)␊
␊
/* Giga-Byte Technology */␊
#define GB_VENDORID␉␉0x1458␊
#define GB_G33S2H_SUBVENDOR␉HDA_MODEL_CONSTRUCT(GB, 0xa022)␊
#define GP_ALL_SUBVENDOR␉HDA_MODEL_CONSTRUCT(GB, 0xffff)␊
␊
/* Uniwill ? */␊
#define UNIWILL_VENDORID␉0x1584␊
#define UNIWILL_9075_SUBVENDOR␉HDA_MODEL_CONSTRUCT(UNIWILL, 0x9075)␊
#define UNIWILL_9080_SUBVENDOR␉HDA_MODEL_CONSTRUCT(UNIWILL, 0x9080)␊
␊
//#define HDEF_PATH "PciRoot(0x0)/Pci(0x1b,0x0)"␊
//#define PINCONF_LEN ( sizeof(default_PinConfiguration) / sizeof(uint8_t) )␊
#define HDA0_LEN ( sizeof(default_HDEF_layout_id) / sizeof(uint8_t) )␊
#define HDA1_LEN ( sizeof(default_HDAU_layout_id) / sizeof(uint8_t) )␊
␊
/* codec information */␊
#define HDA_CODEC_CONSTRUCT(vendor, id) (((uint32_t)(vendor##_VENDORID) << 16) | ((id) & 0xffff))␊
␊
/* Cirrus Logic */␊
#define CIRRUSLOGIC_VENDORID 0x1013␊
#define HDA_CODEC_CS4206 HDA_CODEC_CONSTRUCT(CIRRUSLOGIC, 0x4206)␊
#define HDA_CODEC_CS4207 HDA_CODEC_CONSTRUCT(CIRRUSLOGIC, 0x4207)␊
#define HDA_CODEC_CS4210 HDA_CODEC_CONSTRUCT(CIRRUSLOGIC, 0x4210)␊
#define HDA_CODEC_CSXXXX HDA_CODEC_CONSTRUCT(CIRRUSLOGIC, 0xffff)␊
␊
/* Realtek */␊
#define REALTEK_VENDORID 0x10ec␊
#define HDA_CODEC_ALC221 HDA_CODEC_CONSTRUCT(REALTEK, 0x0221)␊
#define HDA_CODEC_ALC260 HDA_CODEC_CONSTRUCT(REALTEK, 0x0260)␊
#define HDA_CODEC_ALC262 HDA_CODEC_CONSTRUCT(REALTEK, 0x0262)␊
#define HDA_CODEC_ALC267 HDA_CODEC_CONSTRUCT(REALTEK, 0x0267)␊
#define HDA_CODEC_ALC268 HDA_CODEC_CONSTRUCT(REALTEK, 0x0268)␊
#define HDA_CODEC_ALC269 HDA_CODEC_CONSTRUCT(REALTEK, 0x0269)␊
#define HDA_CODEC_ALC270 HDA_CODEC_CONSTRUCT(REALTEK, 0x0270)␊
#define HDA_CODEC_ALC272 HDA_CODEC_CONSTRUCT(REALTEK, 0x0272)␊
#define HDA_CODEC_ALC273 HDA_CODEC_CONSTRUCT(REALTEK, 0x0273)␊
#define HDA_CODEC_ALC275 HDA_CODEC_CONSTRUCT(REALTEK, 0x0275)␊
#define HDA_CODEC_ALC276 HDA_CODEC_CONSTRUCT(REALTEK, 0x0276)␊
#define HDA_CODEC_ALC660 HDA_CODEC_CONSTRUCT(REALTEK, 0x0660)␊
#define HDA_CODEC_ALC662 HDA_CODEC_CONSTRUCT(REALTEK, 0x0662)␊
#define HDA_CODEC_ALC663 HDA_CODEC_CONSTRUCT(REALTEK, 0x0663)␊
#define HDA_CODEC_ALC665 HDA_CODEC_CONSTRUCT(REALTEK, 0x0665)␊
#define HDA_CODEC_ALC670 HDA_CODEC_CONSTRUCT(REALTEK, 0x0670)␊
#define HDA_CODEC_ALC680 HDA_CODEC_CONSTRUCT(REALTEK, 0x0680)␊
#define HDA_CODEC_ALC861 HDA_CODEC_CONSTRUCT(REALTEK, 0x0861)␊
#define HDA_CODEC_ALC861VD HDA_CODEC_CONSTRUCT(REALTEK, 0x0862)␊
#define HDA_CODEC_ALC880 HDA_CODEC_CONSTRUCT(REALTEK, 0x0880)␊
#define HDA_CODEC_ALC882 HDA_CODEC_CONSTRUCT(REALTEK, 0x0882)␊
#define HDA_CODEC_ALC883 HDA_CODEC_CONSTRUCT(REALTEK, 0x0883)␊
#define HDA_CODEC_ALC885 HDA_CODEC_CONSTRUCT(REALTEK, 0x0885)␊
#define HDA_CODEC_ALC887 HDA_CODEC_CONSTRUCT(REALTEK, 0x0887)␊
#define HDA_CODEC_ALC888 HDA_CODEC_CONSTRUCT(REALTEK, 0x0888)␊
#define HDA_CODEC_ALC889 HDA_CODEC_CONSTRUCT(REALTEK, 0x0889)␊
#define HDA_CODEC_ALC892 HDA_CODEC_CONSTRUCT(REALTEK, 0x0892)␊
#define HDA_CODEC_ALC898 HDA_CODEC_CONSTRUCT(REALTEK, 0x0898)␊
#define HDA_CODEC_ALC899 HDA_CODEC_CONSTRUCT(REALTEK, 0x0899)␊
#define HDA_CODEC_ALCXXXX HDA_CODEC_CONSTRUCT(REALTEK, 0xffff)␊
␊
/* Motorola */␊
#define MOTO_VENDORID 0x1057␊
#define HDA_CODEC_MOTOXXXX HDA_CODEC_CONSTRUCT(MOTO, 0xffff)␊
␊
/* Creative */␊
#define CREATIVE_VENDORID 0x1102␊
#define HDA_CODEC_CA0110 HDA_CODEC_CONSTRUCT(CREATIVE, 0x000a)␊
#define HDA_CODEC_CA0110_2 HDA_CODEC_CONSTRUCT(CREATIVE, 0x000b)␊
#define HDA_CODEC_SB0880 HDA_CODEC_CONSTRUCT(CREATIVE, 0x000d)␊
#define HDA_CODEC_CA0132 HDA_CODEC_CONSTRUCT(CREATIVE, 0x0011)␊
#define HDA_CODEC_CAXXXX HDA_CODEC_CONSTRUCT(CREATIVE, 0xffff)␊
␊
/* Analog Devices */␊
#define ANALOGDEVICES_VENDORID 0x11d4␊
#define HDA_CODEC_AD1884A HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x184a)␊
#define HDA_CODEC_AD1882 HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1882)␊
#define HDA_CODEC_AD1883 HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1883)␊
#define HDA_CODEC_AD1884 HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1884)␊
#define HDA_CODEC_AD1984A HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x194a)␊
#define HDA_CODEC_AD1984B HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x194b)␊
#define HDA_CODEC_AD1981HD HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1981)␊
#define HDA_CODEC_AD1983 HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1983)␊
#define HDA_CODEC_AD1984 HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1984)␊
#define HDA_CODEC_AD1986A HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1986)␊
#define HDA_CODEC_AD1987 HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1987)␊
#define HDA_CODEC_AD1988 HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1988)␊
#define HDA_CODEC_AD1988B HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x198b)␊
#define HDA_CODEC_AD1882A HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x882a)␊
#define HDA_CODEC_AD1989A HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x989a)␊
#define HDA_CODEC_AD1989B HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x989b)␊
#define HDA_CODEC_ADXXXX HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0xffff)␊
␊
/* CMedia */␊
#define CMEDIA_VENDORID 0x13f6␊
#define HDA_CODEC_CMI9880 HDA_CODEC_CONSTRUCT(CMEDIA, 0x9880)␊
#define HDA_CODEC_CMIXXXX HDA_CODEC_CONSTRUCT(CMEDIA, 0xffff)␊
␊
#define CMEDIA2_VENDORID 0x434d␊
#define HDA_CODEC_CMI98802 HDA_CODEC_CONSTRUCT(CMEDIA2, 0x4980)␊
#define HDA_CODEC_CMIXXXX2 HDA_CODEC_CONSTRUCT(CMEDIA2, 0xffff)␊
␊
/* Sigmatel */␊
#define SIGMATEL_VENDORID 0x8384␊
#define HDA_CODEC_STAC9230X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7612)␊
#define HDA_CODEC_STAC9230D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7613)␊
#define HDA_CODEC_STAC9229X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7614)␊
#define HDA_CODEC_STAC9229D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7615)␊
#define HDA_CODEC_STAC9228X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7616)␊
#define HDA_CODEC_STAC9228D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7617)␊
#define HDA_CODEC_STAC9227X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7618)␊
#define HDA_CODEC_STAC9227D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7619)␊
#define HDA_CODEC_STAC9274 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7620)␊
#define HDA_CODEC_STAC9274D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7621)␊
#define HDA_CODEC_STAC9273X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7622)␊
#define HDA_CODEC_STAC9273D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7623)␊
#define HDA_CODEC_STAC9272X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7624)␊
#define HDA_CODEC_STAC9272D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7625)␊
#define HDA_CODEC_STAC9271X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7626)␊
#define HDA_CODEC_STAC9271D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7627)␊
#define HDA_CODEC_STAC9274X5NH HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7628)␊
#define HDA_CODEC_STAC9274D5NH HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7629)␊
#define HDA_CODEC_STAC9250 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7634)␊
#define HDA_CODEC_STAC9251 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7636)␊
#define HDA_CODEC_IDT92HD700X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7638)␊
#define HDA_CODEC_IDT92HD700D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7639)␊
#define HDA_CODEC_IDT92HD206X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7645)␊
#define HDA_CODEC_IDT92HD206D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7646)␊
#define HDA_CODEC_CXD9872RDK HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7661)␊
#define HDA_CODEC_STAC9872AK HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7662)␊
#define HDA_CODEC_CXD9872AKD HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7664)␊
#define HDA_CODEC_STAC9221 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7680)␊
#define HDA_CODEC_STAC922XD HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7681)␊
#define HDA_CODEC_STAC9221_A2 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7682)␊
#define HDA_CODEC_STAC9221D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7683)␊
#define HDA_CODEC_STAC9220 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7690)␊
#define HDA_CODEC_STAC9200D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7691)␊
#define HDA_CODEC_IDT92HD005 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7698)␊
#define HDA_CODEC_IDT92HD005D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7699)␊
#define HDA_CODEC_STAC9205X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a0)␊
#define HDA_CODEC_STAC9205D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a1)␊
#define HDA_CODEC_STAC9204X HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a2)␊
#define HDA_CODEC_STAC9204D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a3)␊
#define HDA_CODEC_STAC9255 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a4)␊
#define HDA_CODEC_STAC9255D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a5)␊
#define HDA_CODEC_STAC9254 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a6)␊
#define HDA_CODEC_STAC9254D HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a7)␊
#define HDA_CODEC_STAC9220_A2 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7880)␊
#define HDA_CODEC_STAC9220_A1 HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7882)␊
#define HDA_CODEC_STACXXXX HDA_CODEC_CONSTRUCT(SIGMATEL, 0xffff)␊
␊
/* IDT */␊
#define IDT_VENDORID 0x111d␊
#define HDA_CODEC_IDT92HD75BX HDA_CODEC_CONSTRUCT(IDT, 0x7603)␊
#define HDA_CODEC_IDT92HD83C1X HDA_CODEC_CONSTRUCT(IDT, 0x7604)␊
#define HDA_CODEC_IDT92HD81B1X HDA_CODEC_CONSTRUCT(IDT, 0x7605)␊
#define HDA_CODEC_IDT92HD75B3 HDA_CODEC_CONSTRUCT(IDT, 0x7608)␊
#define HDA_CODEC_IDT92HD73D1 HDA_CODEC_CONSTRUCT(IDT, 0x7674)␊
#define HDA_CODEC_IDT92HD73C1 HDA_CODEC_CONSTRUCT(IDT, 0x7675)␊
#define HDA_CODEC_IDT92HD73E1 HDA_CODEC_CONSTRUCT(IDT, 0x7676)␊
#define HDA_CODEC_IDT92HD71B8 HDA_CODEC_CONSTRUCT(IDT, 0x76b0)␊
#define HDA_CODEC_IDT92HD71B8_2 HDA_CODEC_CONSTRUCT(IDT, 0x76b1)␊
#define HDA_CODEC_IDT92HD71B7 HDA_CODEC_CONSTRUCT(IDT, 0x76b2)␊
#define HDA_CODEC_IDT92HD71B7_2 HDA_CODEC_CONSTRUCT(IDT, 0x76b3)␊
#define HDA_CODEC_IDT92HD71B6 HDA_CODEC_CONSTRUCT(IDT, 0x76b4)␊
#define HDA_CODEC_IDT92HD71B6_2 HDA_CODEC_CONSTRUCT(IDT, 0x76b5)␊
#define HDA_CODEC_IDT92HD71B5 HDA_CODEC_CONSTRUCT(IDT, 0x76b6)␊
#define HDA_CODEC_IDT92HD71B5_2 HDA_CODEC_CONSTRUCT(IDT, 0x76b7)␊
#define HDA_CODEC_IDT92HD89C3 HDA_CODEC_CONSTRUCT(IDT, 0x76c0)␊
#define HDA_CODEC_IDT92HD89C2 HDA_CODEC_CONSTRUCT(IDT, 0x76c1)␊
#define HDA_CODEC_IDT92HD89C1 HDA_CODEC_CONSTRUCT(IDT, 0x76c2)␊
#define HDA_CODEC_IDT92HD89B3 HDA_CODEC_CONSTRUCT(IDT, 0x76c3)␊
#define HDA_CODEC_IDT92HD89B2 HDA_CODEC_CONSTRUCT(IDT, 0x76c4)␊
#define HDA_CODEC_IDT92HD89B1 HDA_CODEC_CONSTRUCT(IDT, 0x76c5)␊
#define HDA_CODEC_IDT92HD89E3 HDA_CODEC_CONSTRUCT(IDT, 0x76c6)␊
#define HDA_CODEC_IDT92HD89E2 HDA_CODEC_CONSTRUCT(IDT, 0x76c7)␊
#define HDA_CODEC_IDT92HD89E1 HDA_CODEC_CONSTRUCT(IDT, 0x76c8)␊
#define HDA_CODEC_IDT92HD89D3 HDA_CODEC_CONSTRUCT(IDT, 0x76c9)␊
#define HDA_CODEC_IDT92HD89D2 HDA_CODEC_CONSTRUCT(IDT, 0x76ca)␊
#define HDA_CODEC_IDT92HD89D1 HDA_CODEC_CONSTRUCT(IDT, 0x76cb)␊
#define HDA_CODEC_IDT92HD89F3 HDA_CODEC_CONSTRUCT(IDT, 0x76cc)␊
#define HDA_CODEC_IDT92HD89F2 HDA_CODEC_CONSTRUCT(IDT, 0x76cd)␊
#define HDA_CODEC_IDT92HD89F1 HDA_CODEC_CONSTRUCT(IDT, 0x76ce)␊
#define HDA_CODEC_IDT92HD87B1_3 HDA_CODEC_CONSTRUCT(IDT, 0x76d1)␊
#define HDA_CODEC_IDT92HD83C1C HDA_CODEC_CONSTRUCT(IDT, 0x76d4)␊
#define HDA_CODEC_IDT92HD81B1C HDA_CODEC_CONSTRUCT(IDT, 0x76d5)␊
#define HDA_CODEC_IDT92HD87B2_4 HDA_CODEC_CONSTRUCT(IDT, 0x76d9)␊
#define HDA_CODEC_IDT92HD93BXX HDA_CODEC_CONSTRUCT(IDT, 0x76df)␊
#define HDA_CODEC_IDT92HD91BXX HDA_CODEC_CONSTRUCT(IDT, 0x76e0)␊
#define HDA_CODEC_IDT92HD98BXX HDA_CODEC_CONSTRUCT(IDT, 0x76e3)␊
#define HDA_CODEC_IDT92HD99BXX HDA_CODEC_CONSTRUCT(IDT, 0x76e5)␊
#define HDA_CODEC_IDT92HD90BXX HDA_CODEC_CONSTRUCT(IDT, 0x76e7)␊
#define HDA_CODEC_IDT92HD66B1X5 HDA_CODEC_CONSTRUCT(IDT, 0x76e8)␊
#define HDA_CODEC_IDT92HD66B2X5 HDA_CODEC_CONSTRUCT(IDT, 0x76e9)␊
#define HDA_CODEC_IDT92HD66B3X5 HDA_CODEC_CONSTRUCT(IDT, 0x76ea)␊
#define HDA_CODEC_IDT92HD66C1X5 HDA_CODEC_CONSTRUCT(IDT, 0x76eb)␊
#define HDA_CODEC_IDT92HD66C2X5 HDA_CODEC_CONSTRUCT(IDT, 0x76ec)␊
#define HDA_CODEC_IDT92HD66C3X5 HDA_CODEC_CONSTRUCT(IDT, 0x76ed)␊
#define HDA_CODEC_IDT92HD66B1X3 HDA_CODEC_CONSTRUCT(IDT, 0x76ee)␊
#define HDA_CODEC_IDT92HD66B2X3 HDA_CODEC_CONSTRUCT(IDT, 0x76ef)␊
#define HDA_CODEC_IDT92HD66B3X3 HDA_CODEC_CONSTRUCT(IDT, 0x76f0)␊
#define HDA_CODEC_IDT92HD66C1X3 HDA_CODEC_CONSTRUCT(IDT, 0x76f1)␊
#define HDA_CODEC_IDT92HD66C2X3 HDA_CODEC_CONSTRUCT(IDT, 0x76f2)␊
#define HDA_CODEC_IDT92HD66C3_65 HDA_CODEC_CONSTRUCT(IDT, 0x76f3)␊
#define HDA_CODEC_IDTXXXX HDA_CODEC_CONSTRUCT(IDT, 0xffff)␊
␊
/* Silicon Image */␊
#define SII_VENDORID 0x1095␊
#define HDA_CODEC_SII1390 HDA_CODEC_CONSTRUCT(SII, 0x1390)␊
#define HDA_CODEC_SII1392 HDA_CODEC_CONSTRUCT(SII, 0x1392)␊
#define HDA_CODEC_SIIXXXX HDA_CODEC_CONSTRUCT(SII, 0xffff)␊
␊
/* Lucent/Agere */␊
#define AGERE_VENDORID 0x11c1␊
#define HDA_CODEC_AGEREXXXX HDA_CODEC_CONSTRUCT(AGERE, 0xffff)␊
␊
/* Conexant */␊
#define CONEXANT_VENDORID 0x14f1␊
#define HDA_CODEC_CX20549 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5045)␊
#define HDA_CODEC_CX20551 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5047)␊
#define HDA_CODEC_CX20561 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5051)␊
#define HDA_CODEC_CX20582 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5066)␊
#define HDA_CODEC_CX20583 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5067)␊
#define HDA_CODEC_CX20584 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5068)␊
#define HDA_CODEC_CX20585 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5069)␊
#define HDA_CODEC_CX20588 HDA_CODEC_CONSTRUCT(CONEXANT, 0x506c)␊
#define HDA_CODEC_CX20590 HDA_CODEC_CONSTRUCT(CONEXANT, 0x506e)␊
#define HDA_CODEC_CX20631 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5097)␊
#define HDA_CODEC_CX20632 HDA_CODEC_CONSTRUCT(CONEXANT, 0x5098)␊
#define HDA_CODEC_CX20641 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50a1)␊
#define HDA_CODEC_CX20642 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50a2)␊
#define HDA_CODEC_CX20651 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50ab)␊
#define HDA_CODEC_CX20652 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50ac)␊
#define HDA_CODEC_CX20664 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50b8)␊
#define HDA_CODEC_CX20665 HDA_CODEC_CONSTRUCT(CONEXANT, 0x50b9)␊
#define HDA_CODEC_CXXXXX HDA_CODEC_CONSTRUCT(CONEXANT, 0xffff)␊
␊
/* VIA */␊
#define HDA_CODEC_VT1708_8 HDA_CODEC_CONSTRUCT(VIA, 0x1708)␊
#define HDA_CODEC_VT1708_9 HDA_CODEC_CONSTRUCT(VIA, 0x1709)␊
#define HDA_CODEC_VT1708_A HDA_CODEC_CONSTRUCT(VIA, 0x170a)␊
#define HDA_CODEC_VT1708_B HDA_CODEC_CONSTRUCT(VIA, 0x170b)␊
#define HDA_CODEC_VT1709_0 HDA_CODEC_CONSTRUCT(VIA, 0xe710)␊
#define HDA_CODEC_VT1709_1 HDA_CODEC_CONSTRUCT(VIA, 0xe711)␊
#define HDA_CODEC_VT1709_2 HDA_CODEC_CONSTRUCT(VIA, 0xe712)␊
#define HDA_CODEC_VT1709_3 HDA_CODEC_CONSTRUCT(VIA, 0xe713)␊
#define HDA_CODEC_VT1709_4 HDA_CODEC_CONSTRUCT(VIA, 0xe714)␊
#define HDA_CODEC_VT1709_5 HDA_CODEC_CONSTRUCT(VIA, 0xe715)␊
#define HDA_CODEC_VT1709_6 HDA_CODEC_CONSTRUCT(VIA, 0xe716)␊
#define HDA_CODEC_VT1709_7 HDA_CODEC_CONSTRUCT(VIA, 0xe717)␊
#define HDA_CODEC_VT1708B_0 HDA_CODEC_CONSTRUCT(VIA, 0xe720)␊
#define HDA_CODEC_VT1708B_1 HDA_CODEC_CONSTRUCT(VIA, 0xe721)␊
#define HDA_CODEC_VT1708B_2 HDA_CODEC_CONSTRUCT(VIA, 0xe722)␊
#define HDA_CODEC_VT1708B_3 HDA_CODEC_CONSTRUCT(VIA, 0xe723)␊
#define HDA_CODEC_VT1708B_4 HDA_CODEC_CONSTRUCT(VIA, 0xe724)␊
#define HDA_CODEC_VT1708B_5 HDA_CODEC_CONSTRUCT(VIA, 0xe725)␊
#define HDA_CODEC_VT1708B_6 HDA_CODEC_CONSTRUCT(VIA, 0xe726)␊
#define HDA_CODEC_VT1708B_7 HDA_CODEC_CONSTRUCT(VIA, 0xe727)␊
#define HDA_CODEC_VT1708S_0 HDA_CODEC_CONSTRUCT(VIA, 0x0397)␊
#define HDA_CODEC_VT1708S_1 HDA_CODEC_CONSTRUCT(VIA, 0x1397)␊
#define HDA_CODEC_VT1708S_2 HDA_CODEC_CONSTRUCT(VIA, 0x2397)␊
#define HDA_CODEC_VT1708S_3 HDA_CODEC_CONSTRUCT(VIA, 0x3397)␊
#define HDA_CODEC_VT1708S_4 HDA_CODEC_CONSTRUCT(VIA, 0x4397)␊
#define HDA_CODEC_VT1708S_5 HDA_CODEC_CONSTRUCT(VIA, 0x5397)␊
#define HDA_CODEC_VT1708S_6 HDA_CODEC_CONSTRUCT(VIA, 0x6397)␊
#define HDA_CODEC_VT1708S_7 HDA_CODEC_CONSTRUCT(VIA, 0x7397)␊
#define HDA_CODEC_VT1702_0 HDA_CODEC_CONSTRUCT(VIA, 0x0398)␊
#define HDA_CODEC_VT1702_1 HDA_CODEC_CONSTRUCT(VIA, 0x1398)␊
#define HDA_CODEC_VT1702_2 HDA_CODEC_CONSTRUCT(VIA, 0x2398)␊
#define HDA_CODEC_VT1702_3 HDA_CODEC_CONSTRUCT(VIA, 0x3398)␊
#define HDA_CODEC_VT1702_4 HDA_CODEC_CONSTRUCT(VIA, 0x4398)␊
#define HDA_CODEC_VT1702_5 HDA_CODEC_CONSTRUCT(VIA, 0x5398)␊
#define HDA_CODEC_VT1702_6 HDA_CODEC_CONSTRUCT(VIA, 0x6398)␊
#define HDA_CODEC_VT1702_7 HDA_CODEC_CONSTRUCT(VIA, 0x7398)␊
#define HDA_CODEC_VT1716S_0 HDA_CODEC_CONSTRUCT(VIA, 0x0433)␊
#define HDA_CODEC_VT1716S_1 HDA_CODEC_CONSTRUCT(VIA, 0xa721)␊
#define HDA_CODEC_VT1718S_0 HDA_CODEC_CONSTRUCT(VIA, 0x0428)␊
#define HDA_CODEC_VT1718S_1 HDA_CODEC_CONSTRUCT(VIA, 0x4428)␊
#define HDA_CODEC_VT1802_0 HDA_CODEC_CONSTRUCT(VIA, 0x0446)␊
#define HDA_CODEC_VT1802_1 HDA_CODEC_CONSTRUCT(VIA, 0x8446)␊
#define HDA_CODEC_VT1812 HDA_CODEC_CONSTRUCT(VIA, 0x0448)␊
#define HDA_CODEC_VT1818S HDA_CODEC_CONSTRUCT(VIA, 0x0440)␊
#define HDA_CODEC_VT1828S HDA_CODEC_CONSTRUCT(VIA, 0x4441)␊
#define HDA_CODEC_VT2002P_0 HDA_CODEC_CONSTRUCT(VIA, 0x0438)␊
#define HDA_CODEC_VT2002P_1 HDA_CODEC_CONSTRUCT(VIA, 0x4438)␊
#define HDA_CODEC_VT2020 HDA_CODEC_CONSTRUCT(VIA, 0x0441)␊
#define HDA_CODEC_VTXXXX HDA_CODEC_CONSTRUCT(VIA, 0xffff)␊
␊
/* ATI */␊
#define HDA_CODEC_ATIRS600_1 HDA_CODEC_CONSTRUCT(ATI, 0x793c)␊
#define HDA_CODEC_ATIRS600_2 HDA_CODEC_CONSTRUCT(ATI, 0x7919)␊
#define HDA_CODEC_ATIRS690 HDA_CODEC_CONSTRUCT(ATI, 0x791a)␊
#define HDA_CODEC_ATIR6XX HDA_CODEC_CONSTRUCT(ATI, 0xaa01)␊
#define HDA_CODEC_ATIXXXX HDA_CODEC_CONSTRUCT(ATI, 0xffff)␊
␊
/* NVIDIA */␊
#define HDA_CODEC_NVIDIAMCP78 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0002)␊
#define HDA_CODEC_NVIDIAMCP78_2 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0003)␊
#define HDA_CODEC_NVIDIAMCP78_3 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0005)␊
#define HDA_CODEC_NVIDIAMCP78_4 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0006)␊
#define HDA_CODEC_NVIDIAMCP7A HDA_CODEC_CONSTRUCT(NVIDIA, 0x0007)␊
#define HDA_CODEC_NVIDIAGT220 HDA_CODEC_CONSTRUCT(NVIDIA, 0x000a)␊
#define HDA_CODEC_NVIDIAGT21X HDA_CODEC_CONSTRUCT(NVIDIA, 0x000b)␊
#define HDA_CODEC_NVIDIAMCP89 HDA_CODEC_CONSTRUCT(NVIDIA, 0x000c)␊
#define HDA_CODEC_NVIDIAGT240 HDA_CODEC_CONSTRUCT(NVIDIA, 0x000d)␊
#define HDA_CODEC_NVIDIAGTS450 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0011)␊
#define HDA_CODEC_NVIDIAGT440 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0014)␊
#define HDA_CODEC_NVIDIAGTX550 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0015)␊
#define HDA_CODEC_NVIDIAGTX570 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0018)␊
#define HDA_CODEC_NVIDIAMCP67 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0067)␊
#define HDA_CODEC_NVIDIAMCP73 HDA_CODEC_CONSTRUCT(NVIDIA, 0x8001)␊
#define HDA_CODEC_NVIDIAXXXX HDA_CODEC_CONSTRUCT(NVIDIA, 0xffff)␊
␊
/* Chrontel */␊
#define CHRONTEL_VENDORID 0x17e8␊
#define HDA_CODEC_CHXXXX HDA_CODEC_CONSTRUCT(CHRONTEL, 0xffff)␊
␊
/* INTEL */␊
#define HDA_CODEC_INTELIP HDA_CODEC_CONSTRUCT(INTEL, 0x0054)␊
#define HDA_CODEC_INTELBL HDA_CODEC_CONSTRUCT(INTEL, 0x2801)␊
#define HDA_CODEC_INTELCA HDA_CODEC_CONSTRUCT(INTEL, 0x2802)␊
#define HDA_CODEC_INTELEL HDA_CODEC_CONSTRUCT(INTEL, 0x2803)␊
#define HDA_CODEC_INTELIP2 HDA_CODEC_CONSTRUCT(INTEL, 0x2804)␊
#define HDA_CODEC_INTELCPT HDA_CODEC_CONSTRUCT(INTEL, 0x2805)␊
#define HDA_CODEC_INTELPPT HDA_CODEC_CONSTRUCT(INTEL, 0x2806)␊
#define HDA_CODEC_INTELCL HDA_CODEC_CONSTRUCT(INTEL, 0x29fb)␊
#define HDA_CODEC_INTELXXXX HDA_CODEC_CONSTRUCT(INTEL, 0xffff)␊
␊
#endif /* !__LIBSAIO_HDA_H */␊
trunk/i386/libsaio/ati.c
13681368
13691369
13701370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
13711383
13721384
1373
1374
1385
13751386
1387
1388
1389
13761390
13771391
1378
1379
1380
1381
1382
1392
1393
1394
1395
1396
1397
1398
1399
1400
13831401
1402
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1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
13841417
13851418
13861419
......
13921425
13931426
13941427
1395
1396
1428
1429
13971430
1398
1431
13991432
14001433
14011434
......
14051438
14061439
14071440
1408
1441
1442
14091443
14101444
14111445
1412
1413
1446
1447
1448
14141449
14151450
14161451
......
14211456
14221457
14231458
1424
1425
1459
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14261461
1427
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1462
1463
14291464
14301465
14311466
14321467
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1470
14331471
14341472
14351473
......
14381476
14391477
14401478
1479
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14411482
14421483
14431484
......
14461487
14471488
14481489
1449
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14521493
......
14551496
14561497
14571498
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1463
1505
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1511
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14701514
14711515
14721516
14731517
1518
1519
1520
14741521
14751522
14761523
......
15471594
15481595
15491596
1550
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1552
1597
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1599
15531600
15541601
15551602
␊
␉{ 0x9616,␉0x00000000, CHIP_FAMILY_RS780,␉␉"AMD 760G", ␉␉␉kNull␉␉},␊
␊
␉{ 0x9640,␉0x00000000, CHIP_FAMILY_SUMO,␉␉"AMD Radeon HD 6550D",␉␉␉␉kNull },␊
␉{ 0x9641,␉0x00000000, CHIP_FAMILY_SUMO,␉␉"AMD Radeon HD 6620G",␉␉␉␉kNull },␊
␉{ 0x9642,␉0x00000000, CHIP_FAMILY_SUMO,␉␉"AMD Radeon HD 6370D",␉␉␉␉kNull },␊
␉{ 0x9643,␉0x00000000, CHIP_FAMILY_SUMO,␉␉"AMD Radeon HD 6380G",␉␉␉␉kNull },␊
␉{ 0x9644,␉0x00000000, CHIP_FAMILY_SUMO,␉␉"AMD Radeon HD 6410D",␉␉␉␉kNull },␊
␉{ 0x9645,␉0x00000000, CHIP_FAMILY_SUMO,␉␉"AMD Radeon HD 6410D",␉␉␉␉kNull },␊
␉{ 0x9647,␉0x00000000, CHIP_FAMILY_SUMO,␉␉"AMD Radeon HD 6520G",␉␉␉␉kNull },␊
␉{ 0x9648,␉0x00000000, CHIP_FAMILY_SUMO,␉␉"AMD Radeon HD 6480G",␉␉␉␉kNull },␊
␉{ 0x9649,␉0x00000000, CHIP_FAMILY_SUMO,␉␉"AMD Radeon(TM) HD 6480G",␉␉␉kNull },␊
␊
␉{ 0x964A,␉0x00000000, CHIP_FAMILY_SUMO,␉␉"AMD Radeon HD 6530D",␉␉␉␉kNull },␊
␊
␉{ 0x9710,␉0x00000000, CHIP_FAMILY_RS880,␉␉"ATI Radeon HD 4200 Series",␉␉␉kNull␉␉},␊
␊
␉{ 0x9714,␉0x00000000, CHIP_FAMILY_RS880,␉␉"ATI Radeon HD 4290",␉␉␉kNull␉␉},␊
␉{ 0x9715,␉0x00000000, CHIP_FAMILY_RS880,␉␉"ATI Radeon HD 4250",␉␉␉kNull␉␉},␊
␉{ 0x9712,␉0x00000000, CHIP_FAMILY_RS880,␉␉"ATI Radeon HD 4200 Series",␉␉␉kNull}␉␉,␊
␊
␉{ 0x9714,␉0x00000000, CHIP_FAMILY_RS880,␉␉"ATI Radeon HD 4290",␉␉␉␉kNull␉␉},␊
␉{ 0x9715,␉0x00000000, CHIP_FAMILY_RS880,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊
␊
␉{ 0x9723,␉0x00000000, CHIP_FAMILY_RS880,␉␉"ATI Radeon HD 5450 Series",␉␉␉kNull␉␉},␊
␊
␉{ 0x9802,␉0x00000000, CHIP_FAMILY_RS880,␉␉"ATI Radeon HD 6310 Series",␉␉␉kNull␉␉},␊
␉{ 0x9803,␉0x00000000, CHIP_FAMILY_RS880,␉␉"ATI Radeon HD 6310 Series",␉␉␉kNull␉␉},␊
␉{ 0x9804,␉0x00000000, CHIP_FAMILY_RS880,␉␉"ATI Radeon HD 6310 Series",␉␉␉kNull␉␉},␊
␉{ 0x9805,␉0x00000000, CHIP_FAMILY_RS880,␉␉"ATI Radeon HD 6250 Series",␉␉␉kNull␉␉},␊
␉{ 0x9806,␉0x00000000, CHIP_FAMILY_RS880,␉␉"ATI Radeon HD 6320 Series",␉␉␉kNull␉␉},␊
␉{ 0x9802,␉0x00000000, CHIP_FAMILY_WRESTLER,␉␉"ATI Radeon HD 6310 Series",␉␉␉kNull␉␉},␊
␉{ 0x9803,␉0x00000000, CHIP_FAMILY_WRESTLER,␉␉"ATI Radeon HD 6310 Series",␉␉␉kNull␉␉},␊
␉{ 0x9804,␉0x00000000, CHIP_FAMILY_WRESTLER,␉␉"ATI Radeon HD 6310 Series",␉␉␉kNull␉␉},␊
␉{ 0x9805,␉0x00000000, CHIP_FAMILY_WRESTLER,␉␉"ATI Radeon HD 6250 Series",␉␉␉kNull␉␉},␊
␉{ 0x9806,␉0x00000000, CHIP_FAMILY_WRESTLER,␉␉"ATI Radeon HD 6320 Series",␉␉␉kNull␉␉},␊
␉{ 0x9806,␉0x00000000, CHIP_FAMILY_WRESTLER,␉␉"AMD Radeon HD 6320 Graphics",␉␉␉kNull },␊
␉{ 0x9807,␉0x00000000, CHIP_FAMILY_WRESTLER,␉␉"AMD Radeon HD 6290 Graphics",␉␉␉kNull },␊
␉{ 0x9808,␉0x00000000, CHIP_FAMILY_WRESTLER,␉␉"AMD Radeon HD 7340 Graphics",␉␉␉kNull },␊
␉{ 0x9809,␉0x00000000, CHIP_FAMILY_WRESTLER,␉␉"AMD Radeon HD 7310 Graphics",␉␉␉kNull },␊
␊
␉{ 0x9900,␉0x00000000, CHIP_FAMILY_TRINITY,␉"AMD Radeon HD 7660G", kNull },␊
␉{ 0x9901,␉0x00000000, CHIP_FAMILY_TRINITY,␉"AMD Radeon HD 7660D", kNull },␊
␉{ 0x9903,␉0x00000000, CHIP_FAMILY_TRINITY,␉"AMD Radeon HD 7640G", kNull },␊
␉{ 0x9904,␉0x00000000, CHIP_FAMILY_TRINITY,␉"AMD Radeon HD 7560D", kNull },␊
␉{ 0x9906,␉0x00000000, CHIP_FAMILY_TRINITY,␉"AMD FirePro A300 Series", kNull },␊
␉{ 0x9907,␉0x00000000, CHIP_FAMILY_TRINITY,␉"AMD Radeon HD 7620G", kNull },␊
␉{ 0x9908,␉0x00000000, CHIP_FAMILY_TRINITY,␉"AMD Radeon HD 7600G", kNull },␊
␉{ 0x9910,␉0x00000000, CHIP_FAMILY_TRINITY,␉"AMD Radeon HD 7660G", kNull },␊
␉{ 0x9913,␉0x00000000, CHIP_FAMILY_TRINITY,␉"AMD Radeon HD 7640G", kNull },␊
␊
␉{ 0x9990,␉0x00000000, CHIP_FAMILY_TRINITY,␉"AMD Radeon HD 7520G", kNull },␊
␉{ 0x9991,␉0x00000000, CHIP_FAMILY_TRINITY,␉"AMD Radeon HD 7540D", kNull },␊
␉{ 0x9992,␉0x00000000, CHIP_FAMILY_TRINITY,␉"AMD Radeon HD 7420G", kNull },␊
␉{ 0x9994,␉0x00000000, CHIP_FAMILY_TRINITY,␉"AMD Radeon HD 7400G", kNull },␊
␊
␉/* Evergreen */␊
␉{ 0x688D,␉0x00000000, CHIP_FAMILY_CYPRESS,␉"AMD FireStream 9350",␉␉␉␉kZonalis␉␉},␊
␊
␊
␉{ 0x689E,␉0x00000000, CHIP_FAMILY_HEMLOCK,␉"ATI Radeon HD 5800 Series",␉␉␉kUakari␉␉},␊
␊
␉{ 0x68A0,␉0x00000000, CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770 Series",␉␉␉kHoolock␉}, // CHIP_FAMILY_BROADWAY ??␊
␉{ 0x68A1,␉0x00000000, CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5850 Series",␉␉␉kHoolock␉}, // CHIP_FAMILY_BROADWAY ??␊
␉{ 0x68A0,␉0x00000000, CHIP_FAMILY_MANHATTAN,␉"ATI Radeon HD 5770 Series",␉␉␉kHoolock␉}, // CHIP_FAMILY_BROADWAY ??␊
␉{ 0x68A1,␉0x00000000, CHIP_FAMILY_MANHATTAN,␉"ATI Radeon HD 5850 Series",␉␉␉kHoolock␉}, // CHIP_FAMILY_BROADWAY ??␊
␊
␉{ 0x68A8,␉0x00000000, CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 6850M",␉␉␉␉kHoolock␉␉},␊
␉{ 0x68A8,␉0x00000000, CHIP_FAMILY_MANHATTAN,␉"ATI Radeon HD 6850M",␉␉␉␉kHoolock␉␉},␊
␉{ 0x68A9,␉0x00000000, CHIP_FAMILY_JUNIPER,␉"ATI FirePro V5800 (FireGL)",␉␉␉kHoolock␉},␊
␊
␊
␉{ 0x68B8,␉0x00000000, CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770 Series",␉␉␉kHoolock␉␉},␊
␉{ 0x68B9,␉0x00000000, CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5700 Series",␉␉␉kHoolock␉␉},␊
␉{ 0x68BA,␉0x00000000, CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 6700 Series",␉␉␉kHoolock␉␉},␊
␊
␉{ 0x68BC,␉0x00000000, CHIP_FAMILY_JUNIPER,␉"AMD FireStream 9370",␉␉␉␉kHoolock␉␉},␊
␉{ 0x68BD,␉0x00000000, CHIP_FAMILY_JUNIPER,␉"AMD FireStream 9350",␉␉␉␉kHoolock␉␉},␊
␉{ 0x68BE,␉0x00000000, CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5750 Series",␉␉␉kHoolock␉␉},␊
␉{ 0x68BF,␉0x00000000, CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5700 Series",␉␉␉kHoolock␉␉},␊
␊
␉{ 0x68C0,␉0x00000000, CHIP_FAMILY_REDWOOD,␉"AMD Radeon HD 6570M/5700 Series",␉␉kBaboon␉␉},␊
␉{ 0x68C1,␉0x00000000, CHIP_FAMILY_REDWOOD,␉"AMD Radeon HD 6500M/5600/5700 Series",␉␉kBaboon␉␉},␊
␉{ 0x68C0,␉0x00000000, CHIP_FAMILY_MANHATTAN,␉"AMD Radeon HD 6570M/5700 Series",␉␉kBaboon␉␉},␊
␉{ 0x68C1,␉0x00000000, CHIP_FAMILY_MANHATTAN,␉"AMD Radeon HD 6500M/5600/5700 Series",␉␉kBaboon␉␉},␊
␉{ 0x68C7,␉0x00000000, CHIP_FAMILY_MANHATTAN,␉"ATI Mobility Radeon HD 5570",␉␉␉kEulemur␉},␊
␉{ 0x68C8,␉0x00000000, CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5650 Series",␉␉␉kBaboon␉␉},␉␊
␉{ 0x68C9,␉0x00000000, CHIP_FAMILY_REDWOOD,␉"FirePro 3D V3800",␉␉␉␉kBaboon␉␉},␊
␊
//␉{ 0x68DE,␉0x00000000, CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD ??? Series",␉␉␉kNull␉␉},␊
␊
␊
␉{ 0x68E0,␉0x00000000, CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5470 Series", kEulemur␉},␊
␉{ 0x68E1,␉0x00000000, CHIP_FAMILY_CEDAR,␉␉"ATI Mobility Radeon HD 5400", kEulemur␉},␊
␉{ 0x68E0,␉0x00000000, CHIP_FAMILY_MANHATTAN,␉"ATI Radeon HD 5470 Series",␉␉␉kEulemur␉},␊
␉{ 0x68E1,␉0x00000000, CHIP_FAMILY_MANHATTAN,␉"AMD Radeon HD 6230",␉␉␉␉kEulemur␉},␊
␊
␉{ 0x68E4,␉0x00000000, CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 6370M Series",␉␉␉kEulemur␉␉},␊
␉{ 0x68E5,␉0x00000000, CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 6300M Series",␉␉␉kEulemur␉␉},␊
␉{ 0x68E4,␉0x00000000, CHIP_FAMILY_MANHATTAN,␉"ATI Radeon HD 6370M Series",␉␉␉kEulemur␉␉},␊
␉{ 0x68E5,␉0x00000000, CHIP_FAMILY_MANHATTAN,␉"ATI Radeon HD 6300M Series",␉␉␉kEulemur␉␉},␊
␊
//␉{ 0x68E8,␉0x00000000, CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD ??? Series",␉␉␉kNull␉␉},␊
//␉{ 0x68E9,␉0x00000000, CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD ??? Series",␉␉␉kNull␉␉},␊
␊
␉{ 0x68F1,␉0x00000000, CHIP_FAMILY_CEDAR,␉␉"AMD FirePro 2460",␉␉␉␉kEulemur␉␉},␊
␉{ 0x68F2,␉0x00000000, CHIP_FAMILY_CEDAR,␉␉"AMD FirePro 2270",␉␉␉␉kEulemur␉␉},␊
␊
//␉{ 0x68F8,␉0x00000000, CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD ??? Series",␉␉␉kNull␉␉},␊
␉{ 0x68F9,␉0x00000000, CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5470 Series",␉␉␉kEulemur␉␉},␊
␉{ 0x68FA,␉0x00000000, CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 7300 Series",␉␉␉kNull␉␉},␊
␊
␊
␉/* Northen Islands */␊
␉{ 0x6704,␉0x00000000, CHIP_FAMILY_CAYMAN,␉␉"AMD FirePro V7900",␉␉␉␉kLotus␉␉},␊
␉{ 0x6707,␉0x00000000, CHIP_FAMILY_CAYMAN,␉␉"AMD FirePro V5900",␉␉␉␉kLotus␉␉},␊
␊
␉{ 0x6718,␉0x00000000, CHIP_FAMILY_CAYMAN,␉␉"AMD Radeon HD 6970 Series",␉␉␉kLotus␉␉},␊
␉{ 0x6719,␉0x00000000, CHIP_FAMILY_CAYMAN,␉␉"AMD Radeon HD 6950 Series",␉␉␉kLotus␉␉},␊
␊
␊
␉{ 0x671F,␉0x00000000, CHIP_FAMILY_CAYMAN,␉␉"AMD Radeon HD 6930 Series",␉␉␉kLotus␉␉},␊
␊
␉{ 0x6720,␉0x00000000, CHIP_FAMILY_BARTS,␉␉"AMD Radeon HD 6900M Series",␉␉␉kFanwort␉},␊
␉{ 0x6720,␉0x00000000, CHIP_FAMILY_VANCOUVER,␉"AMD Radeon HD 6900M Series",␉␉␉kFanwort␉},␊
␊
␉{ 0x6722,␉0x00000000, CHIP_FAMILY_BARTS,␉␉"AMD Radeon HD 6900M Series",␉␉␉kFanwort␉},␊
␉{ 0x6729,␉0x00000000, CHIP_FAMILY_BARTS,␉␉"AMD Radeon HD 6900M Series",␉␉␉kFanwort␉},␊
␊
␉{ 0x673E,␉0x00000000, CHIP_FAMILY_BARTS,␉␉"AMD Radeon HD 6790 Series",␉␉␉kDuckweed␉␉},␊
␊
␉{ 0x6740,␉0x00000000, CHIP_FAMILY_TURKS,␉␉"AMD Radeon HD 6770M Series",␉␉␉kCattail␉␉},␊
␉{ 0x6741,␉0x00000000, CHIP_FAMILY_TURKS,␉␉"AMD Radeon HD 6750M",␉␉␉kCattail␉␉},␊
␉{ 0x6740,␉0x00000000, CHIP_FAMILY_VANCOUVER,␉␉"AMD Radeon HD 6770M Series",␉␉␉kCattail␉␉},␊
␉{ 0x6741,␉0x00000000, CHIP_FAMILY_VANCOUVER,␉␉"AMD Radeon HD 6750M",␉␉␉␉kCattail␉␉},␊
␉{ 0x6742,␉0x00000000, CHIP_FAMILY_VANCOUVER,␉␉"AMD Radeon HD 7500/7600 Series",␉␉kCattail␉␉},␊
␊
␉{ 0x6745,␉0x00000000, CHIP_FAMILY_TURKS,␉␉"AMD Radeon HD 6600M Series",␉␉␉kCattail␉␉},␊
␉{ 0x6745,␉0x00000000, CHIP_FAMILY_VANCOUVER,␉␉"AMD Radeon HD 6600M Series",␉␉␉kCattail␉␉},␊
␉{ 0x6749,␉0x00000000, CHIP_FAMILY_TURKS,␉␉"ATI Radeon FirePro V4900",␉␉␉kPithecia␉␉},␊
␉{ 0x674A,␉0x00000000, CHIP_FAMILY_TURKS,␉␉"AMD Radeon HD 6600M Series",␉␉␉kCattail␉␉},␊
␉{ 0x674A,␉0x00000000, CHIP_FAMILY_TURKS,␉␉"AMD Radeon HD 6600M Series",␉␉␉kPithecia␉␉},␊
␉{ 0x6750,␉0x00000000, CHIP_FAMILY_TURKS,␉␉"AMD Radeon HD 6670 Series",␉␉␉kPithecia␉␉},␊
␊
␉{ 0x6758,␉0x00000000, CHIP_FAMILY_TURKS,␉␉"AMD Radeon HD 6670 Series",␉␉␉kPithecia␉},␊
␉{ 0x6759,␉0x00000000, CHIP_FAMILY_TURKS,␉␉"AMD Radeon HD 6570/7570 Series",␉␉kPithecia␉␉},␊
␊
␉{ 0x675B,␉0x00000000, CHIP_FAMILY_TURKS,␉␉"AMD Radeon HD 7600 Series",␉␉␉kPithecia },␊
␊
␉{ 0x675D,␉0x00000000, CHIP_FAMILY_TURKS,␉␉"AMD Radeon HD 7570M Series",␉␉␉kCattail␉␉},␊
␊
␉{ 0x675F,␉0x00000000, CHIP_FAMILY_TURKS,␉␉"AMD Radeon HD 6570 Series",␉␉␉kPithecia␉␉},␊
␉{ 0x6760,␉0x00000000, CHIP_FAMILY_CAICOS,␉␉"AMD Radeon HD 6470M Series",␉␉␉kHydrilla␉␉},␊
␉{ 0x6761,␉0x00000000, CHIP_FAMILY_CAICOS,␉␉"AMD Radeon HD 6430M Series",␉␉␉kHydrilla␉␉},␊
␉{ 0x6763,␉0x00000000, CHIP_FAMILY_CAICOS,␉␉"AMD Radeon E6460 Series",␉␉␉kHydrilla␉␉},␊
␊
␊
␉{ 0x6768,␉0x00000000, CHIP_FAMILY_CAICOS,␉␉"AMD Radeon HD 6400M Series",␉␉␉kHydrilla␉},␊
␊
␉{ 0x6770,␉0x00000000, CHIP_FAMILY_CAICOS,␉␉"AMD Radeon HD 6400 Series",␉␉␉kBulrushes␉␉},␊
␉{ 0x683F,␉0x00000000, CHIP_FAMILY_VERDE,␉␉"AMD Radeon HD 7750 Series", kBuri␉}, // ATI7000Controller.kext␊
␊
␉{ 0x6840,␉0x00000000, CHIP_FAMILY_LOMBOK,␉␉"AMD Radeon HD 7670M Series",␉␉kPondweed }, // THAMES??␊
␉{ 0x6841,␉0x00000000, CHIP_FAMILY_THAMES,␉␉"AMD Radeon HD 7500M/7600M Series",␉kPondweed␉},␊
␉{ 0x6842,␉0x00000000, CHIP_FAMILY_THAMES,␉␉"AMD Radeon HD 7000M Series",␉␉kPondweed␉},␊
␉{ 0x6843,␉0x00000000, CHIP_FAMILY_THAMES,␉␉"AMD Radeon HD 7670M Series",␉␉kPondweed␉},␊
␉{ 0x6841,␉0x00000000, CHIP_FAMILY_LOMBOK,␉␉"AMD Radeon HD 7500M/7600M Series",␉kPondweed␉},␊
␉{ 0x6842,␉0x00000000, CHIP_FAMILY_LOMBOK,␉␉"AMD Radeon HD 7600M Series",␉␉kPondweed␉},␊
␉{ 0x6843,␉0x00000000, CHIP_FAMILY_VANCOUVER,␉␉"AMD Radeon HD 7670M Series",␉␉kPondweed␉},␊
␉{ 0x6849,␉0x00000000, CHIP_FAMILY_LOMBOK,␉␉"AMD Radeon HD 7600M Series",␉␉kPondweed },␊
␊
//␉{ 0x684C,␉0x00000000, CHIP_FAMILY_PITCAIRN,␉"AMD Radeon HD ??? Series",␉␉kNull␉},␊
trunk/i386/libsaio/ati.h
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105110
␉CHIP_FAMILY_THAMES,␊
␉CHIP_FAMILY_LOMBOK,␊
//␉CHIP_FAMILY_NEWZEALAND,␊
␉CHIP_FAMILY_SUMO,␊
␉CHIP_FAMILY_MANHATTAN,␊
␉CHIP_FAMILY_VANCOUVER,␊
␉CHIP_FAMILY_WRESTLER,␊
␉CHIP_FAMILY_TRINITY,␊
␉CHIP_FAMILY_LAST␊
} ati_chip_family_t;␊
␊
trunk/i386/libsaio/pci_setup.c
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......
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......
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......
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#include "pci.h"␊
#include "gma.h"␊
#include "nvidia.h"␊
#include "hda.h"␊
#include "modules.h"␊
␊
␊
extern bool setup_ati_devprop(pci_dt_t *ati_dev);␊
extern bool setup_nvidia_devprop(pci_dt_t *nvda_dev);␊
extern bool setup_gma_devprop(pci_dt_t *gma_dev);␊
extern bool setup_hda_devprop(pci_dt_t *hda_dev);␊
extern void set_eth_builtin(pci_dt_t *eth_dev);␊
extern void notify_usb_dev(pci_dt_t *pci_dev);␊
extern void force_enable_hpet(pci_dt_t *lpc_dev);␊
void setup_pci_devs(pci_dt_t *pci_dt)␊
{␊
␉char *devicepath;␊
␉bool doit, do_eth_devprop, do_gfx_devprop, do_enable_hpet;␊
␉bool doit, do_eth_devprop, do_gfx_devprop, do_enable_hpet, do_hda_devprop;␊
␉pci_dt_t *current = pci_dt;␊
␊
␉do_eth_devprop = do_gfx_devprop = do_enable_hpet = false;␊
␉do_eth_devprop = do_gfx_devprop = do_enable_hpet = do_hda_devprop = false;␊
␊
␉getBoolForKey(kEthernetBuiltIn, &do_eth_devprop, &bootInfo->chameleonConfig);␊
␉getBoolForKey(kGraphicsEnabler, &do_gfx_devprop, &bootInfo->chameleonConfig);␊
␉getBoolForKey(kHDAEnabler, &do_hda_devprop, &bootInfo->chameleonConfig);␊
␉getBoolForKey(kForceHPET, &do_enable_hpet, &bootInfo->chameleonConfig);␊
␊
␉while (current)␊
␉␉␉␉␊
␉␉␉case PCI_CLASS_NETWORK_ETHERNET: ␊
␉␉␉␉if (do_eth_devprop)␊
␉␉␉␉{␊
␉␉␉␉␉set_eth_builtin(current);␊
␉␉␉␉}␊
␉␉␉␉break;␊
␊
␉␉␉case PCI_CLASS_DISPLAY_VGA:␊
␉␉␉␉␉}␊
␉␉␉␉␉break;␊
␊
␉␉␉case PCI_CLASS_MULTIMEDIA_AUDIO_DEV:␊
␉␉␉␉if (do_hda_devprop)␊
␉␉␉␉{␊
␉␉␉␉␉setup_hda_devprop(current);␊
␉␉␉␉}␊
␉␉␉␉break;␊
␊
␉␉␉case PCI_CLASS_SERIAL_USB:␊
␉␉␉␉notify_usb_dev(current);␊
␉␉␉␉break;␊
␊
␉␉␉case PCI_CLASS_BRIDGE_ISA:␊
␉␉␉␉if (do_enable_hpet)␊
␉␉␉␉{␊
␉␉␉␉␉force_enable_hpet(current);␊
␉␉␉␉}␊
␉␉␉␉break;␊
␉␉}␊
␉␉␊
trunk/i386/libsaio/pci.c
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␉id = pci_config_read16(PCIADDR(0, 0x00, 0), 0x00);␊
␉/* make sure we're on Intel chipset */␊
␉if (id != 0x8086)␊
␉{␊
␉␉return;␊
␉}␊
␉rcba = pci_config_read32(PCIADDR(0, 0x1f, 0), 0xf0) & ~1;␊
␉fd = (uint32_t *)(rcba + 0x3418);␊
␉/* set SMBus Disable (SD) to 0 */␊
trunk/i386/boot2/boot.h
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#define kSkipIntelGfx␉␉"SkipIntelGfx"␉␉/* pci_setup.c */␊
#define kSkipNvidiaGfx␉␉"SkipNvidiaGfx"␉␉/* pci_setup.c */␊
#define kSkipAtiGfx␉␉"SkipAtiGfx"␉␉/* pci_setup.c */␊
#define kIntelCapriFB␉"IntelCapriFB"␉␉␉/* gma.c was HD4K-ig */␊
#define kIntelAzulFB␉"IntelAzulFB"␉␉␉/* gma.c was HD5K-ig */␊
#define kAAPLCustomIG␉"InjectIntel-ig"␉␉/* gma.c */␊
#define kIntelCapriFB␉␉"IntelCapriFB"␉␉/* gma.c was HD4K-ig */␊
#define kIntelAzulFB␉␉"IntelAzulFB"␉␉/* gma.c was HD5K-ig */␊
#define kAAPLCustomIG␉␉"InjectIntel-ig"␉/* gma.c */␊
#define kHDAEnabler␉␉"HDAEnabler"␉␉/* pci_setup.c */␊
#define kHDEFLayoutID␉␉"HDEFLayoutID"␉␉/* hda.c */␊
#define kHDAULayoutID␉␉"HDAULayoutID"␉␉/* hda.c */␊
␊
/*␊
* Flags to the booter or kernel␊
trunk/i386/modules/Cconfig
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source "i386/modules/ACPIcodec/Cconfig"␊
source "i386/modules/KernelPatcher/Cconfig"␊
source "i386/modules/FileNVRAM/Cconfig"␊
source "i386/modules/HDAEnabler/Cconfig"␊
#source "i386/modules/HDAEnabler/Cconfig"␊
endmenu␊
trunk/i386/modules/Makefile
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SUBDIRS += FileNVRAM␊
endif␊
␊
ifdef CONFIG_HDAENABLER_MODULE␊
SUBDIRS += HDAEnabler␊
endif␊
#ifdef CONFIG_HDAENABLER_MODULE␊
#SUBDIRS += HDAEnabler␊
#endif␊
␊
CFLAGS= -O3 $(MORECPP) -arch i386 -g -static␊
DEFINES=␊
trunk/doc/BootHelp.txt
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KeyLayout=keymap Use to change the keyboard mapping of the bootloader␊
(e.g. KeyLayout=mac-fr)␊
␊
HDAEnabler=Yes|No Automatic device-properties generation for audio controllers.␊
HDEFLayoutID=<value> Inject alternate value of layout-id for HDEF (HEX).␊
HDAULayoutID=<value> Inject alternate value of layout-id for HDAU (HEX).␊
␊
GraphicsEnabler=Yes|No Automatic device-properties generation for graphics cards.␊
SkipIntelGfx=Yes|No Skip the Automatic device-properties generation for Intel cards.␊
SkipNvidiaGfx=Yes|No Skip the Automatic device-properties generation for Nvidia cards.␊

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Revision: 2263