Chameleon

Chameleon Commit Details

Date:2014-01-26 13:27:06 (5 years 5 months ago)
Author:ErmaC
Commit:2347
Parents: 2346
Message:add minors info for dmi's cpu. few IDs for NICs name injector. casting and typo.
Changes:
M/branches/ErmaC/Enoch/i386/boot2/IOHibernatePrivate.h
M/branches/ErmaC/Enoch/i386/libsaio/smbios.c
M/branches/ErmaC/Enoch/i386/libsaio/aml_generator.c
M/branches/ErmaC/Enoch/i386/libsaio/smbios_decode.c
M/branches/ErmaC/Enoch/i386/libsaio/xml.c
M/branches/ErmaC/Enoch/i386/libsaio/smbios.h
M/branches/ErmaC/Enoch/i386/boot2/picopng.c
M/branches/ErmaC/Enoch/i386/libsaio/acpi_patcher.c
M/branches/ErmaC/Enoch/i386/boot2/resume.c
M/branches/ErmaC/Enoch/i386/boot2/bmdecompress.c
M/branches/ErmaC/Enoch/i386/libsaio/cpu.c
M/branches/ErmaC/Enoch/i386/libsaio/networking.c
M/branches/ErmaC/Enoch/i386/libsaio/platform.h
M/branches/ErmaC/Enoch/i386/libsaio/smbios_getters.c
M/branches/ErmaC/Enoch/i386/boot2/boot.h

File differences

branches/ErmaC/Enoch/i386/libsaio/xml.c
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if (!c) {
return -1;
}
/* tagStart points just past the '<' */
/* Find the end of the tag. */
tagEnd = tagStart;
branches/ErmaC/Enoch/i386/libsaio/acpi_patcher.c
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return tableAddr;
}
close (fd);
printf("Couldn't allocate memory for table \n", dirspec);
verbose("Couldn't allocate memory for table \n", dirspec);
}
//printf("Couldn't find table %s\n", filename);
return NULL;
verbose("Found ACPI CPU: %c%c%c%c\n", acpi_cpu_name[acpi_cpu_count][0], acpi_cpu_name[acpi_cpu_count][1], acpi_cpu_name[acpi_cpu_count][2], acpi_cpu_name[acpi_cpu_count][3]);
if (++acpi_cpu_count == 32)
{
if (++acpi_cpu_count == 32) {
return;
}
}
aml_add_byte(pack, cstates_count);
AML_CHUNK* tmpl = aml_add_package(pack);
if (cst_using_systemio)
{
if (cst_using_systemio) {
// C1
resource_template_register_fixedhw[8] = 0x00;
resource_template_register_fixedhw[9] = 0x00;
verbose ("SSDT with CPU C-States generated successfully\n");
return ssdt;
}
else
{
} else {
verbose ("ACPI CPUs not found: C-States not generated !!!\n");
}
DBG("P-States: Insane FID values!");
p_states_count = 0;
} else {
uint8_t vidstep;
uint8_t i = 0, u, invalid = 0;
// Finalize P-States
// Find how many P-States machine supports
p_states_count = maximum.CID - minimum.CID + 1;
p_states_count = (uint8_t)(maximum.CID - minimum.CID + 1);
if (p_states_count > 32) {
p_states_count = 32;
}
uint8_t vidstep;
uint8_t i = 0, u, invalid = 0;
vidstep = ((maximum.VID << 2) - (minimum.VID << 2)) / (p_states_count - 1);
for (u = 0; u < p_states_count; u++) {
i = u - invalid;
p_states[i].CID = maximum.CID - u;
p_states[i].FID = (p_states[i].CID >> 1);
p_states[i].FID = (uint8_t)(p_states[i].CID >> 1);
if (p_states[i].FID < 0x6) {
if (cpu_dynamic_fsb) {
if (i && p_states[i].FID == p_states[i-1].FID) {
invalid++;
}
p_states[i].VID = ((maximum.VID << 2) - (vidstep * u)) >> 2;
uint32_t multiplier = p_states[i].FID & 0x1f;// = 0x08
bool half = p_states[i].FID & 0x40;// = 0x01
bool dfsb = p_states[i].FID & 0x80;// = 0x00
uint32_t fsb = Platform.CPU.FSBFrequency / 1000000; // = 400
uint32_t fsb = (uint32_t)(Platform.CPU.FSBFrequency / 1000000); // = 400
uint32_t halffsb = (fsb + 1) >> 1;// = 200
uint32_t frequency = (multiplier * fsb);// = 3200
p_states[i].Frequency = (frequency + (half * halffsb)) >> dfsb;// = 3200 + 200 = 3400
p_states[i].Frequency = (uint32_t)(frequency + (half * halffsb)) >> dfsb;// = 3200 + 200 = 3400
}
p_states_count -= invalid;
break;
}
default:
verbose ("Unsupported CPU: P-States not generated !!! Unknown CPU Type\n");
verbose ("Unsupported CPU (0x%X): P-States not generated !!!\n", Platform.CPU.Family);
break;
}
}
AML_CHUNK* root = aml_create_node(NULL);
aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
AML_CHUNK* scop = aml_add_scope(root, "\\_PR_");
AML_CHUNK* name = aml_add_name(scop, "PSS_");
AML_CHUNK* pack = aml_add_package(name);
ssdt->Length = root->Size;
ssdt->Checksum = 0;
ssdt->Checksum = 256 - checksum8(ssdt, ssdt->Length);
ssdt->Checksum = 256 - (uint8_t)(checksum8(ssdt, ssdt->Length));
aml_destroy_node(root);
{
extern void setupSystemType();
struct acpi_2_fadt *fadt_mod;
struct acpi_2_fadt *fadt_mod = NULL;
bool fadt_rev2_needed = false;
bool fix_restart;
bool fix_restart_ps2;
DBG("New @%x,%x\n",fadt_mod->DSDT,fadt_mod->X_DSDT);
verbose("FADT: Using custom DSDT!\n");
DBG("FADT: Using custom DSDT!\n");
}
// Correct the checksum
//addConfigurationTable(&gEfiAcpiTableGuid, getAddressOfAcpiTable(), "ACPI");
//addConfigurationTable(&gEfiAcpi20TableGuid, getAddressOfAcpi20Table(), "ACPI_20");
/* XXX aserebln why uint32 cast if pointer is uint64 ? */
acpi10_p = (uint32_t)getAddressOfAcpiTable();
acpi20_p = (uint32_t)getAddressOfAcpi20Table();
acpi10_p = (uint64_t)(uint32_t)getAddressOfAcpiTable();
acpi20_p = (uint64_t)(uint32_t)getAddressOfAcpi20Table();
addConfigurationTable(&gEfiAcpiTableGuid, &acpi10_p, "ACPI");
if(acpi20_p) addConfigurationTable(&gEfiAcpi20TableGuid, &acpi20_p, "ACPI_20");
return 1;
if(acpi20_p) {
addConfigurationTable(&gEfiAcpi20TableGuid, &acpi20_p, "ACPI_20");
} else {
DBG("no ACPI 2\n");
}return 1;
}
/* Setup ACPI. Replace DSDT if DSDT.aml is found */
rsdt_entries[i-dropoffset+j]=(uint32_t)new_ssdt[j];
}
verbose("RSDT: Added %d SSDT table(s)\n", ssdt_count);
DBG("RSDT: Added %d SSDT table(s)\n", ssdt_count);
}
DBG("New checksum %d at %x\n", rsdt_mod->Checksum,rsdt_mod);
} else {
rsdp_mod->RsdtAddress=0;
printf("RSDT not found or incorrect\n");
verbose("RSDT not found or RSDT incorrect\n");
}
if (version) {
// FIXME: handle 64-bit address correctly
xsdt=(struct acpi_2_xsdt*) ((uint32_t)rsdp->XsdtAddress);
DBG("XSDT @%x;%x, Length=%d\n", (uint32_t)(rsdp->XsdtAddress>>32),(uint32_t)rsdp->XsdtAddress, xsdt->Length);
DBG("XSDT @%x;%x, Length=%d Sign=%c%c%c%c\n", (uint32_t)(rsdp->XsdtAddress>>32),
(uint32_t)rsdp->XsdtAddress, xsdt->Length, xsdt[0], xsdt[1], xsdt[2], xsdt[3]);
if (xsdt && (uint64_t)rsdp->XsdtAddress<0xffffffff && xsdt->Length<0x10000) {
uint64_t *xsdt_entries;
int xsdt_entries_num, i;
xsdt_entries[i-dropoffset]=(uint32_t)new_dsdt;
}
DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
continue;
}
xsdt_entries[i-dropoffset]=(uint32_t)new_hpet;
}
DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
continue;
}
xsdt_entries[i-dropoffset]=(uint32_t)new_sbst;
}
DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
continue;
}
xsdt_entries[i-dropoffset]=(uint32_t)new_ecdt;
}
DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
continue;
}
xsdt_entries[i-dropoffset]=(uint32_t)new_asft;
}
DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
continue;
}
xsdt_entries[i-dropoffset]=(uint32_t)new_dmar;
}
DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
continue;
}
xsdt_entries[i-dropoffset]=(uint32_t)new_apic;
}
DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
continue;
}
xsdt_entries[i-dropoffset]=(uint32_t)new_mcfg;
}
DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
continue;
}
struct acpi_2_fadt *fadt, *fadt_mod;
fadt=(struct acpi_2_fadt *)(uint32_t)xsdt_entries[i];
DBG("FADT found @%x,%x, Length %d\n",(uint32_t)(xsdt_entries[i]>>32),fadt,
DBG("FADT found @%x%x, Length %d\n",(uint32_t)(xsdt_entries[i]>>32),fadt,
fadt->Length);
if (!fadt || (uint64_t)xsdt_entries[i] >= 0xffffffff || fadt->Length>0x10000) {
verbose("FADT incorrect or after 4GB. Dropping XSDT\n");
DBG("FADT incorrect or after 4GB. Dropping XSDT\n");
goto drop_xsdt;
}
fadt_mod = patch_fadt(fadt, new_dsdt);
xsdt_entries[i-dropoffset]=(uint32_t)fadt_mod;
DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
// Generate _CST SSDT
if (generate_cstates && (new_ssdt[ssdt_count] = generate_cst_ssdt(fadt_mod))) {
continue;
}
DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
}
xsdt_entries[i-dropoffset+j]=(uint32_t)new_ssdt[j];
}
verbose("Added %d SSDT table(s) into XSDT\n", ssdt_count);
DBG("Added %d SSDT table(s) into XSDT\n", ssdt_count);
}
// Correct the checksum of XSDT
*/
rsdp_mod->XsdtAddress=0xffffffffffffffffLL;
verbose("XSDT not found or incorrect\n");
DBG("XSDT not found or XSDT incorrect\n");
}
}
//verbose("Patched ACPI version %d DSDT\n", version+1);
if (version) {
/* XXX aserebln why uint32 cast if pointer is uint64 ? */
acpi20_p = (uint32_t)rsdp_mod;
acpi20_p = (uint64_t)(uint32_t)rsdp_mod;
addConfigurationTable(&gEfiAcpi20TableGuid, &acpi20_p, "ACPI_20");
} else {
/* XXX aserebln why uint32 cast if pointer is uint64 ? */
acpi10_p = (uint32_t)rsdp_mod;
acpi10_p = (uint64_t)(uint32_t)rsdp_mod;
addConfigurationTable(&gEfiAcpiTableGuid, &acpi10_p, "ACPI");
}
}
branches/ErmaC/Enoch/i386/libsaio/networking.c
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// { 0x0000, 0x0000, "Unknown" },
// 8169
// { 0x10EC, 0x8169, "Realtek 8169/8110 Gigabit Ethernet" },
{ 0x10EC, 0x8168, "Realtek RTL8111/8168 PCI Express Gigabit Ethernet" },
{ 0x10EC, 0x8168, "Realtek RTL8111/8168 PCI-E Gigabit Ethernet" },
// { 0x10EC, 0x8167, "Realtek 8169/8110 Gigabit Ethernet" },
{ 0x10EC, 0x8136, "Realtek RTL8101E/RTL8102E PCI Express Fast Ethernet Controller" },
{ 0x10EC, 0x8136, "Realtek RTL8101E/RTL8102E PCI-E Fast Ethernet Controller" },
// 8139
// { 0x10EC, 0x8139, "Realtek RTL8139/810x Family Fast Ethernet" },
// { 0x1186, 0x1300, "Realtek RTL8139/810x Family Fast Ethernet" },
// { 0x1113, 0x1211, "Realtek RTL8139/810x Family Fast Ethernet" },
{ 0x11AB, 0x4364, "Marvell Yukon Gigabit Adapter 88E8056 Singleport Copper SA" },
{ 0x11AB, 0x4320, "Marvell Yukon Gigabit Adapter 88E8001 Singleport Copper SA" },
{ 0x11AB, 0x4320, "Marvell Yukon Gigabit Adapter 88E8001 Singleport Copper SA" },
{ 0x11AB, 0x4364, "Marvell Yukon Gigabit Adapter 88E8056 Singleport Copper SA" },
// Broadcom 57XX
// { 0x14e4, 0x1600, "Broadcom 5751 Ethernet" },
// { 0x14e4, 0x1659, "Broadcom 57XX Ethernet" },
// { 0x14e4, 0x16B5, "BCM57785 Gigabit Ethernet PCIe" },
// { 0x14e4, 0x1712, "BCM5906 NetLink (TM) Fast Ethernet" },
// { 0x14e4, 0x1713, "BCM5906M NetLink (TM) Fast Ethernet" },
{ 0x1969, 0x1026, "Atheros AR8121/AR8113/AR8114 Ethernet" },
{ 0x1969, 0x1083, "Atheros GbE LAN chip (10/100/1000 Mbit)" },
{ 0x197B, 0x0250, "JMicron PCI Express Gigabit Ethernet Adapter (10/1000MBit)" },
// Intel 8255x Ethernet
// { 0x8086, 0x1051, "Intel 8255x Ethernet" },
// { 0x8086, 0x1050, "Intel 8255x Ethernet" },
// { 0x8086, 0x1029, "Intel 8255x Ethernet" },
// { 0x8086, 0x1030, "Intel 8255x Ethernet" },
{ 0x8086, 0x10CE, "Intel(R) 82567V-2 PCI Express Gigabit Network" },
{ 0x8086, 0x10CE, "Intel(R) 82567V-2 PCI-E Gigabit Network" },
{ 0x8086, 0x10D3, "Intel(R) 82574L Gigabit Network Connection" },
// { 0x8086, 0x1209, "Intel 8255x Ethernet" },
// { 0x8086, 0x1227, "Intel 8255x Ethernet" },
// { 0x8086, 0x1228, "Intel 8255x Ethernet" },
// { 0x8086, 0x1060, "Intel 8255x Ethernet" },
// Atheros AR8151 Ethernet
// { 0x1969, 0x1083, "Qualcomm Atheros AR8151 v2.0 Gigabit Ethernet" },
{ 0x1969, 0x1026, "Atheros AR8121/AR8113/AR8114 Ethernet" },
};
static network_device generic_ethernet_cards[] =
branches/ErmaC/Enoch/i386/libsaio/aml_generator.c
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case AML_CHUNK_DEVICE:
offset = aml_write_byte(AML_CHUNK_OP, buffer, offset);
offset = aml_write_byte(node->Type, buffer, offset);
offset = aml_write_size(node->Size-3, buffer, offset);
offset = aml_write_size(node->Size-2, buffer, offset);
offset = aml_write_buffer(node->Buffer, node->Length, buffer, offset);
break;
branches/ErmaC/Enoch/i386/libsaio/cpu.c
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pollCount = poll_PIT2_gate();
tscEnd = rdtsc64();
/* The poll loop must have run at least a few times for accuracy */
if (pollCount <= 1)
{
if (pollCount <= 1) {
continue;
}
/* The TSC must increment at LEAST once every millisecond.
* We should have waited exactly 30 msec so the TSC delta should
* be >= 30. Anything less and the processor is way too slow.
*/
if ((tscEnd - tscStart) <= CALIBRATE_TIME_MSEC)
{
if ((tscEnd - tscStart) <= CALIBRATE_TIME_MSEC) {
continue;
}
// tscDelta = MIN(tscDelta, (tscEnd - tscStart))
if ( (tscEnd - tscStart) < tscDelta )
{
if ( (tscEnd - tscStart) < tscDelta ) {
tscDelta = tscEnd - tscStart;
}
}
* arithmetic headroom. For now, 32-bit should be enough.
* Also unlike Linux, our compiler can do 64-bit integer arithmetic.
*/
if (tscDelta > (1ULL<<32))
{
if (tscDelta > (1ULL<<32)) {
retval = 0;
}
else
{
} else {
retval = tscDelta * 1000 / 30;
}
disable_PIT2();
pollCount = poll_PIT2_gate();
aperfEnd = rdmsr64(MSR_AMD_APERF);
/* The poll loop must have run at least a few times for accuracy */
if (pollCount <= 1)
{
if (pollCount <= 1) {
continue;
}
/* The TSC must increment at LEAST once every millisecond.
* We should have waited exactly 30 msec so the APERF delta should
* be >= 30. Anything less and the processor is way too slow.
*/
if ((aperfEnd - aperfStart) <= CALIBRATE_TIME_MSEC)
{
if ((aperfEnd - aperfStart) <= CALIBRATE_TIME_MSEC) {
continue;
}
// tscDelta = MIN(tscDelta, (tscEnd - tscStart))
if ( (aperfEnd - aperfStart) < aperfDelta )
{
if ( (aperfEnd - aperfStart) < aperfDelta ) {
aperfDelta = aperfEnd - aperfStart;
}
}
* a timespan of 0.03 s (e.g. 30 milliseconds)
*/
if (aperfDelta > (1ULL<<32))
{
if (aperfDelta > (1ULL<<32)) {
retval = 0;
}
else
{
} else {
retval = aperfDelta * 1000 / 30;
}
disable_PIT2();
/* Clear bit 16 (evidently the presence bit) */
wrmsr64(MSR_FLEX_RATIO, (msr & 0xFFFFFFFFFFFEFFFFULL));
msr = rdmsr64(MSR_FLEX_RATIO);
verbose("Unusable flex ratio detected. Patched MSR now %08x\n", bitfield(msr, 31, 0));
DBG("Unusable flex ratio detected. Patched MSR now %08x\n", bitfield(msr, 31, 0));
} else {
if (bus_ratio_max > flex_ratio) {
bus_ratio_max = flex_ratio;
msr = rdmsr64(K10_COFVID_STATUS);
do_cpuid2(0x00000006, 0, p->CPU.CPUID[CPUID_6]);
// EffFreq: effective frequency interface
if (bitfield(p->CPU.CPUID[CPUID_6][2], 0, 0) == 1)
{
if (bitfield(p->CPU.CPUID[CPUID_6][2], 0, 0) == 1) {
//uint64_t mperf = measure_mperf_frequency();
uint64_t aperf = measure_aperf_frequency();
cpuFrequency = aperf;
branches/ErmaC/Enoch/i386/libsaio/platform.h
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uint32_tNoCores;// No Cores per Package
uint32_tNoThreads;// Threads per Package
uint8_tMaxCoef;// Max Multiplier
uint8_tMaxDiv;
uint8_tMaxDiv;// Min Multiplier
uint8_tCurrCoef;// Current Multiplier
uint8_tCurrDiv;
uint64_tTSCFrequency;// TSC Frequency Hz
uint64_tFSBFrequency;// FSB Frequency Hz
uint64_tCPUFrequency;// CPU Frequency Hz
uint64_tTSCFrequency;// TSC Frequency Hz
uint64_tFSBFrequency;// FSB Frequency Hz
uint64_tCPUFrequency;// CPU Frequency Hz
uint32_tMaxRatio;// Max Bus Ratio
uint32_tMinRatio;// Min Bus Ratio
charBrandString[48];// 48 Byte Branding String
uint32_tCPUID[CPUID_MAX][4];// CPUID 0..4, 80..81 Raw Values
charBrandString[48];// 48 Byte Branding String
uint32_tCPUID[CPUID_MAX][4];// CPUID 0..4, 80..81 Raw Values
} CPU;
struct RAM {
branches/ErmaC/Enoch/i386/libsaio/smbios.c
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// if (platformCPUFeature(CPU_FEATURE_MOBILE)) Bungo: doesn't recognise correctly
if (PlatformType == 2) // this method works
{
if (Platform.CPU.NoCores > 1)
{
if (Platform.CPU.NoCores > 1) {
defaultSystemInfo.productName = kDefaultMacBookPro;
defaultBIOSInfo.version = kDefaultMacBookProBIOSVersion;
defaultBIOSInfo.releaseDate = kDefaultMacBookProBIOSReleaseDate;
defaultBaseBoard.product = kDefaultMacBookProBoardProduct;
defaultBaseBoard.boardType = kSMBBaseBoardMotherboard;
defaultChassis.chassisType = kSMBchassisUnknown;
}
else
{
} else {
defaultSystemInfo.productName = kDefaultMacBook;
defaultBIOSInfo.version = kDefaultMacBookBIOSVersion;
defaultBIOSInfo.releaseDate = kDefaultMacBookBIOSReleaseDate;
defaultBaseBoard.boardType = kSMBBaseBoardMotherboard;
defaultChassis.chassisType = kSMBchassisUnknown;
}
}
else
{
} else {
switch (Platform.CPU.NoCores)
{
case 1:
if (getValueForKey(SMBSetters[idx].keyString, &string, &len, SMBPlist))
{
break;
}
else
{
} else {
if (structPtr->orig->type == kSMBTypeMemoryDevice)// MemoryDevice only
{
if (getSMBValueForKey(structPtr->orig, SMBSetters[idx].keyString, &string, NULL))
free(structPtr);
decodeSMBIOSTable(neweps);
DBG("SMBIOS orig was = %x\n", origeps);
DBG("SMBIOS new is = %x\n", neweps);
}
void *getSmbios(int which)
branches/ErmaC/Enoch/i386/libsaio/smbios_decode.c
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// Bungo:
#define NotSpecifiedStr "Not Specified" // no string
#define OutOfSpecStr "<OUT OF SPEC>" // value out of smbios spec. range
#define out_of_spec "<OUT OF SPEC>" // value out of smbios spec. range
#define PrivateStr "** PRIVATE **" // masking private data
#define alwaysMask true
#define neverMask false
void decodeSystemInformation(SMBSystemInformation *structHeader)
{
DBG("System Information:\n");
if (structHeader->header.length < 0x08) {
return;
}
DBG("\tManufacturer: %s\n", SMBStringForField((SMBStructHeader *)structHeader, structHeader->manufacturer, neverMask));
DBG("\tProduct Name: %s\n", SMBStringForField((SMBStructHeader *)structHeader, structHeader->productName, neverMask));
DBG("\tVersion: %s\n", SMBStringForField((SMBStructHeader *)structHeader, structHeader->version, neverMask));
DBG("\tSerial Number: %s\n", SMBStringForField((SMBStructHeader *)structHeader, structHeader->serialNumber, privateData));
if (minorVersion < 1 || structHeader->header.length < 25) {
if (minorVersion < 0x01 || structHeader->header.length < 0x19) {
return;
}
}
if (structHeader->wakeupReason > 8) {
DBG("\tWake-up Type: %s\n", OutOfSpecStr);
DBG("\tWake-up Type: %s\n", out_of_spec);
} else {
DBG("\tWake-up Type: %s\n", SMBWakeUpTypes[structHeader->wakeupReason]);
}
if (minorVersion < 4 || structHeader->header.length < 27) {
if (minorVersion < 0x04 || structHeader->header.length < 0x1B) {
return;
}
void decodeBaseBoard(SMBBaseBoard *structHeader)
{
DBG("Base Board Information:\n");
if (structHeader->header.length < 0x08) {
return;
}
DBG("\tManufacturer: %s\n", SMBStringForField((SMBStructHeader *)structHeader, structHeader->manufacturer, neverMask));
DBG("\tProduct Name: %s\n", SMBStringForField((SMBStructHeader *)structHeader, structHeader->product, neverMask));
DBG("\tVersion: %s\n", SMBStringForField((SMBStructHeader *)structHeader, structHeader->version, neverMask));
DBG("\tLocation In Chassis: %s\n", SMBStringForField((SMBStructHeader *)structHeader, structHeader->locationInChassis, neverMask)); // Part Component
// Chassis Handle (WORD)
if ((structHeader->boardType < kSMBBaseBoardUnknown) || (structHeader->boardType > kSMBBaseBoardInterconnect)) {
DBG("\tType: %s\n", OutOfSpecStr);
DBG("\tType: %s\n", out_of_spec);
} else {
DBG("\tType: %s\n", SMBBaseBoardTypes[(structHeader->boardType - 1)]);
}
void decodeSystemEnclosure(SMBSystemEnclosure *structHeader)
{
DBG("Chassis Information:\n");
if (structHeader->header.length < 0x09) {
return;
}
DBG("\tManufacturer: %s\n", SMBStringForField((SMBStructHeader *)structHeader, structHeader->manufacturer, neverMask));
// DBG("\tType: 0x%X\n", structHeader->chassisType);
if ((structHeader->chassisType < kSMBchassisOther) || (structHeader->chassisType > kSMBchassisBladeEnclosing)) {
DBG("\tType: %s\n", OutOfSpecStr);
DBG("\tType: %s\n", out_of_spec);
} else {
DBG("\tType: %s\n", SMBChassisTypes[(structHeader->chassisType - 1)]);
}
void decodeProcessorInformation(SMBProcessorInformation *structHeader)
{
DBG("Processor Information:\n");
if (structHeader->header.length < 0x1A) {
return;
}
DBG("\tSocket Designation: %s\n", SMBStringForField((SMBStructHeader *)structHeader, structHeader->socketDesignation, neverMask));
DBG("\tType: %d\n", structHeader->processorType);
DBG("\tFamily: 0x%X\n", structHeader->processorFamily);
DBG("\tMaximum Clock: %dMHz\n", structHeader->maximumClock);
DBG("\tCurrent Clock: %dMHz\n", structHeader->currentClock);
if (minorVersion < 3 || structHeader->header.length < 35) {
if (minorVersion < 0x03 || structHeader->header.length < 0x23) {
return;
}
DBG("\tSerial Number: %s\n", SMBStringForField((SMBStructHeader *)structHeader, structHeader->serialNumber, privateData));
DBG("\tAsset Tag: %s\n", SMBStringForField((SMBStructHeader *)structHeader, structHeader->assetTag, neverMask));
DBG("\tPart Number: %s\n", SMBStringForField((SMBStructHeader *)structHeader, structHeader->partNumber, neverMask));
//DBG("\tProcessor Family 2: %d\n", structHeader->processorFamily2);
DBG("\tSerial Number: %s\n", SMBStringForField((SMBStructHeader *)structHeader, structHeader->serialNumber, privateData)); // 20
DBG("\tAsset Tag: %s\n", SMBStringForField((SMBStructHeader *)structHeader, structHeader->assetTag, neverMask)); // 21
DBG("\tPart Number: %s\n", SMBStringForField((SMBStructHeader *)structHeader, structHeader->partNumber, neverMask)); // 22
DBG("\tCore Count: %d\n", structHeader->coreCount); // 23
DBG("\tCore Enabled: %d\n", structHeader->coreEnabled); // 24
DBG("\tThread Count: %d\n", structHeader->threadCount); // 25
//DBG("\tProcessor Family 2: %d\n", structHeader->processorFamily2); //26
DBG("\n");
}
//void decodeMemoryModule(SMBMemoryModule *structHeader)
//{
//DBG("Memory Module Information:\n");
//if (structHeader->header.length < 0x0C) {
// return;
//}
//DBG("\tSocket Designation: %s\n", getSMBStringForField((SMBStructHeader *)structHeader, structHeader->socketDesignation));
//DBG("\tBank Connections: Type: %d\n", structHeader->bankConnections);
//DBG("\tCurrent Speed: %X\n", structHeader->currentSpeed);
//void decodeSMBOEMStrings(SMBOEMStrings *structHeader)
//{
//DBG("OEM Strings:\n");
//if (structHeader->header.length < 0x05) {
//return;
//}
//DBG("\tString 1: %d\n"); //, structHeader->string1);
//DBG("\tString 2: %d\n"); //, structHeader->string1);
//DBG("\tString 3: %d\n"); //, structHeader->string1);
void decodeMemoryDevice(SMBMemoryDevice *structHeader)
{
DBG("Memory Device:\n");
if (structHeader->header.length < 0x15) {
return;
}
DBG("\tDevice Locator: %s\n", SMBStringForField((SMBStructHeader *)structHeader, structHeader->deviceLocator, neverMask));
DBG("\tBank Locator: %s\n", SMBStringForField((SMBStructHeader *)structHeader, structHeader->bankLocator, neverMask));
DBG("\tMemory Type: %s\n", SMBMemoryDeviceTypes[structHeader->memoryType]);
if (minorVersion < 3 || structHeader->header.length < 27) {
if (structHeader->memoryType > kSMBMemoryDeviceTypeCount) {
DBG("\tMemory Type: %s\n", out_of_spec);
} else {
DBG("\tMemory Type: %s\n", SMBMemoryDeviceTypes[structHeader->memoryType]);
}
if (minorVersion < 0x03 || structHeader->header.length < 0x1B) {
return;
}
DBG("\tSpeed: %d MHz\n", structHeader->memorySpeed);
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SMBString serialNumber;
SMBString assetTag;
SMBString partNumber;
// 2.5+ spec
//SMBByte coreCount;
//SMBByte coreEnabled;
//SMBByte threadCount;
// 2.5+ spec (38 bytes)
SMBByte coreCount;
SMBByte coreEnabled;
SMBByte threadCount;
//SMBWord processorCharacteristics;
// 2.6+ spec
//SMBWord processorFamily2;
Memory Controller Information (Type 5) Obsoleted since SMBIOS version 2.1
========================================================================= */
typedef struct SMBMemoryControllerInfo {
SMB_STRUCT_HEADER
SMBByteerrorDetectingMethod;
SMBByteerrorCorrectingCapability;
SMBBytesupportedInterleave;
SMBBytecurrentInterleave;
SMBBytemaxMemoryModuleSize;
SMBWordsupportedSpeeds;
SMBWordsupportedMemoryTypes;
SMBBytememoryModuleVoltage;
SMBBytenumberOfMemorySlots;
} __attribute__((packed)) SMBMemoryControllerInfo;
/* ===================================================================
Memory Module Information (Type 6) Obsoleted since SMBIOS version 2.1
===================================================================== */
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value->word = 0;
break;
default:
value->word = (uint16_t)(Platform.CPU.FSBFrequency/1000000);
value->word = (uint16_t)(Platform.CPU.FSBFrequency/1000000LL);
}
}
break;
default:
value->word = (uint16_t)(Platform.CPU.FSBFrequency/1000000);
value->word = (uint16_t)(Platform.CPU.FSBFrequency/1000000LL);
}
} else {
value->word = (uint16_t)(Platform.CPU.FSBFrequency/1000000);
value->word = (uint16_t)(Platform.CPU.FSBFrequency/1000000LL);
}
return true;
bool getProcessorInformationMaximumClock(returnType *value)
{
value->word = (uint16_t)(Platform.CPU.CPUFrequency/1000000);
value->word = (uint16_t)(Platform.CPU.CPUFrequency/1000000LL);
return true;
}
qpimult = pci_config_read32(PCIADDR(nhm_bus, 2, 1), 0x50);
qpimult &= 0x7F;
DBG("qpimult %d\n", qpimult);
qpibusspeed = (qpimult * 2 * (Platform.CPU.FSBFrequency/1000000));
qpibusspeed = (qpimult * 2 * (Platform.CPU.FSBFrequency/1000000LL));
// Rek: rounding decimals to match original mac profile info
if (qpibusspeed%100 != 0) {
qpibusspeed = ((qpibusspeed+50)/100)*100;
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vector8_t *vector8_new(size_t size, uint8_t value)
{
vector8_t *p = png_alloc_malloc(sizeof (vector8_t));
if(!p)
{
if(!p) {
return NULL;
}
vector8_init(p);
if (size && !vector8_resizev(p, size, value))
{
if (size && !vector8_resizev(p, size, value)) {
vector8_cleanup(p);
png_alloc_free(p);
return NULL;
{
vector8_t *q = vector8_new(p->size, 0);
uint32_t n;
if (!q)
{
if (!q) {
return NULL;
}
for (n = 0; n < q->size; n++)
return;
}
else if (code <= 255) { // literal symbol
if (*pos >= out->size)
{
if (*pos >= out->size) {
vector8_resize(out, (*pos + 1) * 2); // reserve more room
}
out->data[(*pos)++] = (uint8_t) code;
uint32_t bitDepth, colorType;
bitDepth = info->bitDepth;
colorType = info->colorType;
if (colorType == 2)
{
if (colorType == 2) {
return (3 * bitDepth);
}
else if (colorType >= 4)
{
} else if (colorType >= 4) {
return (colorType - 2) * bitDepth;
}
else
{
} else {
return bitDepth;
}
}
PNG_info_t *PNG_info_new()
{
PNG_info_t *info = png_alloc_malloc(sizeof (PNG_info_t));
if (!info)
{
if (!info) {
return NULL;
}
uint32_t i;
}
info = PNG_info_new();
PNG_readPngHeader(info, in, size);
if (PNG_error)
if (PNG_error) {
return NULL;
}
size_t pos = 33; // first byte of the first chunk after the header
vector8_t *idat = NULL; // the data from idat chunks
bool IEND = false, known_type = true;
} else
idat = vector8_new(chunkLength, 0);
if (!idat)
{
if (!idat) {
PNG_error = 1;
return NULL;
}
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size = ReadFileAtOffset (image_filename, header, 0, sizeof(IOHibernateImageHeader));
printf("header read size %x\n", size);
imageSize = header->image1Size;
codeSize = header->restore1PageCount << 12;
if (kIOHibernateHeaderSignature != header->signature) {
}
}
#endif
allocSize = imageSize + ((4095 + sizeof(hibernate_graphics_t)) & ~4095);
mem_base = getmemorylimit() - allocSize;//TODO: lower this
printf("mem_base %x\n", mem_base);
if (((long long)mem_base + allocSize) < (1024 * bootInfo->extmem + 0x100000)) {
printf ("Not enough space to restore image. Press any key to proceed with normal boot.\n");
bcopy(header, (void *) mem_base, sizeof(IOHibernateImageHeader));
header = (IOHibernateImageHeader *) mem_base;
imageSize -= sizeof(IOHibernateImageHeader);
buffer = (long)(header + 1);
if (header->previewSize) {
uint64_t preview_offset = header->fileExtentMapSize - sizeof(header->fileExtentMap) + codeSize;
uint8_t progressSaveUnder[kIOHibernateProgressCount][kIOHibernateProgressSaveUnderSize];
ReadFileAtOffset (image_filename, (char *)buffer, sizeof(IOHibernateImageHeader), preview_offset+header->previewSize);
drawPreview ((void *)(long)(buffer+preview_offset + header->previewPageListSize), &(progressSaveUnder[0][0]));
previewTotalSectors = (imageSize-(preview_offset+header->previewSize))/512;
previewLoadedSectors = 0;
previewSaveunder = 0;
#if 0
AsereBLN:
check_vga_nvidia() didn't work as expected (recursion level > 0 & return value).
Unforutnaltely I cannot find a note why to switch back to text mode for nVidia cards only
and because it check_vga_nvidia does not work (cards normally are behind a bridge) I will
remove it completely
setVideoMode( VGA_TEXT_MODE, 0 );
//AsereBLN:
//check_vga_nvidia() didn't work as expected (recursion level > 0 & return value).
//Unforutnaltely I cannot find a note why to switch back to text mode for nVidia cards only
//and because it check_vga_nvidia does not work (cards normally are behind a bridge) I will
//remove it completely
//setVideoMode( VGA_TEXT_MODE, 0 );
#endif
} else {
ReadFileAtOffset (image_filename, (char *)buffer, sizeof(IOHibernateImageHeader), imageSize);
branches/ErmaC/Enoch/i386/boot2/boot.h
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/* ErmaC: added these keys */
#define kEnableDualLink"EnableDualLink"/* ati.c && nvidia.c && gma.c*/
#define kNvidiaGeneric"NvidiaGeneric"/* nvidia.c */
#define kSkipIntelGfx"SkipIntelGfx"/* pci_setup.c */
#define kSkipNvidiaGfx"SkipNvidiaGfx"/* pci_setup.c */
#define kSkipAtiGfx"SkipAtiGfx"/* pci_setup.c */
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#include "libsa.h"
static void
PreviewDecompress16(uint32_t * compressBuffer,
uint32_t width, uint32_t height, uint32_t row,
uint16_t * output);
static void
PreviewDecompress32(uint32_t * compressBuffer,
uint32_t width, uint32_t height, uint32_t row,
uint32_t * output);
static void
PreviewDecompress16(uint32_t * compressBuffer,
uint32_t width, uint32_t height, uint32_t row,
uint16_t * output)
uint32_t width, uint32_t height, uint32_t row,
uint16_t * output)
{
int i, j;
uint32_t * input;
uint16_t * sc0 = malloc((width+2) * sizeof(uint16_t));
uint16_t * sc1 = malloc((width+2) * sizeof(uint16_t));
uint16_t * sc2 = malloc((width+2) * sizeof(uint16_t));
uint16_t * sc3 = malloc((width+2) * sizeof(uint16_t));
uint32_t sr0, sr1, sr2, sr3;
int i, j;
uint32_t * input;
bzero(sc0, (width+2) * sizeof(uint16_t));
bzero(sc1, (width+2) * sizeof(uint16_t));
bzero(sc2, (width+2) * sizeof(uint16_t));
bzero(sc3, (width+2) * sizeof(uint16_t));
uint16_t * sc0 = malloc((width+2) * sizeof(uint16_t));
uint16_t * sc1 = malloc((width+2) * sizeof(uint16_t));
uint16_t * sc2 = malloc((width+2) * sizeof(uint16_t));
uint16_t * sc3 = malloc((width+2) * sizeof(uint16_t));
uint32_t tmp1, tmp2, out;
for (j = 0; j < (height + 2); j++)
{
input = compressBuffer;
if (j < height)
input += j;
else
input += height - 1;
input = (uint32_t *)(input[3] + ((uint8_t *)compressBuffer));
if (!sc0 || !sc1 || !sc2 || !sc3) {
return;
}
uint32_t data = 0, repeat = 0, fetch = 0, count = 0;
sr0 = sr1 = sr2 = sr3 = 0;
uint32_t sr0, sr1, sr2, sr3;
for (i = 0; i < (width + 2); i++)
{
if (i < width)
{
if (!count)
{
count = *input++;
repeat = (count & 0xff000000);
count ^= repeat;
fetch = true;
}
else
fetch = (0 == repeat);
bzero(sc0, (width+2) * sizeof(uint16_t));
bzero(sc1, (width+2) * sizeof(uint16_t));
bzero(sc2, (width+2) * sizeof(uint16_t));
bzero(sc3, (width+2) * sizeof(uint16_t));
uint32_t tmp1, tmp2, out;
for (j = 0; j < (height + 2); j++) {
input = compressBuffer;
if (j < height) {
input += j;
} else {
input += height - 1;
}
input = (uint32_t *)(input[3] + ((uint8_t *)compressBuffer));
uint32_t data = 0, repeat = 0, fetch = 0, count = 0;
sr0 = sr1 = sr2 = sr3 = 0;
for (i = 0; i < (width + 2); i++) {
if (i < width) {
if (!count) {
count = *input++;
repeat = (count & 0xff000000);
count ^= repeat;
fetch = true;
} else {
fetch = (0 == repeat);
}
count--;
count--;
if (fetch)
{
if (fetch) {
data = *((uint16_t *)input);
(*((uint16_t *)input))++;
(*((uint16_t *)input))++;
// grayscale
// srgb 13933, 46871, 4732
// ntsc 19595, 38470, 7471
data = 13933 * (0x1f & (data >> 10))
+ 46871 * (0x1f & (data >> 5))
+ 4732 * (0x1f & data);
data >>= 13;
// 70% white, 30 % black
data *= 19661;
data += (103 << 16);
data >>= 16;
}
}
// grayscale
// srgb 13933, 46871, 4732
// ntsc 19595, 38470, 7471
data = 13933 * (0x1f & (data >> 10))
+ 46871 * (0x1f & (data >> 5))
+ 4732 * (0x1f & data);
data >>= 13;
// gauss blur
tmp2 = sr0 + data;
sr0 = data;
tmp1 = sr1 + tmp2;
sr1 = tmp2;
tmp2 = sr2 + tmp1;
sr2 = tmp1;
tmp1 = sr3 + tmp2;
sr3 = tmp2;
tmp2 = sc0[i] + tmp1;
sc0[i] = tmp1;
tmp1 = sc1[i] + tmp2;
sc1[i] = tmp2;
tmp2 = sc2[i] + tmp1;
sc2[i] = tmp1;
out = (128 + sc3[i] + tmp2) >> 11;
sc3[i] = tmp2;
// 70% white, 30 % black
data *= 19661;
data += (103 << 16);
data >>= 16;
}
}
out &= 0x1f;
if ((i > 1) && (j > 1))
output[i-2] = out | (out << 5) | (out << 10);
}
// gauss blur
tmp2 = sr0 + data;
sr0 = data;
tmp1 = sr1 + tmp2;
sr1 = tmp2;
tmp2 = sr2 + tmp1;
sr2 = tmp1;
tmp1 = sr3 + tmp2;
sr3 = tmp2;
tmp2 = sc0[i] + tmp1;
sc0[i] = tmp1;
tmp1 = sc1[i] + tmp2;
sc1[i] = tmp2;
tmp2 = sc2[i] + tmp1;
sc2[i] = tmp1;
out = (128 + sc3[i] + tmp2) >> 11;
sc3[i] = tmp2;
if (j > 1)
output += row;
}
free(sc3);
free(sc2);
free(sc1);
free(sc0);
out &= 0x1f;
if ((i > 1) && (j > 1)) {
output[i-2] = out | (out << 5) | (out << 10);
}
}
if (j > 1) {
output += row;
}
}
free(sc3);
free(sc2);
free(sc1);
free(sc0);
}
static void
PreviewDecompress32(uint32_t * compressBuffer,
uint32_t width, uint32_t height, uint32_t row,
uint32_t * output)
uint32_t width, uint32_t height, uint32_t row,
uint32_t * output)
{
int i, j;
uint32_t * input;
int i, j;
uint32_t * input;
uint16_t * sc0 = malloc((width+2) * sizeof(uint16_t));
uint16_t * sc1 = malloc((width+2) * sizeof(uint16_t));
uint16_t * sc2 = malloc((width+2) * sizeof(uint16_t));
uint16_t * sc3 = malloc((width+2) * sizeof(uint16_t));
uint32_t sr0, sr1, sr2, sr3;
uint16_t * sc0 = malloc((width+2) * sizeof(uint16_t));
uint16_t * sc1 = malloc((width+2) * sizeof(uint16_t));
uint16_t * sc2 = malloc((width+2) * sizeof(uint16_t));
uint16_t * sc3 = malloc((width+2) * sizeof(uint16_t));
bzero(sc0, (width+2) * sizeof(uint16_t));
bzero(sc1, (width+2) * sizeof(uint16_t));
bzero(sc2, (width+2) * sizeof(uint16_t));
bzero(sc3, (width+2) * sizeof(uint16_t));
if (!sc0 || !sc1 || !sc2 || !sc3) {
return;
}
uint32_t tmp1, tmp2, out;
for (j = 0; j < (height + 2); j++)
{
input = compressBuffer;
if (j < height)
input += j;
else
input += height - 1;
input = (uint32_t *)(input[3] + ((uint8_t *)compressBuffer));
uint32_t sr0, sr1, sr2, sr3;
uint32_t data = 0, repeat = 0, fetch = 0, count = 0;
sr0 = sr1 = sr2 = sr3 = 0;
bzero(sc0, (width+2) * sizeof(uint16_t));
bzero(sc1, (width+2) * sizeof(uint16_t));
bzero(sc2, (width+2) * sizeof(uint16_t));
bzero(sc3, (width+2) * sizeof(uint16_t));
for (i = 0; i < (width + 2); i++)
{
if (i < width)
{
if (!count)
{
count = *input++;
repeat = (count & 0xff000000);
count ^= repeat;
fetch = true;
}
else
fetch = (0 == repeat);
count--;
if (fetch)
{
data = *input++;
// grayscale
// srgb 13933, 46871, 4732
// ntsc 19595, 38470, 7471
data = 13933 * (0xff & (data >> 24))
+ 46871 * (0xff & (data >> 16))
+ 4732 * (0xff & data);
data >>= 16;
// 70% white, 30 % black
data *= 19661;
data += (103 << 16);
data >>= 16;
}
}
uint32_t tmp1, tmp2, out;
for (j = 0; j < (height + 2); j++) {
input = compressBuffer;
if (j < height) {
input += j;
} else {
input += height - 1;
}
input = (uint32_t *)(input[3] + ((uint8_t *)compressBuffer));
// gauss blur
tmp2 = sr0 + data;
sr0 = data;
tmp1 = sr1 + tmp2;
sr1 = tmp2;
tmp2 = sr2 + tmp1;
sr2 = tmp1;
tmp1 = sr3 + tmp2;
sr3 = tmp2;
tmp2 = sc0[i] + tmp1;
sc0[i] = tmp1;
tmp1 = sc1[i] + tmp2;
sc1[i] = tmp2;
tmp2 = sc2[i] + tmp1;
sc2[i] = tmp1;
out = (128 + sc3[i] + tmp2) >> 8;
sc3[i] = tmp2;
uint32_t data = 0, repeat = 0, fetch = 0, count = 0;
sr0 = sr1 = sr2 = sr3 = 0;
out &= 0xff;
if ((i > 1) && (j > 1))
output[i-2] = out | (out << 8) | (out << 16);
}
for (i = 0; i < (width + 2); i++) {
if (i < width) {
if (!count) {
count = *input++;
repeat = (count & 0xff000000);
count ^= repeat;
fetch = true;
} else {
fetch = (0 == repeat);
}
if (j > 1)
output += row;
}
count--;
free(sc3);
free(sc2);
free(sc1);
free(sc0);
if (fetch) {
data = *input++;
// grayscale
// srgb 13933, 46871, 4732
// ntsc 19595, 38470, 7471
data = 13933 * (0xff & (data >> 24))
+ 46871 * (0xff & (data >> 16))
+ 4732 * (0xff & data);
data >>= 16;
// 70% white, 30 % black
data *= 19661;
data += (103 << 16);
data >>= 16;
}
}
// gauss blur
tmp2 = sr0 + data;
sr0 = data;
tmp1 = sr1 + tmp2;
sr1 = tmp2;
tmp2 = sr2 + tmp1;
sr2 = tmp1;
tmp1 = sr3 + tmp2;
sr3 = tmp2;
tmp2 = sc0[i] + tmp1;
sc0[i] = tmp1;
tmp1 = sc1[i] + tmp2;
sc1[i] = tmp2;
tmp2 = sc2[i] + tmp1;
sc2[i] = tmp1;
out = (128 + sc3[i] + tmp2) >> 8;
sc3[i] = tmp2;
out &= 0xff;
if ((i > 1) && (j > 1)) {
output[i-2] = out | (out << 8) | (out << 16);
}
}
if (j > 1) {
output += row;
}
}
free(sc3);
free(sc2);
free(sc1);
free(sc0);
}
void *
DecompressData(void *srcbase, int *dw, int *dh, int *bitsPerPixel)
{
uint32_t * src = (uint32_t *) srcbase;
uint32_t * src = (uint32_t *) srcbase, size;
void * ret;
*bitsPerPixel = 8 * ((int) src[0]);
*bitsPerPixel = 8 * ((int) src[0]);
*dw = (int) src[1];
*dh = (int) src[2];
ret = malloc ((*dw * *dh * *bitsPerPixel)/ 8);
size = (*dw * *dh * *bitsPerPixel)/ 8;
if (!size) {
return 0;
}
switch(*bitsPerPixel)
{
case 32:
PreviewDecompress32((uint32_t *)srcbase, *dw, *dh, *dw, ret);
return ret;
case 16:
PreviewDecompress16((uint32_t *)srcbase, *dw, *dh, *dw, ret);
return ret;
default:
ret = malloc (size);
if (!ret) {
return 0;
}
}
bzero(ret, size);
switch(*bitsPerPixel) {
case 32:
PreviewDecompress32((uint32_t *)srcbase, *dw, *dh, *dw, ret);
break;
case 16:
PreviewDecompress16((uint32_t *)srcbase, *dw, *dh, *dw, ret);
break;
default:
free(ret);
ret = 0;
break;
}
return ret;
}
branches/ErmaC/Enoch/i386/boot2/IOHibernatePrivate.h
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* unlawful or unlicensed copies of an Apple operating system, or to
* circumvent, violate, or enable the circumvention or violation of, any
* terms of an Apple operating system software license agreement.
*
*
* Please obtain a copy of the License at
* http://www.opensource.apple.com/apsl/ and read it before using this file.
*
*
* The Original Code and all software distributed under the License are
* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
* Please see the License for the specific language governing rights and
* limitations under the License.
*
*
* @APPLE_OSREFERENCE_LICENSE_HEADER_END@
*/
{
uint64_timageSize;
uint64_timage1Size;
uint32_trestore1CodePage;
uint32_trestore1PageCount;
uint32_trestore1CodeOffset;
uint32_trestore1StackOffset;
uint32_tpageCount;
uint32_tbitmapSize;
uint32_truntimePageCount;
uint8_treserved2[16];
uint64_tencryptStart;
uint64_tmachineSignature;
static const uint8_t gIOHibernateProgressAlpha\
[kIOHibernateProgressHeight][kIOHibernateProgressWidth] = \
{\
{ 0x00,0x63,0xd8,0xf0,0xd8,0x63,0x00 },\
{ 0x51,0xff,0xff,0xff,0xff,0xff,0x51 },\
{ 0xae,0xff,0xff,0xff,0xff,0xff,0xae },\
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },\
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },\
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },\
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },\
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },\
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },\
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },\
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },\
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },\
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },\
{ 0xae,0xff,0xff,0xff,0xff,0xff,0xae },\
{ 0x54,0xff,0xff,0xff,0xff,0xff,0x54 },\
{ 0x00,0x66,0xdb,0xf3,0xdb,0x66,0x00 }\
{ 0x00,0x63,0xd8,0xf0,0xd8,0x63,0x00 },\
{ 0x51,0xff,0xff,0xff,0xff,0xff,0x51 },\
{ 0xae,0xff,0xff,0xff,0xff,0xff,0xae },\
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },\
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },\
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },\
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },\
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },\
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },\
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },\
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },\
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },\
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },\
{ 0xae,0xff,0xff,0xff,0xff,0xff,0xae },\
{ 0x54,0xff,0xff,0xff,0xff,0xff,0x54 },\
{ 0x00,0x66,0xdb,0xf3,0xdb,0x66,0x00 }\
};
#ifdef KERNEL
hibernate_set_page_state(hibernate_page_list_t * page_list, hibernate_page_list_t * page_list_wired,
vm_offset_t ppnum, vm_offset_t count, uint32_t kind);
void
void
hibernate_page_bitset(hibernate_page_list_t * list, boolean_t set, uint32_t page);
boolean_t
boolean_t
hibernate_page_bittst(hibernate_page_list_t * list, uint32_t page);
hibernate_bitmap_t *

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Revision: 2347