Chameleon

Chameleon Commit Details

Date:2014-01-27 16:17:21 (5 years 4 months ago)
Author:ErmaC
Commit:2350
Parents: 2349
Message:remove duplicated define.
Changes:
M/trunk/i386/libsaio/cpu.c
M/trunk/i386/libsaio/cpu.h

File differences

trunk/i386/libsaio/cpu.c
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pollCount = poll_PIT2_gate();
tscEnd = rdtsc64();
/* The poll loop must have run at least a few times for accuracy */
if (pollCount <= 1)
{
if (pollCount <= 1) {
continue;
}
/* The TSC must increment at LEAST once every millisecond.
* We should have waited exactly 30 msec so the TSC delta should
* be >= 30. Anything less and the processor is way too slow.
*/
if ((tscEnd - tscStart) <= CALIBRATE_TIME_MSEC)
{
if ((tscEnd - tscStart) <= CALIBRATE_TIME_MSEC) {
continue;
}
// tscDelta = MIN(tscDelta, (tscEnd - tscStart))
if ( (tscEnd - tscStart) < tscDelta )
{
if ( (tscEnd - tscStart) < tscDelta ) {
tscDelta = tscEnd - tscStart;
}
}
* arithmetic headroom. For now, 32-bit should be enough.
* Also unlike Linux, our compiler can do 64-bit integer arithmetic.
*/
if (tscDelta > (1ULL<<32))
{
if (tscDelta > (1ULL<<32)) {
retval = 0;
}
else
{
} else {
retval = tscDelta * 1000 / 30;
}
disable_PIT2();
pollCount = poll_PIT2_gate();
aperfEnd = rdmsr64(MSR_AMD_APERF);
/* The poll loop must have run at least a few times for accuracy */
if (pollCount <= 1)
{
if (pollCount <= 1) {
continue;
}
/* The TSC must increment at LEAST once every millisecond.
* We should have waited exactly 30 msec so the APERF delta should
* be >= 30. Anything less and the processor is way too slow.
*/
if ((aperfEnd - aperfStart) <= CALIBRATE_TIME_MSEC)
{
if ((aperfEnd - aperfStart) <= CALIBRATE_TIME_MSEC) {
continue;
}
// tscDelta = MIN(tscDelta, (tscEnd - tscStart))
if ( (aperfEnd - aperfStart) < aperfDelta )
{
if ( (aperfEnd - aperfStart) < aperfDelta ) {
aperfDelta = aperfEnd - aperfStart;
}
}
* a timespan of 0.03 s (e.g. 30 milliseconds)
*/
if (aperfDelta > (1ULL<<32))
{
if (aperfDelta > (1ULL<<32)) {
retval = 0;
}
else
{
} else {
retval = aperfDelta * 1000 / 30;
}
disable_PIT2();
msr = rdmsr64(K10_COFVID_STATUS);
do_cpuid2(0x00000006, 0, p->CPU.CPUID[CPUID_6]);
// EffFreq: effective frequency interface
if (bitfield(p->CPU.CPUID[CPUID_6][2], 0, 0) == 1)
{
if (bitfield(p->CPU.CPUID[CPUID_6][2], 0, 0) == 1) {
//uint64_t mperf = measure_mperf_frequency();
uint64_t aperf = measure_aperf_frequency();
cpuFrequency = aperf;
trunk/i386/libsaio/cpu.h
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#define CPU_STRING_UNKNOWN"Unknown CPU Type"
#defineMSR_IA32_PERF_STATUS0x00000198
#define MSR_IA32_PERF_CONTROL0x199
#define MSR_IA32_EXT_CONFIG0x00EE
#define MSR_FLEX_RATIO0x194
#define MSR_TURBO_RATIO_LIMIT0x1AD
#defineMSR_PLATFORM_INFO0xCE
#define MSR_CORE_THREAD_COUNT0x35// Undocumented
#define MSR_IA32_PLATFORM_ID0x17
/*
* The CPUID_FEATURE_XXX values define 64-bit values
* returned in %ecx:%edx to a CPUID request with %eax of 1:

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Revision: 2350