Chameleon

Chameleon Commit Details

Date:2014-01-31 17:17:12 (10 years 2 months ago)
Author:Bungo
Commit:2363
Parents: 2362
Message:SMBIOS: fixing cpu-type, reverted space char removing at the end of strings but only for MemoryDevise's strings to prevent Error in SysProf Memory section, some new readouts in bdmesg
Changes:
M/branches/Bungo/i386/libsaio/platform.h
M/branches/Bungo/i386/libsaio/smbios_getters.c
M/branches/Bungo/i386/boot2/IOHibernatePrivate.h
M/branches/Bungo/i386/libsaio/smbios.c
M/branches/Bungo/i386/libsaio/smbios_decode.c
M/branches/Bungo/i386/libsaio/smbios.h
M/branches/Bungo/i386/libsaio/acpi_patcher.c
M/branches/Bungo/i386/boot2/resume.c

File differences

branches/Bungo/i386/libsaio/acpi_patcher.c
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␉addConfigurationTable(&gEfiAcpiTableGuid, &acpi10_p, "ACPI");␊
␉if(acpi20_p) {␊
␉␉addConfigurationTable(&gEfiAcpi20TableGuid, &acpi20_p, "ACPI_20");␊
␉} else {␊
␉␉verbose("No ACPI 2.\n");␊
␉}␊
␉return 1;␊
}␊
␉␉␉DBG("New checksum %d at %x\n", rsdt_mod->Checksum,rsdt_mod);␊
␉␉} else {␊
␉␉␉rsdp_mod->RsdtAddress=0;␊
␉␉␉printf("RSDT not found or incorrect\n");␊
␉␉␉printf("RSDT not found or RSDT incorrect\n");␊
␉␉}␊
␊
␉␉if (version) {␊
branches/Bungo/i386/libsaio/platform.h
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#define CPUID_88␉␉␉9␊
#define CPUID_MAX␉␉␉10␊
␊
#define CPU_MODEL_PRESCOTT␉␉0x03␉␉␉// Celeron D, Pentium 4 (90nm)␊
#define CPU_MODEL_NOCONA␉␉0x04␉␉␉// Xeon Nocona, Irwindale (90nm)␊
#define CPU_MODEL_PRESLER␉␉0x06␉␉␉// Pentium 4, Pentium D (65nm)␊
#define CPU_MODEL_PENTIUM_M␉␉0x09␉␉␉// Banias␊
#define CPU_MODEL_DOTHAN␉␉0x0D␉␉␉// Dothan␊
#define CPU_MODEL_YONAH␉␉␉0x0E␉␉␉// Sossaman, Yonah␊
#define CPU_MODEL_MEROM␉␉␉0x0F␉␉␉// Allendale, Conroe, Kentsfield, Woodcrest, Clovertown, Tigerton, Merom␊
#define CPU_MODEL_CONROE␉␉0x0F␉␉␉// ␊
#define CPU_MODEL_CELERON␉␉0x16␉␉␉// ␊
#define CPU_MODEL_PENRYN␉␉0x17␉␉␉// Wolfdale, Yorkfield, Harpertown, Penryn␊
#define CPU_MODEL_WOLFDALE␉␉0x17␉␉␉// ␊
#define CPU_MODEL_NEHALEM␉␉0x1A␉␉␉// Bloomfield. Nehalem-EP, Nehalem-WS, Gainestown␊
#define CPU_MODEL_ATOM␉␉␉0x1C␉␉␉// Pineview␊
#define CPU_MODEL_XEON_MP␉␉0x1D␉␉␉// MP 7400␊
#define CPU_MODEL_FIELDS␉␉0x1E␉␉␉// Lynnfield, Clarksfield, Jasper Forest␊
#define CPU_MODEL_DALES␉␉␉0x1F␉␉␉// Havendale, Auburndale␊
#define CPU_MODEL_PENTIUM_M 0x09␉␉␉// Banias Pentium M (130nm)␊
#define CPU_MODEL_DOTHAN 0x0D␉␉␉// Dothan Pentium M, Celeron M (90nm)␊
#define CPU_MODEL_PRESCOTT 0x03␉␉␉// Celeron D, Pentium 4 (90nm)␊
#define CPU_MODEL_NOCONA 0x04␉␉␉// Xeon Nocona, Irwindale (90nm)␊
#define CPU_MODEL_PRESLER 0x06␉␉␉// Pentium 4, Pentium D (65nm)␊
#define CPU_MODEL_CELERON 0x16␉␉␉// Merom, Conroe (65nm)␊
#define CPU_MODEL_YONAH 0x0E␉␉␉// Sossaman, Yonah␊
#define CPU_MODEL_MEROM 0x0F␉␉␉// Allendale, Conroe, Kentsfield, Woodcrest, Clovertown, Tigerton, Merom␊
//#define CPU_MODEL_CONROE 0x0F␉␉␉//␊
#define CPU_MODEL_PENRYN 0x17␉␉␉// Wolfdale, Yorkfield, Harpertown, Penryn␊
// #define CPU_MODEL_WOLFDALE 0x17␉␉␉//␊
#define CPU_MODEL_NEHALEM 0x1A␉␉␉// Bloomfield. Nehalem-EP, Nehalem-WS, Gainestown␊
#define CPU_MODEL_ATOM 0x1C␉␉␉// Pineview␊
#define CPU_MODEL_XEON_MP 0x1D␉␉␉// MP 7400␊
#define CPU_MODEL_FIELDS 0x1E␉␉␉// Lynnfield, Clarksfield, Jasper Forest␊
#define CPU_MODEL_DALES 0x1F␉␉␉// Havendale, Auburndale␊
#define CPU_MODEL_DALES_32NM␉␉0x25␉␉␉// Clarkdale, Arrandale␊
#define CPU_MODEL_ATOM_SAN␉␉0x26␉␉␉// Lincroft␊
#define CPU_MODEL_LINCROFT␉␉0x27␉␉␉// ␊
#define CPU_MODEL_ATOM_SAN 0x26␉␉␉// Lincroft␊
#define CPU_MODEL_LINCROFT 0x27␉␉␉//␊
#define CPU_MODEL_SANDYBRIDGE␉␉0x2A␉␉␉// Sandy Bridge␊
#define CPU_MODEL_WESTMERE␉␉0x2C␉␉␉// Gulftown, Westmere-EP, Westmere-WS␊
#define CPU_MODEL_JAKETOWN␉␉0x2D␉␉␉// Sandy Bridge-E, Sandy Bridge-EP␊
#define CPU_MODEL_WESTMERE 0x2C␉␉␉// Gulftown, Westmere-EP, Westmere-WS␊
#define CPU_MODEL_JAKETOWN 0x2D␉␉␉// Sandy Bridge-E, Sandy Bridge-EP␊
#define CPU_MODEL_NEHALEM_EX␉␉0x2E␉␉␉// Beckton␊
#define CPU_MODEL_WESTMERE_EX␉␉0x2F␉␉␉// Westmere-EX␊
#define CPU_MODEL_ATOM_2000␉␉0x36␉␉␉// Cedarview␊
#define CPU_MODEL_IVYBRIDGE␉␉0x3A␉␉␉// Ivy Bridge␊
#define CPU_MODEL_HASWELL␉␉0x3C␉␉␉// Haswell DT␊
#define CPU_MODEL_ATOM_2000 0x36␉␉␉// Cedarview␊
#define CPU_MODEL_IVYBRIDGE 0x3A␉␉␉// Ivy Bridge␊
#define CPU_MODEL_HASWELL 0x3C␉␉␉// Haswell DT␊
#define CPU_MODEL_IVYBRIDGE_XEON␉0x3E␉␉␉// Ivy Bridge Xeon␊
#define CPU_MODEL_HASWELL_SVR␉␉0x3F␉␉␉// Haswell MB␊
//#define CPU_MODEL_HASWELL_H␉␉0x??␉␉␉// Haswell H␊
branches/Bungo/i386/libsaio/smbios.c
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=================================================== */␊
#define kSMBOemProcessorBusSpeedKey "SMoemcpubusspeed" // Bungo: renamed from SMbusspeed␊
␊
/* ==============================================␊
OEM Platform Feature (Apple Specific - Type 133)␊
================================================ */␊
//#define kSMBOemPlatformFeatureKey "SMoemplatformfeature"␊
␊
/* ==================================================*/␊
#define getFieldOffset(struct, field)␉((uint8_t)(uint32_t)&(((struct *)0)->field))␊
typedef struct␊
{␊
␉uint8_t␉␉␉type;␊
␉SMBValueType␉␉valueType;␊
␉SMBValueType␉valueType;␊
␉uint8_t␉␉␉fieldOffset;␊
␉char␉␉␉*keyString;␊
␉bool␉␉␉(*getSMBValue)(returnType *);␊
␉// Apple Specific␊
␉//-------------------------------------------------------------------------------------------------------------------------␊
␉// OEM Processor Type (Apple Specific - Type 131)␊
␉{kSMBTypeOemProcessorType,␉␉kSMBWord,␉getFieldOffset(SMBOemProcessorType, ProcessorType),␉␉␉kSMBOemProcessorTypeKey,␉␉␊
␉␉getSMBOemProcessorType,␉␉␉NULL},␊
␉{kSMBTypeOemProcessorType,␉␉kSMBWord,␉getFieldOffset(SMBOemProcessorType, ProcessorType), kSMBOemProcessorTypeKey, getSMBOemProcessorType, NULL},␊
␊
␉// OEM Processor Bus Speed (Apple Specific - Type 132)␊
␉{kSMBTypeOemProcessorBusSpeed,␉kSMBWord,␉getFieldOffset(SMBOemProcessorBusSpeed, ProcessorBusSpeed),␉kSMBOemProcessorBusSpeedKey,␉␊
␉␉getSMBOemProcessorBusSpeed,␉␉NULL}␊
␉{kSMBTypeOemProcessorBusSpeed, kSMBWord, getFieldOffset(SMBOemProcessorBusSpeed, ProcessorBusSpeed),␉kSMBOemProcessorBusSpeedKey, getSMBOemProcessorBusSpeed, NULL}␊
␊
// OEM Platform Feature (Apple Specific - Type 133)␊
/*␊
{kSMBTypeOemPlatformFeature, kSMBWord, getFieldOffset(SMBOemPlatformFeature, PlatformFeature), kSMBOemPlatformFeatureKey, getSMBOemPlatformFeature, NULL}␊
*/␊
};␊
␊
int numOfSetters = sizeof(SMBSetters) / sizeof(SMBValueSetter);␊
static uint8_t stringIndex;␉// increament when a string is added and set the field value accordingly␊
static uint8_t stringsSize;␉// add string size␊
␊
static SMBWord tableLength␉= 0;␊
static SMBWord handle␉␉= 0;␊
static SMBWord tableLength = 0;␊
static SMBWord handle = 0;␊
static SMBWord maxStructSize␉= 0;␊
static SMBWord structureCount␉= 0;␊
␊
//#define KDefaultBoardSerialNumber "C02140302D5DMT31M" // new C07019501PLDCVHAD - C02032101R5DC771H␊
␊
//=========== Mac mini ===========␊
#define kDefaultMacMiniFamily "Mac mini"␊
#define kDefaultMacMiniFamily "Napa Mac" // Macmini2,1 family = "Napa Mac" not "Mac mini"␊
//#define kDefaultMacMiniBoardAssetTagNumber "Mini-Aluminum"␊
␊
#define kDefaultMacMini "Macmini2,1"␊
#define kDefaultMacMiniBIOSVersion " MM21.88Z.009A.B00.0706281359"␊
#define kDefaultMacMiniBIOSReleaseDate "06/28/07"␊
//=========== MacBook ===========␊
#define kDefaultMacBookFamily "MacBook"␊
//#define kDefaultMacBookBoardAssetTagNumber␉␉"MacBook-Black"␊
␊
#define kDefaultMacBook "MacBook4,1"␊
#define kDefaultMacBookBIOSVersion " MB41.88Z.00C1.B00.0802091535"␊
#define kDefaultMacBookBIOSReleaseDate "02/09/08"␊
␊
//=========== MacBookAir ===========␊
#define kDefaultMacBookAirFamily "MacBook Air"␊
␊
// MacBookAir4,1 - Mac-C08A6BB70A942AC2␊
// MacBookAir4,2 - Mac-742912EFDBEE19B3␊
#define kDefaultMacBookAir "MacBookAir5,2"␊
#define kDefaultiMacBIOSVersion " IM81.88Z.00C1.B00.0802091538"␊
#define kDefaultiMacBIOSReleaseDate "02/09/08"␊
#define kDefaultiMacBoardProduct "Mac-F227BEC8"␊
#define kDefaultMacFamily "Mac" // iMac8,1 family = "Mac" not "iMac"␊
␊
// iMac10,1␊
// iMac11,1 core i3/i5/i7␊
#define kDefaultiMacSandyBIOSVersion " IM121.88Z.0047.B00.1102091756"␊
#define kDefaultiMacSandyBIOSReleaseDate "01/02/08"␊
#define kDefaultiMacSandyBoardProduct "Mac-942B5BF58194151B"␊
␊
// iMac12,2 Mac-942B59F58194171B␊
//#define kDefaultiMacSandy␉␉␉␉"iMac12,2"␊
//#define kDefaultiMacSandyBIOSVersion␉␉␉" IM121.88Z.0047.B1D.1110171110"␊
//#define kDefaultiMacSandyBIOSReleaseDate␉␉"10/17/11"␊
//#define kDefaultiMacSandyBoardProduct␉␉␉"Mac-942B59F58194171B"␊
␊
// iMac13,1␊
// Bios: IM131.88Z.010A.B05.1211151146␊
// Data: 11/15/2012␊
// Board: Mac-00BE6ED71E35EB86␊
␊
// iMac13,2␊
//#define kDefaultiMacIvy␉␉␉␉"iMac13,2"␊
//#define kDefaultiMacIvyBIOSVersion␉␉␉" IM131.88Z.00CE.B00.1203281326"␊
//#define kDefaultiMacIvyBoardProduct␉␉␉"Mac-FC02E91DDD3FA6A4"␊
␊
//=========== MacPro ===========␊
#define kDefaultMacProFamily "Mac Pro"␊
#define kDefaultMacProFamily "MacPro" // MacPro's family = "MacPro" not "Mac Pro"␊
//#define KDefauktMacProBoardAssetTagNumber␉␉"Pro-Enclosure"␊
//#define kDefaultMacProBoardType␉␉␉"0xB" // 11␊
␊
#define kDefaultMacPro "MacPro3,1"␊
#define kDefaultMacProBIOSVersion " MP31.88Z.006C.B02.0801021250"␊
#define kDefaultMacProBIOSReleaseDate "01/02/08"␊
//#define kDefaultMacProSystemVersion␉␉␉"1.3"␊
#define kDefaultMacProBoardProduct "Mac-F42C88C8"␊
//#define KDefaultMacProBoardSerialNumber␉␉"J593902RA4MFE"␊
␊
// Mac Pro 4,1 core i7/Xeon␊
#define kDefaultMacProNahWestSystemVersion␉␉"0.0"␊
␊
#define kDefaultMacProNehalem "MacPro4,1"␊
#define kDefaultMacProNehalemBIOSVersion " MP41.88Z.0081.B07.0910130729"␊
#define kDefaultMacProNehalemBIOSReleaseDate "10/13/09"␊
//#define kDefaultMacProNehalemSystemVersion␉␉"1.4"␊
#define kDefaultMacProNehalemBoardProduct␉␉"Mac-F221BEC8"␊
//#define KDefaultMacProNehalemBoardSerialNumber␉"J593004RB1LUE"␊
// "J591302R61LUC " // 2-cpu board␊
// "J591002JV4MFB " // 1-cpu board␊
␊
// Mac Pro 5,1 core i7/Xeon␊
#define kDefaultMacProWestmere "MacPro5,1"␊
#define kDefaultMacProWestmereBIOSVersion␉␉" MP51.88Z.007F.B03.1010071432"␊
#define kDefaultMacProWestmereBIOSReleaseDate␉"10/07/10"␊
//#define kDefaultMacProWestmereSystemVersion␉␉"1.2"␊
#define kDefaultMacProWestmereBoardProduct␉␉"Mac-F221BEC8"␊
//#define KDefaultMacProWestmereBoardSerialNumber␉"J522700H7BH8C"␊
// "J503104H1BH8A " // 2-cpu board␊
␊
// Mac Pro 6,1␊
#define kDefaultMacProHaswell "MacPro6,1"␊
#define kDefaultMacProHaswellBIOSVersion␉␉" MP61.88Z.0116.B04.1312061508"␊
#define kDefaultMacProHaswellBIOSVersion␉␉"MP61.88Z.0116.B04.1312061508" // no leading spaces as before␊
#define kDefaultMacProHaswellBIOSReleaseDate␉"12/06/2013"␊
//#define kDefaultMacProHaswellSystemVersion␉␉"1.?"␊
#define kDefaultMacProHaswellBoardProduct␉␉"Mac-F60DEB81FF30ACF6"␊
//#define KDefaultMacProHaswellBoardSerialNumber␉"?????????????"␊
//#define KDefaultMacProHaswellBoardSerialNumber␉"F5K3474008JFNN215"␊
␊
//#define KDefaultBoardSerialNumber␉␉␉"C02140302D5DMT31M" // new C07019501PLDCVHAD - C02032101R5DC771H␊
// J593902RA4MFE 3,1␊
␊
bool useSMBIOSdefaults = true; // Bungo␊
␊
SMBByte PlatformType␉␉␉= 3; // Bungo: same as Platfom.Type in platform.h␊
SMBByte PlatformType␉␉␉= 1; // Bungo: same as Platfom.Type in platform.h. Because can't get from ACPI FADT PM profile and platformCPUFeature(CPU_FEATURE_MOBILE)) doesn't work as expect, FIXING NEEDED.␊
␊
/* Rewrite this function */␊
void setDefaultSMBData(void) // Bungo: setting data from real Macs␊
␉defaultChassis.assetTag = kDefaultAssetTag;␊
// defaultChassis.skuNumber = kDefaultSkuNumber;␊
␊
// if (platformCPUFeature(CPU_FEATURE_MOBILE)) Bungo: doesn't recognise correctly, need fixing␊
␉if (PlatformType == 2) // this method works but it's a substitute␊
// if (platformCPUFeature(CPU_FEATURE_MOBILE)) Bungo: doesn't recognise correctly␊
␉if (PlatformType == 2) // this works but it's a substitute␊
␉{␊
␉␉if (Platform.CPU.NoCores > 1)␊
␉␉{␊
␉␉␉␉defaultBIOSInfo.version = kDefaultiMacBIOSVersion;␊
␉␉␉␉defaultBIOSInfo.releaseDate = kDefaultiMacBIOSReleaseDate;␊
␉␉␉␉defaultSystemInfo.productName = kDefaultiMac;␊
␉␉␉␉defaultSystemInfo.family = kDefaultiMacFamily;␊
␉␉␉␉defaultSystemInfo.family = kDefaultMacFamily; // iMac8,1 family = Mac␊
␉␉␉␉defaultBaseBoard.product = kDefaultiMacBoardProduct;␊
␉␉␉␉defaultBaseBoard.boardType = kSMBBaseBoardMotherboard;␊
␉␉␉␉defaultChassis.chassisType = kSMBchassisAllInOne;␊
␊
␉␉␉␉␉␉␉case CPU_MODEL_NEHALEM:␉␉␉// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)␊
␉␉␉␉␉␉␉case CPU_MODEL_NEHALEM_EX:␉␉// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x␊
␉␉␉␉␉␉␉␉defaultBIOSInfo.version␉␉= kDefaultMacProNehalemBIOSVersion;␊
␉␉␉␉␉␉␉␉defaultBIOSInfo.releaseDate␉= kDefaultMacProNehalemBIOSReleaseDate;␊
␉␉␉␉␉␉␉␉defaultSystemInfo.productName␉= kDefaultMacProNehalem;␊
␉␉␉␉␉␉␉␉defaultSystemInfo.family␉= kDefaultMacProFamily;␊
␉␉␉␉␉␉␉␉defaultBIOSInfo.version = kDefaultMacProNehalemBIOSVersion;␊
␉␉␉␉␉␉␉␉defaultBIOSInfo.releaseDate = kDefaultMacProNehalemBIOSReleaseDate;␊
␉␉␉␉␉␉␉␉defaultSystemInfo.productName = kDefaultMacProNehalem;␊
defaultSystemInfo.version = kDefaultMacProNahWestSystemVersion;␊
␉␉␉␉␉␉␉␉defaultSystemInfo.family = kDefaultMacProFamily;␊
␉␉␉␉␉␉␉␉defaultBaseBoard.product = kDefaultMacProNehalemBoardProduct;␊
␉␉␉␉␉␉␉␉defaultBaseBoard.boardType = kSMBBaseBoardProcessorMemoryModule;␊
␉␉␉␉␉␉␉␉defaultChassis.chassisType = kSMBchassisTower;␊
␉␉␉␉␉␉␉case CPU_MODEL_WESTMERE:␉␉// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core␊
␉␉␉␉␉␉␉case CPU_MODEL_WESTMERE_EX:␉␉// Intel Xeon E7␊
␉␉␉␉␉␉␉case CPU_MODEL_JAKETOWN:␉␉// Intel Core i7, Xeon E5 LGA2011 (32nm)␊
␉␉␉␉␉␉␉␉defaultBIOSInfo.version␉␉= kDefaultMacProWestmereBIOSVersion;␊
␉␉␉␉␉␉␉␉defaultBIOSInfo.releaseDate␉= kDefaultMacProWestmereBIOSReleaseDate;␊
␉␉␉␉␉␉␉␉defaultSystemInfo.productName␉= kDefaultMacProWestmere;␊
␉␉␉␉␉␉␉␉defaultSystemInfo.family␉= kDefaultMacProFamily;␊
␉␉␉␉␉␉␉␉defaultBIOSInfo.version = kDefaultMacProWestmereBIOSVersion;␊
␉␉␉␉␉␉␉␉defaultBIOSInfo.releaseDate = kDefaultMacProWestmereBIOSReleaseDate;␊
␉␉␉␉␉␉␉␉defaultSystemInfo.productName = kDefaultMacProWestmere;␊
defaultSystemInfo.version = kDefaultMacProNahWestSystemVersion;␊
␉␉␉␉␉␉␉␉defaultSystemInfo.family = kDefaultMacProFamily;␊
␉␉␉␉␉␉␉␉defaultBaseBoard.product = kDefaultMacProWestmereBoardProduct;␊
␉␉␉␉␉␉␉␉defaultBaseBoard.boardType = kSMBBaseBoardProcessorMemoryModule;␊
␉␉␉␉␉␉␉␉defaultChassis.chassisType = kSMBchassisTower;␊
␊
␉strSize = strlen(string);␊
␊
/* Bungo: What was this for?␊
␉// remove any spaces found at the end␊
␉while ((strSize != 0) && (string[strSize - 1] == ' ')) {␊
␉␉strSize--;␊
␉}␊
*/␊
␉// remove any spaces found at the end but only in MemoryDevice␊
if (structHeader->type == kSMBTypeMemoryDevice) {␊
while ((strSize != 0) && (string[strSize - 1] == ' ')) {␊
strSize--;␊
}␊
}␊
␊
␉if (strSize == 0) {␊
␉␉*field = 0;␊
␉␉return;␊
␉␉{␊
␉␉␉if (SMBSetters[idx].keyString)␊
␉␉␉{␊
␉␉␉␉if (getValueForKey(SMBSetters[idx].keyString, &string, &len, SMBPlist))␊
␉␉␉␉{␊
␉␉␉␉if (getValueForKey(SMBSetters[idx].keyString, &string, &len, SMBPlist)) {␊
␉␉␉␉␉break;␊
␉␉␉␉} else {␊
␉␉␉␉␉if (structPtr->orig->type == kSMBTypeMemoryDevice)␉// MemoryDevice only␊
␉␉␉␉␉{␊
␉␉␉␉␉␉if (getSMBValueForKey(structPtr->orig, SMBSetters[idx].keyString, &string, NULL))␊
␉␉␉␉␉␉{␊
␉␉␉␉␉if (structPtr->orig->type == kSMBTypeMemoryDevice) {␉// MemoryDevice only␊
␉␉␉␉␉␉if (getSMBValueForKey(structPtr->orig, SMBSetters[idx].keyString, &string, NULL)) {␊
␉␉␉␉␉␉␉break;␊
␉␉␉␉␉␉}␊
␉␉␉␉␉}␊
␉␉␉␉}␊
␉␉␉␉ }␊
␊
␉␉␉}␊
␉␉␉if (SMBSetters[idx].getSMBValue) {␊
␉␉␉␉␉␉case kSMBWord:␊
␉␉␉␉␉␉␉value->word = (uint16_t)val;␊
␉␉␉␉␉␉␉break;␊
//case kSMBQWord:␊
␉␉␉␉␉␉// value->word = (uint64_t)val;␊
␉␉␉␉␉␉// break;␊
␉␉␉␉␉␉case kSMBDWord:␊
␉␉␉␉␉␉default:␊
␉␉␉␉␉␉␉value->dword = (uint32_t)val;␊
case kSMBWord:␊
value->word = *(uint16_t *)(SMBSetters[idx].defaultValue);␊
break;␊
//case kSMBQWord:␊
// value->word = *(uint64_t *)(SMBSetters[idx].defaultValue);␊
// break;␊
case kSMBDWord:␊
default:␊
value->dword = *(uint32_t *)(SMBSetters[idx].defaultValue);␊
//-------------------------------------------------------------------------------------------------------------------------␊
// Apple Specific␊
//-------------------------------------------------------------------------------------------------------------------------␊
␊
/* ===========================================␊
Firmware Volume (Apple Specific - Type 128)␊
============================================= */␊
void addSMBFirmwareVolume(SMBStructPtrs *structPtr)␊
{␊
␉return;␊
}␊
␊
/* ===========================================␊
Memory SPD Data (Apple Specific - Type 130)␊
============================================= */␊
void addSMBMemorySPD(SMBStructPtrs *structPtr)␊
{␊
␉/* SPD data from Platform.RAM.spd */␊
␉return;␊
}␊
␊
/* ============================================␊
OEM Processor Type (Apple Specific - Type 131)␊
============================================== */␊
void addSMBOemProcessorType(SMBStructPtrs *structPtr)␊
{␊
␉SMBOemProcessorType *p = (SMBOemProcessorType *)structPtr->new;␊
␉structureCount++;␊
}␊
␊
/* =================================================␊
OEM Processor Bus Speed (Apple Specific - Type 132)␊
=================================================== */␊
void addSMBOemProcessorBusSpeed(SMBStructPtrs *structPtr)␊
{␊
␉SMBOemProcessorBusSpeed *p = (SMBOemProcessorBusSpeed *)structPtr->new;␊
␉structureCount++;␊
}␊
␊
/* ==============================================␊
OEM Platform Feature (Apple Specific - Type 133)␊
================================================ */␊
/*void addSMBOemPlatformFeature(SMBStructPtrs *structPtr) { }*/␊
␊
//-------------------------------------------------------------------------------------------------------------------------␊
// EndOfTable␊
//-------------------------------------------------------------------------------------------------------------------------␊
structSize = sizeof(SMBMemoryDevice);␊
break;␊
default:␊
structSize = structPtr->orig->length; // don't change a length for unpatched␊
structSize = structPtr->orig->length; // doesn't change a length for unpatched␊
break;␊
}␊
␊
branches/Bungo/i386/libsaio/smbios_decode.c
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"Socket LGA1356-3" /* 2Ch */␊
};␊
␊
static const char *SMBMemoryDeviceFormFactors[] = // Bungo: strings for form factor (Table Type 17 - Memory Device)␊
{␊
"Other", /* 01h */␊
"Unknown", /* 02h */␊
"SIMM", /* 03h */␊
"SIP", /* 04h */␊
"Chip", /* 05h */␊
"DIP", /* 06h */␊
"ZIP", /* 07h */␊
"Proprietary Card", /* 08h */␊
"DIMM", /* 09h */␊
"TSOP", /* 0Ah */␊
"Row of chips", /* 0Bh */␊
"RIMM", /* 0Ch */␊
"SODIMM", /* 0Dh */␊
"SRIMM", /* 0Eh */␊
"FB-DIMM" /* 0Fh */␊
};␊
␊
/*=====␊
7.18.2␊
====*/␊
static const char *␊
SMBMemoryDeviceTypes[] =␊
static const char *SMBMemoryDeviceTypes[] =␊
{␊
␉"RAM", /* 00h Undefined */␊
␉"RAM", /* 01h Other */␊
␉DBG("BIOS Information:\n");␊
␉DBG("\tVendor: %s\n", SMBStringForField(structHeader, ((SMBBIOSInformation *)structHeader)->vendor, neverMask));␊
␉DBG("\tVersion: %s\n", SMBStringForField(structHeader, ((SMBBIOSInformation *)structHeader)->version, neverMask));␊
␉// Address Segment␊
␉DBG("\tRelease Date: %s\n", SMBStringForField(structHeader, ((SMBBIOSInformation *)structHeader)->releaseDate, neverMask));␊
DBG("\tRelease Date: %s\n", SMBStringForField(structHeader, ((SMBBIOSInformation *)structHeader)->releaseDate, neverMask));␊
// Address:␊
// Runtime Size:␊
// ROM Size:␊
// DBG("\tCharacteristics: (0x%llX) %s\n", ((SMBBIOSInformation *)structHeader)->characteristics, SMBBIOSInfoChar0[((SMBBIOSInformation *)structHeader)->characteristics]);␊
␉DBG("\tBIOS Revision: %d.%d\n", ((SMBBIOSInformation *)structHeader)->releaseMajor, ((SMBBIOSInformation *)structHeader)->releaseMinor);␊
␉// ROM Size␊
␉// DBG("\tSupported BIOS functions: (0x%llX) %s\n", ((SMBBIOSInformation *)structHeader)->characteristics, SMBBIOSInfoChar0[((SMBBIOSInformation *)structHeader)->characteristics]);␊
␉// Firmware Major Release␊
␉// Firmware Minor Release␊
␉// SMBByte characteristicsExt1;␊
␉// SMBByte characteristicsExt2;␊
␉DBG("\n");␊
}␊
␊
␉DBG("\tVersion: %s\n", SMBStringForField(structHeader, ((SMBBaseBoard *)structHeader)->version, neverMask));␊
␉DBG("\tSerial Number: %s\n", SMBStringForField(structHeader, ((SMBBaseBoard *)structHeader)->serialNumber, privateData));␊
␉DBG("\tAsset Tag: %s\n", SMBStringForField(structHeader, ((SMBBaseBoard *)structHeader)->assetTag, neverMask));␊
␉// Feature Flags (BYTE)␊
␉// Features:␊
␉DBG("\tLocation In Chassis: %s\n", SMBStringForField(structHeader, ((SMBBaseBoard *)structHeader)->locationInChassis, neverMask)); // Part Component␊
␉// Chassis Handle (WORD)␊
␉// Chassis Handle:␊
␉if ((((SMBBaseBoard *)structHeader)->boardType < kSMBBaseBoardUnknown) || (((SMBBaseBoard *)structHeader)->boardType > kSMBBaseBoardInterconnect)) {␊
␉␉DBG("\tType: %s\n", OutOfSpecStr);␊
␉} else {␊
␉␉DBG("\tType: %s\n", SMBBaseBoardTypes[(((SMBBaseBoard *)structHeader)->boardType - 1)]);␊
␉ }␊
␉// Number of Contained Object Handles (n) (BYTE)␊
␉// Contained Object Handles n(WORDs)␊
//DBG("\tContained Object Handles: %d\n", ((SMBBaseBoard *)structHeader)->numberOfContainedHandles;␊
␉DBG("\n");␊
}␊
␊
␉} else {␊
␉␉DBG("\tType: %s\n", SMBChassisTypes[(((SMBSystemEnclosure *)structHeader)->chassisType - 1)]);␊
␉ }␊
// Lock:␊
␉DBG("\tVersion: %s\n", SMBStringForField(structHeader, ((SMBSystemEnclosure *)structHeader)->version, neverMask));␊
␉DBG("\tSerial Number: %s\n", SMBStringForField(structHeader, ((SMBSystemEnclosure *)structHeader)->serialNumber, privateData));␊
␉DBG("\tAsset Tag: %s\n", SMBStringForField(structHeader, ((SMBSystemEnclosure *)structHeader)->assetTag, neverMask));␊
␉DBG("\tFamily: 0x%X\n", ((SMBProcessorInformation *)structHeader)->processorFamily);␊
␉DBG("\tManufacturer: %s\n", SMBStringForField(structHeader, ((SMBProcessorInformation *)structHeader)->manufacturer, neverMask));␊
␉DBG("\tID: 0x%llX\n", ((SMBProcessorInformation *)structHeader)->processorID);␊
␉DBG("\tProcessor Version: %s\n", SMBStringForField(structHeader, ((SMBProcessorInformation *)structHeader)->processorVersion, neverMask));␊
//␉DBG("\tSignature: Type %u, Family %u, Model %u, Stepping %u\n", (eax >> 12) & 0x3, ((eax >> 20) & 0xFF) + ((eax >> 8) & 0x0F), ((eax >> 12) & 0xF0) + ((eax >> 4) & 0x0F), eax & 0xF);␊
// Flags:␊
␉DBG("\tVersion: %s\n", SMBStringForField(structHeader, ((SMBProcessorInformation *)structHeader)->processorVersion, neverMask));␊
//␉DBG("\tVoltage: 0.%xV\n", ((SMBProcessorInformation *)structHeader)->voltage);␊
␉DBG("\tExternal Clock: %dMHz\n", ((SMBProcessorInformation *)structHeader)->externalClock);␊
␉DBG("\tMaximal Clock: %dMHz\n", ((SMBProcessorInformation *)structHeader)->maximumClock);␊
␉DBG("\tCurrent Clock: %dMHz\n", ((SMBProcessorInformation *)structHeader)->currentClock);␊
␉DBG("\tMax Speed: %dMHz\n", ((SMBProcessorInformation *)structHeader)->maximumClock);␊
␉DBG("\tCurrent Speed: %dMHz\n", ((SMBProcessorInformation *)structHeader)->currentClock);␊
// Status: Populated/Unpopulated␊
if ((((SMBProcessorInformation *)structHeader)->processorUpgrade < 1) || (((SMBProcessorInformation *)structHeader)->processorUpgrade > 0x2C)) {␊
␉␉DBG("\tUpgrade: %s\n", OutOfSpecStr);␊
␉} else {␊
␉␉DBG("\tUpgrade: %s\n", SMBProcessorUpgrades[((SMBProcessorInformation *)structHeader)->processorUpgrade - 1]);␊
␉ }␊
// L1 Cache Handle:␊
// L2 Cache Handle:␊
// L3 Cache Handle:␊
␉DBG("\tSerial Number: %s\n", SMBStringForField(structHeader, ((SMBProcessorInformation *)structHeader)->serialNumber, privateData));␊
␉DBG("\tAsset Tag: %s\n", SMBStringForField(structHeader, ((SMBProcessorInformation *)structHeader)->assetTag, neverMask));␊
␉DBG("\tPart Number: %s\n", SMBStringForField(structHeader, ((SMBProcessorInformation *)structHeader)->partNumber, neverMask));␊
/*␊
if(((SMBProcessorInformation *)structHeader)->coreCount != 0) {␊
DBG("\tCore Count: %d\n", ((SMBProcessorInformation *)structHeader)->coreCount);␊
}␊
if(((SMBProcessorInformation *)structHeader)->coreEnabled != 0) {␊
DBG("\tCore Enabled: %d\n", ((SMBProcessorInformation *)structHeader)->coreEnabled);␊
}␊
if(((SMBProcessorInformation *)structHeader)->threadCount != 0) {␊
DBG("\tThread Count: %d\n", ((SMBProcessorInformation *)structHeader)->threadCount);␊
}␊
*/␊
// Characteristics:␊
//␉DBG("\tProcessor Family 2: %d\n", ((SMBProcessorInformation *)structHeader)->processorFamily2);␊
␉DBG("\n");␊
}␊
}␊
␊
//-------------------------------------------------------------------------------------------------------------------------␊
// MemoryDevice (Type 17)␊
// Memory Device (Type 17)␊
//-------------------------------------------------------------------------------------------------------------------------␊
void decodeMemoryDevice(SMBStructHeader *structHeader)␊
{␊
printHeader(structHeader);␊
␉DBG("Memory Device:\n");␊
␉DBG("\tDevice Locator: %s\n", SMBStringForField(structHeader, ((SMBMemoryDevice *)structHeader)->deviceLocator, neverMask));␊
// Aray Handle␊
if (((SMBMemoryDevice *)structHeader)->errorHandle == 0xFFFF) {␊
DBG("\tError Information Handle: No Error\n");␊
} else {␊
DBG("\tError Information Handle: 0x%x\n", ((SMBMemoryDevice *)structHeader)->errorHandle);␊
}␊
// Total Width:␊
// Data Width:␊
switch (((SMBMemoryDevice *)structHeader)->memorySize) {␊
case 0:␊
DBG("\tSize: No Module Installed\n");␊
break;␊
case 0x7FFF:␊
DBG("\tSize: 32GB or more\n");␊
break;␊
case 0xFFFF:␊
DBG("\tSize: Unknown\n");␊
break;␊
default:␊
DBG("\tSize: %d %s\n", ((SMBMemoryDevice *)structHeader)->memorySize & 0x7FFF, ((((SMBMemoryDevice *)structHeader)->memorySize & 0x8000) == 0x8000) ? "kB" : "MB");␊
break;␊
}␊
if ((((SMBMemoryDevice *)structHeader)->formFactor < 0x01) || (((SMBMemoryDevice *)structHeader)->formFactor > 0x0F)) {␊
␉␉DBG("\tForm Factor: %s\n", OutOfSpecStr);␊
␉} else {␊
DBG("\tForm Factor: %s\n", SMBMemoryDeviceFormFactors[((SMBMemoryDevice *)structHeader)->formFactor - 1]);␊
}␊
// Set:␊
␉DBG("\tLocator: %s\n", SMBStringForField(structHeader, ((SMBMemoryDevice *)structHeader)->deviceLocator, neverMask));␊
␉DBG("\tBank Locator: %s\n", SMBStringForField(structHeader, ((SMBMemoryDevice *)structHeader)->bankLocator, neverMask));␊
␉DBG("\tMemory Type: %s\n", SMBMemoryDeviceTypes[((SMBMemoryDevice *)structHeader)->memoryType]);␊
if (((SMBMemoryDevice *)structHeader)->memoryType > kSMBMemoryDeviceTypeCount) {␊
␉␉DBG("\tType: %s\n", OutOfSpecStr);␊
␉} else {␊
DBG("\tType: %s\n", SMBMemoryDeviceTypes[((SMBMemoryDevice *)structHeader)->memoryType]);␊
}␊
// Type Detail:␊
␉DBG("\tSpeed: %d MHz\n", ((SMBMemoryDevice *)structHeader)->memorySpeed);␊
␉DBG("\tError Handle: %x\n", ((SMBMemoryDevice *)structHeader)->errorHandle);␊
␉DBG("\tManufacturer: %s\n", SMBStringForField(structHeader, ((SMBMemoryDevice *)structHeader)->manufacturer, neverMask));␊
␉DBG("\tSerial Number: %s\n", SMBStringForField(structHeader, ((SMBMemoryDevice *)structHeader)->serialNumber, privateData));␊
␉DBG("\tAsset Tag: %s\n", SMBStringForField(structHeader, ((SMBMemoryDevice *)structHeader)->assetTag, neverMask));␊
␉DBG("\tPart Number: %s\n", SMBStringForField(structHeader, ((SMBMemoryDevice *)structHeader)->partNumber, neverMask));␊
// Rank:␊
// Configured Clock Speed:␊
␉DBG("\n");␊
}␊
␊
//-------------------------------------------------------------------------------------------------------------------------␊
// Apple Specific␊
// Apple Specific Processor Type (Type 131)␊
//-------------------------------------------------------------------------------------------------------------------------␊
void decodeOemProcessorType(SMBStructHeader *structHeader)␊
{␊
␉DBG("\n");␊
}␊
␊
//-------------------------------------------------------------------------------------------------------------------------␊
// Apple Specific Processor Bus Speed (Type 132)␊
//-------------------------------------------------------------------------------------------------------------------------␊
void decodeOemProcessorBusSpeed(SMBStructHeader *structHeader)␊
{␊
printHeader(structHeader);␊
DBG("\tqpi=%d MT/s\n", ((SMBOemProcessorBusSpeed *)structHeader)->ProcessorBusSpeed);␊
␉DBG("\n");␊
}␊
// Info for the Table Above: dmi 2.7+ https://wiki.debian.org/InstallingDebianOn/Thinkpad/T42/lenny?action=AttachFile&do=get&target=dmidecode.Lenny_Thinkpad_T42_2373.txt␊
␊
//-------------------------------------------------------------------------------------------------------------------------␊
// Apple Specific Platform Feature (Type 133)␊
//-------------------------------------------------------------------------------------------------------------------------␊
//void decodeOemPlatformFeature(SMBStructHeader *structHeader)␊
//{␊
//␉printHeader(structHeader);␊
//␉DBG("Apple specific Platform Feature\n");␊
//␉DBG("\t%s\n", ((SMBOemPlatformFeature *)structHeader)->PlatformFeature);␊
//␉DBG("\n");␊
//}␊
␊
//-------------------------------------------------------------------------------------------------------------------------␊
// Specific (Type 134)␊
//-------------------------------------------------------------------------------------------------------------------------␊
//void decodeOem(SMBStructHeader *structHeader)␊
//{␊
//␉printHeader(structHeader);␊
//␉DBG("Apple specific Feature\n");␊
//␉DBG("\t%s\n", ((SMBOemPlatformFeature *)structHeader)->Feature);␊
//␉DBG("\n");␊
//}␊
␊
//-------------------------------------------------------------------------------------------------------------------------␊
␊
␊
void decodeSMBIOSTable(SMBEntryPoint *eps)␊
{␊
␉uint8_t *ptr = (uint8_t *)eps->dmi.tableAddress;␊
␉␉␉//case 6: // kSMBTypeMemoryModule: // Type 6␊
␉␉␉//␉decodeMemoryModule(structHeader);␊
␉␉␉//␉break;␊
␊
//case kSMBTypeSystemSlot: // Type 9␊
//␉decodeSMBTypeSystemSlot(structHeader);␊
//␉break;␊
␊
␉␉␉case kSMBOEMStrings: // Type 11␊
␉␉␉␉decodeSMBOEMStrings(structHeader);␊
␉␉␉␉decodeOemProcessorBusSpeed(structHeader);␊
␉␉␉␉break;␊
␊
␉␉␉//kSMBTypeOemPlatformFeature: // Type 133␊
␉␉␉//case kSMBTypeOemPlatformFeature: // Type 133␊
//␉decodeOemPlatformFeature(structHeader);␊
//␉break;␊
␊
␉␉␉case kSMBTypeEndOfTable: // Type 127␊
DBG("Type: %d, Length: %d, Handle: 0x%04x\n", structHeader->type, structHeader->length, structHeader->handle);␊
branches/Bungo/i386/libsaio/smbios.h
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#define __LIBSAIO_SMBIOS_H␊
␊
␊
/* Based on System Management BIOS Reference Specification v2.5 */␊
// http://dmtf.org/sites/default/files/standards/documents/DSP0134_2.8.0.pdf␊
/* Based on System Management BIOS Reference Specification v2.4 */␊
// http://dmtf.org/standards/smbios␊
␊
typedef uint8_t SMBString;␊
typedef uint8_t SMBByte;␊
␉kSMBTypeMemorySPD␉␉␉= 130, // MemorySPD (TYPE 130)␊
␉kSMBTypeOemProcessorType␉␉= 131, // Processor Type (Type 131)␊
␉kSMBTypeOemProcessorBusSpeed␉␉= 132 //Processor Bus Speed (Type 132)␊
//kSMBTypeOemPlatformFeature␉␉= 133 // Platform Feature (Type 133)␊
};␊
␊
/* =======================␊
␉SMBWord chassisHandle;␊
␉SMBByte boardType;␉␉␉␉// Type of board␊
␉SMBByte numberOfContainedHandles;␊
//␉SMBWord containedObjectHandles[1];␊
␉// 0 - 255 contained handles go here but we do not include␊
␉// them in our structure. Be careful to use numberOfContainedHandles␊
␉// times sizeof(SMBWord) when computing the actual record size,␊
␉// if you need it.␊
SMBByte containedObjectHandles;␊
} __attribute__((packed)) SMBBaseBoard;␊
␊
/* ====================================␊
SMBByte height;␉␉// Height of the enclosure, in 'U's␊
SMBByte numberOfPowerCords;␉// Number of power cords associated with the enclosure or chassis␊
SMBByte containedElementCount;␉// Number of Contained Element record that follow, in the range 0 to 255␊
// SMBByte containedElementRecord;␉// Byte leght of each Contained Element record that follow, in the range 0 to 255␊
SMBByte containedElementRecord;␉// Byte leght of each Contained Element record that follow, in the range 0 to 255␊
// SMBByte containedElements;␉// Elements, possibly defined by other SMBIOS structures present in chassis␊
// SMBString skuNumber;␉␉// Number of null-terminated string describing the chassis or enclosure SKU number (2.7+)␊
} __attribute__((packed)) SMBSystemEnclosure;␊
================================================ */␊
struct SMBOemPlatformFeature␊
{␊
␉SMB_STRUCT_HEADER␊
␉SMB_STRUCT_HEADER // Type 133␊
␉SMBWord PlatformFeature;␊
} __attribute__((packed)) SMBOemPlatformFeature;␊
␊
branches/Bungo/i386/libsaio/smbios_getters.c
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uint16_t simpleGetSMBOemProcessorType(void)␊
{␊
␉if (Platform.CPU.NoCores >= 4) {␊
␉␉return 0x0501;␉// Quad-Core Xeon␊
␉␉return 0x0501;␉// 1281 - Quad-Core Xeon␊
␉} else if (Platform.CPU.NoCores == 1) {␊
␉␉return 0x0201;␉// Core Solo␊
␉␉return 0x0201;␉// // 513 - Core Duo␊
␉};␊
␉␊
␉return 0x0301;␉␉// Core 2 Duo␊
␉return 0x0301;␉␉// 769 - Core 2 Duo␊
}␊
␊
bool getSMBOemProcessorType(returnType *value)␊
␉␉␉verbose("CPU is %s, family 0x%x, model 0x%x\n", Platform.CPU.BrandString, (uint32_t)Platform.CPU.Family, (uint32_t)Platform.CPU.Model);␊
␉␉␉done = true;␊
␉␉}␊
␉␉// Bungo: fixes Oem Processor Type - better matching IMHO␊
␉␉// Bungo: fixes Oem Processor Type - better matching IMHO, needs testing␊
␉␉switch (Platform.CPU.Family) {␊
case 0x0F:␊
␉␉␉case 0x06:␊
␉␉␉{␊
␉␉␉␉switch (Platform.CPU.Model) {␊
␊
case CPU_MODEL_PENTIUM_M:␊
␉␉␉␉␉case CPU_MODEL_DOTHAN:␉␉␉␉// 0x0D - Intel Pentium M model D␊
␉␉␉␉␉␉value->word = 0x101;␊
case CPU_MODEL_PRESCOTT:␊
case CPU_MODEL_NOCONA:␊
return true;␊
␊
␉␉␉␉␉case CPU_MODEL_PRESLER:␊
case CPU_MODEL_CELERON:␊
case CPU_MODEL_YONAH:␉␉␉␉// 0x0E - Intel Mobile Core Solo, Duo␊
␉␉␉␉␉␉value->word = 0x201; // 513␊
␉␉␉␉␉␉return true;␊
␊
␉␉␉␉␉case CPU_MODEL_YONAH:␉␉␉␉// 0x0E - Intel Mobile Core Solo, Duo␊
␉␉␉␉␉case CPU_MODEL_CELERON:␊
␉␉␉␉␉␉value->word = 0x201;␊
␉␉␉␉␉␉return true;␊
␊
␉␉␉␉␉case CPU_MODEL_XEON_MP:␉␉␉␉// 0x1D - Six-Core Xeon 7400, "Dunnington", 45nm␊
␉␉␉␉␉␉value->word = 0x401;␊
␉␉␉␉␉␉return true;␊
␊
␊
␉␉␉␉␉case CPU_MODEL_MEROM:␉␉␉␉// 0x0F - Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx␊
case CPU_MODEL_XEON_MP:␉␉␉␉// 0x1D - Six-Core Xeon 7400, "Dunnington", 45nm␊
␉␉␉␉␉case CPU_MODEL_PENRYN:␉␉␉␉// 0x17 - Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx␊
␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Xeon(R)")) {␊
␉␉␉␉␉␉␉value->word = 0x402;␉␉␉// Xeon␊
␉␉␉␉␉␉␉value->word = 0x402;␉␉␉// 1026 - Xeon␊
return true;␊
␉␉␉␉␉␉}␊
␉␉␉␉␉case CPU_MODEL_PENTIUM_M:␉␉␉// 0x09 - Banias␊
if (Platform.CPU.NoCores <= 2) {␊
␉␉␉␉␉␉␉value->word = 0x301;␉␉␉// 769 - Core 2 Duo␊
␉␉␉␉␉␉} else {␊
value->word = 0x402;␉␉␉// 1026 - Core 2 Quad as Xeon␊
}␊
␉␉␉␉␉␉return true;␊
␊
␉␉␉␉␉case CPU_MODEL_LINCROFT:␉␉␉// 0x27 - Intel Atom, "Lincroft", 45nm␊
␉␉␉␉␉case CPU_MODEL_ATOM:␉␉␉␉// 0x1C - Intel Atom (45nm)␊
␉␉␉␉␉␉return true;␊
␉␉␉␉␉case CPU_MODEL_FIELDS:␉␉␉␉// 0x1E - Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)␊
␉␉␉␉␉case CPU_MODEL_DALES:␉␉␉␉␉// 0x1F - Intel Core i5, i7 LGA1156 (45nm) (Havendale, Auburndale)␊
if (strstr(Platform.CPU.BrandString, "Xeon(R)")) {␊
␉␉␉␉␉␉␉value->word = 0x501;␉␉␉// Lynnfiled Quad-Core Xeon␊
␉␉␉␉␉␉␉value->word = 0x501;␉␉␉// // 1281 - Lynnfiled Quad-Core Xeon␊
return true;␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i3")) {␊
␉␉␉␉␉␉␉value->word = 0x901;␉␉// Core i3␊
␉␉␉␉␉␉␉value->word = 0x901;␉␉// 2305 - Core i3␊
return true;␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i5")) {␊
␉␉␉␉␉␉␉value->word = 0x601;␉␉␉// Core i5␊
␉␉␉␉␉␉␉value->word = 0x601;␉␉␉// 1537 - Core i5␊
return true;␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i7")) {␊
␉␉␉␉␉␉␉value->word = 0x701;␉␉␉// Core i7␊
␉␉␉␉␉␉␉value->word = 0x701;␉␉␉// 1793 - Core i7␊
return true;␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉if (Platform.CPU.NoCores <= 2) {␊
␉␉␉␉␉␉␉value->word = 0x601;␉␉␉// Core i5␊
␉␉␉␉␉␉␉value->word = 0x901;␉␉␉// 1537 - Core i3␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉return true;␊
␊
return true;␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i5")) {␊
␉␉␉␉␉␉␉value->word = 0x602;␉␉// Core i5␊
␉␉␉␉␉␉␉value->word = 0x602;␉␉// 1538 - Core i5␊
return true;␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i7")) {␊
␉␉␉␉␉␉␉value->word = 0x702;␉␉// Core i7␊
␉␉␉␉␉␉␉value->word = 0x702;␉␉// 1794 - Core i7␊
return true;␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉if (Platform.CPU.NoCores <= 2) {␊
␉␉␉␉␉␉␉value->word = 0x602;␉␉// Core i5␊
␉␉␉␉␉␉␉value->word = 0x901;␉␉// 1538 - Core i3␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉return true;␊
␊
return true;␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i3")) {␊
␉␉␉␉␉␉␉value->word = 0x902;␉␉// Core i3␊
␉␉␉␉␉␉␉value->word = 0x902;␉␉// 2306 - Core i3␊
return true;␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i5")) {␊
␉␉␉␉␉␉␉value->word = 0x603;␉␉// Core i5␊
␉␉␉␉␉␉␉value->word = 0x603;␉␉// 1539 - Core i5␊
return true;␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i7")) {␊
␉␉␉␉␉␉␉value->word = 0x703;␉␉// Core i7␊
␉␉␉␉␉␉␉value->word = 0x703;␉␉// 1795 - Core i7␊
return true;␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉if (Platform.CPU.NoCores <= 2) {␊
␉␉␉␉␉␉␉value->word = 0x603;␉␉// Core i5␊
␉␉␉␉␉␉␉value->word = 0x902;␉␉// 1539 - Core i3␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉return true;␊
␊
␉␉␉␉␉case CPU_MODEL_IVYBRIDGE:␉␉␉// 0x3A - Intel Core i3, i5, i7 LGA1155 (22nm)␊
if (strstr(Platform.CPU.BrandString, "Xeon(R)")) {␊
␉␉␉␉␉␉␉value->word = 0xA01;␉␉// Xeon␊
␉␉␉␉␉␉␉value->word = 0xA01;␉␉// 2561 - Xeon␊
return true;␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i3")) {␊
␉␉␉␉␉␉␉value->word = 0x903;␉␉// Core i3 - Apple doesn't use it - but we yes:-)␊
␉␉␉␉␉␉␉value->word = 0x903;␉␉// 2307 - Core i3 - Apple doesn't use it - but we yes:-)␊
return true;␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i5")) {␊
␉␉␉␉␉␉␉value->word = 0x604;␉␉// Core i5␊
␉␉␉␉␉␉␉value->word = 0x604;␉␉// 1540 - Core i5␊
return true;␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i7")) {␊
␉␉␉␉␉␉␉value->word = 0x704;␉␉// Core i7␊
␉␉␉␉␉␉␉value->word = 0x704;␉␉// 1796 - Core i7␊
return true;␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉if (Platform.CPU.NoCores <= 2) {␊
␉␉␉␉␉␉␉value->word = 0x604;␉␉// Core i5␊
␉␉␉␉␉␉␉value->word = 0x903;␉␉// 1540 - Core i3␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉return true;␊
␊
␉␉␉␉␉case CPU_MODEL_IVYBRIDGE_XEON:␉␉// 0x3E - Mac Pro 6,1␊
␉␉␉␉␉␉value->word = 0xA01;␊
␉␉␉␉␉␉value->word = 0xA01; // 2561 - Xeon␊
␉␉␉␉␉␉return true;␊
␊
␉␉␉␉␉case CPU_MODEL_HASWELL:␉␉␉␉// 0x3C -␊
␉␉␉␉␉case CPU_MODEL_HASWELL_ULT:␉␉␉// 0x45 -␊
␉␉␉␉␉case CPU_MODEL_CRYSTALWELL:␉␉␉// 0x46␊
if (strstr(Platform.CPU.BrandString, "Xeon(R)")) {␊
␉␉␉␉␉␉␉value->word = 0xA01;␉␉// Xeon␊
␉␉␉␉␉␉␉value->word = 0xA01;␉␉// 2561 - Xeon␊
return true;␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i3")) {␊
␉␉␉␉␉␉␉value->word = 0x904;␉␉// Core i3 - Apple doesn't use it - but we yes:-)␊
␉␉␉␉␉␉␉value->word = 0x904;␉␉// 2308 - Core i3 - Apple doesn't use it - but we yes:-)␊
return true;␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i5")) {␊
␉␉␉␉␉␉␉value->word = 0x605;␉␉// Core i5␊
␉␉␉␉␉␉␉value->word = 0x605;␉␉// 1541 - Core i5␊
return true;␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i7")) {␊
␉␉␉␉␉␉␉value->word = 0x705;␉␉// Core i7␊
␉␉␉␉␉␉␉value->word = 0x705;␉␉// 1797 - Core i7␊
return true;␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉if (Platform.CPU.NoCores <= 2) {␊
␉␉␉␉␉␉␉value->word = 0x605;␉␉// Core i5␊
␉␉␉␉␉␉␉value->word = 0x904;␉␉// 1541 - Core i3␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉return true;␊
␊
␉␉␉␉␉case 0x15:␉␉␉␉␉// EP80579 integrated processor␊
␉␉␉␉␉␉value->word = 0x301;␉␉␉//␊
␉␉␉␉␉case 0x15: // EP80579 integrated processor␊
␉␉␉␉␉␉value->word = 0x301;␉␉␉// 769␊
␉␉␉␉␉␉return true;␊
␊
␉␉␉␉␉case 0x13:␉␉␉␉␉// Core i5, Xeon MP, "Havendale", "Auburndale", 45nm␊
␉␉␉␉␉case 0x19:␉␉␉␉␉// Intel Core i5 650 @3.20 Ghz␊
␉␉␉␉␉␉value->word = 0x601;␉␉␉// Core i5␊
␉␉␉␉␉case 0x13: // Core i5, Xeon MP, "Havendale", "Auburndale", 45nm␊
␉␉␉␉␉case 0x19: // Intel Core i5 650 @3.20 Ghz␊
␉␉␉␉␉␉value->word = 0x601;␉␉␉// 1537 - Core i5␊
␉␉␉␉␉␉return true;␊
␉␉␉␉␉default:␊
␉␉␉␉␉␉break; //Unsupported CPU type␊
␉␉␉␉␉␉break; // Unsupported CPU type␊
␉␉␉␉}␊
␉␉␉}␊
␉␉␉default:␊
␉static int idx = -1;␊
␉int␉map;␊
␊
if (!bootInfo->memDetect) {␊
␉␉return false;␊
␉}␊
␊
␉idx++;␊
␉if (idx < MAX_RAM_SLOTS) {␊
␉␉map = Platform.DMI.DIMM[idx];␊
␉␉}␊
␉}␊
␊
␉return false;␊
value->byte = 2; // means Unknown␊
␉return true;␊
//␉value->byte = SMB_MEM_TYPE_DDR2;␊
//␉return true;␊
}␊
␉static int idx = -1;␊
␉int␉map;␊
␊
if (!bootInfo->memDetect) {␊
␉␉return false;␊
␉}␊
␊
␉idx++;␊
␉if (idx < MAX_RAM_SLOTS) {␊
␉␉map = Platform.DMI.DIMM[idx];␊
␉␉}␊
␉}␊
␊
␉return false;␊
value->dword = 0; // means Unknown␊
␉return true;␊
//␉value->dword = 800;␊
//␉return true;␊
}␊
␉static int idx = -1;␊
␉int␉map;␊
␊
if (!bootInfo->memDetect) {␊
␉␉return false;␊
␉}␊
␊
␉idx++;␊
␉if (idx < MAX_RAM_SLOTS) {␊
␉␉map = Platform.DMI.DIMM[idx];␊
␉␉}␊
␉}␊
␊
␉if (!bootInfo->memDetect) {␊
␉␉return false;␊
␉}␊
␉value->string = NOT_AVAILABLE;␊
␉return true;␊
}␊
␉static int idx = -1;␊
␉int␉map;␊
␊
if (!bootInfo->memDetect) {␊
␉␉return false;␊
␉}␊
␊
␉idx++;␊
␊
␉DBG("getSMBMemoryDeviceSerialNumber index: %d, MAX_RAM_SLOTS: %d\n",idx,MAX_RAM_SLOTS);␊
␊
␉// DBG("getSMBMemoryDeviceSerialNumber index: %d, MAX_RAM_SLOTS: %d\n",idx,MAX_RAM_SLOTS);␊
␉if (idx < MAX_RAM_SLOTS) {␊
␉␉map = Platform.DMI.DIMM[idx];␊
␉␉if (Platform.RAM.DIMM[map].InUse && strlen(Platform.RAM.DIMM[map].SerialNo) > 0) {␊
␉␉}␊
␉}␊
␊
␉if (!bootInfo->memDetect) {␊
␉␉return false;␊
␉}␊
␉value->string = NOT_AVAILABLE;␊
␉return true;␊
}␊
␉static int idx = -1;␊
␉int␉map;␊
␊
if (!bootInfo->memDetect) {␊
␉␉return false;␊
␉}␊
␊
␉idx++;␊
␉if (idx < MAX_RAM_SLOTS) {␊
␉␉map = Platform.DMI.DIMM[idx];␊
␉␉}␊
␉}␊
␊
␉if (!bootInfo->memDetect) {␊
␉␉return false;␊
␉}␊
␉value->string = NOT_AVAILABLE;␊
␉return true;␊
}␊
branches/Bungo/i386/boot2/resume.c
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␊
␉printf("\nWake Kernel!\n");␊
␊
␉dst = (unsigned long *) (header->restore1CodePage << 12);␊
␉dst = (unsigned long *) (header->restore1CodePhysPage << 12);␊
␉count = header->restore1PageCount;␊
␉proc = (header->restore1CodeOffset + ((uint32_t) dst));␊
␉newSP = header->restore1StackOffset + (header->restore1CodePage << 12);␊
␉newSP = header->restore1StackOffset + (header->restore1CodePhysPage << 12);␊
␊
␉src = (unsigned long *) (((u_int32_t) &header->fileExtentMap[0]) ␊
␉␉␉␉␉␉␉ + header->fileExtentMapSize);␊
␊
␉size = ReadFileAtOffset (image_filename, header, 0, sizeof(IOHibernateImageHeader));␊
␉printf("header read size %x\n", size);␊
␉␊
␊
␉imageSize = header->image1Size;␊
␉codeSize = header->restore1PageCount << 12;␊
␉if (kIOHibernateHeaderSignature != header->signature) {␊
␉␉}␊
␉}␊
#endif␊
␉␊
␊
␉allocSize = imageSize + ((4095 + sizeof(hibernate_graphics_t)) & ~4095);␊
␉␊
␊
␉mem_base = getmemorylimit() - allocSize;//TODO: lower this␊
␉␊
␊
␉printf("mem_base %x\n", mem_base);␊
␉if (((long long)mem_base + allocSize) < (1024 * bootInfo->extmem + 0x100000)) {␊
␉␉printf ("Not enough space to restore image. Press any key to proceed with normal boot.\n");␊
␊
␉bcopy(header, (void *) mem_base, sizeof(IOHibernateImageHeader));␊
␉header = (IOHibernateImageHeader *) mem_base;␊
␉␊
␊
␉imageSize -= sizeof(IOHibernateImageHeader);␊
␉buffer = (long)(header + 1);␊
␉␊
␉if (header->previewSize) {␊
␉␉uint64_t preview_offset = header->fileExtentMapSize - sizeof(header->fileExtentMap) + codeSize;␊
␉␉uint8_t progressSaveUnder[kIOHibernateProgressCount][kIOHibernateProgressSaveUnderSize];␊
␉␉␊
␊
␉␉ReadFileAtOffset (image_filename, (char *)buffer, sizeof(IOHibernateImageHeader), preview_offset+header->previewSize);␊
␉␉drawPreview ((void *)(long)(buffer+preview_offset + header->previewPageListSize), &(progressSaveUnder[0][0]));␊
␉␉previewTotalSectors = (imageSize-(preview_offset+header->previewSize))/512;␊
␉␉previewLoadedSectors = 0;␊
␉␉previewSaveunder = 0;␊
#if 0␊
␉␉AsereBLN:␊
␉␉check_vga_nvidia() didn't work as expected (recursion level > 0 & return value).␊
␉␉Unforutnaltely I cannot find a note why to switch back to text mode for nVidia cards only␊
␉␉and because it check_vga_nvidia does not work (cards normally are behind a bridge) I will␊
␉␉remove it completely␊
␉␉setVideoMode( VGA_TEXT_MODE, 0 );␊
␉//␉AsereBLN:␊
␉//␉check_vga_nvidia() didn't work as expected (recursion level > 0 & return value).␊
␉//␉Unforutnaltely I cannot find a note why to switch back to text mode for nVidia cards only␊
␉//␉and because it check_vga_nvidia does not work (cards normally are behind a bridge) I will␊
␉//␉remove it completely␊
␉//␉setVideoMode( VGA_TEXT_MODE, 0 );␊
#endif␊
␉} else {␊
␉␉ReadFileAtOffset (image_filename, (char *)buffer, sizeof(IOHibernateImageHeader), imageSize);␊
branches/Bungo/i386/boot2/IOHibernatePrivate.h
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* Copyright (c) 2004 Apple Computer, Inc. All rights reserved.␊
*␊
* @APPLE_OSREFERENCE_LICENSE_HEADER_START@␊
* ␊
*␊
* This file contains Original Code and/or Modifications of Original Code␊
* as defined in and that are subject to the Apple Public Source License␊
* Version 2.0 (the 'License'). You may not use this file except in␊
* unlawful or unlicensed copies of an Apple operating system, or to␊
* circumvent, violate, or enable the circumvention or violation of, any␊
* terms of an Apple operating system software license agreement.␊
* ␊
*␊
* Please obtain a copy of the License at␊
* http://www.opensource.apple.com/apsl/ and read it before using this file.␊
* ␊
*␊
* The Original Code and all software distributed under the License are␊
* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER␊
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,␊
* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.␊
* Please see the License for the specific language governing rights and␊
* limitations under the License.␊
* ␊
*␊
* @APPLE_OSREFERENCE_LICENSE_HEADER_END@␊
*/␊
␊
␊
struct IOPolledFileExtent␊
{␊
uint64_t␉start;␊
uint64_t␉length;␊
␉uint64_t␉start;␊
␉uint64_t␉length;␊
};␊
typedef struct IOPolledFileExtent IOPolledFileExtent;␊
␊
struct IOHibernateImageHeader␊
{␊
uint64_t␉imageSize;␊
uint64_t␉image1Size;␊
␊
uint32_t␉restore1CodePage;␊
uint32_t␉restore1PageCount;␊
uint32_t␉restore1CodeOffset;␊
uint32_t␉restore1StackOffset;␊
␊
uint32_t␉pageCount;␊
uint32_t␉bitmapSize;␊
␉uint64_t␉imageSize;␊
␉uint64_t␉image1Size;␊
␊
uint32_t␉restore1Sum;␊
uint32_t␉image1Sum;␊
uint32_t␉image2Sum;␊
␉uint32_t␉restore1CodePhysPage;␊
␉uint32_t␉reserved1;␊
␉uint64_t␉restore1CodeVirt;␊
␉uint32_t␉restore1PageCount;␊
␉uint32_t␉restore1CodeOffset;␊
␉uint32_t␉restore1StackOffset;␊
␊
uint32_t␉actualRestore1Sum;␊
uint32_t␉actualImage1Sum;␊
uint32_t␉actualImage2Sum;␊
uint32_t␉pageCount;␊
uint32_t␉bitmapSize;␊
␊
uint32_t␉actualUncompressedPages;␊
uint32_t␉conflictCount;␊
uint32_t␉nextFree;␊
uint32_t␉restore1Sum;␊
uint32_t␉image1Sum;␊
uint32_t␉image2Sum;␊
␊
uint32_t␉signature;␊
uint32_t␉processorFlags;␊
uint32_t␉actualRestore1Sum;␊
uint32_t␉actualImage1Sum;␊
uint32_t␉actualImage2Sum;␊
␊
uint32_t runtimePages;␊
uint32_t runtimePageCount;␊
uint32_t␉actualUncompressedPages;␊
uint32_t␉conflictCount;␊
uint32_t␉nextFree;␊
␊
uint8_t␉reserved2[16];␊
␊
uint64_t␉encryptStart;␊
uint64_t␉machineSignature;␊
uint32_t␉signature;␊
uint32_t␉processorFlags;␊
␊
uint32_t previewSize;␊
uint32_t previewPageListSize;␊
␉uint32_t␉runtimePages;␊
␉uint32_t␉runtimePageCount;␊
␊
uint32_t␉diag[4];␊
␉uint8_t␉␉reserved2[16];␊
␊
int32_t␉graphicsInfoOffset;␊
int32_t␉cryptVarsOffset;␊
int32_t␉memoryMapOffset;␊
uint32_t memoryMapSize;␊
uint32_t systemTableOffset;␊
␉uint64_t␉encryptStart;␊
␉uint64_t␉machineSignature;␊
␊
uint32_t␉reserved[77];␉␉// make sizeof == 512␊
␉uint32_t␉previewSize;␊
␉uint32_t␉previewPageListSize;␊
␊
uint32_t␉␉fileExtentMapSize;␊
IOPolledFileExtent␉fileExtentMap[2];␊
␉uint32_t␉diag[4];␊
␊
␉int32_t␉␉graphicsInfoOffset;␊
␉int32_t␉␉cryptVarsOffset;␊
␉int32_t␉␉memoryMapOffset;␊
␉uint32_t␉memoryMapSize;␊
␉uint32_t␉systemTableOffset;␊
␊
␉uint32_t␉reserved[77];␉␉// make sizeof == 512␊
␊
␉uint32_t␉␉fileExtentMapSize;␊
␉IOPolledFileExtent␉fileExtentMap[2];␊
};␊
typedef struct IOHibernateImageHeader IOHibernateImageHeader;␊
␊
␊
struct hibernate_bitmap_t␊
{␊
uint32_t␉first_page;␊
uint32_t␉last_page;␊
uint32_t␉bitmapwords;␊
uint32_t␉bitmap[0];␊
␉uint32_t␉first_page;␊
␉uint32_t␉last_page;␊
␉uint32_t␉bitmapwords;␊
␉uint32_t␉bitmap[0];␊
};␊
typedef struct hibernate_bitmap_t hibernate_bitmap_t;␊
␊
struct hibernate_page_list_t␊
{␊
uint32_t␉␉ list_size;␊
uint32_t␉␉ page_count;␊
uint32_t␉␉ bank_count;␊
hibernate_bitmap_t bank_bitmap[0];␊
␉uint32_t␉␉ list_size;␊
␉uint32_t␉␉ page_count;␊
␉uint32_t␉␉ bank_count;␊
␉hibernate_bitmap_t bank_bitmap[0];␊
};␊
typedef struct hibernate_page_list_t hibernate_page_list_t;␊
␊
␊
struct hibernate_cryptwakevars_t␊
{␊
uint8_t aes_iv[AES_BLOCK_SIZE];␊
␉uint8_t aes_iv[AES_BLOCK_SIZE];␊
};␊
typedef struct hibernate_cryptwakevars_t hibernate_cryptwakevars_t;␊
␊
struct hibernate_cryptvars_t␊
{␊
uint8_t aes_iv[AES_BLOCK_SIZE];␊
aes_ctx ctx;␊
␉uint8_t aes_iv[AES_BLOCK_SIZE];␊
␉aes_ctx ctx;␊
};␊
typedef struct hibernate_cryptvars_t hibernate_cryptvars_t;␊
␊
␊
enum ␊
{␊
kIOHibernateProgressCount = 19,␊
kIOHibernateProgressWidth = 7,␊
kIOHibernateProgressHeight = 16,␊
kIOHibernateProgressSpacing = 3,␊
kIOHibernateProgressOriginY = 81,␊
␉kIOHibernateProgressCount = 19,␊
␉kIOHibernateProgressWidth = 7,␊
␉kIOHibernateProgressHeight = 16,␊
␉kIOHibernateProgressSpacing = 3,␊
␉kIOHibernateProgressOriginY = 81,␊
␊
kIOHibernateProgressSaveUnderSize = 2*5+14*2,␊
␉kIOHibernateProgressSaveUnderSize = 2*5+14*2,␊
␊
kIOHibernateProgressLightGray = 230,␊
kIOHibernateProgressMidGray = 174,␊
kIOHibernateProgressDarkGray = 92␊
␉kIOHibernateProgressLightGray = 230,␊
␉kIOHibernateProgressMidGray = 174,␊
␉kIOHibernateProgressDarkGray = 92␊
};␊
␊
enum␊
{␊
kIOHibernatePostWriteSleep = 0,␊
kIOHibernatePostWriteWake = 1,␊
kIOHibernatePostWriteHalt = 2,␊
kIOHibernatePostWriteRestart = 3␊
enum {␊
␉kIOHibernatePostWriteSleep = 0,␊
␉kIOHibernatePostWriteWake = 1,␊
␉kIOHibernatePostWriteHalt = 2,␊
␉kIOHibernatePostWriteRestart = 3␊
};␊
␊
␊
struct hibernate_graphics_t␊
{␊
uint32_t physicalAddress;␉␉// Base address of video memory␊
uint32_t mode;␉␉␉// ␊
uint32_t rowBytes; ␉␉// Number of bytes per pixel row␊
uint32_t width; ␉␉// Width␊
uint32_t height; ␉␉// Height␊
uint32_t depth; ␉␉// Pixel Depth␊
␉uint32_t physicalAddress;␉␉// Base address of video memory␊
␉uint32_t mode;␉␉␉// ␊
␉uint32_t rowBytes; ␉␉// Number of bytes per pixel row␊
␉uint32_t width; ␉␉// Width␊
␉uint32_t height; ␉␉// Height␊
␉uint32_t depth; ␉␉// Pixel Depth␊
␊
uint8_t progressSaveUnder[kIOHibernateProgressCount][kIOHibernateProgressSaveUnderSize];␊
␉uint8_t progressSaveUnder[kIOHibernateProgressCount][kIOHibernateProgressSaveUnderSize];␊
};␊
typedef struct hibernate_graphics_t hibernate_graphics_t;␊
␊
static const uint8_t gIOHibernateProgressAlpha␉␉␉\␊
[kIOHibernateProgressHeight][kIOHibernateProgressWidth] = ␉\␊
{␉␉␉␉␉␉␉␉\␊
{ 0x00,0x63,0xd8,0xf0,0xd8,0x63,0x00 },␉␉␉\␊
{ 0x51,0xff,0xff,0xff,0xff,0xff,0x51 },␉␉␉\␊
{ 0xae,0xff,0xff,0xff,0xff,0xff,0xae },␉␉␉\␊
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },␉␉␉\␊
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },␉␉␉\␊
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },␉␉␉\␊
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },␉␉␉\␊
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },␉␉␉\␊
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },␉␉␉\␊
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },␉␉␉\␊
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },␉␉␉\␊
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },␉␉␉\␊
{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },␉␉␉\␊
{ 0xae,0xff,0xff,0xff,0xff,0xff,0xae },␉␉␉\␊
{ 0x54,0xff,0xff,0xff,0xff,0xff,0x54 },␉␉␉\␊
{ 0x00,0x66,0xdb,0xf3,0xdb,0x66,0x00 }␉␉␉\␊
␉{ 0x00,0x63,0xd8,0xf0,0xd8,0x63,0x00 },␉␉␉\␊
␉{ 0x51,0xff,0xff,0xff,0xff,0xff,0x51 },␉␉␉\␊
␉{ 0xae,0xff,0xff,0xff,0xff,0xff,0xae },␉␉␉\␊
␉{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },␉␉␉\␊
␉{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },␉␉␉\␊
␉{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },␉␉␉\␊
␉{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },␉␉␉\␊
␉{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },␉␉␉\␊
␉{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },␉␉␉\␊
␉{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },␉␉␉\␊
␉{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },␉␉␉\␊
␉{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },␉␉␉\␊
␉{ 0xc3,0xff,0xff,0xff,0xff,0xff,0xc3 },␉␉␉\␊
␉{ 0xae,0xff,0xff,0xff,0xff,0xff,0xae },␉␉␉\␊
␉{ 0x54,0xff,0xff,0xff,0xff,0xff,0x54 },␉␉␉\␊
␉{ 0x00,0x66,0xdb,0xf3,0xdb,0x66,0x00 }␉␉␉\␊
};␊
␊
#ifdef KERNEL␊
typedef void (*kern_get_file_extents_callback_t)(void * ref, uint64_t start, uint64_t size);␊
␊
struct kern_direct_file_io_ref_t *␊
kern_open_file_for_direct_io(const char * name, ␊
␉␉␉ kern_get_file_extents_callback_t callback, ␊
kern_open_file_for_direct_io(const char * name,␊
␉␉␉ kern_get_file_extents_callback_t callback,␊
␉␉␉ void * callback_ref,␊
␉␉␉ dev_t * device,␊
uint64_t * partitionbase_result,␊
hibernate_page_list_t *␊
hibernate_page_list_allocate(void);␊
␊
kern_return_t ␊
kern_return_t␊
hibernate_setup(IOHibernateImageHeader * header,␊
uint32_t free_page_ratio,␊
uint32_t free_page_time,␊
␉␉␉hibernate_page_list_t ** page_list_ret,␊
␉␉␉hibernate_page_list_t ** page_list_wired_ret,␊
boolean_t * encryptedswap);␊
kern_return_t ␊
kern_return_t␊
hibernate_teardown(hibernate_page_list_t * page_list,␊
hibernate_page_list_t * page_list_wired);␊
␊
kern_return_t ␊
kern_return_t␊
hibernate_processor_setup(IOHibernateImageHeader * header);␊
␊
void␊
␉␉␉ hibernate_page_list_t * page_list_wired,␊
␉␉␉ uint32_t * pagesOut);␊
␊
// mark pages to be saved, or pages not to be saved but available ␊
// mark pages to be saved, or pages not to be saved but available␊
// for scratch usage during restore␊
void␊
hibernate_page_list_setall_machine(hibernate_page_list_t * page_list,␊
hibernate_set_page_state(hibernate_page_list_t * page_list, hibernate_page_list_t * page_list_wired,␊
␉␉␉␉vm_offset_t ppnum, vm_offset_t count, uint32_t kind);␊
␊
void ␊
void␊
hibernate_page_bitset(hibernate_page_list_t * list, boolean_t set, uint32_t page);␊
␊
boolean_t ␊
boolean_t␊
hibernate_page_bittst(hibernate_page_list_t * list, uint32_t page);␊
␊
hibernate_bitmap_t *␊
extern hibernate_cryptwakevars_t * gIOHibernateCryptWakeVars;␊
␊
#define HIBLOG(fmt, args...)␉\␊
{ kprintf(fmt, ## args); printf(fmt, ## args); }␊
␉{ kprintf(fmt, ## args); printf(fmt, ## args); }␊
␊
#define HIBPRINT(fmt, args...)␉\␊
{ kprintf(fmt, ## args); }␊
␉{ kprintf(fmt, ## args); }␊
␊
#endif /* KERNEL */␊
␊
// gIOHibernateState, kIOHibernateStateKey␊
enum␊
{␊
kIOHibernateStateInactive = 0,␊
kIOHibernateStateHibernating ␉ = 1,␉/* writing image */␊
kIOHibernateStateWakingFromHibernate = 2␉/* booted and restored image */␊
␉kIOHibernateStateInactive = 0,␊
␉kIOHibernateStateHibernating ␉ = 1,␉/* writing image */␊
␉kIOHibernateStateWakingFromHibernate = 2␉/* booted and restored image */␊
};␊
␊
// gIOHibernateMode, kIOHibernateModeKey␊
enum␊
{␊
kIOHibernateModeOn = 0x00000001,␊
kIOHibernateModeSleep = 0x00000002,␊
kIOHibernateModeEncrypt = 0x00000004,␊
kIOHibernateModeDiscardCleanInactive = 0x00000008,␊
kIOHibernateModeDiscardCleanActive = 0x00000010,␊
kIOHibernateModeSwitch␉= 0x00000020,␊
kIOHibernateModeRestart␉= 0x00000040␊
␉kIOHibernateModeOn␉␉␉= 0x00000001,␊
␉kIOHibernateModeSleep␉␉␉= 0x00000002,␊
␉kIOHibernateModeEncrypt␉␉␉= 0x00000004,␊
␉kIOHibernateModeDiscardCleanInactive␉= 0x00000008,␊
␉kIOHibernateModeDiscardCleanActive␉= 0x00000010,␊
␉kIOHibernateModeSwitch␉␉␉= 0x00000020,␊
␉kIOHibernateModeRestart␉␉␉= 0x00000040␊
};␊
␊
// IOHibernateImageHeader.signature␊
enum␊
{␊
kIOHibernateHeaderSignature = 0x73696d65,␊
kIOHibernateHeaderInvalidSignature = 0x7a7a7a7a␊
␉kIOHibernateHeaderSignature = 0x73696d65,␊
␉kIOHibernateHeaderInvalidSignature = 0x7a7a7a7a␊
};␊
␊
// kind for hibernate_set_page_state()␊
enum␊
{␊
kIOHibernatePageStateFree = 0,␊
kIOHibernatePageStateWiredSave = 1,␊
kIOHibernatePageStateUnwiredSave = 2␊
␉kIOHibernatePageStateFree = 0,␊
␉kIOHibernatePageStateWiredSave = 1,␊
␉kIOHibernatePageStateUnwiredSave = 2␊
};␊
␊
#define kIOHibernateModeKey␉␉"Hibernate Mode"␊
#define kIOHibernatePreviewActiveKey␉"IOHibernatePreviewActive"␊
// values for kIOHibernatePreviewActiveKey␊
enum {␊
kIOHibernatePreviewActive = 0x00000001,␊
kIOHibernatePreviewUpdates = 0x00000002␊
␉kIOHibernatePreviewActive = 0x00000001,␊
␉kIOHibernatePreviewUpdates = 0x00000002␊
};␊
␊
#define kIOHibernateBootImageKey␉"boot-image"␊

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