Chameleon

Chameleon Commit Details

Date:2014-11-13 00:01:55 (5 years 3 months ago)
Author:ErmaC
Commit:2470
Parents: 2469
Message:Rename CPU_MODEL_xxx into CPUID_MODEL_xxx follow Apple source name
Changes:
M/branches/ErmaC/Enoch/CHANGES
M/branches/ErmaC/Enoch/i386/libsaio/smbios.c
M/branches/ErmaC/Enoch/i386/libsaio/state_generator.c
M/branches/ErmaC/Enoch/i386/libsaio/cpu.c
M/branches/ErmaC/Enoch/i386/libsaio/platform.h
M/branches/ErmaC/Enoch/i386/libsaio/smbios_getters.c
M/branches/ErmaC/Enoch/i386/modules/AcpiCodec/acpi_codec.c

File differences

branches/ErmaC/Enoch/i386/libsaio/cpu.c
308308
309309
310310
311
312
311
312
313313
314314
315315
......
317317
318318
319319
320
321
322
323
324
325
326
327
328
329
330
331
320
321
322
323
324
325
326
327
328
329
330
331
332332
333333
334334
335335
336336
337
338
339
337
338
339
340340
341341
342342
......
346346
347347
348348
349
349
350350
351351
352352
......
461461
462462
463463
464
465
466
467
468
469
470
464
465
466
467
468
469
470
471471
472
473
474
475
476
477
472
473
474
475
476
477
478478
479
480
479
480
481481
482482
483483
if (p->CPU.Vendor == CPUID_VENDOR_INTEL &&
p->CPU.Family == 0x06 &&
p->CPU.Model >= CPU_MODEL_NEHALEM &&
p->CPU.Model != CPU_MODEL_ATOM// MSR is *NOT* available on the Intel Atom CPU
p->CPU.Model >= CPUID_MODEL_NEHALEM &&
p->CPU.Model != CPUID_MODEL_ATOM// MSR is *NOT* available on the Intel Atom CPU
) {
/*
* Find the number of enabled cores and threads
*/
switch (p->CPU.Model)
{
case CPU_MODEL_NEHALEM:
case CPU_MODEL_FIELDS:
case CPU_MODEL_DALES:
case CPU_MODEL_NEHALEM_EX:
case CPU_MODEL_JAKETOWN:
case CPU_MODEL_SANDYBRIDGE:
case CPU_MODEL_IVYBRIDGE:
case CPU_MODEL_HASWELL:
case CPU_MODEL_HASWELL_SVR:
//case CPU_MODEL_HASWELL_H:
case CPU_MODEL_HASWELL_ULT:
case CPU_MODEL_CRYSTALWELL:
case CPUID_MODEL_NEHALEM:
case CPUID_MODEL_FIELDS:
case CPUID_MODEL_DALES:
case CPUID_MODEL_NEHALEM_EX:
case CPUID_MODEL_JAKETOWN:
case CPUID_MODEL_SANDYBRIDGE:
case CPUID_MODEL_IVYBRIDGE:
case CPUID_MODEL_HASWELL:
case CPUID_MODEL_HASWELL_SVR:
//case CPUID_MODEL_HASWELL_H:
case CPUID_MODEL_HASWELL_ULT:
case CPUID_MODEL_CRYSTALWELL:
msr = rdmsr64(MSR_CORE_THREAD_COUNT);
p->CPU.NoCores= (uint8_t)bitfield((uint32_t)msr, 31, 16);
p->CPU.NoThreads= (uint8_t)bitfield((uint32_t)msr, 15, 0);
break;
case CPU_MODEL_DALES_32NM:
case CPU_MODEL_WESTMERE:
case CPU_MODEL_WESTMERE_EX:
case CPUID_MODEL_DALES_32NM:
case CPUID_MODEL_WESTMERE:
case CPUID_MODEL_WESTMERE_EX:
msr = rdmsr64(MSR_CORE_THREAD_COUNT);
p->CPU.NoCores= (uint8_t)bitfield((uint32_t)msr, 19, 16);
p->CPU.NoThreads= (uint8_t)bitfield((uint32_t)msr, 15, 0);
p->CPU.NoCores = bitfield(p->CPU.CPUID[CPUID_1][1], 23, 16);
p->CPU.NoThreads = (uint8_t)(p->CPU.LogicalPerPackage & 0xff);
//workaround for N270. I don't know why it detected wrong
if ((p->CPU.Model == CPU_MODEL_ATOM) &&
if ((p->CPU.Model == CPUID_MODEL_ATOM) &&
(p->CPU.Stepping == 2)) {
p->CPU.NoCores = 1;
}
if ((p->CPU.Family == 0x06 && p->CPU.Model >= 0x0c) || (p->CPU.Family == 0x0f && p->CPU.Model >= 0x03)){
/* Nehalem CPU model */
switch (p->CPU.Model) {
case CPU_MODEL_NEHALEM:
case CPU_MODEL_FIELDS:
case CPU_MODEL_DALES:
case CPU_MODEL_DALES_32NM:
case CPU_MODEL_WESTMERE:
case CPU_MODEL_NEHALEM_EX:
case CPU_MODEL_WESTMERE_EX:
case CPUID_MODEL_NEHALEM:
case CPUID_MODEL_FIELDS:
case CPUID_MODEL_DALES:
case CPUID_MODEL_DALES_32NM:
case CPUID_MODEL_WESTMERE:
case CPUID_MODEL_NEHALEM_EX:
case CPUID_MODEL_WESTMERE_EX:
/* --------------------------------------------------------- */
case CPU_MODEL_SANDYBRIDGE:
case CPU_MODEL_JAKETOWN:
case CPU_MODEL_IVYBRIDGE_XEON:
case CPU_MODEL_IVYBRIDGE:
case CPU_MODEL_HASWELL:
case CPU_MODEL_HASWELL_SVR:
case CPUID_MODEL_SANDYBRIDGE:
case CPUID_MODEL_JAKETOWN:
case CPUID_MODEL_IVYBRIDGE_XEON:
case CPUID_MODEL_IVYBRIDGE:
case CPUID_MODEL_HASWELL:
case CPUID_MODEL_HASWELL_SVR:
case CPU_MODEL_HASWELL_ULT:
case CPU_MODEL_CRYSTALWELL:
case CPUID_MODEL_HASWELL_ULT:
case CPUID_MODEL_CRYSTALWELL:
/* --------------------------------------------------------- */
msr = rdmsr64(MSR_PLATFORM_INFO);
DBG("msr(%d): platform_info %08x\n", __LINE__, bitfield(msr, 31, 0));
branches/ErmaC/Enoch/i386/libsaio/platform.h
3030
3131
3232
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
7777
7878
7979
#define CPUID_889
#define CPUID_MAX10
#define CPU_MODEL_ANY0x00
#define CPU_MODEL_UNKNOWN0x01
#define CPU_MODEL_PRESCOTT0x03// Celeron D, Pentium 4 (90nm)
#define CPU_MODEL_NOCONA0x04// Xeon Nocona/Paxville, Irwindale (90nm)
#define CPU_MODEL_PRESLER0x06// Pentium 4, Pentium D (65nm)
#define CPU_MODEL_PENTIUM_M0x09// Banias Pentium M (130nm)
#define CPU_MODEL_DOTHAN0x0D// Dothan Pentium M, Celeron M (90nm)
#define CPU_MODEL_YONAH0x0E// Sossaman, Yonah
#define CPU_MODEL_MEROM0x0F// Allendale, Conroe, Kentsfield, Woodcrest, Clovertown, Tigerton, Merom
#define CPU_MODEL_CONROE0x0F//
#define CPU_MODEL_CELERON0x16// Merom, Conroe (65nm)
#define CPU_MODEL_PENRYN0x17// Wolfdale, Yorkfield, Harpertown, Penryn
#define CPU_MODEL_WOLFDALE0x17//
#define CPU_MODEL_NEHALEM0x1A// Bloomfield. Nehalem-EP, Nehalem-WS, Gainestown
#define CPU_MODEL_ATOM0x1C// Pineview, Bonnell
#define CPU_MODEL_XEON_MP0x1D// MP 7400
#define CPU_MODEL_FIELDS0x1E// Lynnfield, Clarksfield, Jasper Forest
#define CPU_MODEL_DALES0x1F// Havendale, Auburndale
#define CPU_MODEL_DALES_32NM0x25// Clarkdale, Arrandale
#define CPU_MODEL_ATOM_SAN0x26// Lincroft
#define CPU_MODEL_LINCROFT0x27// Bonnell
#define CPU_MODEL_SANDYBRIDGE0x2A// Sandy Bridge
#define CPU_MODEL_WESTMERE0x2C// Gulftown, Westmere-EP, Westmere-WS
#define CPU_MODEL_JAKETOWN0x2D// Sandy Bridge-E, Sandy Bridge-EP
#define CPU_MODEL_NEHALEM_EX0x2E// Beckton
#define CPU_MODEL_WESTMERE_EX0x2F// Westmere-EX
//#define CPU_MODEL_BONNELL_ATOM0x35// Bonnell
#define CPU_MODEL_ATOM_20000x36// Cedarview / Saltwell
#define CPU_MODEL_SILVERMONT0x37// Atom Silvermont
#define CPU_MODEL_IVYBRIDGE0x3A// Ivy Bridge
#define CPU_MODEL_HASWELL0x3C// Haswell DT
#define CPU_MODEL_BROADWELL0x3D// Core M, Broadwell / Core-AVX2
#define CPU_MODEL_IVYBRIDGE_XEON0x3E// Ivy Bridge Xeon
#define CPU_MODEL_HASWELL_SVR0x3F// Haswell Server
//#define CPU_MODEL_HASWELL_H0x??// Haswell H
#define CPU_MODEL_HASWELL_ULT0x45// Haswell ULT
#define CPU_MODEL_CRYSTALWELL0x46// Crystal Well
// 4A silvermont / atom
#define CPU_MODEL_AVOTON0x4D// Silvermont/Avoton Atom C2000
// 4E Core???
#define CPU_MODEL_BRODWELL_SVR0x4F// Broadwell Server
#define CPU_MODEL_BRODWELL_MSVR0x56// Broadwell Micro Server
// 5A silvermont / atom
// 5D silvermont / atom
#define CPUID_MODEL_ANY0x00
#define CPUID_MODEL_UNKNOWN0x01
#define CPUID_MODEL_PRESCOTT0x03// Celeron D, Pentium 4 (90nm)
#define CPUID_MODEL_NOCONA0x04// Xeon Nocona/Paxville, Irwindale (90nm)
#define CPUID_MODEL_PRESLER0x06// Pentium 4, Pentium D (65nm)
#define CPUID_MODEL_PENTIUM_M0x09// Banias Pentium M (130nm)
#define CPUID_MODEL_DOTHAN0x0D// Dothan Pentium M, Celeron M (90nm)
#define CPUID_MODEL_YONAH0x0E// Sossaman, Yonah
#define CPUID_MODEL_MEROM0x0F// Allendale, Conroe, Kentsfield, Woodcrest, Clovertown, Tigerton, Merom
#define CPUID_MODEL_CONROE0x0F//
#define CPUID_MODEL_CELERON0x16// Merom, Conroe (65nm), Celeron (45nm)
#define CPUID_MODEL_PENRYN0x17// Wolfdale, Yorkfield, Harpertown, Penryn
#define CPUID_MODEL_WOLFDALE0x17// Xeon 31xx, 33xx, 52xx, 54xx, Core 2 Quad 8xxx and 9xxx
#define CPUID_MODEL_NEHALEM0x1A// Bloomfield. Nehalem-EP, Nehalem-WS, Gainestown
#define CPUID_MODEL_ATOM0x1C// Pineview, Bonnell
#define CPUID_MODEL_XEON_MP0x1D// MP 7400
#define CPUID_MODEL_FIELDS0x1E// Lynnfield, Clarksfield, Jasper Forest
#define CPUID_MODEL_DALES0x1F// Havendale, Auburndale
#define CPUID_MODEL_DALES_32NM0x25// Clarkdale, Arrandale
#define CPUID_MODEL_ATOM_SAN0x26// Lincroft
#define CPUID_MODEL_LINCROFT0x27// Bonnell
#define CPUID_MODEL_SANDYBRIDGE0x2A// Sandy Bridge
#define CPUID_MODEL_WESTMERE0x2C// Gulftown, Westmere-EP, Westmere-WS
#define CPUID_MODEL_JAKETOWN0x2D// Sandy Bridge-E, Sandy Bridge-EP
#define CPUID_MODEL_NEHALEM_EX0x2E// Beckton
#define CPUID_MODEL_WESTMERE_EX0x2F// Westmere-EX
//#define CPUID_MODEL_BONNELL_ATOM0x35// Atom Family Bonnell
#define CPUID_MODEL_ATOM_20000x36// Cedarview / Saltwell
#define CPUID_MODEL_SILVERMONT0x37// Atom E3000, Z3000 Atom Silvermont
#define CPUID_MODEL_IVYBRIDGE0x3A// Ivy Bridge
#define CPUID_MODEL_HASWELL0x3C// Haswell DT
#define CPUID_MODEL_BROADWELL0x3D// Core M, Broadwell / Core-AVX2
#define CPUID_MODEL_IVYBRIDGE_XEON0x3E// Ivy Bridge Xeon
#define CPUID_MODEL_HASWELL_SVR0x3F// Haswell Server, Xeon E5-2600/1600 v3 (Haswell-E)
//#define CPUID_MODEL_HASWELL_H0x??// Haswell H
#define CPUID_MODEL_HASWELL_ULT0x45// Haswell ULT, 4th gen Core, Xeon E3-12xx v3
#define CPUID_MODEL_CRYSTALWELL0x46// Crystal Well, 4th gen Core, Xeon E3-12xx v3
//#define CPUID_MODEL_0x4A// Future Atom E3000, Z3000 silvermont / atom
#define CPUID_MODEL_AVOTON0x4D// Silvermont/Avoton Atom C2000
//#define CPUID_MODEL_0x4E// Future Core
#define CPUID_MODEL_BRODWELL_SVR0x4F// Broadwell Server
#define CPUID_MODEL_BRODWELL_MSVR0x56// Broadwell Micro Server, Future Xeon
//#define CPUID_MODEL_0x5A// Silvermont, Future Atom E3000, Z3000
//#define CPUID_MODEL_0x5D// Silvermont, Future Atom E3000, Z3000
/* Unknown CPU */
#define CPU_STRING_UNKNOWN"Unknown CPU Type"
branches/ErmaC/Enoch/i386/libsaio/smbios.c
691691
692692
693693
694
695
696
694
695
696
697697
698698
699699
......
703703
704704
705705
706
707
706
707
708708
709709
710710
......
714714
715715
716716
717
718
717
718
719719
720720
721721
......
726726
727727
728728
729
730
731
732
729
730
731
732
733733
734734
735735
......
10081008
10091009
10101010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
10261026
10271027
10281028
{
switch (Platform.CPU.Model)
{
case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
case CPU_MODEL_DALES:
case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
case CPUID_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
case CPUID_MODEL_DALES:
case CPUID_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
defaultBIOSInfo.version= kDefaultiMacNehalemBIOSVersion;
defaultBIOSInfo.releaseDate= kDefaultiMacNehalemBIOSReleaseDate;
defaultSystemInfo.productName= kDefaultiMacNehalem;
defaultChassis.chassisType = kSMBchassisAllInOne;
break;
case CPU_MODEL_SANDYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (32nm)
case CPU_MODEL_IVYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (22nm)
case CPUID_MODEL_SANDYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (32nm)
case CPUID_MODEL_IVYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (22nm)
defaultBIOSInfo.version = kDefaultiMacSandyBIOSVersion;
defaultBIOSInfo.releaseDate = kDefaultiMacSandyBIOSReleaseDate;
defaultSystemInfo.productName= kDefaultiMacSandy;
defaultChassis.chassisType = kSMBchassisAllInOne;
break;
case CPU_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
case CPU_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x
case CPUID_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
case CPUID_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x
defaultBIOSInfo.version= kDefaultMacProNehalemBIOSVersion;
defaultBIOSInfo.releaseDate= kDefaultMacProNehalemBIOSReleaseDate;
defaultSystemInfo.productName= kDefaultMacProNehalem;
defaultChassis.chassisType = kSMBchassisTower;
break;
case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
case CPU_MODEL_JAKETOWN:// Intel Core i7, Xeon E5 LGA2011 (32nm)
case CPU_MODEL_IVYBRIDGE_XEON:// Intel Core i7, Xeon E5 v2 LGA2011 (22nm)
case CPUID_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
case CPUID_MODEL_WESTMERE_EX:// Intel Xeon E7
case CPUID_MODEL_JAKETOWN:// Intel Core i7, Xeon E5 LGA2011 (32nm)
case CPUID_MODEL_IVYBRIDGE_XEON:// Intel Core i7, Xeon E5 v2 LGA2011 (22nm)
defaultBIOSInfo.version= kDefaultMacProWestmereBIOSVersion;
defaultBIOSInfo.releaseDate= kDefaultMacProWestmereBIOSReleaseDate;
defaultSystemInfo.productName= kDefaultMacProWestmere;
switch (Platform.CPU.Model)
{
case 0x19:// Intel Core i5 650 @3.20 Ghz
case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
case CPU_MODEL_DALES:
case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
case CPU_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
case CPU_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x
case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
case CPU_MODEL_SANDYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (32nm)
case CPU_MODEL_IVYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (22nm)
case CPU_MODEL_IVYBRIDGE_XEON:
case CPU_MODEL_JAKETOWN:// Intel Core i7, Xeon E5 LGA2011 (32nm)
case CPU_MODEL_HASWELL:
case CPU_MODEL_HASWELL_SVR:
case CPU_MODEL_HASWELL_ULT:
case CPU_MODEL_CRYSTALWELL:
case CPUID_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
case CPUID_MODEL_DALES:
case CPUID_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
case CPUID_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
case CPUID_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x
case CPUID_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
case CPUID_MODEL_WESTMERE_EX:// Intel Xeon E7
case CPUID_MODEL_SANDYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (32nm)
case CPUID_MODEL_IVYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (22nm)
case CPUID_MODEL_IVYBRIDGE_XEON:
case CPUID_MODEL_JAKETOWN:// Intel Core i7, Xeon E5 LGA2011 (32nm)
case CPUID_MODEL_HASWELL:
case CPUID_MODEL_HASWELL_SVR:
case CPUID_MODEL_HASWELL_ULT:
case CPUID_MODEL_CRYSTALWELL:
break;
branches/ErmaC/Enoch/i386/libsaio/state_generator.c
102102
103103
104104
105
106
107
108
109
105
106
107
108
109
110110
111111
112112
......
227227
228228
229229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246246
247247
248
249
250
251
248
249
250
251
252252
253253
254254
{
switch (Platform.CPU.Model)
{
case CPU_MODEL_DOTHAN:// Intel Pentium M
case CPU_MODEL_YONAH:// Intel Mobile Core Solo, Duo
case CPU_MODEL_MEROM:// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
case CPU_MODEL_PENRYN:// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
case CPU_MODEL_ATOM:// Intel Atom (45nm)
case CPUID_MODEL_DOTHAN:// Intel Pentium M
case CPUID_MODEL_YONAH:// Intel Mobile Core Solo, Duo
case CPUID_MODEL_MEROM:// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
case CPUID_MODEL_PENRYN:// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
case CPUID_MODEL_ATOM:// Intel Atom (45nm)
{
bool cpu_dynamic_fsb = false;
break;
}
case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
case CPU_MODEL_DALES:
case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
case CPU_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
case CPU_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65xx
case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
case CPU_MODEL_SANDYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (32nm)
case CPU_MODEL_JAKETOWN:// Intel Core i7, Xeon E5 LGA2011 (32nm)
case CPU_MODEL_IVYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (22nm)
case CPU_MODEL_HASWELL://
case CPU_MODEL_IVYBRIDGE_XEON: //
//case CPU_MODEL_HASWELL_H://
case CPU_MODEL_HASWELL_SVR://
case CPU_MODEL_HASWELL_ULT://
case CPU_MODEL_CRYSTALWELL://
case CPUID_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
case CPUID_MODEL_DALES:
case CPUID_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
case CPUID_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
case CPUID_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65xx
case CPUID_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
case CPUID_MODEL_WESTMERE_EX:// Intel Xeon E7
case CPUID_MODEL_SANDYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (32nm)
case CPUID_MODEL_JAKETOWN:// Intel Core i7, Xeon E5 LGA2011 (32nm)
case CPUID_MODEL_IVYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (22nm)
case CPUID_MODEL_HASWELL://
case CPUID_MODEL_IVYBRIDGE_XEON: //
//case CPUID_MODEL_HASWELL_H://
case CPUID_MODEL_HASWELL_SVR://
case CPUID_MODEL_HASWELL_ULT://
case CPUID_MODEL_CRYSTALWELL://
{
if ((Platform.CPU.Model == CPU_MODEL_SANDYBRIDGE) || (Platform.CPU.Model == CPU_MODEL_JAKETOWN) ||
(Platform.CPU.Model == CPU_MODEL_IVYBRIDGE) || (Platform.CPU.Model == CPU_MODEL_HASWELL) ||
(Platform.CPU.Model == CPU_MODEL_IVYBRIDGE_XEON) || (Platform.CPU.Model == CPU_MODEL_HASWELL_SVR) ||
(Platform.CPU.Model == CPU_MODEL_HASWELL_ULT) || (Platform.CPU.Model == CPU_MODEL_CRYSTALWELL))
if ((Platform.CPU.Model == CPUID_MODEL_SANDYBRIDGE) || (Platform.CPU.Model == CPUID_MODEL_JAKETOWN) ||
(Platform.CPU.Model == CPUID_MODEL_IVYBRIDGE) || (Platform.CPU.Model == CPUID_MODEL_HASWELL) ||
(Platform.CPU.Model == CPUID_MODEL_IVYBRIDGE_XEON) || (Platform.CPU.Model == CPUID_MODEL_HASWELL_SVR) ||
(Platform.CPU.Model == CPUID_MODEL_HASWELL_ULT) || (Platform.CPU.Model == CPUID_MODEL_CRYSTALWELL))
{
maximum.Control = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0xff;
}
branches/ErmaC/Enoch/i386/libsaio/smbios_getters.c
2727
2828
2929
30
31
32
33
34
35
36
37
38
39
30
31
32
33
34
35
36
37
38
39
4040
4141
4242
......
7070
7171
7272
73
74
75
76
77
78
79
73
74
75
76
77
78
79
80
8081
8182
8283
83
84
85
86
87
88
89
90
91
92
93
94
84
85
86
87
88
89
90
91
92
93
94
95
9596
9697
9798
......
163164
164165
165166
166
167
168
169
170
171
167
168
169
170
171
172
173
174
172175
173176
174177
175178
176
177
178
179
180
181
179182
180183
181184
182
183
184
185
185
186
187
188
189
186190
187191
188192
......
193197
194198
195199
196
197
200
201
198202
199203
200
201
202
203
204
205
204
205
206
207
208
209
210
206211
207212
208213
......
222227
223228
224229
225
226
227
228
230
231
232
233
234
229235
230236
231237
......
246252
247253
248254
249
250
251
255
256
257
258
252259
253260
254261
......
269276
270277
271278
272
273
279
280
281
274282
275283
276284
......
291299
292300
293301
294
295
302
303
296304
297305
298
299
300
301
302
306
307
308
309
310
311
303312
304313
305314
{
switch (Platform.CPU.Model)
{
// set external clock to 0 for SANDY
// removes FSB info from system profiler as on real mac's.
case CPU_MODEL_SANDYBRIDGE:
case CPU_MODEL_JAKETOWN:
case CPU_MODEL_IVYBRIDGE_XEON:
case CPU_MODEL_IVYBRIDGE:
case CPU_MODEL_HASWELL:
case CPU_MODEL_HASWELL_SVR:
case CPU_MODEL_HASWELL_ULT:
case CPU_MODEL_CRYSTALWELL:
// set external clock to 0 for SANDY
// removes FSB info from system profiler as on real mac's.
case CPUID_MODEL_SANDYBRIDGE:
case CPUID_MODEL_JAKETOWN:
case CPUID_MODEL_IVYBRIDGE_XEON:
case CPUID_MODEL_IVYBRIDGE:
case CPUID_MODEL_HASWELL:
case CPUID_MODEL_HASWELL_SVR:
case CPUID_MODEL_HASWELL_ULT:
case CPUID_MODEL_CRYSTALWELL:
value->word = 0;
break;
{
case 0x06:
{
switch (Platform.CPU.Model) {
case CPU_MODEL_PENTIUM_M:
case CPU_MODEL_DOTHAN:// Intel Pentium M
case CPU_MODEL_YONAH:// Intel Mobile Core Solo, Duo
case CPU_MODEL_MEROM:// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
case CPU_MODEL_PENRYN:// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
case CPU_MODEL_ATOM:// Intel Atom (45nm)
switch (Platform.CPU.Model)
{
case CPUID_MODEL_PENTIUM_M:
case CPUID_MODEL_DOTHAN:// Intel Pentium M
case CPUID_MODEL_YONAH:// Intel Mobile Core Solo, Duo
case CPUID_MODEL_MEROM:// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
case CPUID_MODEL_PENRYN:// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
case CPUID_MODEL_ATOM:// Intel Atom (45nm)
return false;
case 0x19:
case CPU_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
case CPU_MODEL_DALES:
case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
case CPU_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x
case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
case CPU_MODEL_SANDYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (32nm)
case CPU_MODEL_JAKETOWN:// Intel Core i7, Xeon E5 LGA2011 (32nm)
case CPU_MODEL_IVYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (22nm)
case CPU_MODEL_IVYBRIDGE_XEON:
case CPU_MODEL_HASWELL:
case CPUID_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
case CPUID_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
case CPUID_MODEL_DALES:
case CPUID_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
case CPUID_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
case CPUID_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x
case CPUID_MODEL_WESTMERE_EX:// Intel Xeon E7
case CPUID_MODEL_SANDYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (32nm)
case CPUID_MODEL_JAKETOWN:// Intel Core i7, Xeon E5 LGA2011 (32nm)
case CPUID_MODEL_IVYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (22nm)
case CPUID_MODEL_IVYBRIDGE_XEON:
case CPUID_MODEL_HASWELL:
{
// thanks to dgobe for i3/i5/i7 bus speed detection
int nhm_bus = 0x3F;
case 0x0F:
case 0x06:
{
switch (Platform.CPU.Model) {
case CPU_MODEL_PENTIUM_M:
case CPU_MODEL_DOTHAN:// 0x0D - Intel Pentium M model D
case CPU_MODEL_PRESCOTT:
case CPU_MODEL_NOCONA:
if (strstr(Platform.CPU.BrandString, "Xeon")) {
switch (Platform.CPU.Model)
{
case CPUID_MODEL_PENTIUM_M:
case CPUID_MODEL_DOTHAN:// 0x0D - Intel Pentium M model D
case CPUID_MODEL_PRESCOTT:
case CPUID_MODEL_NOCONA:
if (strstr(Platform.CPU.BrandString, "Xeon"))
{
value->word = 0x402;// 1026 - Xeon
}
return true;
case CPU_MODEL_PRESLER:
case CPU_MODEL_CELERON:
case CPU_MODEL_YONAH:// 0x0E - Intel Mobile Core Solo, Duo
case CPUID_MODEL_PRESLER:
case CPUID_MODEL_CELERON:
case CPUID_MODEL_YONAH:// 0x0E - Intel Mobile Core Solo, Duo
value->word = 0x201;// 513
return true;
case CPU_MODEL_MEROM:// 0x0F - Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
case CPU_MODEL_XEON_MP:// 0x1D - Six-Core Xeon 7400, "Dunnington", 45nm
case CPU_MODEL_PENRYN:// 0x17 - Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
if (strstr(Platform.CPU.BrandString, "Xeon")) {
case CPUID_MODEL_MEROM:// 0x0F - Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
case CPUID_MODEL_XEON_MP:// 0x1D - Six-Core Xeon 7400, "Dunnington", 45nm
case CPUID_MODEL_PENRYN:// 0x17 - Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
if (strstr(Platform.CPU.BrandString, "Xeon"))
{
value->word = 0x402;// 1026 - Xeon
return true;
}
}
return true;
case CPU_MODEL_LINCROFT:// 0x27 - Intel Atom, "Lincroft", 45nm
case CPU_MODEL_ATOM:// 0x1C - Intel Atom (45nm)
case CPUID_MODEL_LINCROFT:// 0x27 - Intel Atom, "Lincroft", 45nm
case CPUID_MODEL_ATOM:// 0x1C - Intel Atom (45nm)
return true;
case CPU_MODEL_NEHALEM_EX:// 0x2E - Nehalem-ex, "Beckton", 45nm
case CPU_MODEL_NEHALEM:// 0x1A - Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
case CPU_MODEL_FIELDS:// 0x1E - Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
case CPU_MODEL_DALES:// 0x1F - Intel Core i5, i7 LGA1156 (45nm) (Havendale, Auburndale)
if (strstr(Platform.CPU.BrandString, "Xeon")) {
value->word = 0x501;// 1281 - Lynnfiled Quad-Core Xeon
case CPUID_MODEL_NEHALEM_EX:// 0x2E - Nehalem-ex, "Beckton", 45nm
case CPUID_MODEL_NEHALEM:// 0x1A - Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
case CPUID_MODEL_FIELDS:// 0x1E - Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
case CPUID_MODEL_DALES:// 0x1F - Intel Core i5, i7 LGA1156 (45nm) (Havendale, Auburndale)
if (strstr(Platform.CPU.BrandString, "Xeon"))
{
value->word = 0x501;// 1281 - Lynnfiled Quad-Core Xeon
return true;
}
if (strstr(Platform.CPU.BrandString, "Core(TM) i3")) {
}
return true;
case CPU_MODEL_DALES_32NM:// 0x25 - Intel Core i3, i5 LGA1156 (32nm) (Clarkdale, Arrandale)
case CPU_MODEL_WESTMERE:// 0x2C - Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
case CPU_MODEL_WESTMERE_EX:// 0x2F - Intel Xeon E7
if (strstr(Platform.CPU.BrandString, "Xeon")) {
case CPUID_MODEL_DALES_32NM:// 0x25 - Intel Core i3, i5 LGA1156 (32nm) (Clarkdale, Arrandale)
case CPUID_MODEL_WESTMERE:// 0x2C - Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
case CPUID_MODEL_WESTMERE_EX:// 0x2F - Intel Xeon E7
if (strstr(Platform.CPU.BrandString, "Xeon"))
{
value->word = 0x501;// 1281 - Xeon
return true;
}
}
return true;
case CPU_MODEL_JAKETOWN:// 0x2D - Intel Core i7, Xeon E5-xxxx LGA2011 (32nm)
case CPU_MODEL_SANDYBRIDGE:// 0x2A - Intel Core i3, i5, i7 LGA1155 (32nm)
if (strstr(Platform.CPU.BrandString, "Xeon")) {
case CPUID_MODEL_JAKETOWN:// 0x2D - Intel Core i7, Xeon E5-xxxx LGA2011 (32nm)
case CPUID_MODEL_SANDYBRIDGE:// 0x2A - Intel Core i3, i5, i7 LGA1155 (32nm)
if (strstr(Platform.CPU.BrandString, "Xeon"))
{
value->word = 0x501;// 1281 - Xeon
return true;
}
}
return true;
case CPU_MODEL_IVYBRIDGE:// 0x3A - Intel Core i3, i5, i7 LGA1155 (22nm)
if (strstr(Platform.CPU.BrandString, "Xeon")) {
case CPUID_MODEL_IVYBRIDGE:// 0x3A - Intel Core i3, i5, i7 LGA1155 (22nm)
if (strstr(Platform.CPU.BrandString, "Xeon"))
{
value->word = 0xA01;// 2561 - Xeon
return true;
}
}
return true;
case CPU_MODEL_IVYBRIDGE_XEON:// 0x3E - Mac Pro 6,1
value->word = 0xA01;// 2561 - Xeon
case CPUID_MODEL_IVYBRIDGE_XEON:// 0x3E - Mac Pro 6,1
value->word = 0xA01;// 2561 - Xeon
return true;
case CPU_MODEL_HASWELL:// 0x3C -
case CPU_MODEL_HASWELL_SVR:// 0x3F -
case CPU_MODEL_HASWELL_ULT:// 0x45 -
case CPU_MODEL_CRYSTALWELL:// 0x46
if (strstr(Platform.CPU.BrandString, "Xeon")) {
case CPUID_MODEL_HASWELL:// 0x3C -
case CPUID_MODEL_HASWELL_SVR:// 0x3F -
case CPUID_MODEL_HASWELL_ULT:// 0x45 -
case CPUID_MODEL_CRYSTALWELL:// 0x46
if (strstr(Platform.CPU.BrandString, "Xeon"))
{
value->word = 0xA01;// 2561 - Xeon
return true;
}
branches/ErmaC/Enoch/i386/modules/AcpiCodec/acpi_codec.c
775775
776776
777777
778
778
779779
780780
781781
782782
783
783
784784
785785
786786
......
10711071
10721072
10731073
1074
1075
1076
1077
1078
1074
1075
1076
1077
1078
10791079
10801080
10811081
10821082
10831083
1084
1084
10851085
10861086
10871087
......
11211121
11221122
11231123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1124
1125
1126
1127
1128
1129
1130
1131
1132
11331133
11341134
11351135
......
13321332
13331333
13341334
1335
1336
1337
1338
1339
1335
1336
1337
1338
1339
13401340
13411341
13421342
......
14551455
14561456
14571457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1458
1459
1460
1461
1462
1463
1464
1465
1466
14671467
14681468
14691469
static bool is_sandybridge(void)
{
return Platform.CPU.Model == CPU_MODEL_SANDYBRIDGE;
return Platform.CPU.Model == CPUID_MODEL_SANDYBRIDGE;
}
static bool is_jaketown(void)
{
return Platform.CPU.Model == CPU_MODEL_JAKETOWN;
return Platform.CPU.Model == CPUID_MODEL_JAKETOWN;
}
static U32 get_bclk(void)
{
switch (Platform.CPU.Model)
{
case CPU_MODEL_DOTHAN:
case CPU_MODEL_YONAH: // Yonah
case CPU_MODEL_MEROM: // Merom
case CPU_MODEL_PENRYN: // Penryn
case CPU_MODEL_ATOM: // Intel Atom (45nm)
case CPUID_MODEL_DOTHAN:
case CPUID_MODEL_YONAH: // Yonah
case CPUID_MODEL_MEROM: // Merom
case CPUID_MODEL_PENRYN: // Penryn
case CPUID_MODEL_ATOM: // Intel Atom (45nm)
{
cpu->core_c1_supported = ((sub_Cstates >> 4) & 0xf) ? 1 : 0;
cpu->core_c4_supported = ((sub_Cstates >> 16) & 0xf) ? 1 : 0;
if (Platform.CPU.Model == CPU_MODEL_ATOM)
if (Platform.CPU.Model == CPUID_MODEL_ATOM)
{
cpu->core_c2_supported = cpu->core_c3_supported = ((sub_Cstates >> 8) & 0xf) ? 1 : 0;
cpu->core_c6_supported = ((sub_Cstates >> 12) & 0xf) ? 1 : 0;
break;
}
case CPU_MODEL_FIELDS:
case CPU_MODEL_DALES:
case CPU_MODEL_DALES_32NM:
case CPU_MODEL_NEHALEM:
case CPU_MODEL_NEHALEM_EX:
case CPU_MODEL_WESTMERE:
case CPU_MODEL_WESTMERE_EX:
case CPU_MODEL_SANDYBRIDGE:
case CPU_MODEL_JAKETOWN:
case CPUID_MODEL_FIELDS:
case CPUID_MODEL_DALES:
case CPUID_MODEL_DALES_32NM:
case CPUID_MODEL_NEHALEM:
case CPUID_MODEL_NEHALEM_EX:
case CPUID_MODEL_WESTMERE:
case CPUID_MODEL_WESTMERE_EX:
case CPUID_MODEL_SANDYBRIDGE:
case CPUID_MODEL_JAKETOWN:
{
cpu->core_c1_supported = ((sub_Cstates >> 4) & 0xf) ? 1 : 0;
{
switch (Platform.CPU.Model)
{
case CPU_MODEL_DOTHAN:
case CPU_MODEL_YONAH: // Yonah
case CPU_MODEL_MEROM: // Merom
case CPU_MODEL_PENRYN: // Penryn
case CPU_MODEL_ATOM: // Intel Atom (45nm)
case CPUID_MODEL_DOTHAN:
case CPUID_MODEL_YONAH: // Yonah
case CPUID_MODEL_MEROM: // Merom
case CPUID_MODEL_PENRYN: // Penryn
case CPUID_MODEL_ATOM: // Intel Atom (45nm)
{
bool cpu_dynamic_fsb = false;
}
break;
}
case CPU_MODEL_FIELDS:
case CPU_MODEL_DALES:
case CPU_MODEL_DALES_32NM:
case CPU_MODEL_NEHALEM:
case CPU_MODEL_NEHALEM_EX:
case CPU_MODEL_WESTMERE:
case CPU_MODEL_WESTMERE_EX:
case CPU_MODEL_SANDYBRIDGE:
case CPU_MODEL_JAKETOWN:
case CPUID_MODEL_FIELDS:
case CPUID_MODEL_DALES:
case CPUID_MODEL_DALES_32NM:
case CPUID_MODEL_NEHALEM:
case CPUID_MODEL_NEHALEM_EX:
case CPUID_MODEL_WESTMERE:
case CPUID_MODEL_WESTMERE_EX:
case CPUID_MODEL_SANDYBRIDGE:
case CPUID_MODEL_JAKETOWN:
{
maximum.Control = rdmsr64(MSR_IA32_PERF_STATUS) & 0xff; // Seems it always contains maximum multiplier value (with turbo, that's we need)...
branches/ErmaC/Enoch/CHANGES
1
12
23
34
......
2324
2425
2526
26
27
2728
2829
2930
......
119120
120121
121122
122
123123
124124
125125
......
134134
135135
136136
137
138137
139138
140139
- ErmaC : Rename CPU_MODEL_xxx into CPUID_MODEL_xxx follow Apple source name
- ErmaC : Rename decompress_lzvn function to lzvn_decode follow Apple source name.
- ErmaC : Add more chameleon UI stuff (default) made by blackosx
- ErmaC : Rollback changes for msdos.c (2327) thx to bltz
Special thanks: Alex J, viv xix, zenith432 from http://forge.voodooprojects.org/p/chameleon/issues/375/
Testing and improvements: Pike R. Alpha, ErmaC, Bungo, blackosx, Micky1979, crazybirdy, oldnapalm, janek202, MinusZwei and Andy Vandijck.
- Pike R. Alpha : dinamic "random-seed" implementation ( http://www.insanelymac.com/forum/topic/301350-lets-make-random-seed-really-random/ )
- Pike R. Alpha : dynamic "random-seed" implementation ( http://www.insanelymac.com/forum/topic/301350-lets-make-random-seed-really-random/ )
- ErmaC : getCPUTick() helper function ( http://www.insanelymac.com/forum/topic/301350-lets-make-random-seed-really-random/ )
- ErmaC : Add Yosemite Icons detection for chameleon UI
- blackosx : Add chameleon UI Icons for Yosemite
- cparm : Added a Sata module, known as YellowIconFixer in my branch, useful to fix yellow icon issue (can also fix an issue with the apple's dvd player application in moutain lion)
- cparm : Ported the nvidia plist helper (less time to spend on the device id more time to code :-) )
- Added Recovery Icon for Default Theme (TODO) (credits to blackosx).
- Merge Intel Graphics 4000 device IDs from Chimera (Commit 1999).
- Merge more cparm's (security, stability, bugs fixes) improvements from his branch.
http://forge.voodooprojects.org/p/chameleon/source/tree/HEAD/branches/cparm
- Merge "Restart fix Removed" from trunk r1992 by Slice's patch
- Added ID and correct FB for: http://forge.voodooprojects.org/p/chameleon/issues/238/
- Added next coming CHIPSET and ID definition (Mosts of it commented) ML?
(found via netkas.org): http://lists.freedesktop.org/archives/dri-devel/2012-March/020388.html
- Merge IVY Bridge stuff from Chimera Branch.
- Added boot support for Mountain Lion 10.8 (credits to ErmaC) & updated the default theme (credits to blackosx)
- cparm : Fixed naming convention for raid hfs devices in gui
- Added support for using UUIDs with ext2 filesystems (credits to bitz): http://forge.voodooprojects.org/p/chameleon/issues/208/

Archive Download the corresponding diff file

Revision: 2470