Chameleon

Chameleon Commit Details

Date:2014-11-19 20:25:40 (4 years 9 months ago)
Author:ErmaC
Commit:2488
Parents: 2487
Message:typo and sync with trunk
Changes:
M/branches/ErmaC/Enoch/i386/libsaio/stringTable.c
M/branches/ErmaC/Enoch/i386/boot2/drivers.c
M/branches/ErmaC/Enoch/i386/libsaio/msdos.c
M/branches/ErmaC/Enoch/i386/libsaio/cpu.c
M/branches/ErmaC/Enoch/i386/libsaio/disk.c
M/branches/ErmaC/Enoch/i386/boot2/boot.h

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branches/ErmaC/Enoch/i386/libsaio/cpu.c
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* It pauses until the value is latched in the counter
* and then reads the time stamp counter to return to the caller.
*/
uint64_t timeRDTSC(void)
static uint64_t timeRDTSC(void)
{
intattempts = 0;
uint64_t latchTime;
intermediate *= scale[timerValue];// rescale measured time spent
intermediate /= SAMPLE_NSECS;// so its exactly 1/20 a second
intermediate += latchTime;// add on our save fudge
set_PIT2(0);// reset timer 2 to be zero
disable_PIT2();// turn off PIT 2
//ml_set_interrupts_enabled(int_enabled);
return intermediate;
}
uint64_tcpuFrequency = 0;
uint64_tmsr = 0;
uint64_tflex_ratio = 0;
uint32_tmax_ratio = 0;
uint32_tmin_ratio = 0;
uint8_tbus_ratio_max = 0;
uint8_tbus_ratio_min = 0;
uint8_tcurrdiv = 0;
uint8_tcurrcoef = 0;
uint8_tmaxdiv = 0;
const char*newratio;
intlen = 0;
intmyfsb = 0;
uint8_tbus_ratio_min = 0;
/* get cpuid values */
do_cpuid(0x00000000, p->CPU.CPUID[CPUID_0]);
p->CPU.Family == 0x06 &&
p->CPU.Model >= CPUID_MODEL_NEHALEM &&
p->CPU.Model != CPUID_MODEL_ATOM// MSR is *NOT* available on the Intel Atom CPU
) {
)
{
/*
* Find the number of enabled cores and threads
* (which determines whether SMT/Hyperthreading is active).
p->CPU.NoCores = bitfield(p->CPU.CPUID[CPUID_1][1], 23, 16);
p->CPU.NoThreads = (uint8_t)(p->CPU.LogicalPerPackage & 0xff);
//workaround for N270. I don't know why it detected wrong
if ((p->CPU.Model == CPUID_MODEL_ATOM) &&
(p->CPU.Stepping == 2)) {
p->CPU.NoCores = 1;
}
break;
if ((p->CPU.Model == CPUID_MODEL_ATOM) && (p->CPU.Stepping == 2))
{
p->CPU.NoCores = 1;
}
break;
} // end switch
} else if (p->CPU.Vendor == CPUID_VENDOR_AMD) {
}
else if (p->CPU.Vendor == CPUID_VENDOR_AMD)
{
p->CPU.NoThreads= bitfield(p->CPU.CPUID[CPUID_1][1], 23, 16);
p->CPU.NoCores= bitfield(p->CPU.CPUID[CPUID_88][2], 7, 0) + 1;
} else {
}
else
{
// Use previous method for Cores and Threads
p->CPU.NoThreads= bitfield(p->CPU.CPUID[CPUID_1][1], 23, 16);
p->CPU.NoCores= bitfield(p->CPU.CPUID[CPUID_4][0], 31, 26) + 1;
uint32_treg[4];
charstr[128], *s;
/*
* The brand string 48 bytes (max), guaranteed to
* The BrandString 48 bytes (max), guaranteed to
* be NULL terminated.
*/
do_cpuid(0x80000002, reg);
{
tscFrequency = timeRDTSC() * 20;//measure_tsc_frequency();
// DBG("cpu freq timeRDTSC = 0x%016llx\n", tscFrequency);
} else {
}
else
{
// DBG("cpu freq timeRDTSC = 0x%016llxn", timeRDTSC() * 20);
}
fsbFrequency = 0;
cpuFrequency = 0;
if ((p->CPU.Vendor == CPUID_VENDOR_INTEL) && ((p->CPU.Family == 0x06) || (p->CPU.Family == 0x0f))) {
if ((p->CPU.Vendor == CPUID_VENDOR_INTEL) && ((p->CPU.Family == 0x06) || (p->CPU.Family == 0x0f)))
{
int intelCPU = p->CPU.Model;
if ((p->CPU.Family == 0x06 && p->CPU.Model >= 0x0c) || (p->CPU.Family == 0x0f && p->CPU.Model >= 0x03)){
if ((p->CPU.Family == 0x06 && p->CPU.Model >= 0x0c) || (p->CPU.Family == 0x0f && p->CPU.Model >= 0x03))
{
/* Nehalem CPU model */
switch (p->CPU.Model) {
switch (p->CPU.Model)
{
case CPUID_MODEL_NEHALEM:
case CPUID_MODEL_FIELDS:
case CPUID_MODEL_DALES:
maxcoef = currcoef;
}
if (!currcoef)
{
currcoef = maxcoef;
}
if (maxcoef)
{
if (maxdiv)
// keep formatted with spaces instead of tabs
DBG("\n---------------------------------------------\n");
DBG("--------------- CPU INFO ---------------\n");
DBG("------------------ CPU INFO -----------------\n");
DBG("---------------------------------------------\n");
DBG("Brand String: %s\n",p->CPU.BrandString); // Processor name (BIOS)
DBG("Vendor: 0x%x\n",p->CPU.Vendor); // Vendor ex: GenuineIntel
branches/ErmaC/Enoch/i386/libsaio/disk.c
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config_file_t systemVersion;
char dirSpec[512];
// OS X Recovery
sprintf(dirSpec, "hd(%d,%d)/com.apple.recovery.boot/SystemVersion.plist", BIOS_DEV_UNIT(bvr), bvr->part_no);
if (!loadConfigFile(dirSpec, &systemVersion))
if (!valid)
{
// OS X Standard
sprintf(dirSpec, "hd(%d,%d)/System/Library/CoreServices/SystemVersion.plist", BIOS_DEV_UNIT(bvr), bvr->part_no);
if (!loadConfigFile(dirSpec, &systemVersion))
}
else
{
// OS X Server
sprintf(dirSpec, "hd(%d,%d)/System/Library/CoreServices/ServerVersion.plist", BIOS_DEV_UNIT(bvr), bvr->part_no);
if (!loadConfigFile(dirSpec, &systemVersion))
branches/ErmaC/Enoch/i386/libsaio/stringTable.c
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int loadSystemConfig(config_file_t *config)
{
char *dirspec[] = {
"/Mac OS X Install Data/com.apple.Boot.plist",
"/OS X Install Data/com.apple.Boot.plist",
"/.IABootFiles/com.apple.Boot.plist", // OS X Installer
"/Library/Preferences/SystemConfiguration/com.apple.Boot.plist",
"/com.apple.recovery.boot/com.apple.Boot.plist" // OS X Recovery
"/Mac OS X Install Data/com.apple.Boot.plist",// OS X Installer (Lion 10.7)
"/OS X Install Data/com.apple.Boot.plist",// OS X Installer (10.8+)
"/.IABootFiles/com.apple.Boot.plist",// OS X Installer
"/Library/Preferences/SystemConfiguration/com.apple.Boot.plist",// com.boot.Apple.plist
"/com.apple.recovery.boot/com.apple.Boot.plist"// OS X Recovery
};
int i, fd, count, ret=-1;
branches/ErmaC/Enoch/i386/libsaio/msdos.c
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getDeviceDescription(ih, devStr);
/*
verbose("Read FAT%d file: [%s/%s] %d bytes.\n",
msdosfatbits, devStr, filePath, (uint32_t)( toread<0 ) ? wastoread : wastoread-toread);
verbose("Read FAT%d file: [%s/%s] %d bytes.\n", msdosfatbits, devStr, filePath, (uint32_t)( toread<0 ) ? wastoread : wastoread-toread);
*/
free (buf);
if (toread<0)
branches/ErmaC/Enoch/i386/boot2/drivers.c
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error("ERROR: kernel compression is bad!\n");
return -1;
}
if (kernel_header->compress_type == OSSwapBigToHostConstInt32('lzss'))
{
verbose ("Decompressing Kernel Using lzss\n");
}
else
{
if (kernel_header->compress_type == OSSwapBigToHostConstInt32('lzvn'))
{
verbose ("Decompressing Kernel Using lzvn\n");
}
}
#if NOTDEF
if (kernel_header->platform_name[0] && strcmp(gPlatformName, kernel_header->platform_name))
{
branches/ErmaC/Enoch/i386/boot2/boot.h
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#define kEnableC2State"EnableC2State"/* acpi_patcher.c */
#define kEnableC3State"EnableC3State"/* acpi_patcher.c */
#define kEnableC4State"EnableC4State"/* acpi_patcher.c */
#define kEnableC6State"EnableC6State"/* acpi_patcher.c */
#define kEnableC7State"EnableC7State"/* acpi_patcher.c */
/* valv: added these keys */
#define kbusratio"busratio"/* cpu.c */

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Revision: 2488