Chameleon

Chameleon Commit Details

Date:2014-11-20 00:57:40 (4 years 6 months ago)
Author:ErmaC
Commit:2491
Parents: 2490
Message:Update Chameleon.xcodeproj and fix mistake with strndup.c
Changes:
M/trunk/Chameleon.xcodeproj/project.pbxproj
M/trunk/i386/libsaio/cpu.c
M/trunk/i386/modules/klibc/strndup.c

File differences

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3685F3DD1A1D60CF0036A800 /* aml_generator.c */,
3685F3DE1A1D60CF0036A800 /* aml_generator.h */,
3685F3DF1A1D60CF0036A800 /* asm.s */,
3685F3E01A1D60CF0036A800 /* ati_reg.h */,
3685F3E11A1D60CF0036A800 /* ati.c */,
3685F3E21A1D60CF0036A800 /* ati.h */,
3685F3E31A1D60CF0036A800 /* base64-decode.c */,
3685F3E41A1D60CF0036A800 /* befs.c */,
3685F3E51A1D60CF0036A800 /* befs.h */,
3685F3E61A1D60CF0036A800 /* bios.h */,
3685F3E71A1D60CF0036A800 /* bios.s */,
3685F3E81A1D60CF0036A800 /* biosfn.c */,
3685F3E91A1D60CF0036A800 /* bootargs.h */,
3685F3EA1A1D60CF0036A800 /* bootstruct.c */,
3685F3EB1A1D60CF0036A800 /* bootstruct.h */,
3685F3EC1A1D60CF0036A800 /* cache.c */,
3685F3ED1A1D60CF0036A800 /* Cconfig */,
3685F3EE1A1D60CF0036A800 /* console.c */,
3685F3EF1A1D60CF0036A800 /* convert.c */,
3685F3F01A1D60CF0036A800 /* convert.h */,
3685F3F11A1D60CF0036A800 /* cpu.c */,
3685F3F21A1D60CF0036A800 /* cpu.h */,
3685F3F31A1D60CF0036A800 /* device_inject.c */,
3685F3F41A1D60CF0036A800 /* device_inject.h */,
3685F3F51A1D60CF0036A800 /* device_tree.c */,
3685F3F61A1D60CF0036A800 /* device_tree.h */,
3685F3F71A1D60CF0036A800 /* disk.c */,
3685F3F81A1D60CF0036A800 /* disk.h */,
3685F3F91A1D60CF0036A800 /* dram_controllers.c */,
3685F3FA1A1D60CF0036A800 /* dram_controllers.h */,
3685F3FB1A1D60CF0036A800 /* efi.h */,
3685F3FC1A1D60CF0036A800 /* exfat.c */,
3685F3FD1A1D60CF0036A800 /* exfat.h */,
3685F3FE1A1D60CF0036A800 /* ext2fs.c */,
3685F3FF1A1D60CF0036A800 /* ext2fs.h */,
3685F4001A1D60CF0036A800 /* fake_efi.c */,
3685F4011A1D60CF0036A800 /* fake_efi.h */,
3685F4021A1D60CF0036A800 /* fdisk.h */,
3685F4031A1D60CF0036A800 /* freebsd.c */,
3685F4041A1D60CF0036A800 /* freebsd.h */,
3685F4051A1D60CF0036A800 /* gma.c */,
3685F4061A1D60CF0036A800 /* gma.h */,
3685F4071A1D60CF0036A800 /* hda.c */,
3685F4081A1D60CF0036A800 /* hda.h */,
3685F4091A1D60CF0036A800 /* hfs_CaseTables.h */,
3685F40A1A1D60CF0036A800 /* hfs_compare.c */,
3685F40B1A1D60CF0036A800 /* hfs.c */,
3685F40C1A1D60CF0036A800 /* hfs.h */,
3685F40D1A1D60CF0036A800 /* hpet.c */,
3685F40E1A1D60CF0036A800 /* hpet.h */,
3685F40F1A1D60CF0036A800 /* io_inline.h */,
3685F4101A1D60CF0036A800 /* libsaio.h */,
3685F4111A1D60CF0036A800 /* load.c */,
3685F4121A1D60CF0036A800 /* Makefile */,
3685F4131A1D60CF0036A800 /* md5c.c */,
3685F4141A1D60CF0036A800 /* memvendors.h */,
3685F4151A1D60CF0036A800 /* misc.c */,
3685F4161A1D60CF0036A800 /* msdos_private.h */,
3685F4171A1D60CF0036A800 /* msdos.c */,
3685F4181A1D60CF0036A800 /* msdos.h */,
3685F4191A1D60CF0036A800 /* nbp_cmd.h */,
3685F41A1A1D60CF0036A800 /* nbp.c */,
3685F41B1A1D60CF0036A800 /* ntfs_private.h */,
3685F41C1A1D60CF0036A800 /* ntfs.c */,
3685F41D1A1D60CF0036A800 /* ntfs.h */,
3685F41E1A1D60CF0036A800 /* nvidia_helper.c */,
3685F41F1A1D60CF0036A800 /* nvidia_helper.h */,
3685F4201A1D60CF0036A800 /* nvidia.c */,
3685F4211A1D60CF0036A800 /* nvidia.h */,
3685F4221A1D60CF0036A800 /* openbsd.c */,
3685F4231A1D60CF0036A800 /* openbsd.h */,
3685F4241A1D60CF0036A800 /* pci_root.c */,
3685F4251A1D60CF0036A800 /* pci_root.h */,
3685F4261A1D60CF0036A800 /* pci_setup.c */,
3685F4271A1D60CF0036A800 /* pci.c */,
3685F4281A1D60CF0036A800 /* pci.h */,
3685F4291A1D60CF0036A800 /* platform.c */,
3685F42A1A1D60CF0036A800 /* platform.h */,
3685F42B1A1D60CF0036A800 /* saio_internal.h */,
3685F42C1A1D60CF0036A800 /* saio_types.h */,
3685F42D1A1D60CF0036A800 /* sl.h */,
3685F42E1A1D60CF0036A800 /* smbios_decode.c */,
3685F42F1A1D60CF0036A800 /* smbios_getters.c */,
3685F4301A1D60CF0036A800 /* smbios_getters.h */,
3685F4311A1D60CF0036A800 /* smbios.c */,
3685F4321A1D60CF0036A800 /* smbios.h */,
3685F4331A1D60CF0036A800 /* spd.c */,
3685F4341A1D60CF0036A800 /* spd.h */,
3685F4351A1D60CF0036A800 /* state_generator.c */,
3685F4361A1D60CF0036A800 /* state_generator.h */,
3685F4371A1D60CF0036A800 /* stringTable.c */,
3685F4381A1D60CF0036A800 /* sys.c */,
3685F4391A1D60CF0036A800 /* table.c */,
3685F43A1A1D60CF0036A800 /* term.h */,
3685F43B1A1D60CF0036A800 /* ufs_byteorder.h */,
3685F43C1A1D60CF0036A800 /* ufs.h */,
3685F43D1A1D60CF0036A800 /* usb.c */,
3685F43E1A1D60CF0036A800 /* vbe.c */,
3685F43F1A1D60CF0036A800 /* vbe.h */,
3685F4401A1D60CF0036A800 /* xml.c */,
3685F4411A1D60CF0036A800 /* xml.h */,
);
path = libsaio;
sourceTree = "<group>";
trunk/i386/libsaio/cpu.c
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intermediate *= scale[timerValue];// rescale measured time spent
intermediate /= SAMPLE_NSECS;// so its exactly 1/20 a second
intermediate += latchTime;// add on our save fudge
set_PIT2(0);// reset timer 2 to be zero
disable_PIT2();// turn off PIT 2
//ml_set_interrupts_enabled(int_enabled);
return intermediate;
}
uint64_tcpuFrequency = 0;
uint64_tmsr = 0;
uint64_tflex_ratio = 0;
uint32_tmax_ratio = 0;
uint32_tmin_ratio = 0;
uint32_treg[4];
uint8_tbus_ratio_max = 0;
uint8_tbus_ratio_min = 0;
uint8_tcurrdiv = 0;
uint8_tcurrcoef = 0;
uint8_tmaxdiv = 0;
uint8_tmaxcoef = 0;
const char*newratio;
charstr[128];
intlen = 0;
intmyfsb = 0;
uint8_tbus_ratio_min = 0;
uint32_treg[4];
charstr[128];
/* get cpuid values */
do_cpuid(0x00000000, p->CPU.CPUID[CPUID_0]);
p->CPU.Model += (p->CPU.ExtModel << 4);
if (p->CPU.Vendor == CPUID_VENDOR_INTEL)
if (p->CPU.Vendor == CPUID_VENDOR_INTEL &&
p->CPU.Family == 0x06 &&
p->CPU.Model >= CPUID_MODEL_NEHALEM &&
p->CPU.Model != CPUID_MODEL_ATOM// MSR is *NOT* available on the Intel Atom CPU
)
{
/*
* Find the number of enabled cores and threads
break;
default:
p->CPU.NoCores = 0;
p->CPU.NoCores = bitfield(p->CPU.CPUID[CPUID_1][1], 23, 16);
p->CPU.NoThreads = (uint8_t)(p->CPU.LogicalPerPackage & 0xff);
//workaround for N270. I don't know why it detected wrong
if ((p->CPU.Model == CPUID_MODEL_ATOM) && (p->CPU.Stepping == 2))
{
p->CPU.NoCores = 1;
}
break;
} // end switch
}
if (p->CPU.NoCores == 0)
else if (p->CPU.Vendor == CPUID_VENDOR_AMD)
{
p->CPU.NoCores= (uint8_t)(p->CPU.CoresPerPackage & 0xff);
p->CPU.NoThreads= (uint8_t)(p->CPU.LogicalPerPackage & 0xff);
p->CPU.NoThreads= (uint8_t)bitfield(p->CPU.CPUID[CPUID_1][1], 23, 16);
p->CPU.NoCores= (uint8_t)bitfield(p->CPU.CPUID[CPUID_88][2], 7, 0) + 1;
}
else
{
// Use previous method for Cores and Threads
p->CPU.NoThreads= (uint8_t)bitfield(p->CPU.CPUID[CPUID_1][1], 23, 16);
p->CPU.NoCores= (uint8_t)bitfield(p->CPU.CPUID[CPUID_4][0], 31, 26) + 1;
}
/* get BrandString (if supported) */
/* Copyright: from Apple's XNU cpuid.c */
}
strlcpy(p->CPU.BrandString, s, 48);
if (!strncmp(p->CPU.BrandString, CPU_STRING_UNKNOWN, MIN(sizeof(p->CPU.BrandString), strlen(CPU_STRING_UNKNOWN) + 1)))
if (!strncmp(p->CPU.BrandString, CPU_STRING_UNKNOWN, MIN(sizeof(p->CPU.BrandString), (unsigned)strlen(CPU_STRING_UNKNOWN) + 1)))
{
/*
* This string means we have a firmware-programmable brand string,
//DBG("Brandstring = %s\n", p->CPU.BrandString);
}
//workaround for N270. I don't know why it detected wrong
// MSR is *NOT* available on the Intel Atom CPU
if ((p->CPU.Model == CPUID_MODEL_ATOM) && (strstr(p->CPU.BrandString, "270")))
{
p->CPU.NoCores= 1;
p->CPU.NoThreads= 2;
}
if (p->CPU.Vendor == CPUID_VENDOR_AMD)
{
p->CPU.NoThreads= (uint8_t)bitfield(p->CPU.CPUID[CPUID_1][1], 23, 16);
p->CPU.NoCores= (uint8_t)bitfield(p->CPU.CPUID[CPUID_88][2], 7, 0) + 1;
}
/* setup features */
if ((bit(23) & p->CPU.CPUID[CPUID_1][3]) != 0)
{
{
tscFrequency = timeRDTSC() * 20;//measure_tsc_frequency();
// DBG("cpu freq timeRDTSC = 0x%016llx\n", tscFrequency);
} else {
}
else
{
// DBG("cpu freq timeRDTSC = 0x%016llxn", timeRDTSC() * 20);
}
fsbFrequency = 0;
cpuFrequency = 0;
if (p->CPU.Vendor == CPUID_VENDOR_INTEL && ((p->CPU.Family == 0x06 && p->CPU.Model >= 0x0c) || (p->CPU.Family == 0x0f && p->CPU.Model >= 0x03))) {
if (p->CPU.Vendor == CPUID_VENDOR_INTEL && ((p->CPU.Family == 0x06 && p->CPU.Model >= 0x0c) || (p->CPU.Family == 0x0f && p->CPU.Model >= 0x03)))
{
int intelCPU = p->CPU.Model;
if (p->CPU.Family == 0x06) {
if (p->CPU.Family == 0x06)
{
/* Nehalem CPU model */
switch (p->CPU.Model) {
switch (p->CPU.Model)
{
case CPUID_MODEL_NEHALEM:
case CPUID_MODEL_FIELDS:
case CPUID_MODEL_DALES:
trunk/i386/modules/klibc/strndup.c
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if (d)
{
memcpy(d, s, l);
d[n] = '\0';
}
d[n] = '\0';
return d;
}

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Revision: 2491