Chameleon

Chameleon Commit Details

Date:2014-11-29 16:17:58 (4 years 7 months ago)
Author:ErmaC
Commit:2502
Parents: 2501
Message:C6 & C7 States credits to Clover Team.
Changes:
M/branches/ErmaC/Enoch/package/OptionalSettings/PowerManagement.txt
M/branches/ErmaC/Enoch/i386/libsaio/console.c
M/branches/ErmaC/Enoch/doc/BootHelp.txt
M/branches/ErmaC/Enoch/i386/boot2/boot.c
M/branches/ErmaC/Enoch/i386/libsaio/state_generator.c

File differences

branches/ErmaC/Enoch/i386/libsaio/console.c
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{
va_list ap;
va_start(ap, fmt);
if (bootArgs->Video.v_display == VGA_TEXT_MODE) {
if (bootArgs->Video.v_display == VGA_TEXT_MODE)
{
prf(fmt, ap, putchar, 0);
} else {
}
else
{
vprf(fmt, ap);
}
va_list ap;
va_start(ap, fmt);
if (gVerboseMode) {
if (bootArgs->Video.v_display == VGA_TEXT_MODE) {
if (gVerboseMode)
{
if (bootArgs->Video.v_display == VGA_TEXT_MODE)
{
prf(fmt, ap, putchar, 0);
} else {
}
else
{
vprf(fmt, ap);
}
}
va_list ap;
gErrors = true;
va_start(ap, fmt);
if (bootArgs->Video.v_display == VGA_TEXT_MODE) {
if (bootArgs->Video.v_display == VGA_TEXT_MODE)
{
prf(fmt, ap, putchar, 0);
} else {
}
else
{
vprf(fmt, ap);
}
printf("\n");
va_start(ap, fmt);
if (bootArgs->Video.v_display == VGA_TEXT_MODE) {
if (bootArgs->Video.v_display == VGA_TEXT_MODE)
{
prf(fmt, ap, putchar, 0);
} else {
}
else
{
vprf(fmt, ap);
}
va_end(ap);
branches/ErmaC/Enoch/i386/libsaio/state_generator.c
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0x00, 0x00, 0x00, 0x79, 0x00,
};
struct acpi_2_ssdt *generate_pss_ssdt(struct acpi_2_dsdt* dsdt)
{
break;
}
case CPUID_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
case CPUID_MODEL_DALES:
case CPUID_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
case CPUID_MODEL_DALES://
case CPUID_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
case CPUID_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
case CPUID_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65xx
case CPUID_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
case CPUID_MODEL_WESTMERE_EX:// Intel Xeon E7
case CPUID_MODEL_SANDYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (32nm)
case CPUID_MODEL_JAKETOWN:// Intel Core i7, Xeon E5 LGA2011 (32nm)
case CPUID_MODEL_IVYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (22nm)
case CPUID_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65xx
case CPUID_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
case CPUID_MODEL_WESTMERE_EX:// Intel Xeon E7
case CPUID_MODEL_SANDYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (32nm)
case CPUID_MODEL_JAKETOWN:// Intel Core i7, Xeon E5 LGA2011 (32nm)
case CPUID_MODEL_IVYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (22nm)
case CPUID_MODEL_HASWELL://
case CPUID_MODEL_IVYBRIDGE_XEON: //
//case CPUID_MODEL_HASWELL_H://
case CPUID_MODEL_HASWELL_SVR://
case CPUID_MODEL_HASWELL_ULT://
case CPUID_MODEL_CRYSTALWELL://
case CPUID_MODEL_IVYBRIDGE_XEON://
//case CPUID_MODEL_HASWELL_H://
case CPUID_MODEL_HASWELL_SVR://
case CPUID_MODEL_HASWELL_ULT://
case CPUID_MODEL_CRYSTALWELL://
{
if ((Platform.CPU.Model == CPUID_MODEL_SANDYBRIDGE) || (Platform.CPU.Model == CPUID_MODEL_JAKETOWN) ||
(Platform.CPU.Model == CPUID_MODEL_IVYBRIDGE) || (Platform.CPU.Model == CPUID_MODEL_HASWELL) ||
(Platform.CPU.Model == CPUID_MODEL_IVYBRIDGE_XEON) || (Platform.CPU.Model == CPUID_MODEL_HASWELL_SVR) ||
(Platform.CPU.Model == CPUID_MODEL_HASWELL_ULT) || (Platform.CPU.Model == CPUID_MODEL_CRYSTALWELL))
if ( (Platform.CPU.Model == CPUID_MODEL_SANDYBRIDGE) ||
(Platform.CPU.Model == CPUID_MODEL_JAKETOWN) ||
(Platform.CPU.Model == CPUID_MODEL_IVYBRIDGE) ||
(Platform.CPU.Model == CPUID_MODEL_HASWELL) ||
(Platform.CPU.Model == CPUID_MODEL_IVYBRIDGE_XEON) ||
(Platform.CPU.Model == CPUID_MODEL_HASWELL_SVR) ||
(Platform.CPU.Model == CPUID_MODEL_HASWELL_ULT) ||
(Platform.CPU.Model == CPUID_MODEL_CRYSTALWELL) )
{
maximum.Control = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0xff;
}
bool c2_enabled = false;
bool c3_enabled = false;
bool c4_enabled = false;
bool c6_enabled = false;
bool c7_enabled = false;
bool cst_using_systemio = false;
getBoolForKey(kEnableC2State, &c2_enabled, &bootInfo->chameleonConfig);
getBoolForKey(kEnableC3State, &c3_enabled, &bootInfo->chameleonConfig);
getBoolForKey(kEnableC4State, &c4_enabled, &bootInfo->chameleonConfig);
getBoolForKey(kEnableC6State, &c6_enabled, &bootInfo->chameleonConfig);
getBoolForKey(kEnableC7State, &c7_enabled, &bootInfo->chameleonConfig);
getBoolForKey(kCSTUsingSystemIO, &cst_using_systemio, &bootInfo->chameleonConfig);
c2_enabled = c2_enabled | (fadt->C2_Latency < 100);
c3_enabled = c3_enabled | (fadt->C3_Latency < 1000);
unsigned char cstates_count = 1 + (c2_enabled ? 1 : 0) + (c3_enabled ? 1 : 0);
unsigned char cstates_count = 1 + (c2_enabled ? 1 : 0) + ((c3_enabled || c4_enabled)? 1 : 0) + (c6_enabled ? 1 : 0) + (c7_enabled ? 1 : 0);
AML_CHUNK* root = aml_create_node(NULL);
aml_add_buffer(root, cst_ssdt_header, sizeof(cst_ssdt_header)); // SSDT header
resource_template_register_systemio[12] = p_blk_hi; // C3
aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
aml_add_byte(tmpl, 0x03);// C3
aml_add_word(tmpl, 0x0060);// Latency
aml_add_dword(tmpl, 0x0000015e);// Power
aml_add_word(tmpl, 0x0043);// Latency
aml_add_dword(tmpl, 0x000001F4);// Power
}
if (c6_enabled) // C6
{
p_blk_lo = acpi_cpu_p_blk + 5;
p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
tmpl = aml_add_package(pack);
resource_template_register_systemio[11] = p_blk_lo; // C6
resource_template_register_systemio[12] = p_blk_hi; // C6
aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
aml_add_byte(tmpl, 0x06);// C6
aml_add_word(tmpl, 0x0046);// Latency
aml_add_dword(tmpl, 0x0000015E);// Power
}
if (c7_enabled) //C7
{
p_blk_lo = (acpi_cpu_p_blk + 6) & 0xff;
p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
tmpl = aml_add_package(pack);
resource_template_register_systemio[11] = p_blk_lo; // C4 or C7
resource_template_register_systemio[12] = p_blk_hi;
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x07);// C7
aml_add_word(tmpl, 0xF5);// Latency as in iMac14,1
aml_add_dword(tmpl, 0xC8);// Power
}
}
else
{
resource_template_register_fixedhw[11] = 0x20; // C3
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x03);// C3
aml_add_word(tmpl, 0x0060);// Latency
aml_add_dword(tmpl, 0x0000015e);// Power
aml_add_word(tmpl, 0x0043);// Latency
aml_add_dword(tmpl, 0x000001F4);// Power
}
if (c6_enabled) // C6
{
tmpl = aml_add_package(pack);
resource_template_register_fixedhw[11] = 0x20; // C6
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x06);// C6
aml_add_word(tmpl, 0x0046);// Latency as in MacPro6,1
aml_add_dword(tmpl, 0x0000015E);// Power
}
if (c7_enabled) // C7
{
tmpl = aml_add_package(pack);
resource_template_register_fixedhw[11] = 0x30; // C4 or C7
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x07);// C7
aml_add_word(tmpl, 0xF5);// Latency as in iMac14,1
aml_add_dword(tmpl, 0xC8);// Power
}
}
// Aliaces
branches/ErmaC/Enoch/i386/boot2/boot.c
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{
archCpuType = CPU_TYPE_I386;
}
else
{
DBG("Incorrect parameter for option 'arch =' , please use x86_64 or i386\n");
}
}
if (getValueForKey(kKernelArchKey, &val, &len, &bootInfo->chameleonConfig)) {
branches/ErmaC/Enoch/package/OptionalSettings/PowerManagement.txt
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Bool@EnableC2State:EnableC2State=Yes
Bool@EnableC3State:EnableC3State=Yes
Bool@EnableC4State:EnableC4State=Yes
#Bool@EnableC6State:EnableC6State=Yes
#Bool@EnableC7State:EnableC7State=Yes
Bool@EnableC6State:EnableC6State=Yes
Bool@EnableC7State:EnableC7State=Yes
Bool@GenerateCStates:GenerateCStates=Yes
Bool@GeneratePStates:GeneratePStates=Yes
#Bool@GenerateTStates:GenerateTStates=Yes
branches/ErmaC/Enoch/doc/BootHelp.txt
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KeyLayout=keymap Use to change the keyboard mapping of the bootloader
(e.g. KeyLayout=mac-fr)
HDAEnabler=Yes|No Automatic device-properties generation for audio controllers.
HDEFLayoutID=<value> Inject alternate value of layout-id for HDEF (HEX).
HDAULayoutID=<value> Inject alternate value of layout-id for HDAU (HEX).
HDAEnabler=Yes|No Automatic device-properties generation for audio controllers.
HDEFLayoutID=<value> Inject alternate value of layout-id for HDEF (HEX).
HDAULayoutID=<value> Inject alternate value of layout-id for HDAU (HEX).
GraphicsEnabler=Yes|No Automatic device-properties generation for graphics cards.
SkipIntelGfx=Yes|No Skip the Automatic device-properties generation for Intel cards.
EnableC2State=Yes Enable specific Processor power state, C2.
EnableC3State=Yes Enable specific Processor power state, C3.
EnableC4State=Yes Enable specific Processor power state, C4.
EnableC6State=Yes Enable specific Processor power state, C6.
EnableC7State=Yes Enable specific Processor power state, C7.
PrivateData=No Show masked data (serial number) in bdmesg log (enbaled by default).

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Revision: 2502