Chameleon

Chameleon Commit Details

Date:2015-02-12 23:23:07 (9 years 2 months ago)
Author:ErmaC
Commit:2577
Parents: 2576
Message:Sync with trunk (r.2576)
Changes:
M/branches/ErmaC/Enoch/i386/libsaio/hda.c
M/branches/ErmaC/Enoch/i386/libsaio/saio_internal.h
M/branches/ErmaC/Enoch/i386/libsaio/smbios_decode.c
M/branches/ErmaC/Enoch/i386/libsaio/hda.h
M/branches/ErmaC/Enoch/package/po/it.po
M/branches/ErmaC/Enoch/i386/boot2/boot.h
M/branches/ErmaC/Enoch/i386/libsaio/ati.c
M/branches/ErmaC/Enoch/i386/boot2/modules.h
M/branches/ErmaC/Enoch/i386/libsaio/biosfn.c
M/branches/ErmaC/Enoch/i386/libsaio/pci.h
M/branches/ErmaC/Enoch/package/OptionalSettings/KernelFlags.txt
M/branches/ErmaC/Enoch/i386/libsaio/ati.h
M/branches/ErmaC/Enoch/i386/libsaio/cpu.c
M/branches/ErmaC/Enoch/i386/libsaio/platform.h
M/branches/ErmaC/Enoch/i386/libsaio/usb.c
M/branches/ErmaC/Enoch/i386/modules/MakeInc.dir
M/branches/ErmaC/Enoch/i386/modules/Resolution/915resolution.c

File differences

branches/ErmaC/Enoch/i386/libsaio/usb.c
162162
163163
164164
165
166
167
165
168166
169167
170168
......
402400
403401
404402
405
403
406404
407405
408406
␉DBG("Clearing USBLEGCTLSTS\n");␊
␉pci_config_write32(pci_dev->dev.addr, eecp + 4, 0);␉//usblegctlsts␊
␉␊
␉// if delay value is in milliseconds it doesn't appear to work. ␊
␉// setting value to anything up to 65535 does not add the expected delay here.␊
␉delay(100);␊
␉delay(100000);␊
␉␊
␉usbcmd = *((unsigned int*)(opaddr));␊
␉usbsts = *((unsigned int*)(opaddr + 4));␊
␉␉␉timeOut = 40;␊
␉␉␉while (timeOut--)␊
␉␉␉{␊
␉␉␉␉delay(1);␊
␉␉␉␉delay(500);␊
␉␉␉␉value = *(uint32_t const volatile*) (bar0 + extendCap);␊
␉␉␉␉if (value == ~0)␊
␉␉␉␉{␊
branches/ErmaC/Enoch/i386/libsaio/hda.c
33
44
55
6
67
78
89
......
6667
6768
6869
69
70
7071
7172
7273
......
8687
8788
8889
89
90
9091
9192
9293
......
553554
554555
555556
556
557
557558
558559
559560
560561
561562
563
564
565
566
562567
563568
564569
......
583588
584589
585590
586
587
588
589
590591
591592
592593
......
679680
680681
681682
682
683
684
685
686
687
683
684
685
686
687
688
688689
689690
690691
*␊
*␉Copyright (C) 2012␉Chameleon Team␊
*␉Edit by Fabio (ErmaC)␊
*␉HDA bus scans and codecs enumeration by Zenith432␊
*␊
*␉HDA injector is free software: you can redistribute it and/or modify␊
*␉it under the terms of the GNU General Public License as published by␊
#include "platform.h"␊
#include "device_inject.h"␊
#include "hda.h"␊
#include "aml_generator.h"␊
//#include "aml_generator.h"␊
␊
#ifndef DEBUG_HDA␊
#define DEBUG_HDA 0␊
#define HDEF_LEN ( sizeof(default_HDEF_layout_id) / sizeof(uint8_t) )␊
uint8_t default_HDAU_layout_id[]␉␉=␉{0x01, 0x00, 0x00, 0x00};␊
#define HDAU_LEN ( sizeof(default_HDAU_layout_id) / sizeof(uint8_t) )␊
uint8_t connector_type_value[] =␉{0x00, 0x08, 0x00, 0x00};␊
static uint8_t connector_type_value[] =␉{0x00, 0x08, 0x00, 0x00};␊
␊
/* Structures */␊
␊
␉struct␉␉DevPropDevice␉*device = NULL;␊
␉char␉␉*devicepath = NULL;␊
␉char␉␉*controller_name = NULL;␊
␉int len;␊
␉int␉␉len;␊
␉uint8_t␉␉BuiltIn = 0x00;␊
␉uint16_t␉controller_vendor_id = hda_dev->vendor_id;␊
␉uint16_t␉controller_device_id = hda_dev->device_id;␊
␉const char␉*value;␊
␊
␉verbose("\n------------------------\n");␊
␉verbose("\tAUDIO DEVICE INFO\n");␊
␉verbose("-------------------------\n");␊
␊
␉devicepath = get_pci_dev_path(hda_dev);␊
␉controller_name = get_hda_controller_name(controller_device_id, controller_vendor_id);␊
␊
␉}␊
␉devprop_add_hda_template(device);␊
␊
␉verbose("\n--------------------------------\n");␊
␉verbose("- AUDIO DEVICE INFO -\n");␊
␉verbose("--------------------------------\n");␊
␊
␉switch ((controller_device_id << 16) | controller_vendor_id)␊
␉{␊
␊
default_HDAU_layout_id[0], default_HDAU_layout_id[1], default_HDAU_layout_id[2], default_HDAU_layout_id[3]);␊
␉}␊
␊
devprop_add_value(device, "layout-id", default_HDAU_layout_id, HDAU_LEN); /*FIX ME*/␊
devprop_add_value(device, "@0,connector-type", connector_type_value, 4);␊
devprop_add_value(device, "@1,connector-type", connector_type_value, 4);␊
devprop_add_value(device, "hda-gfx", (uint8_t *)"onboard-2", 10);␊
devprop_add_value(device, "built-in", &BuiltIn, 1);␊
break;␊
␉devprop_add_value(device, "layout-id", default_HDAU_layout_id, HDAU_LEN); /*FIX ME*/␊
␉devprop_add_value(device, "@0,connector-type", connector_type_value, 4);␊
␉devprop_add_value(device, "@1,connector-type", connector_type_value, 4);␊
␉devprop_add_value(device, "hda-gfx", (uint8_t *)"onboard-2", 10);␊
␉devprop_add_value(device, "built-in", &BuiltIn, 1);␊
␉break;␊
␊
␉/*************************************************************************************************************␊
␉* The above case are intended as for HDAU (ATi) device onboard audio for GFX card with Audio controller HDMi␊
branches/ErmaC/Enoch/i386/libsaio/hda.h
6565
6666
6767
68
68
69
6970
7071
7172
......
7475
7576
7677
77
78
79
80
78
79
80
81
82
8183
8284
8385
bool setup_hda_devprop(pci_dt_t *hda_dev);␊
␊
struct hda_controller_devices;␊
typedef struct {␊
typedef struct␊
{␊
␉uint32_t␉model;␊
␉char␉␉*desc;␊
␉// char␉␉quirks_on;␊
␊
/*␊
struct hdacc_codecs;␊
typedef struct {␊
uint32_t cid;␊
uint16_t revid;␊
char *name;␊
typedef struct␊
{␊
␉uint32_t cid;␊
␉uint16_t revid;␊
␉char *name;␊
} hdacc_codecs;␊
*/␊
␊
branches/ErmaC/Enoch/i386/libsaio/ati.c
6868
6969
7070
71
71
7272
7373
7474
......
8383
8484
8585
86
86
87
88
89
90
91
8792
8893
8994
......
520525
521526
522527
523
528
529
524530
525531
526532
......
661667
662668
663669
664
665
670
671
666672
667673
668674
␉{"Ipomoea",␉3},␊
␉{"Muskgrass",␉4},␊
␉{"Juncus",␉4},␊
␉{"Osmunda", 4},␊
␉{"Osmunda", 4}, ␊
␉{"Pondweed",␉3},␊
␉{"Spikerush", 4},␊
␉{"Typha", 5},␊
␉{"Hamachi",␉4},␊
␉{"OPM", 6},␊
␉{"Ikura", 6},␊
␉{"IkuraS", 1}␊
␉{"IkuraS", 1},␊
␉/* AMD8000Controller */␊
␉{"Baladi", 5},␉//desktop␊
␉{"Exmoor", 4},␉//mobile␊
␉{"Basset", 4}␊
␊
};␊
␊
radeon_card_info_t radeon_cards[] = {␊
//␉{ 0x99A2,␉0x00000000, CHIP_FAMILY_ARUBA,␉"AMD Radeon HD", kNull }, // Mobile␊
//␉{ 0x99A4,␉0x00000000, CHIP_FAMILY_ARUBA,␉"AMD Radeon HD", kNull },␊
␊
␉{ 0x6613,␉0x00000000, CHIP_FAMILY_BONAIRE,␉"AMD Radeon R7 240",␉kFutomaki␉␉},␊
␉{ 0x6610,␉0x00000000, CHIP_FAMILY_OLAND,␉␉"AMD Radeon R7 250",␉kFutomaki␉␉},␊
␉{ 0x6613,␉0x00000000, CHIP_FAMILY_OLAND,␉␉"AMD Radeon R7 240",␉kFutomaki␉␉},␊
␉{ 0x665C,␉0x00000000, CHIP_FAMILY_BONAIRE,␉"AMD Radeon HD 7790",␉kFutomaki␉␉},␊
␉{ 0x665D,␉0x00000000, CHIP_FAMILY_BONAIRE,␉"AMD Radeon R9 260",␉kFutomaki␉␉},␊
␊
//␉{ 0x67A8,␉0x00000000, CHIP_FAMILY_HAWAII,␉"AMD Radeon", kFutomaki␉},␊
//␉{ 0x67A9,␉0x00000000, CHIP_FAMILY_HAWAII,␉"AMD Radeon", kFutomaki␉},␊
//␉{ 0x67AA,␉0x00000000, CHIP_FAMILY_HAWAII,␉"AMD Radeon", kFutomaki␉},␊
␉{ 0x67B0,␉0x00000000, CHIP_FAMILY_HAWAII,␉"AMD Radeon R9 290X", kFutomaki␉},␊
␉{ 0x67B1,␉0x00000000, CHIP_FAMILY_HAWAII,␉"AMD Radeon R9 290", kFutomaki␉}, // CHIP_FAMILY_HAWAII␊
␉{ 0x67B0,␉0x00000000, CHIP_FAMILY_HAWAII,␉"AMD Radeon R9 290X", kBaladi␉},␊
␉{ 0x67B1,␉0x00000000, CHIP_FAMILY_HAWAII,␉"AMD Radeon R9 290", kBaladi␉}, // CHIP_FAMILY_HAWAII␊
//␉{ 0x67B8,␉0x00000000, CHIP_FAMILY_HAWAII,␉"AMD Radeon", kFutomaki␉},␊
//␉{ 0x67B9,␉0x00000000, CHIP_FAMILY_HAWAII,␉"AMD Radeon", kFutomaki␉},␊
//␉{ 0x67BA,␉0x00000000, CHIP_FAMILY_HAWAII,␉"AMD Radeon", kFutomaki␉},␊
branches/ErmaC/Enoch/i386/libsaio/ati.h
179179
180180
181181
182
183
184
185
182186
183187
184188
......
228232
229233
230234
235
231236
232237
233238
␉kOPM,␊
␉kIkura,␊
␉kIkuraS,␊
␉/* AMD8000Controller */␊
␉kBaladi,␊
␉kExmoor,␊
␉kBasset,␊
␉kCfgEnd␊
} config_name_t;␊
␊
#define EVERGREEN␉MKFLAG(1)␊
#define FLAGMOBILE␉MKFLAG(2)␊
#define FLAGOLD␉␉MKFLAG(3)␊
#define FLAGNOTFAKE␉MKFLAG(4)␊
␊
/* Typedefs STRUCTS */␊
typedef struct {␊
branches/ErmaC/Enoch/i386/libsaio/cpu.c
242242
243243
244244
245
246
247
248
249
245
246
247
248
249
250250
251
252
253
254
255
256
257
258
251
252
253
254
255
256
259257
258
259
260
261
262
263
264
260265
261
262
266
267
263268
269
270
271
272
264273
265
266
274
275
267276
268
269
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
270302
271303
272
273
304
274305
306
307
308
309
310
311
312
313
314
315
316
275317
276318
277
319
278320
279321
280322
323
324
281325
282326
283327
......
288332
289333
290334
291
292
293
294
295
296
297
298
299
300
301
302
303335
304336
305337
......
325357
326358
327359
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390360
391361
392362
393363
394
395
364
396365
397366
398367
399368
400369
401
370
402371
403
372
404373
405
374
406375
407376
408377
......
410379
411380
412381
382
413383
414384
415385
......
419389
420390
421391
392
393
422394
423395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
424467
425468
426469
......
462505
463506
464507
465
466
467
508
468509
469510
470511
......
485526
486527
487528
488
529
489530
490531
491
532
492533
493534
494535
......
520561
521562
522563
523
524
525
526
527
528
529
530
564
565
566
567
568
569
570
571
531572
532573
533
574
534575
535576
536
577
537578
538579
539580
......
591632
592633
593634
594
635
595636
596637
597638
......
605646
606647
607648
608
649
609650
610
651
611652
612653
613654
......
618659
619660
620661
621
622
662
663
623664
624665
625666
......
752793
753794
754795
796
755797
756
757798
758799
759800
......
769810
770811
771812
772
773
774
813
814
815
816
817
818
819
820
821
822
775823
776
777
778
779
824
825
826
827
780828
781829
782830
......
793841
794842
795843
796
797
798
799
800
801
802
844
845
846
847
848
849
850
803851
804852
805853
*/␊
void scan_cpu(PlatformInfo_t *p)␊
{␊
␉uint64_t␉tscFrequency␉= 0;␊
␉uint64_t␉fsbFrequency␉= 0;␊
␉uint64_t␉cpuFrequency␉= 0;␊
␉uint64_t␉msr␉␉= 0;␊
␉uint64_t␉flex_ratio␉= 0;␊
␉uint64_t␉tscFrequency␉␉= 0;␊
␉uint64_t␉fsbFrequency␉␉= 0;␊
␉uint64_t␉cpuFrequency␉␉= 0;␊
␉uint64_t␉msr␉␉␉= 0;␊
␉uint64_t␉flex_ratio␉␉= 0;␊
␊
␉uint32_t␉max_ratio␉= 0;␊
␉uint32_t␉min_ratio␉= 0;␊
␉uint8_t␉␉bus_ratio_max␉= 0;␊
␉uint8_t␉␉bus_ratio_min␉= 0;␊
␉uint8_t␉␉currdiv␉␉= 0;␊
␉uint8_t␉␉currcoef␉= 0;␊
␉uint8_t␉␉maxdiv␉␉= 0;␊
␉uint8_t␉␉maxcoef␉␉= 0;␊
␉uint32_t␉max_ratio␉␉= 0;␊
␉uint32_t␉min_ratio␉␉= 0;␊
␉uint32_t␉reg[4]; //␉␉= {0, 0, 0, 0};␊
␉uint32_t␉cores_per_package␉= 0;␊
␉uint32_t␉logical_per_package␉= 1;␊
␉uint32_t␉threads_per_core␉= 1;␊
␊
␉uint8_t␉␉bus_ratio_max␉␉= 0;␊
␉uint8_t␉␉bus_ratio_min␉␉= 0;␊
␉uint8_t␉␉currdiv␉␉␉= 0;␊
␉uint8_t␉␉currcoef␉␉= 0;␊
␉uint8_t␉␉maxdiv␉␉␉= 0;␊
␉uint8_t␉␉maxcoef␉␉␉= 0;␊
␊
␉const char␉*newratio;␊
␉int␉␉len = 0;␊
␉int␉␉myfsb = 0;␊
␉char␉␉str[128];␊
␉char␉␉*s␉␉␉= 0;␊
␊
␉int␉␉len␉␉␉= 0;␊
␉int␉␉myfsb␉␉␉= 0;␊
␉int␉␉i␉␉␉= 0;␊
␊
␉/* get cpuid values */␊
␉do_cpuid(0x00000000, p->CPU.CPUID[CPUID_0]);␊
␉do_cpuid(0x00000001, p->CPU.CPUID[CPUID_1]);␊
␉do_cpuid(0x00000000, p->CPU.CPUID[CPUID_0]); // MaxFn, Vendor␊
␉p->CPU.Vendor = p->CPU.CPUID[CPUID_0][ebx];␊
␊
␉do_cpuid(0x00000002, p->CPU.CPUID[CPUID_2]);␊
␉do_cpuid(0x00000003, p->CPU.CPUID[CPUID_3]);␊
␉do_cpuid(0x00000001, p->CPU.CPUID[CPUID_1]); // Signature, stepping, features␊
␊
␉if ((p->CPU.Vendor == CPUID_VENDOR_INTEL) && ((bit(28) & p->CPU.CPUID[CPUID_1][edx]) != 0)) // Intel && HTT/Multicore␊
␉{␊
␉␉logical_per_package = bitfield(p->CPU.CPUID[CPUID_1][ebx], 23, 16);␊
␉}␊
␊
␉do_cpuid(0x00000002, p->CPU.CPUID[CPUID_2]); // TLB/Cache/Prefetch␊
␊
␉do_cpuid(0x00000003, p->CPU.CPUID[CPUID_3]); // S/N␊
␊
␉/* Based on Apple's XNU cpuid.c - Deterministic cache parameters */␊
␉if ((p->CPU.CPUID[CPUID_0][eax] > 3) && (p->CPU.CPUID[CPUID_0][eax] < 0x80000000))␊
␉{␊
␉␉for (i = 0; i < 0xFF; i++) // safe loop␊
␉␉{␊
␉␉␉do_cpuid2(0x00000004, i, reg); // AX=4: Fn, CX=i: cache index␊
␉␉␉if (bitfield(reg[eax], 4, 0) == 0)␊
␉␉␉{␊
␉␉␉␉break;␊
␉␉␉}␊
␉␉␉//cores_per_package = bitfield(reg[eax], 31, 26) + 1;␊
␉␉}␊
␉}␊
␊
␉do_cpuid2(0x00000004, 0, p->CPU.CPUID[CPUID_4]);␊
␊
␉do_cpuid(0x80000000, p->CPU.CPUID[CPUID_80]);␊
␉if (p->CPU.CPUID[CPUID_0][0] >= 0x5)␊
␉if (i > 0)␊
␉{␊
␉␉cores_per_package = bitfield(p->CPU.CPUID[CPUID_4][eax], 31, 26) + 1; // i = cache index␊
␉␉threads_per_core = bitfield(p->CPU.CPUID[CPUID_4][eax], 25, 14) + 1;␊
␉}␊
␊
␉if (cores_per_package == 0)␊
␉{␊
␉␉cores_per_package = 1;␊
␉}␊
␊
␉if (p->CPU.CPUID[CPUID_0][0] >= 0x5)␉// Monitor/Mwait␊
␉{␊
␉␉do_cpuid(5, p->CPU.CPUID[CPUID_5]);␊
␉}␊
␉if (p->CPU.CPUID[CPUID_0][0] >= 6)␊
␉if (p->CPU.CPUID[CPUID_0][0] >= 6)␉// Thermal/Power␊
␉{␊
␉␉do_cpuid(6, p->CPU.CPUID[CPUID_6]);␊
␉}␊
␊
␉do_cpuid(0x80000000, p->CPU.CPUID[CPUID_80]);␊
␉if ((p->CPU.CPUID[CPUID_80][0] & 0x0000000f) >= 8)␊
␉{␊
␉␉do_cpuid(0x80000008, p->CPU.CPUID[CPUID_88]);␊
␉␉do_cpuid(0x80000001, p->CPU.CPUID[CPUID_81]);␊
␉}␊
␊
// #if DEBUG_CPU␊
␉{␊
␉␉int␉␉i;␊
␉␉DBG("CPUID Raw Values:\n");␊
␉␉for (i = 0; i < CPUID_MAX; i++) {␊
␉␉␉DBG("%02d: %08x-%08x-%08x-%08x\n", i,␊
␉␉␉␉ p->CPU.CPUID[i][0], p->CPU.CPUID[i][1],␊
␉␉␉␉ p->CPU.CPUID[i][2], p->CPU.CPUID[i][3]);␊
␉␉}␊
␉}␊
// #endif␊
␊
/* http://www.flounder.com/cpuid_explorer2.htm␊
EAX (Intel):␊
31 28 27 20 19 16 1514 1312 11 8 7 4 3 0␊
␊
␉p->CPU.Model += (p->CPU.ExtModel << 4);␊
␊
␉if (p->CPU.Vendor == CPUID_VENDOR_INTEL &&␊
␉␉p->CPU.Family == 0x06 &&␊
␉␉p->CPU.Model >= CPUID_MODEL_NEHALEM &&␊
␉␉p->CPU.Model != CPUID_MODEL_ATOM␉␉// MSR is *NOT* available on the Intel Atom CPU␊
␉␉)␊
␉{␊
␉␉/*␊
␉␉ * Find the number of enabled cores and threads␊
␉␉ * (which determines whether SMT/Hyperthreading is active).␊
␉␉ */␊
␉␉switch (p->CPU.Model)␊
␉␉{␊
␉␉␉case CPUID_MODEL_NEHALEM:␊
␉␉␉case CPUID_MODEL_FIELDS:␊
␉␉␉case CPUID_MODEL_DALES:␊
␉␉␉case CPUID_MODEL_NEHALEM_EX:␊
␉␉␉case CPUID_MODEL_JAKETOWN:␊
␉␉␉case CPUID_MODEL_SANDYBRIDGE:␊
␉␉␉case CPUID_MODEL_IVYBRIDGE:␊
␉␉␉case CPUID_MODEL_HASWELL:␊
␉␉␉case CPUID_MODEL_HASWELL_SVR:␊
␉␉␉//case CPUID_MODEL_HASWELL_H:␊
␉␉␉case CPUID_MODEL_HASWELL_ULT:␊
␉␉␉case CPUID_MODEL_CRYSTALWELL:␊
␉␉␉␉msr = rdmsr64(MSR_CORE_THREAD_COUNT);␊
␉␉␉␉p->CPU.NoCores␉␉= (uint8_t)bitfield((uint32_t)msr, 31, 16);␊
␉␉␉␉p->CPU.NoThreads␉= (uint8_t)bitfield((uint32_t)msr, 15, 0);␊
␉␉␉␉break;␊
␊
␉␉␉case CPUID_MODEL_DALES_32NM:␊
␉␉␉case CPUID_MODEL_WESTMERE:␊
␉␉␉case CPUID_MODEL_WESTMERE_EX:␊
␉␉␉␉msr = rdmsr64(MSR_CORE_THREAD_COUNT);␊
␉␉␉␉p->CPU.NoCores␉␉= (uint8_t)bitfield((uint32_t)msr, 19, 16);␊
␉␉␉␉p->CPU.NoThreads␉= (uint8_t)bitfield((uint32_t)msr, 15, 0);␊
␉␉␉␉break;␊
␊
␉␉␉default:␊
␉␉␉␉p->CPU.NoCores = bitfield(p->CPU.CPUID[CPUID_1][1], 23, 16);␊
␉␉␉␉p->CPU.NoThreads = (uint8_t)(p->CPU.LogicalPerPackage & 0xff);␊
␉␉␉␉//workaround for N270. I don't know why it detected wrong␊
␉␉␉␉if ((p->CPU.Model == CPUID_MODEL_ATOM) && (p->CPU.Stepping == 2))␊
␉␉␉␉{␊
␉␉␉␉␉p->CPU.NoCores = 1;␊
␉␉␉␉}␊
␉␉␉␉break;␊
␊
␉␉} // end switch␊
␊
␉}␊
␉else if (p->CPU.Vendor == CPUID_VENDOR_AMD)␊
␉{␊
␉␉p->CPU.NoThreads␉= (uint8_t)bitfield(p->CPU.CPUID[CPUID_1][1], 23, 16);␊
␉␉p->CPU.NoCores␉␉= (uint8_t)bitfield(p->CPU.CPUID[CPUID_88][2], 7, 0) + 1;␊
␉}␊
␉else␊
␉{␊
␉␉// Use previous method for Cores and Threads␊
␉␉p->CPU.NoThreads␉= (uint8_t)bitfield(p->CPU.CPUID[CPUID_1][1], 23, 16);␊
␉␉p->CPU.NoCores␉␉= (uint8_t)bitfield(p->CPU.CPUID[CPUID_4][0], 31, 26) + 1;␊
␉}␊
␊
␉/* get BrandString (if supported) */␊
␉/* Copyright: from Apple's XNU cpuid.c */␊
␉if (p->CPU.CPUID[CPUID_80][0] > 0x80000004)␊
␉{␊
␉␉uint32_t␉reg[4];␊
␉␉char␉␉str[128], *s;␊
␉␉bzero(str, 128);␊
␉␉/*␊
␉␉ * The BrandString 48 bytes (max), guaranteed to␊
␉␉ * be NULL terminated.␊
␉␉ */␊
␉␉do_cpuid(0x80000002, reg);␊
␉␉bcopy((char *)reg, &str[0], 16);␊
␉␉memcpy(&str[0], (char *)reg, 16);␊
␉␉do_cpuid(0x80000003, reg);␊
␉␉bcopy((char *)reg, &str[16], 16);␊
␉␉memcpy(&str[16], (char *)reg, 16);␊
␉␉do_cpuid(0x80000004, reg);␊
␉␉bcopy((char *)reg, &str[32], 16);␊
␉␉memcpy(&str[32], (char *)reg, 16);␊
␉␉for (s = str; *s != '\0'; s++)␊
␉␉{␊
␉␉␉if (*s != ' ')␊
␉␉␉␉break;␊
␉␉␉}␊
␉␉}␊
␉␉strlcpy(p->CPU.BrandString, s, 48);␊
␊
␉␉if (!strncmp(p->CPU.BrandString, CPU_STRING_UNKNOWN, MIN(sizeof(p->CPU.BrandString), (unsigned)strlen(CPU_STRING_UNKNOWN) + 1)))␊
␉␉{␊
␉␉␉ */␊
␉␉␉p->CPU.BrandString[0] = '\0';␊
␉␉}␊
␉␉p->CPU.BrandString[47] = '\0';␊
//␉␉DBG("Brandstring = %s\n", p->CPU.BrandString);␊
␉}␊
␊
␉/*␊
␉ * Find the number of enabled cores and threads␊
␉ * (which determines whether SMT/Hyperthreading is active).␊
␉ */␊
␉switch (p->CPU.Vendor)␊
␉{␊
␉␉case CPUID_VENDOR_INTEL:␊
␉␉␉switch (p->CPU.Model)␊
␉␉␉{␊
␉␉␉␉case CPUID_MODEL_NEHALEM:␊
␉␉␉␉case CPUID_MODEL_FIELDS:␊
␉␉␉␉case CPUID_MODEL_DALES:␊
␉␉␉␉case CPUID_MODEL_NEHALEM_EX:␊
␉␉␉␉case CPUID_MODEL_JAKETOWN:␊
␉␉␉␉case CPUID_MODEL_SANDYBRIDGE:␊
␉␉␉␉case CPUID_MODEL_IVYBRIDGE:␊
␊
␉␉␉␉case CPUID_MODEL_HASWELL:␊
␉␉␉␉case CPUID_MODEL_HASWELL_SVR:␊
␉␉␉␉//case CPUID_MODEL_HASWELL_H:␊
␉␉␉␉case CPUID_MODEL_HASWELL_ULT:␊
␉␉␉␉case CPUID_MODEL_CRYSTALWELL:␊
␉␉␉␉//case CPUID_MODEL_:␊
␉␉␉␉␉msr = rdmsr64(MSR_CORE_THREAD_COUNT);␊
␉␉␉␉␉p->CPU.NoCores␉␉= (uint32_t)bitfield((uint32_t)msr, 31, 16);␊
␉␉␉␉␉p->CPU.NoThreads␉= (uint32_t)bitfield((uint32_t)msr, 15, 0);␊
␉␉␉␉␉break;␊
␊
␉␉␉␉case CPUID_MODEL_DALES_32NM:␊
␉␉␉␉case CPUID_MODEL_WESTMERE:␊
␉␉␉␉case CPUID_MODEL_WESTMERE_EX:␊
␉␉␉␉␉msr = rdmsr64(MSR_CORE_THREAD_COUNT);␊
␉␉␉␉␉p->CPU.NoCores␉␉= (uint32_t)bitfield((uint32_t)msr, 19, 16);␊
␉␉␉␉␉p->CPU.NoThreads␉= (uint32_t)bitfield((uint32_t)msr, 15, 0);␊
␉␉␉␉␉break;␊
␉␉␉}␊
␊
␉␉␉if (p->CPU.NoCores == 0)␊
␉␉␉{␊
␉␉␉␉p->CPU.NoCores␉␉= cores_per_package;␊
␉␉␉␉p->CPU.NoThreads␉= logical_per_package;␊
␉␉␉}␊
␉␉␉break;␊
␊
␉␉case CPUID_VENDOR_AMD:␊
␉␉␉p->CPU.NoCores␉␉= (uint32_t)bitfield(p->CPU.CPUID[CPUID_88][2], 7, 0) + 1;␊
␉␉␉p->CPU.NoThreads␉= (uint32_t)bitfield(p->CPU.CPUID[CPUID_1][1], 23, 16);␊
␉␉␉if (p->CPU.NoCores == 0)␊
␉␉␉{␊
␉␉␉␉p->CPU.NoCores = 1;␊
␉␉␉}␊
␊
␉␉␉if (p->CPU.NoThreads < p->CPU.NoCores)␊
␉␉␉{␊
␉␉␉␉p->CPU.NoThreads = p->CPU.NoCores;␊
␉␉␉}␊
␊
␉␉␉break;␊
␊
␉␉default:␊
␉␉␉stop("Unsupported CPU detected! System halted.");␊
␉}␊
␊
␉//workaround for N270. I don't know why it detected wrong␊
␉// MSR is *NOT* available on the Intel Atom CPU␊
␉if ((p->CPU.Model == CPUID_MODEL_ATOM) && (strstr(p->CPU.BrandString, "270")))␊
␉{␊
␉␉␉p->CPU.NoCores␉␉= 1;␊
␉␉␉p->CPU.NoThreads␉= 2;␊
␉}␊
␊
␉/* setup features */␊
␉if ((bit(23) & p->CPU.CPUID[CPUID_1][3]) != 0)␊
␉{␊
␉␉p->CPU.Features |= CPU_FEATURE_MSR;␊
␉}␊
␊
␉//if ((bit(28) & p->CPU.CPUID[CPUID_1][3]) != 0) {␊
␊
␉if (p->CPU.NoThreads > p->CPU.NoCores)␊
␉if ((p->CPU.Vendor == CPUID_VENDOR_INTEL) && (p->CPU.NoThreads > p->CPU.NoCores))␊
␉{␊
␉␉p->CPU.Features |= CPU_FEATURE_HTT;␊
␉}␊
␉fsbFrequency = 0;␊
␉cpuFrequency = 0;␊
␊
␉if ((p->CPU.Vendor == CPUID_VENDOR_INTEL) && ((p->CPU.Family == 0x06) || (p->CPU.Family == 0x0f)))␊
␉if (p->CPU.Vendor == CPUID_VENDOR_INTEL && ((p->CPU.Family == 0x06 && p->CPU.Model >= 0x0c) || (p->CPU.Family == 0x0f && p->CPU.Model >= 0x03)))␊
␉{␊
␉␉int intelCPU = p->CPU.Model;␊
␉␉if ((p->CPU.Family == 0x06 && p->CPU.Model >= 0x0c) || (p->CPU.Family == 0x0f && p->CPU.Model >= 0x03))␊
␉␉if (p->CPU.Family == 0x06)␊
␉␉{␊
␉␉␉/* Nehalem CPU model */␊
␉␉␉switch (p->CPU.Model)␊
␉␉␉␉␉if (bitfield(msr, 16, 16))␊
␉␉␉␉␉{␊
␉␉␉␉␉␉flex_ratio = bitfield(msr, 15, 8);␊
␉␉␉␉␉␉/* bcc9: at least on the gigabyte h67ma-ud2h,␊
␉␉␉␉␉␉ where the cpu multipler can't be changed to␊
␉␉␉␉␉␉ allow overclocking, the flex_ratio msr has unexpected (to OSX)␊
␉␉␉␉␉␉ contents.␉These contents cause mach_kernel to␊
␉␉␉␉␉␉ fail to compute the bus ratio correctly, instead␊
␉␉␉␉␉␉ causing the system to crash since tscGranularity␊
␉␉␉␉␉␉ is inadvertently set to 0.␊
␉␉␉␉␉␉ */␊
␉␉␉␉␉␉// bcc9: at least on the gigabyte h67ma-ud2h,␊
␉␉␉␉␉␉// where the cpu multipler can't be changed to␊
␉␉␉␉␉␉// allow overclocking, the flex_ratio msr has unexpected (to OSX)␊
␉␉␉␉␉␉// contents.␉These contents cause mach_kernel to␊
␉␉␉␉␉␉// fail to compute the bus ratio correctly, instead␊
␉␉␉␉␉␉// causing the system to crash since tscGranularity␊
␉␉␉␉␉␉// is inadvertently set to 0.␊
␊
␉␉␉␉␉␉if (flex_ratio == 0)␊
␉␉␉␉␉␉{␊
␉␉␉␉␉␉␉/* Clear bit 16 (evidently the presence bit) */␊
␉␉␉␉␉␉␉// Clear bit 16 (evidently the presence bit)␊
␉␉␉␉␉␉␉wrmsr64(MSR_FLEX_RATIO, (msr & 0xFFFFFFFFFFFEFFFFULL));␊
␉␉␉␉␉␉␉msr = rdmsr64(MSR_FLEX_RATIO);␊
␉␉␉␉␉␉␉DBG("Unusable flex ratio detected. Patched MSR now %08x\n", bitfield(msr, 31, 0));␊
␉␉␉␉␉␉␉DBG("CPU: Unusable flex ratio detected. Patched MSR now %08x\n", bitfield(msr, 31, 0));␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉else␊
␉␉␉␉␉␉{␊
␉␉␉␉␉␉}␊
␉␉␉␉␉}␊
␉␉␉␉␉//valv: to be uncommented if Remarq.1 didn't stick␊
␉␉␉␉␉/*if (bus_ratio_max > 0) bus_ratio = flex_ratio;*/␊
␉␉␉␉␉//if (bus_ratio_max > 0) bus_ratio = flex_ratio;␊
␉␉␉␉␉p->CPU.MaxRatio = max_ratio;␊
␉␉␉␉␉p->CPU.MinRatio = min_ratio;␊
␊
␉␉␉␉msr = rdmsr64(MSR_IA32_PERF_STATUS);␊
␉␉␉␉DBG("msr(%d): ia32_perf_stat 0x%08x\n", __LINE__, bitfield(msr, 31, 0));␊
␉␉␉␉currcoef = bitfield(msr, 12, 8); // Bungo: reverted to 2263 state because of wrong old CPUs freq. calculating␊
␉␉␉␉/* Non-integer bus ratio for the max-multi*/␊
␉␉␉␉// Non-integer bus ratio for the max-multi␊
␉␉␉␉maxdiv = bitfield(msr, 46, 46);␊
␉␉␉␉/* Non-integer bus ratio for the current-multi (undocumented)*/␊
␉␉␉␉// Non-integer bus ratio for the current-multi (undocumented)␊
␉␉␉␉currdiv = bitfield(msr, 14, 14);␊
␊
␉␉␉␉// This will always be model >= 3␊
␉␉␉␉}␊
␉␉␉␉else␊
␉␉␉␉{␊
␉␉␉␉␉/* On lower models, currcoef defines TSC freq */␊
␉␉␉␉␉/* XXX */␊
␉␉␉␉␉// On lower models, currcoef defines TSC freq␊
␉␉␉␉␉// XXX␊
␉␉␉␉␉maxcoef = currcoef;␊
␉␉␉␉}␊
␊
␉if (!fsbFrequency)␊
␉{␊
␉␉fsbFrequency = (DEFAULT_FSB * 1000);␊
␉␉DBG("CPU: fsbFrequency = 0! using the default value for FSB!\n");␊
␉␉cpuFrequency = tscFrequency;␊
␉␉DBG("0 ! using the default value for FSB !\n");␊
␉}␊
␊
␉DBG("cpu freq = 0x%016llxn", timeRDTSC() * 20);␊
␉p->CPU.CPUFrequency = cpuFrequency;␊
␊
␉// keep formatted with spaces instead of tabs␊
␉DBG("\n---------------------------------------------\n");␊
␉DBG("------------------ CPU INFO -----------------\n");␊
␉DBG("---------------------------------------------\n");␊
␉DBG("\n------------------------------\n");␊
␉DBG("\tCPU INFO\n");␊
␉DBG("------------------------------\n");␊
␊
␉DBG("CPUID Raw Values:\n");␊
␉for (i = 0; i < CPUID_MAX; i++)␊
␉{␊
␉␉DBG("%02d: %08X-%08X-%08X-%08X\n", i, p->CPU.CPUID[i][eax], p->CPU.CPUID[i][ebx], p->CPU.CPUID[i][ecx], p->CPU.CPUID[i][edx]);␊
␉}␊
␉DBG("\n");␊
␉DBG("Brand String: %s\n",␉␉p->CPU.BrandString);␉␉// Processor name (BIOS)␊
␉DBG("Vendor: 0x%x\n",␉␉p->CPU.Vendor);␉␉␉// Vendor ex: GenuineIntel␊
␉DBG("Family: 0x%x\n",␉␉p->CPU.Family);␉␉␉// Family ex: 6 (06h)␊
␉DBG("ExtFamily: 0x%x\n",␉␉p->CPU.ExtFamily);␊
␉DBG("Signature: %x\n",␉␉p->CPU.Signature);␉␉// CPUID signature␊
␉DBG("Vendor: 0x%X\n",␉␉p->CPU.Vendor);␉␉␉// Vendor ex: GenuineIntel␊
␉DBG("Family: 0x%X\n",␉␉p->CPU.Family);␉␉␉// Family ex: 6 (06h)␊
␉DBG("ExtFamily: 0x%X\n",␉␉p->CPU.ExtFamily);␊
␉DBG("Signature: 0x%08X\n",␉p->CPU.Signature);␉␉// CPUID signature␊
␉/*switch (p->CPU.Type) {␊
␉␉case PT_OEM:␊
␉␉␉DBG("Processor type: Intel Original OEM Processor\n");␊
␉␉default:␊
␉␉␉break;␊
␉}*/␊
␉DBG("Model: 0x%x\n",␉␉p->CPU.Model);␉␉␉// Model ex: 37 (025h)␊
␉DBG("ExtModel: 0x%x\n",␉␉p->CPU.ExtModel);␊
␉DBG("Stepping: 0x%x\n",␉␉p->CPU.Stepping);␉␉// Stepping ex: 5 (05h)␊
␉DBG("MaxCoef: 0x%x\n",␉␉p->CPU.MaxCoef);␊
␉DBG("CurrCoef: 0x%x\n",␉␉p->CPU.CurrCoef);␊
␉DBG("MaxDiv: 0x%x\n",␉␉p->CPU.MaxDiv);␊
␉DBG("CurrDiv: 0x%x\n",␉␉p->CPU.CurrDiv);␊
␉DBG("Model: 0x%X\n",␉␉p->CPU.Model);␉␉␉// Model ex: 37 (025h)␊
␉DBG("ExtModel: 0x%X\n",␉␉p->CPU.ExtModel);␊
␉DBG("Stepping: 0x%X\n",␉␉p->CPU.Stepping);␉␉// Stepping ex: 5 (05h)␊
␉DBG("MaxCoef: %d\n",␉␉p->CPU.MaxCoef);␊
␉DBG("CurrCoef: %d\n",␉␉p->CPU.CurrCoef);␊
␉DBG("MaxDiv: %d\n",␉␉p->CPU.MaxDiv);␊
␉DBG("CurrDiv: %d\n",␉␉p->CPU.CurrDiv);␊
␉DBG("TSCFreq: %dMHz\n",␉␉p->CPU.TSCFrequency / 1000000);␊
␉DBG("FSBFreq: %dMHz\n",␉␉(p->CPU.FSBFrequency + 500000) / 1000000);␊
␉DBG("CPUFreq: %dMHz\n",␉␉p->CPU.CPUFrequency / 1000000);␊
branches/ErmaC/Enoch/i386/libsaio/platform.h
3535
3636
3737
38
38
3939
4040
4141
......
368368
369369
370370
371
372
373
374
375
371
372
373
374
375
376376
377377
378
379
378
379
380380
381381
382382
......
425425
426426
427427
428
428
429429
430430
431431
#define CPUID_MODEL_DOTHAN␉␉0x0D␉␉␉// Dothan Pentium M, Celeron M (90nm)␊
#define CPUID_MODEL_YONAH␉␉0x0E␉␉␉// Sossaman, Yonah␊
#define CPUID_MODEL_MEROM␉␉0x0F␉␉␉// Allendale, Conroe, Kentsfield, Woodcrest, Clovertown, Tigerton, Merom␊
#define CPUID_MODEL_CONROE␉␉0x0F␉␉␉// ␊
#define CPUID_MODEL_CONROE␉␉0x0F␉␉␉//␊
#define CPUID_MODEL_CELERON␉␉0x16␉␉␉// Merom, Conroe (65nm), Celeron (45nm)␊
#define CPUID_MODEL_PENRYN␉␉0x17␉␉␉// Wolfdale, Yorkfield, Harpertown, Penryn␊
#define CPUID_MODEL_WOLFDALE␉␉0x17␉␉␉// Xeon 31xx, 33xx, 52xx, 54xx, Core 2 Quad 8xxx and 9xxx␊
␉␉uint32_t␉␉Vendor;␉␉␉// Vendor - char Vendor[16];␊
␉␉char␉␉␉BrandString[48];␉// 48 Byte Branding String␊
␉␉//uint16_t␉␉Type;␉␉␉// Type␊
␉␉uint8_t␉␉␉Family;␉␉␉// Family␊
␉␉uint8_t␉␉␉Model;␉␉␉// Model␊
␉␉uint8_t␉␉␉ExtModel;␉␉// Extended Model␊
␉␉uint8_t␉␉␉ExtFamily;␉␉// Extended Family␊
␉␉uint8_t␉␉␉Stepping;␉␉// Stepping␊
␉␉uint32_t␉␉Family;␉␉␉// Family␊
␉␉uint32_t␉␉Model;␉␉␉// Model␊
␉␉uint32_t␉␉ExtModel;␉␉// Extended Model␊
␉␉uint32_t␉␉ExtFamily;␉␉// Extended Family␊
␉␉uint32_t␉␉Stepping;␉␉// Stepping␊
␉␉uint64_t␉␉Features;␉␉// CPU Features like MMX, SSE2, VT, MobileCPU␊
␉␉uint64_t␉␉ExtFeatures;␊
␉␉uint32_t␉␉CoresPerPackage;␊
␉␉uint32_t␉␉LogicalPerPackage;␊
␉␉//uint32_t␉␉CoresPerPackage;␊
␉␉//uint32_t␉␉LogicalPerPackage;␊
␉␉uint32_t␉␉Signature;␉␉// Processor Signature␊
␉␉//uint8_t␉␉Brand;␊
␉␉//uint8_t␉␉ProcessorFlag;␊
␊
␉uint8_t␉␉␉␉Type;␉␉␉// system-type: 1=Desktop, 2=Portable, 3=Workstation... according ACPI2.0 (FACP: PM_Profile)␊
␉uint8_t␉␉␉␉*UUID;␉␉␉// system-id (SMBIOS Table 1: system uuid)␊
␊
//␉uint32_t␉␉␉HWSignature;␉␉// machine-signature (FACS: Hardware Signature)␊
} PlatformInfo_t;␊
␊
extern PlatformInfo_t Platform;␊
branches/ErmaC/Enoch/i386/libsaio/smbios_decode.c
192192
193193
194194
195
196
195
197196
198197
199198
......
220219
221220
222221
223
222
223
224224
225225
226226
......
240240
241241
242242
243
243
244244
245245
246246
......
534534
535535
536536
537
538
539
537540
538541
539542
/*=====␊
7.18.2␊
====*/␊
static const char *␊
SMBMemoryDeviceTypes[] =␊
static const char *SMBMemoryDeviceTypes[] =␊
{␊
␉"RAM", /* 00h Undefined */␊
␉"RAM", /* 01h Other */␊
␉"RAM",␉␉/* 16h unused */␊
␉"RAM",␉␉/* 17h unused */␊
␉"DDR3",␉␉/* 18h DDR3, chosen in [5776134] */␊
␉"FBD2"␉␉/* 19h FBD2 */␊
␉"FBD2",␉␉/* 19h FBD2 */␊
␉"DDR4"␉␉/* 1Ah DDR4 */␊
};␊
␊
static const int kSMBMemoryDeviceTypeCount = sizeof(SMBMemoryDeviceTypes) / sizeof(SMBMemoryDeviceTypes[0]);␊
␉}␊
␊
␉return str;␊
};␊
}␊
␊
void printHeader(SMBStructHeader *structHeader)␊
{␊
␉DBG("\tPart Number: %s\n", SMBStringForField(structHeader, ((SMBMemoryDevice *)structHeader)->partNumber, neverMask));␊
// Rank:␊
// Configured Clock Speed:␊
// Minimum Voltage:␊
// Maximum Voltage:␊
// Configured Voltage:␊
␉DBG("\n");␊
}␊
␊
branches/ErmaC/Enoch/i386/libsaio/biosfn.c
10071007
10081008
10091009
1010
1010
10111011
10121012
10131013
1014
1015
1014
1015
10161016
10171017
10181018
␊
//==============================================================================␊
␊
void delay(int ms)␊
void delay(int us)␊
{␊
bb.intno = 0x15;␊
bb.eax.r.h = 0x86;␊
bb.ecx.rr = ms >> 16;␊
bb.edx.rr = ms & 0xFFFF;␊
bb.ecx.rr = us >> 16;␊
bb.edx.rr = us & 0xFFFF;␊
bios(&bb);␊
}␊
␊
branches/ErmaC/Enoch/i386/libsaio/pci.h
201201
202202
203203
204
205
204
205
206206
207207
208208
......
211211
212212
213213
214
214
215215
216216
217217
#define PCI_BASE_ADDRESS_MEM_TYPE_1M␉␉␉␉0x02␉␉/* Below 1M [obsolete] */␊
#define PCI_BASE_ADDRESS_MEM_TYPE_64␉␉␉␉0x04␉␉/* 64 bit address */␊
#define PCI_BASE_ADDRESS_MEM_PREFETCH␉␉␉␉0x08␉␉/* prefetchable? */␊
#define PCI_BASE_ADDRESS_MEM_MASK␉␉␉␉(~(pciaddr_t)0x0f)␊
#define PCI_BASE_ADDRESS_IO_MASK␉␉␉␉(~(pciaddr_t)0x03)␊
#define PCI_BASE_ADDRESS_MEM_MASK␉␉␉␉(~(uint32_t)0x0f)␊
#define PCI_BASE_ADDRESS_IO_MASK␉␉␉␉(~(uint32_t)0x03)␊
/* bit 1 is reserved if address_space = 1 */␊
␊
/* Header type 0 (normal devices) */␊
#define PCI_SUBSYSTEM_ID␉␉␉␉␉0x2e␊
#define PCI_ROM_ADDRESS␉␉␉␉␉␉0x30␉␉/* Bits 31..11 are address, 10..1 reserved */␊
#define PCI_ROM_ADDRESS_ENABLE␉␉␉␉␉0x01␊
#define PCI_ROM_ADDRESS_MASK␉␉␉␉␉(~(pciaddr_t)0x7ff)␊
#define PCI_ROM_ADDRESS_MASK␉␉␉␉␉(~(uint32_t)0x7ff)␊
␊
#define PCI_CAPABILITY_LIST␉␉␉␉␉0x34␉␉/* Offset of first capability list entry */␊
␊
branches/ErmaC/Enoch/i386/libsaio/saio_internal.h
5353
5454
5555
56
56
5757
5858
5959
extern int readKeyboardStatus(void);␊
extern int readKeyboardShiftFlags(void);␊
extern unsigned int time18(void);␊
extern void delay(int ms);␊
extern void delay(int us);␊
extern unsigned int get_diskinfo(int dev);␊
#if APM_SUPPORT␊
extern int APMPresent(void);␊
branches/ErmaC/Enoch/i386/boot2/boot.h
2828
2929
3030
31
32
33
34
35
36
37
38
39
40
4131
4232
4333
......
119109
120110
121111
122
112
123113
124114
125
115
126116
127117
128
118
129119
130120
131121
......
136126
137127
138128
139
129
140130
141131
142132
......
156146
157147
158148
159
160149
161150
162151
......
173162
174163
175164
176
165
177166
178167
179168
......
206195
207196
208197
209
198
210199
211200
212
201
213202
214203
215204
#define __BOOT2_BOOT_H␊
␊
#include "libsaio.h"␊
␊
// OS X Versions␊
//#define YOSEMITE checkOSVersion("10.10") // Yosemite␊
//#define MAVERICKS checkOSVersion("10.9") // Mavericks␊
//#define MOUNTAIN_LION checkOSVersion("10.8") // Mountain Lion␊
//#define LION checkOSVersion("10.7") // Lion␊
//#define SNOW_LEOPARD checkOSVersion("10.6") // Snow Leopard␊
//#define LEOPARD checkOSVersion("10.5") // Leopard␊
//#define TIGER checkOSVersion("10.4") // Tiger␊
␊
/*␊
* Paths used by chameleon␊
*/␊
#define kEHCIhard␉␉␉"EHCIhard"␉␉/* usb.c */␊
#define kDefaultPartition␉␉"Default Partition"␉/* sys.c */␊
␊
/* Zenith432: added this */␊
/* Zenith432: added this key */␊
#define kXHCILegacyOff␉␉␉"XHCILegacyOff"␉␉/* usb.c */␊
␊
/* Duvel300: added this */␊
/* Duvel300: added this key */␊
#define kRestartFix␉␉␉"RestartFix"␉␉/* acpi_patcher.c */␊
␊
/* Slice: added this */␊
/* Slice: added these keys */␊
#define kPS2RestartFix␉␉␉"PS2RestartFix"␉␉/* acpi_patcher.c */␊
//#define kInjectEDID␉␉␉"InjectEDID"␉␉/* ati.c */␊
//#define kCustomEDID␉␉␉"CustomEDID"␉␉/* ati.c */␊
␊
/* Lebidou: added this key */␊
␊
/* Meklort: added this key */␊
/* Meklort: added these keys */␊
#define kMD0Image␉␉␉"md0"␉␉␉/* ramdisk.h */␊
#define kEnableWifi␉␉␉"EnableWifi"␉␉/* pci_setup.c */␊
␊
#define kDropECDT␉␉␉"DropECDT"␉␉/* acpi_patcher.c */␊
#define kDropASFT␉␉␉"DropASFT"␉␉/* acpi_patcher.c */␊
#define kDropDMAR␉␉␉"DropDMAR"␉␉/* acpi_patcher.c */␊
#define kUpdateACPI␉␉␉"UpdateACPI"␉␉/* acpi_patcher.c */␊
␊
/* Mojodojo: added these keys */␊
#define kGeneratePStates␉␉"GeneratePStates"␉␉/* acpi_patcher.c */␊
#define kDcfg0␉␉␉␉"display_0"␉␉␉/* nvidia.c */␊
#define kDcfg1␉␉␉␉"display_1"␉␉␉/* nvidia.c */␊
␊
/* Marchrius: added these keys */␊
/* Marchrius: added this key */␊
#define kEnableBacklight␉␉"EnableBacklight"␉␉/* nvidia.c */␊
␊
/* Kabyl: added these keys */␊
#define kDropMCFG␉␉␉"DropMCFG"␉␉␉/* acpi_patcher.c */␊
#define kDropAPIC␉␉␉"DropAPIC"␉␉␉/* acpi_patcher.c */␊
␊
/* Karas: added these keys */␊
/* Karas: added this key */␊
#define kMemFullInfo␉␉␉"ForceFullMemInfo"␉␉/* smbios.c */␊
␊
/* Bungo: added these keys */␊
/* Bungo: added this key */␊
#define kPrivateData␉␉␉"PrivateData"␉␉␉/* smbios_decode.c */␊
␊
␊
branches/ErmaC/Enoch/i386/boot2/modules.h
4949
5050
5151
52
5352
5453
5554
␉const char␉␉*name;␊
␉const char␉␉*author;␊
␉const char␉␉*description;␊
//␉const void␉␉*base;␊
␉UInt32␉␉␉version;␊
␉UInt32␉␉␉compat;␊
␉struct modulesList_t␉*next;␊
branches/ErmaC/Enoch/i386/modules/Resolution/915resolution.c
735735
736736
737737
738
738
739
739740
740741
741742
......
772773
773774
774775
775
776
777
776778
777779
778
780
781
779782
780783
781784
......
828831
829832
830833
831
834
835
836
832837
833838
834839
......
863868
864869
865870
866
871
872
867873
868874
869875
......
876882
877883
878884
879
885
886
887
880888
881889
882890
␉␉␉for(j=0; j < 3; j++) {␊
␉␉␉␉vbios_modeline_type2 * modeline = &res->modelines[j];␊
␉␉␉␉␊
␉␉␉␉if (modeline->x1 == xprev && modeline->y1 == yprev) {␊
␉␉␉␉if (modeline->x1 == xprev && modeline->y1 == yprev)␊
␉␉␉␉{␊
␉␉␉␉␉modeline->x1 = modeline->x2 = (uint16_t)(x-1);␊
␉␉␉␉␉modeline->y1 = modeline->y2 = (uint16_t)(y-1);␊
␉␉␉␉␉␊
␉␉␉xprev = res->modelines[0].x1;␊
␉␉␉yprev = res->modelines[0].y1;␊
␉␉␉␊
␉␉␉for (j=0; j < 3; j++) {␊
␉␉␉for (j=0; j < 3; j++)␊
␉␉␉{␊
␉␉␉␉vbios_modeline_type3 * modeline = &res->modelines[j];␊
␉␉␉␉␊
␉␉␉␉if (modeline->x1 == xprev && modeline->y1 == yprev) {␊
␉␉␉␉if (modeline->x1 == xprev && modeline->y1 == yprev)␊
␉␉␉␉{␊
␉␉␉␉␉modeline->x1 = modeline->x2 = (uint16_t)(x-1);␊
␉␉␉␉␉modeline->y1 = modeline->y2 = (uint16_t)(y-1);␊
␉␉␉␉␉␊
␉␉␉␉mode_timing->usCRTC_V_SyncWidth = mode.v_sync_width;␊
␊
␉␉␉␉mode_timing->usPixelClock = mode.pixel_clock;␊
␉␉␉} else {␊
␉␉␉}␊
␉␉␉else␊
␉␉␉{␊
␉␉␉␉verbose(" Edid not found or invalid - vbios not patched!\n");␊
␉␉␉}␊
␉␉␉/*else␊
␉␉␉ATOM_DTD_FORMAT *mode_timing = (ATOM_DTD_FORMAT *) map->ati_mode_table;␊
␉␉␉␊
␉␉␉/*if (mode.pixel_clock && (mode.h_active == x) && (mode.v_active == y) && !force) {*/␊
␉␉␉if (!getMode(&mode)) {␊
␉␉␉if (!getMode(&mode))␊
␉␉␉{␊
␉␉␉␉verbose("\n Edid detailed timing descriptor found: %dx%d\n vbios mode 0 patched!\n", mode.h_active, mode.v_active);␊
␉␉␉␉mode_timing->usHBlanking_Time = mode.h_blanking;␊
␉␉␉␉mode_timing->usHActive = mode.h_active;␊
␉␉␉␉mode_timing->usVSyncWidth = mode.v_sync_width;␊
␉␉␉␉␉␉␉␉␉␉␊
␉␉␉␉mode_timing->usPixClk = mode.pixel_clock;␊
␉␉␉} else {␊
␉␉␉}␊
␉␉␉else␊
␉␉␉{␊
␉␉␉␉verbose(" Edid not found or invalid - vbios not patched!\n");␊
␉␉␉}␊
␉␉␉/*else␊
branches/ErmaC/Enoch/i386/modules/MakeInc.dir
1717
1818
1919
20
2021
2122
2223
......
2829
2930
3031
31
32
3233
3334
3435
␊
ifeq ($(BUILT_IN),yes)␊
␊
OPTIM := $(CONFIG_OPTIMIZATION_LEVEL)␊
CFLAGS␉:= $(RC_CFLAGS) $(OPTIM) $(MORECPP) -arch i386 -g -Wmost -Werror \␊
␉␉-fno-builtin -DSAIO_INTERNAL_USER -static $(OMIT_FRAME_POINTER_CFLAG) -fno-stack-protector \␊
␉␉-march=pentium4 -msse2 -msoft-float -nostdinc -include $(SRCROOT)/autoconf.h␊
␊
else␊
␊
CFLAGS := $(CLFAGS) -nostdinc -Wmost -Werror \␊
CFLAGS := $(CFLAGS) -nostdinc -Wmost -Werror \␊
␉-fno-builtin -fno-stack-protector \␊
␉-march=pentium4 -msse2 -msoft-float \␊
␉-arch i386 -include $(SRCROOT)/autoconf.h␊
branches/ErmaC/Enoch/package/OptionalSettings/KernelFlags.txt
3333
3434
3535
36
36
3737
List@WaitingRootDevice:Kernel Flags=ahcidisk=1 debug=8␊
List@Darkwake:Kernel Flags=darkwake=0␊
List@NvdaDrv1:Kernel Flags=nvda_drv=1␊
List@kext-dev-mode1:Kernel Flags=kext-dev-mode=1␊
#List@kext-dev-mode1:Kernel Flags=kext-dev-mode=1␊
List@Dart0:Kernel Flags=dart=0␊
branches/ErmaC/Enoch/package/po/it.po
77
88
99
10
11
10
11
1212
1313
1414
......
1616
1717
1818
19
19
2020
2121
2222
......
6868
6969
7070
71
71
7272
7373
7474
......
467467
468468
469469
470
470
471
471472
472473
473474
......
619620
620621
621622
622
623
624
625
626
627
623628
624629
625630
......
644649
645650
646651
652
647653
648654
649655
......
655661
656662
657663
658
664
659665
660666
661667
......
668674
669675
670676
677
671678
672679
673680
......
679686
680687
681688
682
689
683690
684691
685692
......
22692276
22702277
22712278
2272
2279
22732280
22742281
22752282
......
22812288
22822289
22832290
2284
2291
2292
2293
2294
22852295
22862296
22872297
......
22932303
22942304
22952305
2296
2306
2307
2308
2309
22972310
22982311
22992312
......
23652378
23662379
23672380
2368
2381
2382
23692383
23702384
23712385
......
24252439
24262440
24272441
2428
2442
2443
2444
2445
24292446
24302447
24312448
......
24612478
24622479
24632480
2464
2481
2482
2483
24652484
24662485
24672486
......
24732492
24742493
24752494
2476
2495
2496
2497
24772498
24782499
24792500
"Project-Id-Version: Chameleon 2.3\n"␊
"Report-Msgid-Bugs-To: \n"␊
"POT-Creation-Date: 2015-01-01 16:16+0000\n"␊
"PO-Revision-Date: 2015-01-01 16:46-0000\n"␊
"Last-Translator: Marchrius <max-92@hotmail.it>\n"␊
"PO-Revision-Date: 2015-02-12 21:46+0000\n"␊
"Last-Translator: Gianfranco <gianfrancominischetti@gmail.com>\n"␊
"Language-Team: it <it@li.org>\n"␊
"Language: it\n"␊
"MIME-Version: 1.0\n"␊
"Content-Transfer-Encoding: 8bit\n"␊
"Plural-Forms: nplurals=2; plural=(n != 1);\n"␊
"X-Generator: Pootle 2.5.0-rc1\n"␊
"X-POOTLE-MTIME: 1406285087.0\n"␊
"X-POOTLE-MTIME: 1423777595.0\n"␊
␊
#. type: Content of: <html><body><div><p>␊
#: Resources/templates/Welcome.html:22␊
msgid "Package built by: %WHOBUILD%, language translated by: blackosx"␊
msgstr ""␊
"Pacchetto compilato da: %WHOBUILD%, tradotto in Italiano da: ErmaC, scrax, "␊
"Micky1979 e Marchrius"␊
"Micky1979, Marchrius, Gianfranco Minischetti"␊
␊
#. type: Content of: <html><body><div><p>␊
#: Resources/templates/Welcome.html:37 Resources/templates/Conclusion.html:31␊
"Dependencies: none"␊
msgstr ""␊
"Il modulo KernelPatcher provvede a modificare:\n"␊
"*Abilita l'uso del kernelcache con /Extra/Extensions and /Extra/Extensions.mkext\n"␊
"*Abilita l'uso del kernelcache con /Extra/Extensions e "␊
"/Extra/Extensions.mkext\n"␊
"*Rimuove il controllo sulla ID della CPU\n"␊
"*Rimuove il LAPIC panic\n"␊
"*Rimuove il commpage_stuff_routine panic\n"␊
#: Resources/templates/Localizable.strings:121␊
#, no-wrap␊
msgid "Enables display of partition and resolution details shown on the left side of the GUI under the boot banner. This is useful information for troubleshooting, though can clash with certain themes."␊
msgstr "Abilita le informazioni all'avvio di partizioni e risoluzioni."␊
msgstr ""␊
"Mostra i dettagli delle partizioni e delle risoluzioni sul lato sinistro "␊
"della GUI, sotto il banner. Queste informazioni sono utili per la "␊
"risoluzione dei problemi, sebbene possano entrare in conflitto con alcuni "␊
"temi."␊
␊
#. type: "Wait_title"␊
#: Resources/templates/Localizable.strings:123␊
#, no-wrap␊
msgid "Show masked data (serial number) in bdmesg log (enbaled by default)."␊
msgstr ""␊
"Mostra dati nascosti (numero seriale) nel log bdmesg (attivato di default)."␊
␊
#. type: "USBBusFix_title"␊
#: Resources/templates/Localizable.strings:131␊
#: Resources/templates/Localizable.strings:132␊
#, no-wrap␊
msgid "Enable the XHCI, EHCI and UHCI fixes (disabled by default)."␊
msgstr ""␊
msgstr "Attiva i fix XHCI, EHCI e UHCI (disattivato di default)."␊
␊
#. type: "USBLegacyOff_title"␊
#: Resources/templates/Localizable.strings:134␊
#, no-wrap␊
msgid "Force USB Legacy off for XHCI and EHCI (disabled by default)."␊
msgstr ""␊
"Forza disattivazione USB Legacy per XHCI e EHCI (disattivato di default)."␊
␊
#. type: "XHCILegacyOff_title"␊
#: Resources/templates/Localizable.strings:137␊
#: Resources/templates/Localizable.strings:138␊
#, no-wrap␊
msgid "Force USB Legacy off for XHCI (disabled by default)."␊
msgstr ""␊
msgstr "Forza disattivazione USB Legacy per XHCI (disattivato di default)."␊
␊
#. type: "UHCIreset_title"␊
#: Resources/templates/Localizable.strings:140␊
#: Resources/templates/Localizable.strings:582␊
#, no-wrap␊
msgid "Set HDEF PinConfiguration for ???."␊
msgstr "Imposta il PinConfiguration per ???."␊
msgstr "Imposta il PinConfiguration HDEF per ???."␊
␊
#. type: "GraphicsEnabler_title"␊
#: Resources/templates/Localizable.strings:586␊
#: Resources/templates/Localizable.strings:587␊
#, no-wrap␊
msgid "Enables the option to autodetect NVIDIA, AMD/ATI or Intel based GPUs and inject the correct info."␊
msgstr "Aggiunge GraphicsEnabler=Yes al org.chameleon.Boot.plist, Questa opzione abilita il riconoscimento automatico delle schede grafiche iniettanto le informazioni corrette."␊
msgstr ""␊
"Aggiunge GraphicsEnabler=Yes al org.chameleon.Boot.plist, Questa opzione "␊
"abilita il riconoscimento automatico delle schede grafiche Nvidia, AMD/ATI o "␊
"Intel, iniettando le informazioni corrette."␊
␊
#. type: "EnableHDMIAudio_title"␊
#: Resources/templates/Localizable.strings:589␊
#: Resources/templates/Localizable.strings:590␊
#, no-wrap␊
msgid "Inject HDMi audio for NVIDIA or AMD/ATI."␊
msgstr "Aggiunge EnableHDMIAudio=Yes al org.chameleon.Boot.plist, Questa opzione abilita l'audio HDMi delle schede grafiche iniettanto le informazioni corrette."␊
msgstr ""␊
"Aggiunge EnableHDMIAudio=Yes al org.chameleon.Boot.plist, Questa opzione "␊
"abilita l'audio HDMi delle schede grafiche iniettando le informazioni "␊
"corrette."␊
␊
#. type: "UseIntelHDMI_title"␊
#: Resources/templates/Localizable.strings:592␊
#: Resources/templates/Localizable.strings:608␊
#, no-wrap␊
msgid "Skip the GraphicsEnbaler autodetect for NVIDIA based GPUs."␊
msgstr "Salta il riconoscimento da perte del GraphicsEnabler per le schede nVidia."␊
msgstr ""␊
"Salta il riconoscimento da parte del GraphicsEnabler per le schede nVidia."␊
␊
#. type: "SkipAtiGfx_title"␊
#: Resources/templates/Localizable.strings:610␊
#: Resources/templates/Localizable.strings:627␊
#, no-wrap␊
msgid "Turns on verbose logging and allows you to see messages from both Chameleon and the OS X kernel at boot time. Essential for troubleshooting."␊
msgstr "Attiva il registro dettagliato e permette di vedere i menssaggi sia di Chameleon che del Kernel, durante l'avvio. Essenziale per la soluzione di problemi."␊
msgstr ""␊
"Attiva il registro dettagliato e permette di vedere i messaggi sia di "␊
"Chameleon che del Kernel, durante l'avvio. Essenziale per la soluzione di "␊
"problemi."␊
␊
#. type: "Singleusermode_title"␊
#: Resources/templates/Localizable.strings:629␊
#: Resources/templates/Localizable.strings:636␊
#, no-wrap␊
msgid "For overcoming a hang at 'PCI configuration begin' on some systems. 0x2000 is the kIOPCIConfiguratorPFM64 flag, as seen in the IOPCIFamily source code."␊
msgstr "Imposta la flag npci=0x2000 per la key Kernel Flags."␊
msgstr ""␊
"Imposta la flag npci=0x2000 per la key Kernel Flags. Risolve il blocco su "␊
"'PCI configuration begin' su alcuni sistemi."␊
␊
#. type: "Npci3_title"␊
#: Resources/templates/Localizable.strings:638␊
#: Resources/templates/Localizable.strings:639␊
#, no-wrap␊
msgid "For overcoming a hang at 'PCI configuration begin' on some systems. 0x3000 is the kIOPCIConfiguratorPFM64 flag, as seen in the IOPCIFamily source code."␊
msgstr "Imposta la flag npci=0x3000 per la key Kernel Flags."␊
msgstr ""␊
"Imposta la flag npci=0x3000 per la key Kernel Flags. Risolve il blocco su "␊
"'PCI configuration begin' su alcuni sistemi."␊
␊
#. type: "WaitingRootDevice_title"␊
#: Resources/templates/Localizable.strings:641␊

Archive Download the corresponding diff file

Revision: 2577