Chameleon

Chameleon Commit Details

Date:2015-05-09 17:14:57 (8 years 11 months ago)
Author:ErmaC
Commit:2669
Parents: 2668
Message:Fix detection output for memory type.
Changes:
M/trunk/i386/libsaio/spd.c
M/trunk/i386/libsaio/spd.h

File differences

trunk/i386/libsaio/spd.c
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␉"PIPE NIBBLE",␉␉␉/* 03h PIPELINE NIBBLE */␊
␉"SDRAM",␉␉␉/* 04h SDRAM */␊
␉"ROM",␉␉␉␉/* 05h MULTIPLEXED ROM */␊
␉"DDR SGRAM"␉␉␉/* 06h SGRAM DDR */␊
␉"DDR SGRAM",␉␉␉/* 06h SGRAM DDR */␊
␉"DDR SDRAM",␉␉␉/* 07h SDRAM DDR */␊
␉"DDR2 SDRAM",␉␉␉/* 08h SDRAM DDR 2 */␊
␉"DDR2 SDRAM FB-DIMM",␉␉/* 09h Undefined */␊
␉SMB_MEM_TYPE_DDR2,␉␉/* 08h SDRAM DDR 2 */␊
␉UNKNOWN_MEM_TYPE,␉␉/* 09h Undefined */␊
␉UNKNOWN_MEM_TYPE,␉␉/* 0Ah Undefined */␊
␉SMB_MEM_TYPE_DDR3␉␉/* 0Bh SDRAM DDR 3 */␊
␉SMB_MEM_TYPE_DDR3,␉␉/* 0Bh SDRAM DDR 3 */␊
␉SMB_MEM_TYPE_DDR4␉␉/* 0Ch SDRAM DDR 4 */␊
};␊
#define SPD_TO_SMBIOS_SIZE (sizeof(spd_mem_to_smbios)/sizeof(uint8_t))␊
␊
static struct smbus_controllers_t smbus_controllers[] = {␊
␊
␉// Intel␊
␉{0x8086, 0x1C22, "P67",␉␉␉␉␉␉read_smb_intel },␊
␉{0x8086, 0x1D22, "X79",␉␉␉␉␉␉read_smb_intel },␊
␉{0x8086, 0x1D70, "X79",␉␉␉␉␉␉read_smb_intel },␊
␉{0x8086, 0x1D71, "X79",␉␉␉␉␉␉read_smb_intel },␊
␉{0x8086, 0x1D72, "C608",␉␉␉␉␉read_smb_intel },␊
␉{0x8086, 0x1E22, "Z77",␉␉␉␉␉␉read_smb_intel },␊
␉{0x8086, 0x2330, "DH89xxCC",␉␉␉␉␉read_smb_intel },␊
␉{0x8086, 0x2413, "82801AA",␉␉␉␉␉read_smb_intel },␊
␉{0x8086, 0x2423, "BAM",␉␉␉␉␉␉read_smb_intel },␊
␉{0x8086, 0x2443, "BAM",␉␉␉␉␉␉read_smb_intel },␊
␉{0x8086, 0x2483, "CAM",␉␉␉␉␉␉read_smb_intel },␊
␉{0x8086, 0x24C3, "ICH4",␉␉␉␉␉read_smb_intel },␊
␉{0x8086, 0x24D3, "ICH5",␉␉␉␉␉read_smb_intel },␊
␉{0x8086, 0x25A4, "6300ESB",␉␉␉␉␉read_smb_intel },␊
␉{0x8086, 0x266A, "ICH6",␉␉␉␉␉read_smb_intel },␊
␉{0x8086, 0x269B, "ESB",␉␉␉␉␉␉read_smb_intel },␊
␉{0x8086, 0x27DA, "ICH7",␉␉␉␉␉read_smb_intel },␊
␉{0x8086, 0x283E, "ICH8",␉␉␉␉␉read_smb_intel },␊
␉{0x8086, 0x2930, "ICH9",␉␉␉␉␉read_smb_intel },␊
␉{0x8086, 0x3A30, "ICH10",␉␉␉␉␉read_smb_intel },␊
␉{0x8086, 0x3A60, "ICH10",␉␉␉␉␉read_smb_intel },␊
␉{0x8086, 0x3B30, "P55",␉␉␉␉␉␉read_smb_intel },␊
␉{0x8086, 0x5032, "EP80579",␉␉␉␉␉read_smb_intel },␊
␉{0x8086, 0x8119, "US15W",␉␉␉␉␉read_smb_intel },␊
␉{0x8086, 0x8C22, "HSW",␉␉␉␉␉␉read_smb_intel },␊
␉{0x8086, 0x8CA2, "Z97/H97",␉␉␉␉␉read_smb_intel },␊
␉{0x8086, 0x8D22, "X99",␉␉␉␉␉␉read_smb_intel },␊
␉{0x8086, 0x9C22, "HSW-ULT",␉␉␉␉␉read_smb_intel }␊
␉{0x8086, 0x1C22, "P67",␉␉␉read_smb_intel },␊
␉{0x8086, 0x1D22, "X79",␉␉␉read_smb_intel },␊
␉{0x8086, 0x1D70, "X79",␉␉␉read_smb_intel },␊
␉{0x8086, 0x1D71, "X79",␉␉␉read_smb_intel },␊
␉{0x8086, 0x1D72, "C608",␉␉read_smb_intel },␊
␉{0x8086, 0x1E22, "Z77",␉␉␉read_smb_intel },␊
␉{0x8086, 0x2330, "DH89xxCC",␉␉read_smb_intel },␊
␉{0x8086, 0x2413, "82801AA",␉␉read_smb_intel },␊
␉{0x8086, 0x2423, "BAM",␉␉␉read_smb_intel },␊
␉{0x8086, 0x2443, "BAM",␉␉␉read_smb_intel },␊
␉{0x8086, 0x2483, "CAM",␉␉␉read_smb_intel },␊
␉{0x8086, 0x24C3, "ICH4",␉␉read_smb_intel },␊
␉{0x8086, 0x24D3, "ICH5",␉␉read_smb_intel },␊
␉{0x8086, 0x25A4, "6300ESB",␉␉read_smb_intel },␊
␉{0x8086, 0x266A, "ICH6",␉␉read_smb_intel },␊
␉{0x8086, 0x269B, "ESB",␉␉␉read_smb_intel },␊
␉{0x8086, 0x27DA, "ICH7",␉␉read_smb_intel },␊
␉{0x8086, 0x283E, "ICH8",␉␉read_smb_intel },␊
␉{0x8086, 0x2930, "ICH9",␉␉read_smb_intel },␊
␉{0x8086, 0x3A30, "ICH10",␉␉read_smb_intel },␊
␉{0x8086, 0x3A60, "ICH10",␉␉read_smb_intel },␊
␉{0x8086, 0x3B30, "P55",␉␉␉read_smb_intel },␊
␉{0x8086, 0x5032, "EP80579",␉␉read_smb_intel },␊
␉{0x8086, 0x8119, "US15W",␉␉read_smb_intel },␊
␉{0x8086, 0x8C22, "HSW",␉␉␉read_smb_intel },␊
␉{0x8086, 0x8CA2, "Z97/H97",␉␉read_smb_intel },␊
␉{0x8086, 0x8D22, "X99",␉␉␉read_smb_intel },␊
␉{0x8086, 0x9C22, "HSW-ULT",␉␉read_smb_intel }␊
␊
␉// AMD␊
//␉0x1002 0x4385 "AMD SB600/700"␊
trunk/i386/libsaio/spd.h
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#define SPD_MEMORY_TYPE_SDRAM_FB_DDR2␉␉␉9␊
#define SPD_MEMORY_TYPE_SDRAM_FBP_DDR2␉␉␉0xa␊
#define SPD_MEMORY_TYPE_SDRAM_DDR3␉␉␉0xb␊
#define SPD_MEMORY_TYPE_SDRAM_DDR4␉␉␉0xc␊
␊
␊
/* SPD_MODULE_VOLTAGE values. */␊
#define SPD_VOLTAGE_TTL␉␉␉␉␉␉0 /* 5.0 Volt/TTL */␊
#define SPD_VOLTAGE_LVTTL␉␉␉␉␉1 /* LVTTL */␊

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Revision: 2669