Chameleon Commit Details - 2686 - Chameleon open source boot loader project.

Date:

2015-05-19 20:54:59 (8 years 10 months ago)

Author:

ErmaC

Commit:

2686

Parents:

2685

Message:

Cleanup text info for bdmesg output.

Changes:

M	/branches/ErmaC/Enoch/i386/libsaio/cpu.h
M	/branches/ErmaC/Enoch/i386/libsaio/hda.c
M	/branches/ErmaC/Enoch/i386/libsaio/networking.h
M	/branches/ErmaC/Enoch/i386/libsaio/hpet.c
M	/branches/ErmaC/Enoch/i386/libsaio/gma.c
M	/branches/ErmaC/Enoch/i386/libsaio/dram_controllers.c
M	/branches/ErmaC/Enoch/i386/libsaio/nvidia.c
M	/branches/ErmaC/Enoch/i386/boot2/boot.h
M	/branches/ErmaC/Enoch/i386/libsaio/ati.c
M	/branches/ErmaC/Enoch/i386/libsaio/convert.c
M	/branches/ErmaC/Enoch/i386/libsaio/acpi_patcher.c
M	/branches/ErmaC/Enoch/i386/libsaio/state_generator.c
M	/branches/ErmaC/Enoch/i386/libsaio/spd.c
M	/branches/ErmaC/Enoch/i386/libsaio/cpu.c
M	/branches/ErmaC/Enoch/i386/libsaio/networking.c
M	/branches/ErmaC/Enoch/i386/libsaio/usb.c
M	/branches/ErmaC/Enoch/i386/libsaio/device_inject.c
M	/branches/ErmaC/Enoch/i386/libsaio/pci_setup.c

File differences

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+#include "memvendors.h"␊
␊
#ifndef DEBUG_SPD␊
#define DEBUG_SPD 0␊
␉#define DEBUG_SPD 0␊
#endif␊
␊
#if DEBUG_SPD␊
#define DBG(x...)␉printf(x)␊
␉#define DBG(x...)␉printf(x)␊
#else␊
#define DBG(x...)␊
␉#define DBG(x...)␉msglog(x)␊
#endif␊
␊
static const char *spd_memory_types[] =␊

␉␉␉␉DBG("RAM speed %dMHz \n", freq);␊
␉␉␉}␊
␊
␉␉␉verbose("Slot: %d Type %d %dMB (%s) %dMHz Vendor=%s PartNo=%s SerialNo=%s\n",␊
␉␉␉verbose("\tSlot: %d Type %d %dMB (%s) %dMHz Vendor=%s\n\t\tPartNo=%s SerialNo=%s\n",␊
␉␉␉␉i,␊
␉␉␉␉(int)slot->Type,␊
␉␉␉␉slot->ModuleSize, ␊
 ...
 #include "memvendors.h"␊
 ␊
 #ifndef DEBUG_SPD␊
-#define DEBUG_SPD 0␊
+␉#define DEBUG_SPD 0␊
 #endif␊
 ␊
 #if DEBUG_SPD␊
-#define DBG(x...)␉printf(x)␊
+␉#define DBG(x...)␉printf(x)␊
 #else␊
-#define DBG(x...)␊
+␉#define DBG(x...)␉msglog(x)␊
 #endif␊
 ␊
 static const char *spd_memory_types[] =␊
 ␉␉␉␉DBG("RAM speed %dMHz \n", freq);␊
 ␉␉␉}␊
 ␊
-␉␉␉verbose("Slot: %d Type %d %dMB (%s) %dMHz Vendor=%s PartNo=%s SerialNo=%s\n",␊
+␉␉␉verbose("\tSlot: %d Type %d %dMB (%s) %dMHz Vendor=%s\n\t\tPartNo=%s SerialNo=%s\n",␊
 ␉␉␉␉i,␊
 ␉␉␉␉(int)slot->Type,␊
 ␉␉␉␉slot->ModuleSize, ␊

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+#ifndef __LIBSAIO_NETWORKING_H␊
#define __LIBSAIO_NETWORKING_H␊
␊
void setup_eth_builtin(pci_dt_t *eth_dev);␊
void setup_wifi_airport(pci_dt_t *wlan_dev);␊
void setup_eth_devdrop(pci_dt_t *eth_dev);␊
void setup_wifi_devdrop(pci_dt_t *wlan_dev);␊
␊
char *get_ethernet_model(uint32_t vendor_id, uint32_t device_id);␊
char *get_wlan_model(uint32_t vendor_id, uint32_t device_id);␊
␊
struct network_device;␊
typedef struct {␊
 #ifndef __LIBSAIO_NETWORKING_H␊
 #define __LIBSAIO_NETWORKING_H␊
 ␊
-void setup_eth_builtin(pci_dt_t *eth_dev);␊
-void setup_wifi_airport(pci_dt_t *wlan_dev);␊
+void setup_eth_devdrop(pci_dt_t *eth_dev);␊
+void setup_wifi_devdrop(pci_dt_t *wlan_dev);␊
+␊
 char *get_ethernet_model(uint32_t vendor_id, uint32_t device_id);␊
+char *get_wlan_model(uint32_t vendor_id, uint32_t device_id);␊
 ␊
 struct network_device;␊
 typedef struct {␊

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+␊
␉model = get_gma_controller_name(device_id, vendor_id);␊
␊
␉verbose("---------------------------------------------\n");␊
   ␉verbose("------------ INTEL DEVICE INFO --------------\n");␊
␉verbose("---------------------------------------------\n");␊
␉verbose("Class code: [%04x]\n%s [%04x:%04x] (rev %02x)\nSubsystem: [%04x:%04x] :: %s\n",␊
␉␉␉gma_dev->class_id, model, gma_dev->vendor_id, gma_dev->device_id, gma_dev->revision_id, gma_dev->subsys_id.subsys.vendor_id, gma_dev->subsys_id.subsys.device_id, devicepath);␊
␉verbose("\tClass code: [%04x]\n", gma_dev->class_id);␊
␊
␉verbose("\t%s [%04x:%04x] (rev %02x)\nSubsystem: [%04x:%04x] :: %s\n",␊
␉␉␉model, gma_dev->vendor_id, gma_dev->device_id, gma_dev->revision_id, gma_dev->subsys_id.subsys.vendor_id, gma_dev->subsys_id.subsys.device_id, devicepath);␊
␊
␉if (!string)␊
␉{␊
␉␉string = devprop_create_string();␊

␉struct DevPropDevice *device = devprop_add_device(string, devicepath);␊
␉if (!device)␊
␉{␊
␉␉printf("[setup_gma_devprop] Failed initializing dev-prop string dev-entry!\n");␊
␉␉printf("\t[setup_gma_devprop] Failed initializing dev-prop string dev-entry!\n");␊
␉␉pause();␊
␉␉return false;␊
␉}␊

␉␉␉␉{␊
␉␉␉␉␉memcpy(default_aapl_snb, new_aapl0, AAPL_LEN_SNB);␊
␊
␉␉␉␉␉verbose("Using user supplied AAPL,snb-platform-id\n");␊
␉␉␉␉␉verbose("AAPL,snb-platform-id: %02x%02x%02x%02x\n",␊
␉␉␉␉␉verbose("\tUsing user supplied AAPL,snb-platform-id\n");␊
␉␉␉␉␉verbose("\tAAPL,snb-platform-id: %02x%02x%02x%02x\n",␊
␉␉␉␉␉default_aapl_snb[0], default_aapl_snb[1], default_aapl_snb[2], default_aapl_snb[3]);␊
␉␉␉␉}␊
␉␉␉␉devprop_add_value(device, "AAPL,snb-platform-id", default_aapl_snb, AAPL_LEN_SNB);␊

␉␉␉␉{␊
␉␉␉␉␉memcpy(default_aapl_snb, new_aapl0, AAPL_LEN_SNB);␊
␊
␉␉␉␉␉verbose("Using user supplied AAPL,snb-platform-id\n");␊
␉␉␉␉␉verbose("AAPL,snb-platform-id: %02x%02x%02x%02x\n",␊
␉␉␉␉␉verbose("\tUsing user supplied AAPL,snb-platform-id\n");␊
␉␉␉␉␉verbose("\tAAPL,snb-platform-id: %02x%02x%02x%02x\n",␊
␉␉␉␉␉default_aapl_snb[0], default_aapl_snb[1], default_aapl_snb[2], default_aapl_snb[3]);␊
␉␉␉␉}␊
␉␉␉␉devprop_add_value(device, "AAPL,snb-platform-id", default_aapl_snb, AAPL_LEN_SNB);␊

␉␉␉␉{␊
␉␉␉␉␉memcpy(default_aapl_snb, new_aapl0, AAPL_LEN_SNB);␊
␊
␉␉␉␉␉verbose("Using user supplied AAPL,snb-platform-id\n");␊
␉␉␉␉␉verbose("AAPL,snb-platform-id: %02x%02x%02x%02x\n",␊
␉␉␉␉␉verbose("\tUsing user supplied AAPL,snb-platform-id\n");␊
␉␉␉␉␉verbose("\tAAPL,snb-platform-id: %02x%02x%02x%02x\n",␊
␉␉␉␉␉default_aapl_snb[0], default_aapl_snb[1], default_aapl_snb[2], default_aapl_snb[3]);␊
␉␉␉␉}␊
␉␉␉␉devprop_add_value(device, "AAPL,snb-platform-id", default_aapl_snb, AAPL_LEN_SNB);␊

␉␉␉␉{␊
␉␉␉␉␉memcpy(default_aapl_snb, new_aapl0, AAPL_LEN_SNB);␊
␊
␉␉␉␉␉verbose("Using user supplied AAPL,snb-platform-id\n");␊
␉␉␉␉␉verbose("AAPL,snb-platform-id: %02x%02x%02x%02x\n",␊
␉␉␉␉␉verbose("\tUsing user supplied AAPL,snb-platform-id\n");␊
␉␉␉␉␉verbose("\tAAPL,snb-platform-id: %02x%02x%02x%02x\n",␊
␉␉␉␉␉default_aapl_snb[0], default_aapl_snb[1], default_aapl_snb[2], default_aapl_snb[3]);␊
␉␉␉␉}␊
␉␉␉␉devprop_add_value(device, "AAPL,snb-platform-id", default_aapl_snb, AAPL_LEN_SNB);␊

␉␉␉␉{␊
␉␉␉␉␉memcpy(default_aapl_ivy, new_aapl0, AAPL_LEN_IVY);␊
␊
␉␉␉␉␉verbose("Using user supplied AAPL,ig-platform-id\n");␊
␉␉␉␉␉verbose("AAPL,ig-platform-id: %02x%02x%02x%02x\n",␊
␉␉␉␉␉verbose("\tUsing user supplied AAPL,ig-platform-id\n");␊
␉␉␉␉␉verbose("\tAAPL,ig-platform-id: %02x%02x%02x%02x\n",␊
␉␉␉␉␉default_aapl_ivy[0], default_aapl_ivy[1], default_aapl_ivy[2], default_aapl_ivy[3]);␊
␉␉␉␉}␊
␉␉␉␉devprop_add_value(device, "AAPL,ig-platform-id", default_aapl_ivy, AAPL_LEN_IVY);␊

␉␉␉{␊
␉␉␉␉if ((n_igs >= 0) || (n_igs <= 11))␊
␉␉␉␉{␊
␉␉␉␉␉verbose("AAPL,ig-platform-id was set in org.chameleon.Boot.plist with value %d\n", n_igs);␊
␉␉␉␉␉verbose("\tAAPL,ig-platform-id was set in org.chameleon.Boot.plist with value %d\n", n_igs);␊
␉␉␉␉␉devprop_add_value(device, "AAPL,ig-platform-id", ivy_bridge_ig_vals[n_igs], 4);␊
␉␉␉␉}␊
␉␉␉␉else␊
␉␉␉␉{␊
␉␉␉␉␉verbose("AAPL,ig-platform-id was set in org.chameleon.Boot.plist with bad value please choose a number between 0 and 11.\n");␊
␉␉␉␉␉verbose("\tAAPL,ig-platform-id was set in org.chameleon.Boot.plist with bad value please choose a number between 0 and 11.\n");␊
␉␉␉␉}␊
␉␉␉}␊
␉␉␉else␊

␉␉␉␉␉␉break;␊
␊
␉␉␉␉␉default:␊
␉␉␉␉␉␉printf("Please specify 96, 64, or 32MB RAM for the HD4000 in the bios.\n"␊
␉␉␉␉␉␉␉"The selected %dMB RAM configuration is not supported for the  HD4000.\n", ram);␊
␉␉␉␉␉␉printf("\tPlease specify 96, 64, or 32MB RAM for the HD4000 in the bios.\n"␊
␉␉␉␉␉␉␉"\tThe selected %dMB RAM configuration is not supported for the  HD4000.\n", ram);␊
␉␉␉␉␉␉pause();␊
␉␉␉␉␉␉return false;␉// Exit early before the AAPL,ig-platform-id property is set.␊
␉␉␉␉␉␉break;␊

␉␉case GMA_HASWELL_ULT_M_GT2: // 0a16␊
␉␉case GMA_HASWELL_ULT_E_GT2: // 0a1e␊
␊
␉␉␉verbose("Injecting a valid desktop GPU device id (0x0412) instead of patching kexts.\n");␊
␉␉␉verbose("\tInjecting a valid desktop GPU device id (0x0412) instead of patching kexts.\n");␊
␉␉␉device_id = 0x00000412;␉␉// Inject a valid desktop GPU device id (0x0412) instead of patching kexts␊
␉␉␉devprop_add_value(device, "vendor-id",␉(uint8_t *)INTEL_VENDORID, 4);␊
␉␉␉devprop_add_value(device, "device-id",␉(uint8_t *)&device_id, sizeof(device_id));␊
␉␉␉verbose("Injeting done: was [%04x:%04x] now is [%04x:%04x]\n", gma_dev->vendor_id, gma_dev->device_id, gma_dev->vendor_id, device_id);␊
␉␉␉verbose("\tInjeting done: was [%04x:%04x] now is [%04x:%04x]\n", gma_dev->vendor_id, gma_dev->device_id, gma_dev->vendor_id, device_id);␊
␊
␉␉case GMA_HASWELL_D_GT1: // 0402␊
␉␉case GMA_HASWELL_M_GT1: // 0406␊

␉␉␉␉{␊
␉␉␉␉␉memcpy(default_aapl_haswell, new_aapl0, AAPL_LEN_HSW);␊
␊
␉␉␉␉␉verbose("Using user supplied AAPL,ig-platform-id\n");␊
␉␉␉␉␉verbose("AAPL,ig-platform-id: %02x%02x%02x%02x\n",␊
␉␉␉␉␉verbose("\tUsing user supplied AAPL,ig-platform-id\n");␊
␉␉␉␉␉verbose("\tAAPL,ig-platform-id: %02x%02x%02x%02x\n",␊
␉␉␉␉␉␉default_aapl_haswell[0], default_aapl_haswell[1], default_aapl_haswell[2], default_aapl_haswell[3]);␊
␉␉␉␉}␊
␉␉␉␉devprop_add_value(device, "AAPL,ig-platform-id", default_aapl_haswell, AAPL_LEN_HSW);␊

␉␉␉{␊
␉␉␉␉if ((n_igs >= 0) || (n_igs <= 16))␊
␉␉␉␉{␊
␉␉␉␉␉verbose("AAPL,ig-platform-id was set in org.chameleon.Boot.plist with value %d\n", n_igs);␊
␉␉␉␉␉verbose("\tAAPL,ig-platform-id was set in org.chameleon.Boot.plist with value %d\n", n_igs);␊
␉␉␉␉␉devprop_add_value(device, "AAPL,ig-platform-id", haswell_ig_vals[n_igs], 4);␊
␉␉␉␉}␊
␉␉␉␉else␊
␉␉␉␉{␊
␉␉␉␉␉verbose("AAPL,ig-platform-id was set in org.chameleon.Boot.plist with bad value please choose a number between 0 and 16.\n");␊
␉␉␉␉␉verbose("\tAAPL,ig-platform-id was set in org.chameleon.Boot.plist with bad value please choose a number between 0 and 16.\n");␊
␉␉␉␉}␊
␉␉␉}␊
␉␉␉else␊

␉␉␉␉{␊
␉␉␉␉␉memcpy(default_aapl_broadwell, new_aapl0, AAPL_LEN_BDW);␊
␊
␉␉␉␉␉verbose("Using user supplied AAPL,ig-platform-id\n");␊
␉␉␉␉␉verbose("AAPL,ig-platform-id: %02x%02x%02x%02x\n",␊
␉␉␉␉␉verbose("\tUsing user supplied AAPL,ig-platform-id\n");␊
␉␉␉␉␉verbose("\tAAPL,ig-platform-id: %02x%02x%02x%02x\n",␊
␉␉␉␉␉␉default_aapl_broadwell[0], default_aapl_broadwell[1], default_aapl_broadwell[2], default_aapl_broadwell[3]);␊
␉␉␉␉}␊
␉␉␉␉devprop_add_value(device, "AAPL,ig-platform-id", default_aapl_broadwell, AAPL_LEN_BDW);␊

␉␉␉{␊
␉␉␉␉if ((n_igs >= 0) || (n_igs <= 19))␊
␉␉␉␉{␊
␉␉␉␉␉verbose("AAPL,ig-platform-id was set in org.chameleon.Boot.plist with value %d\n", n_igs);␊
␉␉␉␉␉verbose("\tAAPL,ig-platform-id was set in org.chameleon.Boot.plist with value %d\n", n_igs);␊
␉␉␉␉␉devprop_add_value(device, "AAPL,ig-platform-id", broadwell_ig_vals[n_igs], 4);␊
␉␉␉␉}␊
␉␉␉␉else␊
␉␉␉␉{␊
␉␉␉␉␉verbose("AAPL,ig-platform-id was set in org.chameleon.Boot.plist with bad value please choose a number between 0 and 18.\n");␊
␉␉␉␉␉verbose("\tAAPL,ig-platform-id was set in org.chameleon.Boot.plist with bad value please choose a number between 0 and 18.\n");␊
␉␉␉␉}␊
␉␉␉}␊
␉␉␉else␊

␉stringdata = malloc(sizeof(uint8_t) * string->length);␊
␉if (!stringdata)␊
␉{␊
␉␉printf("[setup_gma_devprop] No stringdata!\n");␊
␉␉printf("\t[setup_gma_devprop] No stringdata!\n");␊
␉␉pause();␊
␉␉return false;␊
␉}␊
␊
␉verbose("---------------------------------------------\n");␊
␉memcpy(stringdata, (uint8_t *)devprop_generate_string(string), string->length);␊
␉stringlength = string->length;␊
␊
 ...
 ...
 ...
 ...
 ...
 ...
 ...
 ...
 ...
 ...
 ...
 ...
 ...
 ...
 ␊
 ␉model = get_gma_controller_name(device_id, vendor_id);␊
 ␊
-␉verbose("---------------------------------------------\n");␊
-   ␉verbose("------------ INTEL DEVICE INFO --------------\n");␊
-␉verbose("---------------------------------------------\n");␊
-␉verbose("Class code: [%04x]\n%s [%04x:%04x] (rev %02x)\nSubsystem: [%04x:%04x] :: %s\n",␊
-␉␉␉gma_dev->class_id, model, gma_dev->vendor_id, gma_dev->device_id, gma_dev->revision_id, gma_dev->subsys_id.subsys.vendor_id, gma_dev->subsys_id.subsys.device_id, devicepath);␊
+␉verbose("\tClass code: [%04x]\n", gma_dev->class_id);␊
 ␊
+␉verbose("\t%s [%04x:%04x] (rev %02x)\nSubsystem: [%04x:%04x] :: %s\n",␊
+␉␉␉model, gma_dev->vendor_id, gma_dev->device_id, gma_dev->revision_id, gma_dev->subsys_id.subsys.vendor_id, gma_dev->subsys_id.subsys.device_id, devicepath);␊
+␊
 ␉if (!string)␊
 ␉{␊
 ␉␉string = devprop_create_string();␊
 ␉struct DevPropDevice *device = devprop_add_device(string, devicepath);␊
 ␉if (!device)␊
 ␉{␊
-␉␉printf("[setup_gma_devprop] Failed initializing dev-prop string dev-entry!\n");␊
+␉␉printf("\t[setup_gma_devprop] Failed initializing dev-prop string dev-entry!\n");␊
 ␉␉pause();␊
 ␉␉return false;␊
 ␉}␊
 ␉␉␉␉{␊
 ␉␉␉␉␉memcpy(default_aapl_snb, new_aapl0, AAPL_LEN_SNB);␊
 ␊
-␉␉␉␉␉verbose("Using user supplied AAPL,snb-platform-id\n");␊
-␉␉␉␉␉verbose("AAPL,snb-platform-id: %02x%02x%02x%02x\n",␊
+␉␉␉␉␉verbose("\tUsing user supplied AAPL,snb-platform-id\n");␊
+␉␉␉␉␉verbose("\tAAPL,snb-platform-id: %02x%02x%02x%02x\n",␊
 ␉␉␉␉␉default_aapl_snb[0], default_aapl_snb[1], default_aapl_snb[2], default_aapl_snb[3]);␊
 ␉␉␉␉}␊
 ␉␉␉␉devprop_add_value(device, "AAPL,snb-platform-id", default_aapl_snb, AAPL_LEN_SNB);␊
 ␉␉␉␉{␊
 ␉␉␉␉␉memcpy(default_aapl_snb, new_aapl0, AAPL_LEN_SNB);␊
 ␊
-␉␉␉␉␉verbose("Using user supplied AAPL,snb-platform-id\n");␊
-␉␉␉␉␉verbose("AAPL,snb-platform-id: %02x%02x%02x%02x\n",␊
+␉␉␉␉␉verbose("\tUsing user supplied AAPL,snb-platform-id\n");␊
+␉␉␉␉␉verbose("\tAAPL,snb-platform-id: %02x%02x%02x%02x\n",␊
 ␉␉␉␉␉default_aapl_snb[0], default_aapl_snb[1], default_aapl_snb[2], default_aapl_snb[3]);␊
 ␉␉␉␉}␊
 ␉␉␉␉devprop_add_value(device, "AAPL,snb-platform-id", default_aapl_snb, AAPL_LEN_SNB);␊
 ␉␉␉␉{␊
 ␉␉␉␉␉memcpy(default_aapl_snb, new_aapl0, AAPL_LEN_SNB);␊
 ␊
-␉␉␉␉␉verbose("Using user supplied AAPL,snb-platform-id\n");␊
-␉␉␉␉␉verbose("AAPL,snb-platform-id: %02x%02x%02x%02x\n",␊
+␉␉␉␉␉verbose("\tUsing user supplied AAPL,snb-platform-id\n");␊
+␉␉␉␉␉verbose("\tAAPL,snb-platform-id: %02x%02x%02x%02x\n",␊
 ␉␉␉␉␉default_aapl_snb[0], default_aapl_snb[1], default_aapl_snb[2], default_aapl_snb[3]);␊
 ␉␉␉␉}␊
 ␉␉␉␉devprop_add_value(device, "AAPL,snb-platform-id", default_aapl_snb, AAPL_LEN_SNB);␊
 ␉␉␉␉{␊
 ␉␉␉␉␉memcpy(default_aapl_snb, new_aapl0, AAPL_LEN_SNB);␊
 ␊
-␉␉␉␉␉verbose("Using user supplied AAPL,snb-platform-id\n");␊
-␉␉␉␉␉verbose("AAPL,snb-platform-id: %02x%02x%02x%02x\n",␊
+␉␉␉␉␉verbose("\tUsing user supplied AAPL,snb-platform-id\n");␊
+␉␉␉␉␉verbose("\tAAPL,snb-platform-id: %02x%02x%02x%02x\n",␊
 ␉␉␉␉␉default_aapl_snb[0], default_aapl_snb[1], default_aapl_snb[2], default_aapl_snb[3]);␊
 ␉␉␉␉}␊
 ␉␉␉␉devprop_add_value(device, "AAPL,snb-platform-id", default_aapl_snb, AAPL_LEN_SNB);␊
 ␉␉␉␉{␊
 ␉␉␉␉␉memcpy(default_aapl_ivy, new_aapl0, AAPL_LEN_IVY);␊
 ␊
-␉␉␉␉␉verbose("Using user supplied AAPL,ig-platform-id\n");␊
-␉␉␉␉␉verbose("AAPL,ig-platform-id: %02x%02x%02x%02x\n",␊
+␉␉␉␉␉verbose("\tUsing user supplied AAPL,ig-platform-id\n");␊
+␉␉␉␉␉verbose("\tAAPL,ig-platform-id: %02x%02x%02x%02x\n",␊
 ␉␉␉␉␉default_aapl_ivy[0], default_aapl_ivy[1], default_aapl_ivy[2], default_aapl_ivy[3]);␊
 ␉␉␉␉}␊
 ␉␉␉␉devprop_add_value(device, "AAPL,ig-platform-id", default_aapl_ivy, AAPL_LEN_IVY);␊
 ␉␉␉{␊
 ␉␉␉␉if ((n_igs >= 0) || (n_igs <= 11))␊
 ␉␉␉␉{␊
-␉␉␉␉␉verbose("AAPL,ig-platform-id was set in org.chameleon.Boot.plist with value %d\n", n_igs);␊
+␉␉␉␉␉verbose("\tAAPL,ig-platform-id was set in org.chameleon.Boot.plist with value %d\n", n_igs);␊
 ␉␉␉␉␉devprop_add_value(device, "AAPL,ig-platform-id", ivy_bridge_ig_vals[n_igs], 4);␊
 ␉␉␉␉}␊
 ␉␉␉␉else␊
 ␉␉␉␉{␊
-␉␉␉␉␉verbose("AAPL,ig-platform-id was set in org.chameleon.Boot.plist with bad value please choose a number between 0 and 11.\n");␊
+␉␉␉␉␉verbose("\tAAPL,ig-platform-id was set in org.chameleon.Boot.plist with bad value please choose a number between 0 and 11.\n");␊
 ␉␉␉␉}␊
 ␉␉␉}␊
 ␉␉␉else␊
 ␉␉␉␉␉␉break;␊
 ␊
 ␉␉␉␉␉default:␊
-␉␉␉␉␉␉printf("Please specify 96, 64, or 32MB RAM for the HD4000 in the bios.\n"␊
-␉␉␉␉␉␉␉"The selected %dMB RAM configuration is not supported for the  HD4000.\n", ram);␊
+␉␉␉␉␉␉printf("\tPlease specify 96, 64, or 32MB RAM for the HD4000 in the bios.\n"␊
+␉␉␉␉␉␉␉"\tThe selected %dMB RAM configuration is not supported for the  HD4000.\n", ram);␊
 ␉␉␉␉␉␉pause();␊
 ␉␉␉␉␉␉return false;␉// Exit early before the AAPL,ig-platform-id property is set.␊
 ␉␉␉␉␉␉break;␊
 ␉␉case GMA_HASWELL_ULT_M_GT2: // 0a16␊
 ␉␉case GMA_HASWELL_ULT_E_GT2: // 0a1e␊
 ␊
-␉␉␉verbose("Injecting a valid desktop GPU device id (0x0412) instead of patching kexts.\n");␊
+␉␉␉verbose("\tInjecting a valid desktop GPU device id (0x0412) instead of patching kexts.\n");␊
 ␉␉␉device_id = 0x00000412;␉␉// Inject a valid desktop GPU device id (0x0412) instead of patching kexts␊
 ␉␉␉devprop_add_value(device, "vendor-id",␉(uint8_t *)INTEL_VENDORID, 4);␊
 ␉␉␉devprop_add_value(device, "device-id",␉(uint8_t *)&device_id, sizeof(device_id));␊
-␉␉␉verbose("Injeting done: was [%04x:%04x] now is [%04x:%04x]\n", gma_dev->vendor_id, gma_dev->device_id, gma_dev->vendor_id, device_id);␊
+␉␉␉verbose("\tInjeting done: was [%04x:%04x] now is [%04x:%04x]\n", gma_dev->vendor_id, gma_dev->device_id, gma_dev->vendor_id, device_id);␊
 ␊
 ␉␉case GMA_HASWELL_D_GT1: // 0402␊
 ␉␉case GMA_HASWELL_M_GT1: // 0406␊
 ␉␉␉␉{␊
 ␉␉␉␉␉memcpy(default_aapl_haswell, new_aapl0, AAPL_LEN_HSW);␊
 ␊
-␉␉␉␉␉verbose("Using user supplied AAPL,ig-platform-id\n");␊
-␉␉␉␉␉verbose("AAPL,ig-platform-id: %02x%02x%02x%02x\n",␊
+␉␉␉␉␉verbose("\tUsing user supplied AAPL,ig-platform-id\n");␊
+␉␉␉␉␉verbose("\tAAPL,ig-platform-id: %02x%02x%02x%02x\n",␊
 ␉␉␉␉␉␉default_aapl_haswell[0], default_aapl_haswell[1], default_aapl_haswell[2], default_aapl_haswell[3]);␊
 ␉␉␉␉}␊
 ␉␉␉␉devprop_add_value(device, "AAPL,ig-platform-id", default_aapl_haswell, AAPL_LEN_HSW);␊
 ␉␉␉{␊
 ␉␉␉␉if ((n_igs >= 0) || (n_igs <= 16))␊
 ␉␉␉␉{␊
-␉␉␉␉␉verbose("AAPL,ig-platform-id was set in org.chameleon.Boot.plist with value %d\n", n_igs);␊
+␉␉␉␉␉verbose("\tAAPL,ig-platform-id was set in org.chameleon.Boot.plist with value %d\n", n_igs);␊
 ␉␉␉␉␉devprop_add_value(device, "AAPL,ig-platform-id", haswell_ig_vals[n_igs], 4);␊
 ␉␉␉␉}␊
 ␉␉␉␉else␊
 ␉␉␉␉{␊
-␉␉␉␉␉verbose("AAPL,ig-platform-id was set in org.chameleon.Boot.plist with bad value please choose a number between 0 and 16.\n");␊
+␉␉␉␉␉verbose("\tAAPL,ig-platform-id was set in org.chameleon.Boot.plist with bad value please choose a number between 0 and 16.\n");␊
 ␉␉␉␉}␊
 ␉␉␉}␊
 ␉␉␉else␊
 ␉␉␉␉{␊
 ␉␉␉␉␉memcpy(default_aapl_broadwell, new_aapl0, AAPL_LEN_BDW);␊
 ␊
-␉␉␉␉␉verbose("Using user supplied AAPL,ig-platform-id\n");␊
-␉␉␉␉␉verbose("AAPL,ig-platform-id: %02x%02x%02x%02x\n",␊
+␉␉␉␉␉verbose("\tUsing user supplied AAPL,ig-platform-id\n");␊
+␉␉␉␉␉verbose("\tAAPL,ig-platform-id: %02x%02x%02x%02x\n",␊
 ␉␉␉␉␉␉default_aapl_broadwell[0], default_aapl_broadwell[1], default_aapl_broadwell[2], default_aapl_broadwell[3]);␊
 ␉␉␉␉}␊
 ␉␉␉␉devprop_add_value(device, "AAPL,ig-platform-id", default_aapl_broadwell, AAPL_LEN_BDW);␊
 ␉␉␉{␊
 ␉␉␉␉if ((n_igs >= 0) || (n_igs <= 19))␊
 ␉␉␉␉{␊
-␉␉␉␉␉verbose("AAPL,ig-platform-id was set in org.chameleon.Boot.plist with value %d\n", n_igs);␊
+␉␉␉␉␉verbose("\tAAPL,ig-platform-id was set in org.chameleon.Boot.plist with value %d\n", n_igs);␊
 ␉␉␉␉␉devprop_add_value(device, "AAPL,ig-platform-id", broadwell_ig_vals[n_igs], 4);␊
 ␉␉␉␉}␊
 ␉␉␉␉else␊
 ␉␉␉␉{␊
-␉␉␉␉␉verbose("AAPL,ig-platform-id was set in org.chameleon.Boot.plist with bad value please choose a number between 0 and 18.\n");␊
+␉␉␉␉␉verbose("\tAAPL,ig-platform-id was set in org.chameleon.Boot.plist with bad value please choose a number between 0 and 18.\n");␊
 ␉␉␉␉}␊
 ␉␉␉}␊
 ␉␉␉else␊
 ␉stringdata = malloc(sizeof(uint8_t) * string->length);␊
 ␉if (!stringdata)␊
 ␉{␊
-␉␉printf("[setup_gma_devprop] No stringdata!\n");␊
+␉␉printf("\t[setup_gma_devprop] No stringdata!\n");␊
 ␉␉pause();␊
 ␉␉return false;␊
 ␉}␊
 ␊
-␉verbose("---------------------------------------------\n");␊
 ␉memcpy(stringdata, (uint8_t *)devprop_generate_string(string), string->length);␊
 ␉stringlength = string->length;␊
 ␊

-400
401 401
402 402
403
404
+/* ======================================================= */␊
␊
/* a fine place for this code */␊
␊
// (devprop_add_network_template) and (setup_eth_builtin) moved to i386/libsaio/networking.c␊
 /* ======================================================= */␊
 ␊
 /* a fine place for this code */␊
+␊
+// (devprop_add_network_template) and (setup_eth_builtin) moved to i386/libsaio/networking.c␊

-91
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+const char *nvidia_device_type_child[]␉=␉{ "device_type",␉"NVDA,Child"␉ };␊
const char *nvidia_name_0[]             =␉{ "@0,name",␉␉"NVDA,Display-A" };␊
const char *nvidia_name_1[]             =␉{ "@1,name",␉␉"NVDA,Display-B" };␊
const char *nvidia_slot_name[]          =␉{ "AAPL,slot-name", "Slot-1"␉␉ };␊
//const char *nvidia_slot_name[]          =␉{ "AAPL,slot-name", "Slot-1"␉␉ };␊
␊
static uint8_t default_NVCAP[]= {␊
␉0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00,␊

␊
␉{ 0x10DE1248,␉0x152D0930,␉"Quanta GeForce GT 635M" },␊
␊
␉{ 0x10DE124D,␉0x146210CC,␉"MSi GeForce GT 635M" },␊
␉{ 0x10DE124D,␉0x146210CC,␉"MSi GeForce GT 635M" }␊
};␊
␊
static int patch_nvidia_rom(uint8_t *rom)␊

␉//ErmaC added selector for Chameleon "old" style in System Profiler␊
␉if (getBoolForKey(kNvidiaGeneric, &showGeneric, &bootInfo->chameleonConfig))␊
␉{␊
␉␉verbose("NvidiaGeneric = Yes\n");␊
␊
␊
␉␉for (i = 1; i < (sizeof(nvidia_card_generic) / sizeof(nvidia_card_generic[0])); i++)␊
␉␉{␊
␉␉␉if (nvidia_card_generic[i].device == device_id)␊

static int devprop_add_nvidia_template(DevPropDevice *device)␊
{␊
␉char tmp[16];␊
␉DBG("devprop_add_nvidia_template\n");␊
␉DBG("\tdevprop_add_nvidia_template\n");␊
␊
␉if (!device)␊
␉{␊

␉␉␉return 0;␊
␉␉}␊
␉}␊
␉else␊
␉else if (!DP_ADD_TEMP_VAL(device, nvidia_device_type_child))␊
␉{␊
␉␉if (!DP_ADD_TEMP_VAL(device, nvidia_device_type_child))␊
␉␉{␊
␉␉␉return 0;␊
␉␉}␊
␉}␊
␊
␉// Rek : Dont use sprintf return, it does not WORK !! our custom sprintf() always return 0!␊

␉// get card type␊
␉nvCardType = (REG32(0) >> 20) & 0x1ff;␊
␊
␉verbose("\tClass code: [%04x]\n", nvda_dev->class_id);␊
␊
␉model = get_nvidia_model(((nvda_dev->vendor_id << 16) | nvda_dev->device_id),((nvda_dev->subsys_id.subsys.vendor_id << 16) | nvda_dev->subsys_id.subsys.device_id));␊
␊
␉// Amount of VRAM in kilobytes␊

␊
␉if (getBoolForKey(kUseNvidiaROM, &doit, &bootInfo->chameleonConfig) && doit)␊
␉{␊
␉␉verbose("Looking for nvidia video bios file %s\n", nvFilename);␊
␉␉verbose("\tLooking for nvidia video bios file %s\n", nvFilename);␊
␉␉nvBiosOveride = load_nvidia_bios_file(nvFilename, &rom);␊
␊
␉␉if (nvBiosOveride > 0)␊
␉␉{␊
␉␉␉verbose("Using nVidia Video BIOS File %s (%d Bytes)\n", nvFilename, nvBiosOveride);␊
␉␉␉verbose("\tUsing nVidia Video BIOS File %s (%d Bytes)\n", nvFilename, nvBiosOveride);␊
␉␉␉DBG("%s Signature 0x%02x%02x %d bytes\n", nvFilename, rom[0], rom[1], nvBiosOveride);␊
␉␉}␊
␉␉else␊
␉␉{␊
␉␉␉printf("ERROR: unable to open nVidia Video BIOS File %s\n", nvFilename);␊
␉␉␉printf("\tERROR: unable to open nVidia Video BIOS File %s\n", nvFilename);␊
␉␉␉free(rom);␊
␉␉␉return false;␊
␉␉}␊

␉␉if (checkNvRomSig(nvRom))␊
␉␉{␊
␉␉␉bcopy((uint8_t *)nvRom, rom, NVIDIA_ROM_SIZE);␊
␉␉␉DBG("PROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);␊
␉␉␉DBG("\tPROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);␊
␉␉}␊
␉␉else␊
␉␉{␊

␉␉␉if(checkNvRomSig(nvRom))␊
␉␉␉{␊
␉␉␉␉bcopy((uint32_t *)nvRom, rom, NVIDIA_ROM_SIZE);␊
␉␉␉␉DBG("PRAM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);␊
␉␉␉␉DBG("\tPRAM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);␊
␉␉␉}␊
␉␉␉else␊
␉␉␉{␊

␉␉␉␉// Valid Signature ?␊
␉␉␉␉if (!checkNvRomSig(rom))␊
␉␉␉␉{␊
␉␉␉␉␉printf("ERROR: Unable to locate nVidia Video BIOS\n");␊
␉␉␉␉␉printf("\tERROR: Unable to locate nVidia Video BIOS\n");␊
␉␉␉␉␉return false;␊
␉␉␉␉}␊
␉␉␉␉else␊
␉␉␉␉{␊
                ␉␉␉    DBG("ROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);␊
                ␉␉␉    DBG("\tROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);␊
                ␉␉}␊
            ␉␉}//end PRAM check␊
                }//end PROM check␊

␊
␉if ((nvPatch = patch_nvidia_rom(rom)) == PATCH_ROM_FAILED)␊
␉{␊
␉␉printf("ERROR: nVidia ROM Patching Failed!\n");␊
␉␉printf("\tERROR: nVidia ROM Patching Failed!\n");␊
␉␉free(rom);␊
␉␉return false;␊
␉}␊

␉␉}␊
␉␉else␊
␉␉{␊
␉␉␉printf("nVidia incorrect PCI ROM signature: 0x%x\n", rom_pci_header->signature);␊
␉␉␉printf("\tnVidia incorrect PCI ROM signature: 0x%x\n", rom_pci_header->signature);␊
␉␉}␊
␉}␊
␊
␉verbose("%s %dMB NV%02x [%04x:%04x]-[%04x:%04x] :: %s device number: %d\n",␊
␉verbose("\tdevice number: %d\n\t%s %dMB NV%02x [%04x:%04x]-[%04x:%04x]\n\t%s\n",␊
␉␉␉devices_number,␊
␉␉␉model, (uint32_t)(videoRam / 1024 / 1024),␊
␉␉␉(REG32(0) >> 20) & 0x1ff, nvda_dev->vendor_id, nvda_dev->device_id,␊
␉␉␉nvda_dev->subsys_id.subsys.vendor_id, nvda_dev->subsys_id.subsys.device_id,␊
␉␉␉devicepath, devices_number);␊
␉␉␉devicepath);␊
␉verbose("\tNvidiaGeneric = %s\n", showGeneric ? "Yes" : "No");␊
␊
␉if (!string)␊
␉{␊

␊
␉// get bios version␊
␉const int MAX_BIOS_VERSION_LENGTH = 32;␊
␉char* version_str = (char*)malloc(MAX_BIOS_VERSION_LENGTH);␊
␉char *version_str = (char *)malloc(MAX_BIOS_VERSION_LENGTH);␊
␊
␉memset(version_str, 0, MAX_BIOS_VERSION_LENGTH);␊
␊

␊
␉␉if (hex2bin(value, new_NVCAP, NVCAP_LEN) == 0)␊
␉␉{␊
␉␉␉verbose("Using user supplied NVCAP for %s :: %s\n", model, devicepath);␊
␉␉␉verbose("\tUsing user supplied NVCAP for %s :: %s\n", model, devicepath);␊
␉␉␉memcpy(default_NVCAP, new_NVCAP, NVCAP_LEN);␊
␉␉}␊
␉}␊

␉␉{␊
␉␉␉memcpy(default_dcfg_0, new_dcfg0, DCFG0_LEN);␊
␊
␉␉␉verbose("Using user supplied @0,display-cfg\n");␊
␉␉␉verbose("\tUsing user supplied @0,display-cfg\n");␊
␉␉␉printf("@0,display-cfg: %02x%02x%02x%02x\n",␊
␉␉␉␉   default_dcfg_0[0], default_dcfg_0[1], default_dcfg_0[2], default_dcfg_0[3]);␊
␉␉}␊

␉␉␉memcpy(default_dcfg_1, new_dcfg1, DCFG1_LEN);␊
␊
␉␉␉verbose("Using user supplied @1,display-cfg\n");␊
␉␉␉printf("@1,display-cfg: %02x%02x%02x%02x\n",␊
␉␉␉printf("\t@1,display-cfg: %02x%02x%02x%02x\n",␊
␉␉␉␉   default_dcfg_1[0], default_dcfg_1[1], default_dcfg_1[2], default_dcfg_1[3]);␊
␉␉}␊
␉}␊
 ...
 ...
 ...
 ...
 ...
 ...
 ...
 ...
 ...
 ...
 ...
 ...
 ...
 ...
 ...
 const char *nvidia_device_type_child[]␉=␉{ "device_type",␉"NVDA,Child"␉ };␊
 const char *nvidia_name_0[]             =␉{ "@0,name",␉␉"NVDA,Display-A" };␊
 const char *nvidia_name_1[]             =␉{ "@1,name",␉␉"NVDA,Display-B" };␊
-const char *nvidia_slot_name[]          =␉{ "AAPL,slot-name", "Slot-1"␉␉ };␊
+//const char *nvidia_slot_name[]          =␉{ "AAPL,slot-name", "Slot-1"␉␉ };␊
 ␊
 static uint8_t default_NVCAP[]= {␊
 ␉0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00,␊
 ␊
 ␉{ 0x10DE1248,␉0x152D0930,␉"Quanta GeForce GT 635M" },␊
 ␊
-␉{ 0x10DE124D,␉0x146210CC,␉"MSi GeForce GT 635M" },␊
+␉{ 0x10DE124D,␉0x146210CC,␉"MSi GeForce GT 635M" }␊
 };␊
 ␊
 static int patch_nvidia_rom(uint8_t *rom)␊
 ␉//ErmaC added selector for Chameleon "old" style in System Profiler␊
 ␉if (getBoolForKey(kNvidiaGeneric, &showGeneric, &bootInfo->chameleonConfig))␊
 ␉{␊
-␉␉verbose("NvidiaGeneric = Yes\n");␊
 ␊
+␊
 ␉␉for (i = 1; i < (sizeof(nvidia_card_generic) / sizeof(nvidia_card_generic[0])); i++)␊
 ␉␉{␊
 ␉␉␉if (nvidia_card_generic[i].device == device_id)␊
 static int devprop_add_nvidia_template(DevPropDevice *device)␊
 {␊
 ␉char tmp[16];␊
-␉DBG("devprop_add_nvidia_template\n");␊
+␉DBG("\tdevprop_add_nvidia_template\n");␊
 ␊
 ␉if (!device)␊
 ␉{␊
 ␉␉␉return 0;␊
 ␉␉}␊
 ␉}␊
-␉else␊
+␉else if (!DP_ADD_TEMP_VAL(device, nvidia_device_type_child))␊
 ␉{␊
-␉␉if (!DP_ADD_TEMP_VAL(device, nvidia_device_type_child))␊
-␉␉{␊
 ␉␉␉return 0;␊
-␉␉}␊
 ␉}␊
 ␊
 ␉// Rek : Dont use sprintf return, it does not WORK !! our custom sprintf() always return 0!␊
 ␉// get card type␊
 ␉nvCardType = (REG32(0) >> 20) & 0x1ff;␊
 ␊
+␉verbose("\tClass code: [%04x]\n", nvda_dev->class_id);␊
+␊
 ␉model = get_nvidia_model(((nvda_dev->vendor_id << 16) | nvda_dev->device_id),((nvda_dev->subsys_id.subsys.vendor_id << 16) | nvda_dev->subsys_id.subsys.device_id));␊
 ␊
 ␉// Amount of VRAM in kilobytes␊
 ␊
 ␉if (getBoolForKey(kUseNvidiaROM, &doit, &bootInfo->chameleonConfig) && doit)␊
 ␉{␊
-␉␉verbose("Looking for nvidia video bios file %s\n", nvFilename);␊
+␉␉verbose("\tLooking for nvidia video bios file %s\n", nvFilename);␊
 ␉␉nvBiosOveride = load_nvidia_bios_file(nvFilename, &rom);␊
 ␊
 ␉␉if (nvBiosOveride > 0)␊
 ␉␉{␊
-␉␉␉verbose("Using nVidia Video BIOS File %s (%d Bytes)\n", nvFilename, nvBiosOveride);␊
+␉␉␉verbose("\tUsing nVidia Video BIOS File %s (%d Bytes)\n", nvFilename, nvBiosOveride);␊
 ␉␉␉DBG("%s Signature 0x%02x%02x %d bytes\n", nvFilename, rom[0], rom[1], nvBiosOveride);␊
 ␉␉}␊
 ␉␉else␊
 ␉␉{␊
-␉␉␉printf("ERROR: unable to open nVidia Video BIOS File %s\n", nvFilename);␊
+␉␉␉printf("\tERROR: unable to open nVidia Video BIOS File %s\n", nvFilename);␊
 ␉␉␉free(rom);␊
 ␉␉␉return false;␊
 ␉␉}␊
 ␉␉if (checkNvRomSig(nvRom))␊
 ␉␉{␊
 ␉␉␉bcopy((uint8_t *)nvRom, rom, NVIDIA_ROM_SIZE);␊
-␉␉␉DBG("PROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);␊
+␉␉␉DBG("\tPROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);␊
 ␉␉}␊
 ␉␉else␊
 ␉␉{␊
 ␉␉␉if(checkNvRomSig(nvRom))␊
 ␉␉␉{␊
 ␉␉␉␉bcopy((uint32_t *)nvRom, rom, NVIDIA_ROM_SIZE);␊
-␉␉␉␉DBG("PRAM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);␊
+␉␉␉␉DBG("\tPRAM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);␊
 ␉␉␉}␊
 ␉␉␉else␊
 ␉␉␉{␊
 ␉␉␉␉// Valid Signature ?␊
 ␉␉␉␉if (!checkNvRomSig(rom))␊
 ␉␉␉␉{␊
-␉␉␉␉␉printf("ERROR: Unable to locate nVidia Video BIOS\n");␊
+␉␉␉␉␉printf("\tERROR: Unable to locate nVidia Video BIOS\n");␊
 ␉␉␉␉␉return false;␊
 ␉␉␉␉}␊
 ␉␉␉␉else␊
 ␉␉␉␉{␊
-                ␉␉␉    DBG("ROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);␊
+                ␉␉␉    DBG("\tROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);␊
                 ␉␉}␊
             ␉␉}//end PRAM check␊
                 }//end PROM check␊
 ␊
 ␉if ((nvPatch = patch_nvidia_rom(rom)) == PATCH_ROM_FAILED)␊
 ␉{␊
-␉␉printf("ERROR: nVidia ROM Patching Failed!\n");␊
+␉␉printf("\tERROR: nVidia ROM Patching Failed!\n");␊
 ␉␉free(rom);␊
 ␉␉return false;␊
 ␉}␊
 ␉␉}␊
 ␉␉else␊
 ␉␉{␊
-␉␉␉printf("nVidia incorrect PCI ROM signature: 0x%x\n", rom_pci_header->signature);␊
+␉␉␉printf("\tnVidia incorrect PCI ROM signature: 0x%x\n", rom_pci_header->signature);␊
 ␉␉}␊
 ␉}␊
 ␊
-␉verbose("%s %dMB NV%02x [%04x:%04x]-[%04x:%04x] :: %s device number: %d\n",␊
+␉verbose("\tdevice number: %d\n\t%s %dMB NV%02x [%04x:%04x]-[%04x:%04x]\n\t%s\n",␊
+␉␉␉devices_number,␊
 ␉␉␉model, (uint32_t)(videoRam / 1024 / 1024),␊
 ␉␉␉(REG32(0) >> 20) & 0x1ff, nvda_dev->vendor_id, nvda_dev->device_id,␊
 ␉␉␉nvda_dev->subsys_id.subsys.vendor_id, nvda_dev->subsys_id.subsys.device_id,␊
-␉␉␉devicepath, devices_number);␊
+␉␉␉devicepath);␊
+␉verbose("\tNvidiaGeneric = %s\n", showGeneric ? "Yes" : "No");␊
 ␊
 ␉if (!string)␊
 ␉{␊
 ␊
 ␉// get bios version␊
 ␉const int MAX_BIOS_VERSION_LENGTH = 32;␊
-␉char* version_str = (char*)malloc(MAX_BIOS_VERSION_LENGTH);␊
+␉char *version_str = (char *)malloc(MAX_BIOS_VERSION_LENGTH);␊
 ␊
 ␉memset(version_str, 0, MAX_BIOS_VERSION_LENGTH);␊
 ␊
 ␊
 ␉␉if (hex2bin(value, new_NVCAP, NVCAP_LEN) == 0)␊
 ␉␉{␊
-␉␉␉verbose("Using user supplied NVCAP for %s :: %s\n", model, devicepath);␊
+␉␉␉verbose("\tUsing user supplied NVCAP for %s :: %s\n", model, devicepath);␊
 ␉␉␉memcpy(default_NVCAP, new_NVCAP, NVCAP_LEN);␊
 ␉␉}␊
 ␉}␊
 ␉␉{␊
 ␉␉␉memcpy(default_dcfg_0, new_dcfg0, DCFG0_LEN);␊
 ␊
-␉␉␉verbose("Using user supplied @0,display-cfg\n");␊
+␉␉␉verbose("\tUsing user supplied @0,display-cfg\n");␊
 ␉␉␉printf("@0,display-cfg: %02x%02x%02x%02x\n",␊
 ␉␉␉␉   default_dcfg_0[0], default_dcfg_0[1], default_dcfg_0[2], default_dcfg_0[3]);␊
 ␉␉}␊
 ␉␉␉memcpy(default_dcfg_1, new_dcfg1, DCFG1_LEN);␊
 ␊
 ␉␉␉verbose("Using user supplied @1,display-cfg\n");␊
-␉␉␉printf("@1,display-cfg: %02x%02x%02x%02x\n",␊
+␉␉␉printf("\t@1,display-cfg: %02x%02x%02x%02x\n",␊
 ␉␉␉␉   default_dcfg_1[0], default_dcfg_1[1], default_dcfg_1[2], default_dcfg_1[3]);␊
 ␉␉}␊
 ␉}␊

-1646
1647 1647
1648 1648
1649
1650
1649 1651
1650 1652
1651 1653
... ...
1693 1695
1694 1696
1695 1697
1696 
1698
1697 1699
1698 1700
1699 1701
1700 1702
1701 1703
1702 1704
1703 
1704 
1705 1705
1706 1706
1707 1707
+//␉static char compatible[64];␊
␉char *devicepath;␊
␊
␉verbose("\tClass code: [%04x]\n", ati_dev->class_id );␊
␊
␉if (!init_card(ati_dev))␊
␉{␊
␉␉return false;␊

␉stringlength = string->length;␊
␉// -------------------------------------------------␊
␊
␉DBG("ATI %s %s %dMB (%s) [%04x:%04x] (subsys [%04x:%04x]):: %s\n",␊
␉DBG("\tATI %s %s %dMB (%s) [%04x:%04x] (subsys [%04x:%04x])\n\t%s\n",␊
␉␉␉chip_family_name[card->info->chip_family], card->info->model_name,␊
␉␉␉(uint32_t)(card->vram_size / (1024 * 1024)), card->cfg_name,␊
␉␉␉ati_dev->vendor_id, ati_dev->device_id,␊
␉␉␉ati_dev->subsys_id.subsys.vendor_id, ati_dev->subsys_id.subsys.device_id,␊
␉␉␉devicepath);␊
␊
␉verbose("---------------------------------------------\n");␊
␊
␉free(card);␊
␊
␉return true;␊
 ...
 //␉static char compatible[64];␊
 ␉char *devicepath;␊
 ␊
+␉verbose("\tClass code: [%04x]\n", ati_dev->class_id );␊
+␊
 ␉if (!init_card(ati_dev))␊
 ␉{␊
 ␉␉return false;␊
 ␉stringlength = string->length;␊
 ␉// -------------------------------------------------␊
 ␊
-␉DBG("ATI %s %s %dMB (%s) [%04x:%04x] (subsys [%04x:%04x]):: %s\n",␊
+␉DBG("\tATI %s %s %dMB (%s) [%04x:%04x] (subsys [%04x:%04x])\n\t%s\n",␊
 ␉␉␉chip_family_name[card->info->chip_family], card->info->model_name,␊
 ␉␉␉(uint32_t)(card->vram_size / (1024 * 1024)), card->cfg_name,␊
 ␉␉␉ati_dev->vendor_id, ati_dev->device_id,␊
 ␉␉␉ati_dev->subsys_id.subsys.vendor_id, ati_dev->subsys_id.subsys.device_id,␊
 ␉␉␉devicepath);␊
 ␊
-␉verbose("---------------------------------------------\n");␊
-␊
 ␉free(card);␊
 ␊
 ␉return true;␊

-367
368 368
369 369
370 
370
371 371
372 372
373 373
... ...
705 705
706 706
707 707
708 
708
709 709
710 710
711 711
... ...
731 731
732 732
733 733
734 
734
735 735
736 736
737 737
... ...
1023 1023
1024 1024
1025 1025
1026 
1026
1027 1027
1028 1028
1029 1029
1030 
1030
1031 1031
1032 1032
1033 1033
... ...
1042 1042
1043 1043
1044 1044
1045 
1046 
1047 
1048 1045
1049 
1046
1050 1047
1051 1048
1052 
1049
1053 1050
1054 1051
1055 
1056 
1057 
1058 
1059 
1052
1053
1054
1055
1056
1060 1057
1061 1058
1062 
1059
1063 1060
1064 1061
1065 
1062
1066 1063
1067 1064
1068 
1065
1069 1066
1070 1067
1071 
1068
1072 1069
1073 1070
1074 1071
1075 1072
1076 
1077 
1078 
1079 
1080 
1081 
1082 
1083 
1084 
1085 
1086 
1087 
1088 
1089 
1090 
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1091 1089
1092 1090
1093 1091
+}␊
void scan_cpu(PlatformInfo_t *p)␊
{␊
␊
␉verbose("[ CPU INFO ]\n");␊
␉get_cpuid(p);␊
␊
␉uint64_t␉busFCvtt2n;␊

␉␉␉␉␉␉␉max_ratio = (max_ratio + 5);␊
␉␉␉␉␉␉}␊
␊
␉␉␉␉␉␉verbose("Bus-Ratio: min=%d, max=%s\n", bus_ratio_min, newratio);␊
␉␉␉␉␉␉verbose("\tBus-Ratio: min=%d, max=%s\n", bus_ratio_min, newratio);␊
␊
␉␉␉␉␉␉// extreme overclockers may love 320 ;)␊
␉␉␉␉␉␉if ((max_ratio >= min_ratio) && (max_ratio <= 320))␊

␉␉␉␉␉p->CPU.MinRatio = min_ratio;␊
␊
␉␉␉␉myfsb = busFrequency / 1000000;␊
␉␉␉␉verbose("Sticking with [BCLK: %dMhz, Bus-Ratio: %d]\n", myfsb, max_ratio/10);  // Bungo: fixed wrong Bus-Ratio readout␊
␉␉␉␉verbose("\tSticking with [BCLK: %dMhz, Bus-Ratio: %d]\n", myfsb, max_ratio/10);  // Bungo: fixed wrong Bus-Ratio readout␊
␉␉␉␉currcoef = bus_ratio_max;␊
␊
␉␉␉␉break;␊

␉if (!busFrequency)␊
␉{␊
␉␉busFrequency = (DEFAULT_FSB * 1000);␊
␉␉DBG("CPU: busFrequency = 0! using the default value for FSB!\n");␊
␉␉DBG("\tCPU: busFrequency = 0! using the default value for FSB!\n");␊
␉␉cpuFrequency = tscFreq;␊
␉}␊
␊
␉DBG("cpu freq = 0x%016llxn", timeRDTSC() * 20);␊
␉DBG("\tcpu freq = 0x%016llxn", timeRDTSC() * 20);␊
␊
#endif␊
␊

␉p->CPU.CPUFrequency = cpuFrequency;␊
␊
␉// keep formatted with spaces instead of tabs␊
␉DBG("\n------------------------------\n");␊
   ␉DBG("\tCPU INFO\n");␊
␉DBG("------------------------------\n");␊
␊
␉DBG("CPUID Raw Values:\n");␊
␉DBG("\tCPUID Raw Values:\n");␊
␉for (i = 0; i < CPUID_MAX; i++)␊
␉{␊
␉␉DBG("%02d:  %08X-%08X-%08X-%08X\n", i, p->CPU.CPUID[i][eax], p->CPU.CPUID[i][ebx], p->CPU.CPUID[i][ecx], p->CPU.CPUID[i][edx]);␊
␉␉DBG("\t%02d:  %08X-%08X-%08X-%08X\n", i, p->CPU.CPUID[i][eax], p->CPU.CPUID[i][ebx], p->CPU.CPUID[i][ecx], p->CPU.CPUID[i][edx]);␊
␉}␊
␉DBG("\n");␊
␉DBG("Brand String:            %s\n",␉␉p->CPU.BrandString);␉␉// Processor name (BIOS)␊
␉DBG("Vendor:                  0x%X\n",␉␉p->CPU.Vendor);␉␉␉// Vendor ex: GenuineIntel␊
␉DBG("Family:                  0x%X\n",␉␉p->CPU.Family);␉␉␉// Family ex: 6 (06h)␊
␉DBG("ExtFamily:               0x%X\n",␉␉p->CPU.ExtFamily);␊
␉DBG("Signature:               0x%08X\n",␉p->CPU.Signature);␉␉// CPUID signature␊
␉DBG("\tBrand String:            %s\n",␉␉p->CPU.BrandString);␉␉// Processor name (BIOS)␊
␉DBG("\tVendor:                  0x%X\n",␉p->CPU.Vendor);␉␉␉// Vendor ex: GenuineIntel␊
␉DBG("\tFamily:                  0x%X\n",␉p->CPU.Family);␉␉␉// Family ex: 6 (06h)␊
␉DBG("\tExtFamily:               0x%X\n",␉p->CPU.ExtFamily);␊
␉DBG("\tSignature:               0x%08X\n",␉p->CPU.Signature);␉␉// CPUID signature␊
␉/*switch (p->CPU.Type) {␊
␉␉case PT_OEM:␊
␉␉␉DBG("Processor type:          Intel Original OEM Processor\n");␊
␉␉␉DBG("\tProcessor type:          Intel Original OEM Processor\n");␊
␉␉␉break;␊
␉␉case PT_OD:␊
␉␉␉DBG("Processor type:          Intel Over Drive Processor\n");␊
␉␉␉DBG("\tProcessor type:          Intel Over Drive Processor\n");␊
␉␉␉break;␊
␉␉case PT_DUAL:␊
␉␉␉DBG("Processor type:          Intel Dual Processor\n");␊
␉␉␉DBG("\tProcessor type:          Intel Dual Processor\n");␊
␉␉␉break;␊
␉␉case PT_RES:␊
␉␉␉DBG("Processor type:          Intel Reserved\n");␊
␉␉␉DBG("\tProcessor type:          Intel Reserved\n");␊
␉␉␉break;␊
␉␉default:␊
␉␉␉break;␊
␉}*/␊
␉DBG("Model:                   0x%X\n",␉␉p->CPU.Model);␉␉␉// Model ex: 37 (025h)␊
␉DBG("ExtModel:                0x%X\n",␉␉p->CPU.ExtModel);␊
␉DBG("Stepping:                0x%X\n",␉␉p->CPU.Stepping);␉␉// Stepping ex: 5 (05h)␊
␉DBG("MaxCoef:                 %d\n",␉␉p->CPU.MaxCoef);␊
␉DBG("CurrCoef:                %d\n",␉␉p->CPU.CurrCoef);␊
␉DBG("MaxDiv:                  %d\n",␉␉p->CPU.MaxDiv);␊
␉DBG("CurrDiv:                 %d\n",␉␉p->CPU.CurrDiv);␊
␉DBG("TSCFreq:                 %dMHz\n",␉␉p->CPU.TSCFrequency / 1000000);␊
␉DBG("FSBFreq:                 %dMHz\n",␉␉(p->CPU.FSBFrequency + 500000) / 1000000);␊
␉DBG("CPUFreq:                 %dMHz\n",␉␉p->CPU.CPUFrequency / 1000000);␊
␉DBG("Cores:                   %d\n",␉␉p->CPU.NoCores);␉␉// Cores␊
␉DBG("Logical processor:       %d\n",␉␉p->CPU.NoThreads);␉␉// Logical procesor␊
␉DBG("Features:                0x%08x\n",␉p->CPU.Features);␊
//␉DBG("Microcode version:       %d\n",␉␉p->CPU.MCodeVersion);␉␉// CPU microcode version␊
␉DBG("\n---------------------------------------------\n");␊
␉DBG("\tModel:                   0x%X\n",␉p->CPU.Model);␉␉␉// Model ex: 37 (025h)␊
␉DBG("\tExtModel:                0x%X\n",␉p->CPU.ExtModel);␊
␉DBG("\tStepping:                0x%X\n",␉p->CPU.Stepping);␉␉// Stepping ex: 5 (05h)␊
␉DBG("\tMaxCoef:                 %d\n",␉␉p->CPU.MaxCoef);␊
␉DBG("\tCurrCoef:                %d\n",␉␉p->CPU.CurrCoef);␊
␉DBG("\tMaxDiv:                  %d\n",␉␉p->CPU.MaxDiv);␊
␉DBG("\tCurrDiv:                 %d\n",␉␉p->CPU.CurrDiv);␊
␉DBG("\tTSCFreq:                 %dMHz\n",␉p->CPU.TSCFrequency / 1000000);␊
␉DBG("\tFSBFreq:                 %dMHz\n",␉(p->CPU.FSBFrequency + 500000) / 1000000);␊
␉DBG("\tCPUFreq:                 %dMHz\n",␉p->CPU.CPUFrequency / 1000000);␊
␉DBG("\tCores:                   %d\n",␉␉p->CPU.NoCores);␉␉// Cores␊
␉DBG("\tLogical processor:       %d\n",␉␉p->CPU.NoThreads);␉␉// Logical procesor␊
␉DBG("\tFeatures:                0x%08x\n",␉p->CPU.Features);␊
//␉DBG("\tMicrocode version:       %d\n",␉␉p->CPU.MCodeVersion);␉␉// CPU microcode version␊
␊
␉verbose("\n");␊
#if DEBUG_CPU␊
␉pause();␊
#endif␊
 ...
 ...
 ...
 ...
 }␊
 void scan_cpu(PlatformInfo_t *p)␊
 {␊
-␊
+␉verbose("[ CPU INFO ]\n");␊
 ␉get_cpuid(p);␊
 ␊
 ␉uint64_t␉busFCvtt2n;␊
 ␉␉␉␉␉␉␉max_ratio = (max_ratio + 5);␊
 ␉␉␉␉␉␉}␊
 ␊
-␉␉␉␉␉␉verbose("Bus-Ratio: min=%d, max=%s\n", bus_ratio_min, newratio);␊
+␉␉␉␉␉␉verbose("\tBus-Ratio: min=%d, max=%s\n", bus_ratio_min, newratio);␊
 ␊
 ␉␉␉␉␉␉// extreme overclockers may love 320 ;)␊
 ␉␉␉␉␉␉if ((max_ratio >= min_ratio) && (max_ratio <= 320))␊
 ␉␉␉␉␉p->CPU.MinRatio = min_ratio;␊
 ␊
 ␉␉␉␉myfsb = busFrequency / 1000000;␊
-␉␉␉␉verbose("Sticking with [BCLK: %dMhz, Bus-Ratio: %d]\n", myfsb, max_ratio/10);  // Bungo: fixed wrong Bus-Ratio readout␊
+␉␉␉␉verbose("\tSticking with [BCLK: %dMhz, Bus-Ratio: %d]\n", myfsb, max_ratio/10);  // Bungo: fixed wrong Bus-Ratio readout␊
 ␉␉␉␉currcoef = bus_ratio_max;␊
 ␊
 ␉␉␉␉break;␊
 ␉if (!busFrequency)␊
 ␉{␊
 ␉␉busFrequency = (DEFAULT_FSB * 1000);␊
-␉␉DBG("CPU: busFrequency = 0! using the default value for FSB!\n");␊
+␉␉DBG("\tCPU: busFrequency = 0! using the default value for FSB!\n");␊
 ␉␉cpuFrequency = tscFreq;␊
 ␉}␊
 ␊
-␉DBG("cpu freq = 0x%016llxn", timeRDTSC() * 20);␊
+␉DBG("\tcpu freq = 0x%016llxn", timeRDTSC() * 20);␊
 ␊
 #endif␊
 ␊
 ␉p->CPU.CPUFrequency = cpuFrequency;␊
 ␊
 ␉// keep formatted with spaces instead of tabs␊
-␉DBG("\n------------------------------\n");␊
-   ␉DBG("\tCPU INFO\n");␊
-␉DBG("------------------------------\n");␊
 ␊
-␉DBG("CPUID Raw Values:\n");␊
+␉DBG("\tCPUID Raw Values:\n");␊
 ␉for (i = 0; i < CPUID_MAX; i++)␊
 ␉{␊
-␉␉DBG("%02d:  %08X-%08X-%08X-%08X\n", i, p->CPU.CPUID[i][eax], p->CPU.CPUID[i][ebx], p->CPU.CPUID[i][ecx], p->CPU.CPUID[i][edx]);␊
+␉␉DBG("\t%02d:  %08X-%08X-%08X-%08X\n", i, p->CPU.CPUID[i][eax], p->CPU.CPUID[i][ebx], p->CPU.CPUID[i][ecx], p->CPU.CPUID[i][edx]);␊
 ␉}␊
 ␉DBG("\n");␊
-␉DBG("Brand String:            %s\n",␉␉p->CPU.BrandString);␉␉// Processor name (BIOS)␊
-␉DBG("Vendor:                  0x%X\n",␉␉p->CPU.Vendor);␉␉␉// Vendor ex: GenuineIntel␊
-␉DBG("Family:                  0x%X\n",␉␉p->CPU.Family);␉␉␉// Family ex: 6 (06h)␊
-␉DBG("ExtFamily:               0x%X\n",␉␉p->CPU.ExtFamily);␊
-␉DBG("Signature:               0x%08X\n",␉p->CPU.Signature);␉␉// CPUID signature␊
+␉DBG("\tBrand String:            %s\n",␉␉p->CPU.BrandString);␉␉// Processor name (BIOS)␊
+␉DBG("\tVendor:                  0x%X\n",␉p->CPU.Vendor);␉␉␉// Vendor ex: GenuineIntel␊
+␉DBG("\tFamily:                  0x%X\n",␉p->CPU.Family);␉␉␉// Family ex: 6 (06h)␊
+␉DBG("\tExtFamily:               0x%X\n",␉p->CPU.ExtFamily);␊
+␉DBG("\tSignature:               0x%08X\n",␉p->CPU.Signature);␉␉// CPUID signature␊
 ␉/*switch (p->CPU.Type) {␊
 ␉␉case PT_OEM:␊
-␉␉␉DBG("Processor type:          Intel Original OEM Processor\n");␊
+␉␉␉DBG("\tProcessor type:          Intel Original OEM Processor\n");␊
 ␉␉␉break;␊
 ␉␉case PT_OD:␊
-␉␉␉DBG("Processor type:          Intel Over Drive Processor\n");␊
+␉␉␉DBG("\tProcessor type:          Intel Over Drive Processor\n");␊
 ␉␉␉break;␊
 ␉␉case PT_DUAL:␊
-␉␉␉DBG("Processor type:          Intel Dual Processor\n");␊
+␉␉␉DBG("\tProcessor type:          Intel Dual Processor\n");␊
 ␉␉␉break;␊
 ␉␉case PT_RES:␊
-␉␉␉DBG("Processor type:          Intel Reserved\n");␊
+␉␉␉DBG("\tProcessor type:          Intel Reserved\n");␊
 ␉␉␉break;␊
 ␉␉default:␊
 ␉␉␉break;␊
 ␉}*/␊
-␉DBG("Model:                   0x%X\n",␉␉p->CPU.Model);␉␉␉// Model ex: 37 (025h)␊
-␉DBG("ExtModel:                0x%X\n",␉␉p->CPU.ExtModel);␊
-␉DBG("Stepping:                0x%X\n",␉␉p->CPU.Stepping);␉␉// Stepping ex: 5 (05h)␊
-␉DBG("MaxCoef:                 %d\n",␉␉p->CPU.MaxCoef);␊
-␉DBG("CurrCoef:                %d\n",␉␉p->CPU.CurrCoef);␊
-␉DBG("MaxDiv:                  %d\n",␉␉p->CPU.MaxDiv);␊
-␉DBG("CurrDiv:                 %d\n",␉␉p->CPU.CurrDiv);␊
-␉DBG("TSCFreq:                 %dMHz\n",␉␉p->CPU.TSCFrequency / 1000000);␊
-␉DBG("FSBFreq:                 %dMHz\n",␉␉(p->CPU.FSBFrequency + 500000) / 1000000);␊
-␉DBG("CPUFreq:                 %dMHz\n",␉␉p->CPU.CPUFrequency / 1000000);␊
-␉DBG("Cores:                   %d\n",␉␉p->CPU.NoCores);␉␉// Cores␊
-␉DBG("Logical processor:       %d\n",␉␉p->CPU.NoThreads);␉␉// Logical procesor␊
-␉DBG("Features:                0x%08x\n",␉p->CPU.Features);␊
-//␉DBG("Microcode version:       %d\n",␉␉p->CPU.MCodeVersion);␉␉// CPU microcode version␊
-␉DBG("\n---------------------------------------------\n");␊
+␉DBG("\tModel:                   0x%X\n",␉p->CPU.Model);␉␉␉// Model ex: 37 (025h)␊
+␉DBG("\tExtModel:                0x%X\n",␉p->CPU.ExtModel);␊
+␉DBG("\tStepping:                0x%X\n",␉p->CPU.Stepping);␉␉// Stepping ex: 5 (05h)␊
+␉DBG("\tMaxCoef:                 %d\n",␉␉p->CPU.MaxCoef);␊
+␉DBG("\tCurrCoef:                %d\n",␉␉p->CPU.CurrCoef);␊
+␉DBG("\tMaxDiv:                  %d\n",␉␉p->CPU.MaxDiv);␊
+␉DBG("\tCurrDiv:                 %d\n",␉␉p->CPU.CurrDiv);␊
+␉DBG("\tTSCFreq:                 %dMHz\n",␉p->CPU.TSCFrequency / 1000000);␊
+␉DBG("\tFSBFreq:                 %dMHz\n",␉(p->CPU.FSBFrequency + 500000) / 1000000);␊
+␉DBG("\tCPUFreq:                 %dMHz\n",␉p->CPU.CPUFrequency / 1000000);␊
+␉DBG("\tCores:                   %d\n",␉␉p->CPU.NoCores);␉␉// Cores␊
+␉DBG("\tLogical processor:       %d\n",␉␉p->CPU.NoThreads);␉␉// Logical procesor␊
+␉DBG("\tFeatures:                0x%08x\n",␉p->CPU.Features);␊
+//␉DBG("\tMicrocode version:       %d\n",␉␉p->CPU.MCodeVersion);␉␉// CPU microcode version␊
+␊
+␉verbose("\n");␊
 #if DEBUG_CPU␊
 ␉pause();␊
 #endif␊

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+        : : "d"(value) : "%al");␊
}␊
␊
␊
inline static uint64_t␊
get_PIT2(unsigned int *value)␊
{␊
         : : "d"(value) : "%al");␊
 }␊
 ␊
-␊
 inline static uint64_t␊
 get_PIT2(unsigned int *value)␊
 {␊

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+␊
␉␉␉rcba = (void *)(pci_config_read32(lpc_dev->dev.addr, 0xF0) & 0xFFFFC000);␊
␊
␉␉␉DBG("nVidia(R) %s LPC Interface [%04x:%04x], MMIO @ 0x%lx\n", ␊
␉␉␉DBG("\tnVidia(R) %s LPC Interface [%04x:%04x], MMIO @ 0x%lx\n", ␊
␉␉␉␉lpc_controllers_nvidia[i].name, lpc_dev->vendor_id, lpc_dev->device_id, rcba);␊
␊
␉␉␉if (rcba == 0)␊
␉␉␉{␊
␉␉␉␉printf(" RCBA disabled; cannot force enable HPET\n");␊
␉␉␉␉printf("\tRCBA disabled; cannot force enable HPET\n");␊
␉␉␉}␊
␉␉␉else␊
␉␉␉{␊

␉␉␉␉if (val & 0x80)␊
␉␉␉␉{␊
␉␉␉␉␉// HPET is enabled in HPTC. Just not reported by BIOS␊
␉␉␉␉␉DBG(" HPET is enabled in HPTC, just not reported by BIOS\n");␊
␉␉␉␉␉DBG("\tHPET is enabled in HPTC, just not reported by BIOS\n");␊
␉␉␉␉␉hpet_address |= (val & 3) << 12 ;␊
␉␉␉␉␉DBG(" HPET MMIO @ 0x%lx\n", hpet_address);␊
␉␉␉␉␉DBG("\tHPET MMIO @ 0x%lx\n", hpet_address);␊
␉␉␉␉}␊
␉␉␉␉else␊
␉␉␉␉{␊
␉␉␉␉␉// HPET disabled in HPTC. Trying to enable␊
␉␉␉␉␉DBG(" HPET is disabled in HPTC, trying to enable\n");␉␉␉␉␉␉␉␉␉␊
␉␉␉␉␉DBG("\tHPET is disabled in HPTC, trying to enable\n");␉␉␉␉␉␉␉␉␉␊
␉␉␉␉␉REG32(rcba, 0x3404) = val | 0x80;␊
␉␉␉␉␉hpet_address |= (val & 3) << 12 ;␊
␉␉␉␉␉DBG(" Force enabled HPET, MMIO @ 0x%lx\n", hpet_address);␊
␉␉␉␉␉DBG("\tForce enabled HPET, MMIO @ 0x%lx\n", hpet_address);␊
␉␉␉␉}␊
␊
␉␉␉␉// verify if the job is done␊
␉␉␉␉val = REG32(rcba, 0x3404);␊
␉␉␉␉if (!(val & 0x80))␊
␉␉␉␉{␊
␉␉␉␉␉printf(" Failed to force enable HPET\n");␊
␉␉␉␉␉printf("\tFailed to force enable HPET\n");␊
␉␉␉␉}␊
␉␉␉}␊
␉␉␉break;␊

␉␉{␊
␉␉␉val = pci_config_read32(lpc_dev->dev.addr, 0x68);␊
␊
␉␉␉DBG("VIA %s LPC Interface [%04x:%04x], MMIO\n", ␊
␉␉␉DBG("\tVIA %s LPC Interface [%04x:%04x], MMIO\n", ␊
␉␉␉␉lpc_controllers_via[i].name, lpc_dev->vendor_id, lpc_dev->device_id);␊
␊
␉␉␉if (val & 0x80)␊

␉␉␉␉if (val & 0x80)␊
␉␉␉␉{␊
␉␉␉␉␉hpet_address = (val & ~0x3ff);␊
␉␉␉␉␉DBG("Force enabled HPET at 0x%lx\n", hpet_address);␊
␉␉␉␉␉DBG("\tForce enabled HPET at 0x%lx\n", hpet_address);␊
␉␉␉␉}␊
␉␉␉␉else␊
␉␉␉␉{␊
␉␉␉␉␉DBG("Unable to enable HPET");␊
␉␉␉␉␉DBG("\tUnable to enable HPET");␊
␉␉␉␉}␊
␉␉␉}␊
␉␉}␊

␊
␉␉␉rcba = (void *)(pci_config_read32(lpc_dev->dev.addr, 0xF0) & 0xFFFFC000);␊
␊
␉␉␉DBG("Intel(R) %s LPC Interface [%04x:%04x], MMIO @ 0x%lx\n", ␊
␉␉␉DBG("\tIntel(R) %s LPC Interface [%04x:%04x], MMIO @ 0x%lx\n", ␊
␉␉␉␉lpc_controllers_intel[i].name, lpc_dev->vendor_id, lpc_dev->device_id, rcba);␊
␊
␉␉␉if (rcba == 0)␊
␉␉␉{␊
␉␉␉␉printf(" RCBA disabled; cannot force enable HPET\n");␊
␉␉␉␉printf("\tRCBA disabled; cannot force enable HPET\n");␊
␉␉␉}␊
␉␉␉else␊
␉␉␉{␊

␉␉␉␉if (val & 0x80)␊
␉␉␉␉{␊
␉␉␉␉␉// HPET is enabled in HPTC. Just not reported by BIOS␊
␉␉␉␉␉DBG(" HPET is enabled in HPTC, just not reported by BIOS\n");␊
␉␉␉␉␉DBG("\tHPET is enabled in HPTC, just not reported by BIOS\n");␊
␉␉␉␉␉hpet_address |= (val & 3) << 12 ;␊
␉␉␉␉␉DBG(" HPET MMIO @ 0x%lx\n", hpet_address);␊
␉␉␉␉␉DBG("\tHPET MMIO @ 0x%lx\n", hpet_address);␊
␉␉␉␉}␊
␉␉␉␉else␊
␉␉␉␉{␊
␉␉␉␉␉// HPET disabled in HPTC. Trying to enable␊
␉␉␉␉␉DBG(" HPET is disabled in HPTC, trying to enable\n");␉␉␉␉␉␉␉␉␉␊
␉␉␉␉␉DBG("\tHPET is disabled in HPTC, trying to enable\n");␉␉␉␉␉␉␉␉␉␊
␉␉␉␉␉REG32(rcba, 0x3404) = val | 0x80;␊
␉␉␉␉␉hpet_address |= (val & 3) << 12 ;␊
␉␉␉␉␉DBG(" Force enabled HPET, MMIO @ 0x%lx\n", hpet_address);␊
␉␉␉␉␉DBG("\tForce enabled HPET, MMIO @ 0x%lx\n", hpet_address);␊
␉␉␉␉}␊
␊
␉␉␉␉// verify if the job is done␊
␉␉␉␉val = REG32(rcba, 0x3404);␊
␉␉␉␉if (!(val & 0x80))␊
␉␉␉␉{␊
␉␉␉␉␉printf(" Failed to force enable HPET\n");␊
␉␉␉␉␉printf("\tFailed to force enable HPET\n");␊
␉␉␉␉}␊
␉␉␉}␊
␉␉␉break;␊
 ...
 ...
 ...
 ...
 ...
 ␊
 ␉␉␉rcba = (void *)(pci_config_read32(lpc_dev->dev.addr, 0xF0) & 0xFFFFC000);␊
 ␊
-␉␉␉DBG("nVidia(R) %s LPC Interface [%04x:%04x], MMIO @ 0x%lx\n", ␊
+␉␉␉DBG("\tnVidia(R) %s LPC Interface [%04x:%04x], MMIO @ 0x%lx\n", ␊
 ␉␉␉␉lpc_controllers_nvidia[i].name, lpc_dev->vendor_id, lpc_dev->device_id, rcba);␊
 ␊
 ␉␉␉if (rcba == 0)␊
 ␉␉␉{␊
-␉␉␉␉printf(" RCBA disabled; cannot force enable HPET\n");␊
+␉␉␉␉printf("\tRCBA disabled; cannot force enable HPET\n");␊
 ␉␉␉}␊
 ␉␉␉else␊
 ␉␉␉{␊
 ␉␉␉␉if (val & 0x80)␊
 ␉␉␉␉{␊
 ␉␉␉␉␉// HPET is enabled in HPTC. Just not reported by BIOS␊
-␉␉␉␉␉DBG(" HPET is enabled in HPTC, just not reported by BIOS\n");␊
+␉␉␉␉␉DBG("\tHPET is enabled in HPTC, just not reported by BIOS\n");␊
 ␉␉␉␉␉hpet_address |= (val & 3) << 12 ;␊
-␉␉␉␉␉DBG(" HPET MMIO @ 0x%lx\n", hpet_address);␊
+␉␉␉␉␉DBG("\tHPET MMIO @ 0x%lx\n", hpet_address);␊
 ␉␉␉␉}␊
 ␉␉␉␉else␊
 ␉␉␉␉{␊
 ␉␉␉␉␉// HPET disabled in HPTC. Trying to enable␊
-␉␉␉␉␉DBG(" HPET is disabled in HPTC, trying to enable\n");␉␉␉␉␉␉␉␉␉␊
+␉␉␉␉␉DBG("\tHPET is disabled in HPTC, trying to enable\n");␉␉␉␉␉␉␉␉␉␊
 ␉␉␉␉␉REG32(rcba, 0x3404) = val | 0x80;␊
 ␉␉␉␉␉hpet_address |= (val & 3) << 12 ;␊
-␉␉␉␉␉DBG(" Force enabled HPET, MMIO @ 0x%lx\n", hpet_address);␊
+␉␉␉␉␉DBG("\tForce enabled HPET, MMIO @ 0x%lx\n", hpet_address);␊
 ␉␉␉␉}␊
 ␊
 ␉␉␉␉// verify if the job is done␊
 ␉␉␉␉val = REG32(rcba, 0x3404);␊
 ␉␉␉␉if (!(val & 0x80))␊
 ␉␉␉␉{␊
-␉␉␉␉␉printf(" Failed to force enable HPET\n");␊
+␉␉␉␉␉printf("\tFailed to force enable HPET\n");␊
 ␉␉␉␉}␊
 ␉␉␉}␊
 ␉␉␉break;␊
 ␉␉{␊
 ␉␉␉val = pci_config_read32(lpc_dev->dev.addr, 0x68);␊
 ␊
-␉␉␉DBG("VIA %s LPC Interface [%04x:%04x], MMIO\n", ␊
+␉␉␉DBG("\tVIA %s LPC Interface [%04x:%04x], MMIO\n", ␊
 ␉␉␉␉lpc_controllers_via[i].name, lpc_dev->vendor_id, lpc_dev->device_id);␊
 ␊
 ␉␉␉if (val & 0x80)␊
 ␉␉␉␉if (val & 0x80)␊
 ␉␉␉␉{␊
 ␉␉␉␉␉hpet_address = (val & ~0x3ff);␊
-␉␉␉␉␉DBG("Force enabled HPET at 0x%lx\n", hpet_address);␊
+␉␉␉␉␉DBG("\tForce enabled HPET at 0x%lx\n", hpet_address);␊
 ␉␉␉␉}␊
 ␉␉␉␉else␊
 ␉␉␉␉{␊
-␉␉␉␉␉DBG("Unable to enable HPET");␊
+␉␉␉␉␉DBG("\tUnable to enable HPET");␊
 ␉␉␉␉}␊
 ␉␉␉}␊
 ␉␉}␊
 ␊
 ␉␉␉rcba = (void *)(pci_config_read32(lpc_dev->dev.addr, 0xF0) & 0xFFFFC000);␊
 ␊
-␉␉␉DBG("Intel(R) %s LPC Interface [%04x:%04x], MMIO @ 0x%lx\n", ␊
+␉␉␉DBG("\tIntel(R) %s LPC Interface [%04x:%04x], MMIO @ 0x%lx\n", ␊
 ␉␉␉␉lpc_controllers_intel[i].name, lpc_dev->vendor_id, lpc_dev->device_id, rcba);␊
 ␊
 ␉␉␉if (rcba == 0)␊
 ␉␉␉{␊
-␉␉␉␉printf(" RCBA disabled; cannot force enable HPET\n");␊
+␉␉␉␉printf("\tRCBA disabled; cannot force enable HPET\n");␊
 ␉␉␉}␊
 ␉␉␉else␊
 ␉␉␉{␊
 ␉␉␉␉if (val & 0x80)␊
 ␉␉␉␉{␊
 ␉␉␉␉␉// HPET is enabled in HPTC. Just not reported by BIOS␊
-␉␉␉␉␉DBG(" HPET is enabled in HPTC, just not reported by BIOS\n");␊
+␉␉␉␉␉DBG("\tHPET is enabled in HPTC, just not reported by BIOS\n");␊
 ␉␉␉␉␉hpet_address |= (val & 3) << 12 ;␊
-␉␉␉␉␉DBG(" HPET MMIO @ 0x%lx\n", hpet_address);␊
+␉␉␉␉␉DBG("\tHPET MMIO @ 0x%lx\n", hpet_address);␊
 ␉␉␉␉}␊
 ␉␉␉␉else␊
 ␉␉␉␉{␊
 ␉␉␉␉␉// HPET disabled in HPTC. Trying to enable␊
-␉␉␉␉␉DBG(" HPET is disabled in HPTC, trying to enable\n");␉␉␉␉␉␉␉␉␉␊
+␉␉␉␉␉DBG("\tHPET is disabled in HPTC, trying to enable\n");␉␉␉␉␉␉␉␉␉␊
 ␉␉␉␉␉REG32(rcba, 0x3404) = val | 0x80;␊
 ␉␉␉␉␉hpet_address |= (val & 3) << 12 ;␊
-␉␉␉␉␉DBG(" Force enabled HPET, MMIO @ 0x%lx\n", hpet_address);␊
+␉␉␉␉␉DBG("\tForce enabled HPET, MMIO @ 0x%lx\n", hpet_address);␊
 ␉␉␉␉}␊
 ␊
 ␉␉␉␉// verify if the job is done␊
 ␉␉␉␉val = REG32(rcba, 0x3404);␊
 ␉␉␉␉if (!(val & 0x80))␊
 ␉␉␉␉{␊
-␉␉␉␉␉printf(" Failed to force enable HPET\n");␊
+␉␉␉␉␉printf("\tFailed to force enable HPET\n");␊
 ␉␉␉␉}␊
 ␉␉␉}␊
 ␉␉␉break;␊

-7
8 8
9 9
10
11
12
10 13
11 14
12 15
+␊
#include "convert.h"␊
␊
␊
/* ======================================================= */␊
␊
/** Transform a 16 bytes hexadecimal value UUID to a string */␊
const char *getStringFromUUID(const EFI_CHAR8 *eUUID)␊
{␊
 ␊
 #include "convert.h"␊
 ␊
+␊
+/* ======================================================= */␊
+␊
 /** Transform a 16 bytes hexadecimal value UUID to a string */␊
 const char *getStringFromUUID(const EFI_CHAR8 *eUUID)␊
 {␊

-109
110 110
111 111
112 
112
113 113
114 114
115 115
... ...
137 137
138 138
139 139
140 
140
141 141
142 142
143 143
+#define kUseNvidiaROM␉␉␉"UseNvidiaROM"␉␉/* nvidia.c */␊
#define kVBIOS␉␉␉␉"VBIOS"␉␉␉/* nvidia.c && ati.c */␊
#define kPCIRootUID␉␉␉"PCIRootUID"␉␉/* pci_root.c */␊
#define kEthernetBuiltIn␉␉"EthernetBuiltIn"␉/* pci_setup.c */␊
#define kEthernetBuiltIn␉␉"EthernetBuiltIn"␉/* networking.c */␊
#define kGraphicsEnabler␉␉"GraphicsEnabler"␉/* pci_setup.c */␊
#define kForceHPET␉␉␉"ForceHPET"␉␉/* pci_setup.c */␊
#define kUseMemDetect␉␉␉"UseMemDetect"␉␉/* platform.c */␊

␊
/* Meklort: added these keys */␊
#define kMD0Image␉␉␉"md0"␉␉␉/* ramdisk.h */␊
#define kEnableWifi␉␉␉"EnableWifi"␉␉/* pci_setup.c */␊
#define kEnableWifi␉␉␉"EnableWifi"␉␉/* networking.c */␊
␊
/* Andyvand: added these keys */␊
//#define kSSDT␉␉␉␉"SSDT"␉␉␉/* acpi_patcher.c */␊
 ...
 #define kUseNvidiaROM␉␉␉"UseNvidiaROM"␉␉/* nvidia.c */␊
 #define kVBIOS␉␉␉␉"VBIOS"␉␉␉/* nvidia.c && ati.c */␊
 #define kPCIRootUID␉␉␉"PCIRootUID"␉␉/* pci_root.c */␊
-#define kEthernetBuiltIn␉␉"EthernetBuiltIn"␉/* pci_setup.c */␊
+#define kEthernetBuiltIn␉␉"EthernetBuiltIn"␉/* networking.c */␊
 #define kGraphicsEnabler␉␉"GraphicsEnabler"␉/* pci_setup.c */␊
 #define kForceHPET␉␉␉"ForceHPET"␉␉/* pci_setup.c */␊
 #define kUseMemDetect␉␉␉"UseMemDetect"␉␉/* platform.c */␊
 ␊
 /* Meklort: added these keys */␊
 #define kMD0Image␉␉␉"md0"␉␉␉/* ramdisk.h */␊
-#define kEnableWifi␉␉␉"EnableWifi"␉␉/* pci_setup.c */␊
+#define kEnableWifi␉␉␉"EnableWifi"␉␉/* networking.c */␊
 ␊
 /* Andyvand: added these keys */␊
 //#define kSSDT␉␉␉␉"SSDT"␉␉␉/* acpi_patcher.c */␊

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