Chameleon

Chameleon Commit Details

Date:2015-05-19 21:05:51 (8 years 11 months ago)
Author:ErmaC
Commit:2687
Parents: 2686
Message:Cleanup text info for bdmesg output.
Changes:
M/trunk/i386/libsaio/gma.c
M/trunk/i386/libsaio/dram_controllers.c
M/trunk/i386/libsaio/nvidia.c
M/trunk/i386/boot2/boot.h
M/trunk/i386/libsaio/ati.c
M/trunk/i386/libsaio/biosfn.c
M/trunk/i386/libsaio/pci.h
M/trunk/i386/libsaio/acpi_patcher.c
M/trunk/i386/libsaio/state_generator.c
M/trunk/i386/libsaio/spd.c
M/trunk/i386/libsaio/cpu.c
M/trunk/i386/libsaio/networking.c
M/trunk/i386/libsaio/usb.c
M/trunk/i386/libsaio/smbios_getters.c
M/trunk/i386/libsaio/fake_efi.c
M/trunk/i386/libsaio/pci_setup.c
M/trunk/i386/libsaio/device_inject.c
M/trunk/i386/libsaio/cpu.h
M/trunk/i386/libsaio/hda.c
M/trunk/i386/libsaio/networking.h
M/trunk/i386/libsaio/smbios.c
M/trunk/i386/libsaio/smbios_getters.h
M/trunk/i386/libsaio/smbios_decode.c
M/trunk/i386/libsaio/hpet.c

File differences

trunk/i386/libsaio/smbios_getters.h
3333
3434
3535
36
3637
3738
3839
extern bool getProcessorInformationExternalClock(returnType *value);
extern bool getProcessorInformationMaximumClock(returnType *value);
extern bool getSMBOemProcessorBusSpeed(returnType *value);
//extern bool getSMBOemPlatformFeature(returnType *value);
extern bool getSMBOemProcessorType(returnType *value);
extern bool getSMBMemoryDeviceMemoryType(returnType *value);
extern bool getSMBMemoryDeviceMemoryErrorHandle(returnType *value);
trunk/i386/libsaio/acpi_patcher.c
1717
1818
1919
20
20
2121
2222
23
23
2424
25
25
2626
27
27
2828
2929
3030
......
117117
118118
119119
120
120
121121
122122
123123
......
140140
141141
142142
143
143
144144
145145
146146
147147
148148
149
149
150150
151151
152152
153153
154
154
155155
156156
157157
......
218218
219219
220220
221
221
222222
223223
224224
......
231231
232232
233233
234
234
235235
236236
237237
......
287287
288288
289289
290
290
291291
292292
293293
......
295295
296296
297297
298
298
299299
300
300
301301
302302
303303
......
322322
323323
324324
325
325
326326
327327
328328
......
330330
331331
332332
333
333334
334335
335336
......
371372
372373
373374
375
374376
375
376
377
378
379
377380
378381
379382
......
413416
414417
415418
416
419
417420
418421
419422
......
426429
427430
428431
429
432
430433
431434
432435
......
438441
439442
440443
441
444
442445
443446
444447
......
460463
461464
462465
463
466
464467
465468
466469
467470
468471
469
472
470473
471474
472475
473476
474477
475478
476
477
479
480
478481
479482
480483
......
488491
489492
490493
491
494
492495
493496
494497
495
498
496499
497500
498501
......
539542
540543
541544
542
545
543546
544547
545548
546549
547
550
548551
549552
550553
551554
552
555
553556
554557
555558
556559
557
560
558561
559562
560563
......
565568
566569
567570
568
571
569572
570573
571574
......
591594
592595
593596
594
597
595598
596599
597600
598601
599602
600
603
601604
602605
603606
604607
605
608
606609
607610
608
611
609612
610613
611614
......
614617
615618
616619
617
620
618621
619622
620623
621624
622
625
623626
624627
625628
626629
627630
628631
629
632
630633
631634
632635
......
644647
645648
646649
650
651
652
653
654
655
647656
648657
649
650
658
659
651660
652661
653662
......
670679
671680
672681
673
682
674683
675684
676685
......
682691
683692
684693
685
694
686695
687696
688697
689698
690699
691700
692
701
693702
694703
695704
696705
697706
698707
699
708
700709
701710
702711
703712
704
713
705714
706715
707716
708
717
709718
710719
711720
712721
713
722
714723
715724
716725
......
726735
727736
728737
729
738
730739
731740
732741
#ifndef DEBUG_ACPI
#define DEBUG_ACPI 0
#endif
#endif
#if DEBUG_ACPI==2
#define DBG(x...) {printf(x); sleep(1);}
#define DBG(x...) {printf(x); sleep(1);}
#elif DEBUG_ACPI==1
#define DBG(x...) printf(x)
#define DBG(x...) printf(x)
#else
#define DBG(x...) msglog(x)
#define DBG(x...) msglog(x)
#endif
// Slice: New signature compare function
if (fd < 0)
{
// NOT FOUND:
DBG("ACPI Table not found: %s\n", filename);
DBG("\tACPI Table not found: %s\n", filename);
*dirSpec = '\0';
}
}
{
if (read(fd, tableAddr, file_size(fd)) != file_size(fd))
{
DBG("Couldn't read table %s\n", dirspec);
DBG("\tCouldn't read table %s\n", dirspec);
free(tableAddr);
close(fd);
return NULL;
}
DBG("Table %s read and stored at: %x\n", dirspec, tableAddr);
DBG("\tTable %s read and stored at: %x\n", dirspec, tableAddr);
close(fd);
return tableAddr;
}
close(fd);
DBG("Couldn't allocate memory for table: %s.\n", dirspec);
DBG("\tCouldn't allocate memory for table: %s.\n", dirspec);
}
//printf("Couldn't find table %s\n", filename);
return NULL;
{
Platform.Type = 1;/* Set a fixed value (Desktop) */
}
DBG("Error: system-type must be 0..6. Defaulting to %d !\n", Platform.Type);
DBG("\tError: system-type must be 0..6. Defaulting to %d !\n", Platform.Type);
}
else
{
if (value)
{
// user has overriden the SystemType so take care of it in FACP
DBG("FADT: changing PM_Profile from 0x%02x to 0x%02x\n", fadt_mod->PM_Profile, Platform.Type);
DBG("\tFADT: changing PM_Profile from 0x%02x to 0x%02x\n", fadt_mod->PM_Profile, Platform.Type);
fadt_mod->PM_Profile = Platform.Type;
}
else
// Patch DSDT address if we have loaded DSDT.aml
if (new_dsdt)
{
DBG("DSDT: Old @%x,%x, ",fadt_mod->DSDT,fadt_mod->X_DSDT);
DBG("\tDSDT: Old @%x,%x, ",fadt_mod->DSDT,fadt_mod->X_DSDT);
fadt_mod->DSDT = (uint32_t)new_dsdt;
if ((uint32_t)(&(fadt_mod->X_DSDT)) - (uint32_t)fadt_mod + 8<=fadt_mod->Length)
fadt_mod->X_DSDT = (uint32_t)new_dsdt;
}
DBG("New @%x,%x\n",fadt_mod->DSDT,fadt_mod->X_DSDT);
DBG("\tNew @%x,%x\n",fadt_mod->DSDT,fadt_mod->X_DSDT);
DBG("FADT: Using custom DSDT!\n");
DBG("\tFADT: Using custom DSDT!\n");
}
// Correct the checksum
}
else
{
DBG("No ACPI 2.\n");
DBG("\tNo ACPI 2.\n");
}
return 1;
}
/* Setup ACPI. Replace DSDT if DSDT.aml is found */
int setupAcpi(void)
{
verbose("[ ACPI PATCHER ]\n");
int version;
void *new_dsdt = NULL;
getBoolForKey(kDropSSDT, &drop_ssdt, &bootInfo->chameleonConfig);
getBoolForKey(kGeneratePStates, &generate_pstates, &bootInfo->chameleonConfig);
getBoolForKey(kGenerateCStates, &generate_cstates, &bootInfo->chameleonConfig);
//getBoolForKey(kGenerateTStates, &generate_tstates, &bootInfo->chameleonConfig);
DBG("Generating P-States config: %s\n", generate_pstates ? "YES" : "NO");
DBG("Generating C-States config: %s\n", generate_cstates ? "YES" : "NO");
DBG("\tGenerating P-States config: %s\n", generate_pstates ? "Yes" : "No");
DBG("\tGenerating C-States config: %s\n", generate_cstates ? "Yes" : "No");
//DBG("Generating T-States config: %s\n", generate_tstates ? "Yes" : "No");
{
int i;
rsdp = (struct acpi_2_rsdp *)(version ? getAddressOfAcpi20Table() : getAddressOfAcpiTable());
if (!rsdp)
{
DBG("No ACPI version %d found. Ignoring\n", version+1);
DBG("\tNo ACPI version %d found. Ignoring\n", version+1);
if (version)
{
addConfigurationTable(&gEfiAcpi20TableGuid, NULL, "ACPI_20");
}
rsdplength = version ? rsdp->Length : 20;
DBG("RSDP version %d found @%x. Length=%d\n",version+1,rsdp,rsdplength);
DBG("\tRSDP version %d found @%x. Length=%d\n",version+1,rsdp,rsdplength);
/* FIXME: no check that memory allocation succeeded
* Copy and patch RSDP,RSDT, XSDT and FADT
rsdt = (struct acpi_2_rsdt *)rsdp->RsdtAddress;
DBG("RSDT @%x, Length %d\n",rsdt, rsdt ? rsdt->Length : 0);
DBG("\tRSDT @%x, Length %d\n",rsdt, rsdt ? rsdt->Length : 0);
if (rsdt && (uint32_t)rsdt !=0xffffffff && rsdt->Length < 0x10000)
{
continue;
}
DBG("TABLE %c%c%c%c,",table[0],table[1],table[2],table[3]);
DBG("\tTABLE %c%c%c%c,",table[0],table[1],table[2],table[3]);
rsdt_entries[i-dropoffset]=rsdt_entries[i];
if (drop_ssdt && tableSign(table, "SSDT"))
{
DBG("OEM SSDT tables was dropped\n");
DBG("\tOEM SSDT tables was dropped\n");
dropoffset++;
continue;
}
if (tableSign(table, "DSDT"))
{
DBG("DSDT found\n");
DBG("Custom DSDT table was found\n");
DBG("\tDSDT found\n");
DBG("\tCustom DSDT table was found\n");
if(new_dsdt)
{
rsdt_entries[i-dropoffset] = (uint32_t)new_dsdt;
struct acpi_2_fadt *fadt, *fadt_mod;
fadt=(struct acpi_2_fadt *)rsdt_entries[i];
DBG("FADT found @%x, Length %d\n",fadt, fadt->Length);
DBG("\tFADT found @%x, Length %d\n",fadt, fadt->Length);
if (!fadt || (uint32_t)fadt == 0xffffffff || fadt->Length>0x10000)
{
DBG("FADT incorrect. Not modified\n");
DBG("\tFADT incorrect. Not modified\n");
continue;
}
rsdt_entries[i-dropoffset+j] = (uint32_t)new_ssdt[j];
}
DBG("RSDT: Added %d SSDT table(s)\n", ssdt_count);
DBG("\tRSDT: Added %d SSDT table(s)\n", ssdt_count);
}
// Correct the checksum of RSDT
DBG("RSDT: Original checksum %d, ", rsdt_mod->Checksum);
DBG("\tRSDT: Original checksum %d, ", rsdt_mod->Checksum);
rsdt_mod->Checksum=0;
rsdt_mod->Checksum=256-checksum8(rsdt_mod,rsdt_mod->Length);
DBG("New checksum %d at %x\n", rsdt_mod->Checksum,rsdt_mod);
DBG("\tNew checksum %d at %x\n", rsdt_mod->Checksum,rsdt_mod);
}
else
{
rsdp_mod->RsdtAddress=0;
DBG("RSDT not found or RSDT incorrect\n");
DBG("\tRSDT not found or RSDT incorrect\n");
}
DBG("\n");
// FIXME: handle 64-bit address correctly
xsdt=(struct acpi_2_xsdt*) ((uint32_t)rsdp->XsdtAddress);
DBG("XSDT @%x;%x, Length=%d\n", (uint32_t)(rsdp->XsdtAddress>>32),(uint32_t)rsdp->XsdtAddress, xsdt->Length);
DBG("\tXSDT @%x;%x, Length=%d\n", (uint32_t)(rsdp->XsdtAddress>>32),(uint32_t)rsdp->XsdtAddress, xsdt->Length);
if (xsdt && (uint64_t)rsdp->XsdtAddress<0xffffffff && xsdt->Length<0x10000)
{
if (drop_ssdt && tableSign(table, "SSDT"))
{
DBG("OEM SSDT tables was dropped\n");
DBG("\tOEM SSDT tables was dropped\n");
dropoffset++;
continue;
}
if (tableSign(table, "DSDT"))
{
DBG("DSDT found\n");
DBG("\tDSDT found\n");
if (new_dsdt)
{
xsdt_entries[i-dropoffset] = (uint32_t)new_dsdt;
DBG("custom table added.\n");
DBG("\tcustom table added.\n");
}
DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
DBG("\tTABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
continue;
}
struct acpi_2_fadt *fadt, *fadt_mod;
fadt=(struct acpi_2_fadt *)(uint32_t)xsdt_entries[i];
DBG("FADT found @%x%x, Length %d\n",(uint32_t)(xsdt_entries[i]>>32),fadt,
DBG("\tFADT found @%x%x, Length %d\n",(uint32_t)(xsdt_entries[i]>>32),fadt,
fadt->Length);
if (!fadt || (uint64_t)xsdt_entries[i] >= 0xffffffff || fadt->Length>0x10000)
{
DBG("FADT incorrect or after 4GB. Dropping XSDT\n");
DBG("\tFADT incorrect or after 4GB. Dropping XSDT\n");
goto drop_xsdt;
}
fadt_mod = patch_fadt(fadt, new_dsdt);
xsdt_entries[i - dropoffset] = (uint32_t)fadt_mod;
// DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
// DBG("\tTABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
// Generate _CST SSDT
if (generate_cstates && (new_ssdt[ssdt_count] = generate_cst_ssdt(fadt_mod)))
ssdt_count++;
}
// Generating _TSS SSDT
/*if (generate_tstates && (new_ssdt[ssdt_count] = generate_tss_ssdt((void*)fadt_mod->DSDT)))
{
generate_tstates = false; // Generate SSDT only once!
ssdt_count++;
}*/
continue;
}
DBG("copied (OEM)\n");
// DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
DBG("\tcopied (OEM)\n");
// DBG("\tTABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
}
// Allocate xsdt in Kernel memory area
xsdt_entries[i - dropoffset + j] = (uint32_t)new_ssdt[j];
}
verbose("Added %d SSDT table(s) into XSDT\n", ssdt_count);
verbose("\tAdded %d SSDT table(s) into XSDT\n", ssdt_count);
}
{
drop_xsdt:
DBG("About to drop XSDT\n");
DBG("\tAbout to drop XSDT\n");
/*FIXME: Now we just hope that if MacOS doesn't find XSDT it reverts to RSDT.
* A Better strategy would be to generate
*/
rsdp_mod->XsdtAddress=0xffffffffffffffffLL;
verbose("XSDT not found or XSDT incorrect\n");
verbose("\tXSDT not found or XSDT incorrect\n");
}
}
DBG("\n");
// Correct the checksum of RSDP
DBG("RSDP: Original checksum %d, ", rsdp_mod->Checksum);
DBG("\tRSDP: Original checksum %d, ", rsdp_mod->Checksum);
rsdp_mod->Checksum=0;
rsdp_mod->Checksum=256-checksum8(rsdp_mod,20);
DBG("New checksum %d\n", rsdp_mod->Checksum);
DBG("\tNew checksum %d\n", rsdp_mod->Checksum);
if (version)
{
DBG("RSDP: Original extended checksum %d, ", rsdp_mod->ExtendedChecksum);
DBG("\tRSDP: Original extended checksum %d, ", rsdp_mod->ExtendedChecksum);
rsdp_mod->ExtendedChecksum=0;
rsdp_mod->ExtendedChecksum=256-checksum8(rsdp_mod,rsdp_mod->Length);
DBG("New extended checksum %d\n", rsdp_mod->ExtendedChecksum);
DBG("\tNew extended checksum %d\n", rsdp_mod->ExtendedChecksum);
}
acpi10_p = (uint64_t)(uint32_t)rsdp_mod;
addConfigurationTable(&gEfiAcpiTableGuid, &acpi10_p, "ACPI");
}
DBG("ACPI version %d patching finished\n\n", version + 1);
DBG("\tACPI version %d patching finished\n\n", version + 1);
}
#if DEBUG_ACPI
printf("Press a key to continue... (DEBUG_ACPI)\n");
trunk/i386/libsaio/spd.c
1616
1717
1818
19
19
2020
2121
2222
23
23
2424
25
25
2626
2727
2828
......
401401
402402
403403
404
404405
405406
406
407
407408
408409
409410
#include "memvendors.h"
#ifndef DEBUG_SPD
#define DEBUG_SPD 0
#define DEBUG_SPD 0
#endif
#if DEBUG_SPD
#define DBG(x...)printf(x)
#define DBG(x...)printf(x)
#else
#define DBG(x...)msglog(x)
#define DBG(x...)msglog(x)
#endif
static const char *spd_memory_types[] =
case 99:freq++; break;
}
slot->Frequency = freq;
DBG("RAM speed %dMHz \n", freq);
}
verbose("Slot: %d Type %d %dMB (%s) %dMHz Vendor=%s\n PartNo=%s SerialNo=%s\n",
verbose("\tSlot: %d Type %d %dMB (%s) %dMHz Vendor=%s\n\t\tPartNo=%s SerialNo=%s\n",
i,
(int)slot->Type,
slot->ModuleSize,
trunk/i386/libsaio/networking.c
1212
1313
1414
15
16
15
16
17
18
19
20
21
1722
1823
19
24
2025
2126
2227
2328
2429
30
31
32
33
34
35
36
37
38
39
2540
2641
2742
2843
2944
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
6145
6246
6347
......
296280
297281
298282
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357283
358284
359285
......
416342
417343
418344
419
345
346
420347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
421416
422417
423418
......
466461
467462
468463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
#include "device_inject.h"
#include "networking.h"
#ifndef DEBUG_NETWORKING
#define DEBUG_NETWORKING 0
#define STRINGIFY(x) #x
#define TOSTRING(x) STRINGIFY(x)
#define HEADER __FILE__ " [" TOSTRING(__LINE__) "]: "
#ifndef DEBUG_ETHERNET
#define DEBUG_ETHERNET 0
#endif
#if DEBUG_NETWORKING
#if DEBUG_ETHERNET
#define DBG(x...)printf(x)
#else
#define DBG(x...)
#endif
#ifndef DEBUG_WLAN
#define DEBUG_WLAN 0
#endif
#if DEBUG_WLAN
#define DBG(x...)printf(x)
#else
#define DBG(x...)
#endif
uint32_t builtin_set= 0;
uint8_t builtin= 0;
extern uint32_t devices_number;
//extern uint32_t onboard_number;
int devprop_add_network_template(DevPropDevice *device, uint16_t vendor_id)
{
builtin = 0;
if(device)
{
if((vendor_id != PCI_VENDOR_ID_ATHEROS) && (builtin_set == 0))
{
builtin_set = 1;
builtin = 0x01;
}
if(!devprop_add_value(device, "built-in", (uint8_t *)&builtin, 1))
{
return 0;
}
if(!devprop_add_value(device, "device_type", (uint8_t *)"ethernet", sizeof("ethernet")))
{
return 0;
}
devices_number++;
return 1;
}
else
{
return 0;
}
}
static network_device known_ethernet_cards[] =
{
{ PCI_VENDOR_ID_INTEL, 0x0000, "Intel(R) Ethernet Controller" },
};
char *get_ethernet_model(uint32_t vendor_id, uint32_t device_id)
{
int i = 0;
for( ; i < sizeof(known_ethernet_cards) / sizeof(known_ethernet_cards[0]); i++)
{
if(vendor_id == known_ethernet_cards[i].vendor_id && device_id == known_ethernet_cards[i].device_id)
{
return known_ethernet_cards[i].model;
}
}
i = 0;
for ( ; i < sizeof(generic_ethernet_cards) / sizeof(generic_ethernet_cards[0]); i++)
{
if (vendor_id == generic_ethernet_cards[i].vendor_id)
{
return generic_ethernet_cards[i].model;
}
}
return generic_ethernet_cards[0].model;
}
void setup_eth_builtin(pci_dt_t *eth_dev)
{
char *devicepath= get_pci_dev_path(eth_dev);
char *name_model= NULL;
DevPropDevice *device = (DevPropDevice *)malloc(sizeof(DevPropDevice));
verbose("LAN Controller [%04x:%04x] :: %s\n", eth_dev->vendor_id, eth_dev->device_id, devicepath);
if (!string)
{
string = devprop_create_string();
if (!string)
{
return;
}
}
device = devprop_add_device(string, devicepath);
if(device)
{
verbose("Setting up lan keys\n");
name_model = get_ethernet_model(eth_dev->vendor_id, eth_dev->device_id);
devprop_add_network_template(device, eth_dev->vendor_id);
devprop_add_value(device, "model", (uint8_t *)name_model, (strlen(name_model) + 1));
devprop_add_value(device, "device_type", (uint8_t *)"ethernet", sizeof("ethernet"));
stringdata = (uint8_t*)malloc(sizeof(uint8_t) * string->length);
if(stringdata)
{
memcpy(stringdata, (uint8_t *)devprop_generate_string(string), string->length);
stringlength = string->length;
}
}
}
static network_device known_wifi_cards[] =
{
// Broadcom
//{PCI_VENDOR_ID_ATHEROS, 0x0037, "Atheros AR9485 Wireless Network Adapter"},
};
void setup_wifi_airport(pci_dt_t *wlan_dev) // ARPT
int devprop_add_network_template(DevPropDevice *device, uint16_t vendor_id)
{
builtin = 0;
if(device)
{
if((vendor_id != PCI_VENDOR_ID_ATHEROS ) && ( builtin_set == 0 ))
{
builtin_set = 1;
builtin = 0x01;
}
if(!devprop_add_value(device, "built-in", (uint8_t *)&builtin, 1))
{
return 0;
}
if(!devprop_add_value(device, "device_type", (uint8_t *)"ethernet", sizeof("ethernet")))
{
return 0;
}
devices_number++;
return 1;
}
else
{
return 0;
}
}
void setup_eth_devdrop(pci_dt_t *eth_dev)
{
char *devicepath= get_pci_dev_path(eth_dev);
char *name_model= NULL;
DevPropDevice *device = (DevPropDevice *)malloc(sizeof(DevPropDevice));
verbose("LAN Controller [%04x:%04x] :: %s\n", eth_dev->vendor_id, eth_dev->device_id, devicepath);
if (!string)
{
string = devprop_create_string();
if (!string)
{
return;
}
}
device = devprop_add_device(string, devicepath);
if(device)
{
verbose("Setting up lan keys\n");
name_model = get_ethernet_model(eth_dev->vendor_id, eth_dev->device_id);
devprop_add_network_template(device, eth_dev->vendor_id);
devprop_add_value(device, "model", (uint8_t *)name_model, (strlen(name_model) + 1));
devprop_add_value(device, "device_type", (uint8_t *)"ethernet", sizeof("ethernet"));
stringdata = (uint8_t*)malloc(sizeof(uint8_t) * string->length);
if(stringdata)
{
memcpy(stringdata, (uint8_t *)devprop_generate_string(string), string->length);
stringlength = string->length;
}
}
}
void setup_wifi_devdrop(pci_dt_t *wlan_dev) // ARPT
{
char tmp[16];
builtin = 0;
DevPropDevice *device ;
}
}
}
char *get_ethernet_model(uint32_t vendor_id, uint32_t device_id)
{
int i = 0;
for( ; i < sizeof(known_ethernet_cards) / sizeof(known_ethernet_cards[0]); i++)
{
if(vendor_id == known_ethernet_cards[i].vendor_id && device_id == known_ethernet_cards[i].device_id)
{
return known_ethernet_cards[i].model;
}
}
i = 0;
for ( ; i < sizeof(generic_ethernet_cards) / sizeof(generic_ethernet_cards[0]); i++)
{
if (vendor_id == generic_ethernet_cards[i].vendor_id)
{
return generic_ethernet_cards[i].model;
}
}
return generic_ethernet_cards[0].model;
}
trunk/i386/libsaio/networking.h
88
99
1010
11
12
11
12
13
1314
15
1416
1517
1618
#ifndef __LIBSAIO_NETWORKING_H
#define __LIBSAIO_NETWORKING_H
void setup_eth_builtin(pci_dt_t *eth_dev);
void setup_wifi_airport(pci_dt_t *wlan_dev);
void setup_eth_devdrop(pci_dt_t *eth_dev);
void setup_wifi_devdrop(pci_dt_t *wlan_dev);
char *get_ethernet_model(uint32_t vendor_id, uint32_t device_id);
char *get_wlan_model(uint32_t vendor_id, uint32_t device_id);
struct network_device;
typedef struct {
trunk/i386/libsaio/gma.c
462462
463463
464464
465
466
467
468
469
465
470466
467
468
469
471470
472471
473472
......
476475
477476
478477
479
478
480479
481480
482481
......
581580
582581
583582
584
585
583
584
586585
587586
588587
......
623622
624623
625624
626
627
625
626
628627
629628
630629
......
655654
656655
657656
658
659
657
658
660659
661660
662661
......
690689
691690
692691
693
694
692
693
695694
696695
697696
......
724723
725724
726725
727
728
726
727
729728
730729
731730
......
734733
735734
736735
737
736
738737
739738
740739
741740
742
741
743742
744743
745744
......
761760
762761
763762
764
765
763
764
766765
767766
768767
......
786785
787786
788787
789
788
790789
791790
792791
793
792
794793
795794
796795
......
840839
841840
842841
843
844
842
843
845844
846845
847846
......
850849
851850
852851
853
852
854853
855854
856855
857856
858
857
859858
860859
861860
......
911910
912911
913912
914
915
913
914
916915
917916
918917
......
921920
922921
923922
924
923
925924
926925
927926
928927
929
928
930929
931930
932931
......
948947
949948
950949
951
950
952951
953952
954953
955954
956
957955
958956
959957
model = get_gma_controller_name(device_id, vendor_id);
verbose("---------------------------------------------\n");
verbose("------------ INTEL DEVICE INFO --------------\n");
verbose("---------------------------------------------\n");
verbose("Class code: [%04x]\n%s [%04x:%04x] (rev %02x)\nSubsystem: [%04x:%04x] :: %s\n",
gma_dev->class_id, model, gma_dev->vendor_id, gma_dev->device_id, gma_dev->revision_id, gma_dev->subsys_id.subsys.vendor_id, gma_dev->subsys_id.subsys.device_id, devicepath);
verbose("\tClass code: [%04x]\n", gma_dev->class_id);
verbose("\t%s [%04x:%04x] (rev %02x)\nSubsystem: [%04x:%04x] :: %s\n",
model, gma_dev->vendor_id, gma_dev->device_id, gma_dev->revision_id, gma_dev->subsys_id.subsys.vendor_id, gma_dev->subsys_id.subsys.device_id, devicepath);
if (!string)
{
string = devprop_create_string();
struct DevPropDevice *device = devprop_add_device(string, devicepath);
if (!device)
{
printf("[setup_gma_devprop] Failed initializing dev-prop string dev-entry!\n");
printf("\t[setup_gma_devprop] Failed initializing dev-prop string dev-entry!\n");
pause();
return false;
}
{
memcpy(default_aapl_snb, new_aapl0, AAPL_LEN_SNB);
verbose("Using user supplied AAPL,snb-platform-id\n");
verbose("AAPL,snb-platform-id: %02x%02x%02x%02x\n",
verbose("\tUsing user supplied AAPL,snb-platform-id\n");
verbose("\tAAPL,snb-platform-id: %02x%02x%02x%02x\n",
default_aapl_snb[0], default_aapl_snb[1], default_aapl_snb[2], default_aapl_snb[3]);
}
devprop_add_value(device, "AAPL,snb-platform-id", default_aapl_snb, AAPL_LEN_SNB);
{
memcpy(default_aapl_snb, new_aapl0, AAPL_LEN_SNB);
verbose("Using user supplied AAPL,snb-platform-id\n");
verbose("AAPL,snb-platform-id: %02x%02x%02x%02x\n",
verbose("\tUsing user supplied AAPL,snb-platform-id\n");
verbose("\tAAPL,snb-platform-id: %02x%02x%02x%02x\n",
default_aapl_snb[0], default_aapl_snb[1], default_aapl_snb[2], default_aapl_snb[3]);
}
devprop_add_value(device, "AAPL,snb-platform-id", default_aapl_snb, AAPL_LEN_SNB);
{
memcpy(default_aapl_snb, new_aapl0, AAPL_LEN_SNB);
verbose("Using user supplied AAPL,snb-platform-id\n");
verbose("AAPL,snb-platform-id: %02x%02x%02x%02x\n",
verbose("\tUsing user supplied AAPL,snb-platform-id\n");
verbose("\tAAPL,snb-platform-id: %02x%02x%02x%02x\n",
default_aapl_snb[0], default_aapl_snb[1], default_aapl_snb[2], default_aapl_snb[3]);
}
devprop_add_value(device, "AAPL,snb-platform-id", default_aapl_snb, AAPL_LEN_SNB);
{
memcpy(default_aapl_snb, new_aapl0, AAPL_LEN_SNB);
verbose("Using user supplied AAPL,snb-platform-id\n");
verbose("AAPL,snb-platform-id: %02x%02x%02x%02x\n",
verbose("\tUsing user supplied AAPL,snb-platform-id\n");
verbose("\tAAPL,snb-platform-id: %02x%02x%02x%02x\n",
default_aapl_snb[0], default_aapl_snb[1], default_aapl_snb[2], default_aapl_snb[3]);
}
devprop_add_value(device, "AAPL,snb-platform-id", default_aapl_snb, AAPL_LEN_SNB);
{
memcpy(default_aapl_ivy, new_aapl0, AAPL_LEN_IVY);
verbose("Using user supplied AAPL,ig-platform-id\n");
verbose("AAPL,ig-platform-id: %02x%02x%02x%02x\n",
verbose("\tUsing user supplied AAPL,ig-platform-id\n");
verbose("\tAAPL,ig-platform-id: %02x%02x%02x%02x\n",
default_aapl_ivy[0], default_aapl_ivy[1], default_aapl_ivy[2], default_aapl_ivy[3]);
}
devprop_add_value(device, "AAPL,ig-platform-id", default_aapl_ivy, AAPL_LEN_IVY);
{
if ((n_igs >= 0) || (n_igs <= 11))
{
verbose("AAPL,ig-platform-id was set in org.chameleon.Boot.plist with value %d\n", n_igs);
verbose("\tAAPL,ig-platform-id was set in org.chameleon.Boot.plist with value %d\n", n_igs);
devprop_add_value(device, "AAPL,ig-platform-id", ivy_bridge_ig_vals[n_igs], 4);
}
else
{
verbose("AAPL,ig-platform-id was set in org.chameleon.Boot.plist with bad value please choose a number between 0 and 11.\n");
verbose("\tAAPL,ig-platform-id was set in org.chameleon.Boot.plist with bad value please choose a number between 0 and 11.\n");
}
}
else
break;
default:
printf("Please specify 96, 64, or 32MB RAM for the HD4000 in the bios.\n"
"The selected %dMB RAM configuration is not supported for the HD4000.\n", ram);
printf("\tPlease specify 96, 64, or 32MB RAM for the HD4000 in the bios.\n"
"\tThe selected %dMB RAM configuration is not supported for the HD4000.\n", ram);
pause();
return false;// Exit early before the AAPL,ig-platform-id property is set.
break;
case GMA_HASWELL_ULT_M_GT2: // 0a16
case GMA_HASWELL_ULT_E_GT2: // 0a1e
verbose("Injecting a valid desktop GPU device id (0x0412) instead of patching kexts.\n");
verbose("\tInjecting a valid desktop GPU device id (0x0412) instead of patching kexts.\n");
device_id = 0x00000412;// Inject a valid desktop GPU device id (0x0412) instead of patching kexts
devprop_add_value(device, "vendor-id",(uint8_t *)INTEL_VENDORID, 4);
devprop_add_value(device, "device-id",(uint8_t *)&device_id, sizeof(device_id));
verbose("Injeting done: was [%04x:%04x] now is [%04x:%04x]\n", gma_dev->vendor_id, gma_dev->device_id, gma_dev->vendor_id, device_id);
verbose("\tInjeting done: was [%04x:%04x] now is [%04x:%04x]\n", gma_dev->vendor_id, gma_dev->device_id, gma_dev->vendor_id, device_id);
case GMA_HASWELL_D_GT1: // 0402
case GMA_HASWELL_M_GT1: // 0406
{
memcpy(default_aapl_haswell, new_aapl0, AAPL_LEN_HSW);
verbose("Using user supplied AAPL,ig-platform-id\n");
verbose("AAPL,ig-platform-id: %02x%02x%02x%02x\n",
verbose("\tUsing user supplied AAPL,ig-platform-id\n");
verbose("\tAAPL,ig-platform-id: %02x%02x%02x%02x\n",
default_aapl_haswell[0], default_aapl_haswell[1], default_aapl_haswell[2], default_aapl_haswell[3]);
}
devprop_add_value(device, "AAPL,ig-platform-id", default_aapl_haswell, AAPL_LEN_HSW);
{
if ((n_igs >= 0) || (n_igs <= 16))
{
verbose("AAPL,ig-platform-id was set in org.chameleon.Boot.plist with value %d\n", n_igs);
verbose("\tAAPL,ig-platform-id was set in org.chameleon.Boot.plist with value %d\n", n_igs);
devprop_add_value(device, "AAPL,ig-platform-id", haswell_ig_vals[n_igs], 4);
}
else
{
verbose("AAPL,ig-platform-id was set in org.chameleon.Boot.plist with bad value please choose a number between 0 and 16.\n");
verbose("\tAAPL,ig-platform-id was set in org.chameleon.Boot.plist with bad value please choose a number between 0 and 16.\n");
}
}
else
{
memcpy(default_aapl_broadwell, new_aapl0, AAPL_LEN_BDW);
verbose("Using user supplied AAPL,ig-platform-id\n");
verbose("AAPL,ig-platform-id: %02x%02x%02x%02x\n",
verbose("\tUsing user supplied AAPL,ig-platform-id\n");
verbose("\tAAPL,ig-platform-id: %02x%02x%02x%02x\n",
default_aapl_broadwell[0], default_aapl_broadwell[1], default_aapl_broadwell[2], default_aapl_broadwell[3]);
}
devprop_add_value(device, "AAPL,ig-platform-id", default_aapl_broadwell, AAPL_LEN_BDW);
{
if ((n_igs >= 0) || (n_igs <= 19))
{
verbose("AAPL,ig-platform-id was set in org.chameleon.Boot.plist with value %d\n", n_igs);
verbose("\tAAPL,ig-platform-id was set in org.chameleon.Boot.plist with value %d\n", n_igs);
devprop_add_value(device, "AAPL,ig-platform-id", broadwell_ig_vals[n_igs], 4);
}
else
{
verbose("AAPL,ig-platform-id was set in org.chameleon.Boot.plist with bad value please choose a number between 0 and 18.\n");
verbose("\tAAPL,ig-platform-id was set in org.chameleon.Boot.plist with bad value please choose a number between 0 and 18.\n");
}
}
else
stringdata = malloc(sizeof(uint8_t) * string->length);
if (!stringdata)
{
printf("[setup_gma_devprop] No stringdata!\n");
printf("\t[setup_gma_devprop] No stringdata!\n");
pause();
return false;
}
verbose("---------------------------------------------\n");
memcpy(stringdata, (uint8_t *)devprop_generate_string(string), string->length);
stringlength = string->length;
trunk/i386/libsaio/usb.c
1313
1414
1515
16
16
1717
1818
1919
20
20
2121
22
22
2323
2424
2525
......
3939
4040
4141
42
42
4343
4444
4545
......
8080
8181
8282
83
83
8484
8585
8686
......
124124
125125
126126
127
127
128128
129129
130130
......
138138
139139
140140
141
141
142142
143143
144144
145145
146146
147
147
148148
149149
150150
......
156156
157157
158158
159
159
160160
161161
162
162
163163
164164
165165
......
168168
169169
170170
171
171
172172
173
173
174174
175175
176176
......
196196
197197
198198
199
199
200200
201
201
202202
203203
204204
......
219219
220220
221221
222
222
223223
224224
225225
......
235235
236236
237237
238
238
239239
240240
241241
242242
243243
244
244
245245
246246
247247
......
251251
252252
253253
254
255
254
255
256256
257257
258258
......
265265
266266
267267
268
268
269269
270270
271271
......
273273
274274
275275
276
276
277277
278278
279279
......
288288
289289
290290
291
292
293
291
292
293
294294
295295
296296
297297
298298
299299
300
300
301301
302302
303303
......
314314
315315
316316
317
317
318318
319319
320320
321
321
322322
323323
324324
325
325
326326
327327
328328
......
333333
334334
335335
336
336
337337
338338
339339
......
353353
354354
355355
356
356
357357
358358
359359
......
363363
364364
365365
366
366
367367
368368
369369
......
372372
373373
374374
375
375
376376
377377
378378
......
380380
381381
382382
383
383
384384
385385
386386
......
392392
393393
394394
395
395
396396
397397
398398
......
414414
415415
416416
417
417
418418
419419
420420
......
438438
439439
440440
441
441
442442
443443
#include "pci.h"
#ifndef DEBUG_USB
#define DEBUG_USB 0
#define DEBUG_USB 0
#endif
#if DEBUG_USB
#define DBG(x...)printf(x)
#define DBG(x...)printf(x)
#else
#define DBG(x...)
#define DBG(x...)
#endif
// Add usb device to the list
void notify_usb_dev(pci_dt_t *pci_dev)
{
struct pciList* current = usbList;
struct pciList *current = usbList;
if(!usbList)
{
usbList = (struct pciList*)malloc(sizeof(struct pciList));
getBoolForKey(kLegacyOff, &fix_legacy, &bootInfo->chameleonConfig);
}
struct pciList* current = usbList;
struct pciList *current = usbList;
while(current)
{
int isOSowned;
int isBIOSowned;
verbose("Setting Legacy USB Off on controller [%04x:%04x] at %02x:%2x.%x\n",
verbose("\tSetting Legacy USB Off on controller [%04x:%04x] at %02x:%2x.%x\n",
pci_dev->vendor_id, pci_dev->device_id,
pci_dev->dev.bits.bus, pci_dev->dev.bits.dev, pci_dev->dev.bits.func);
// eecp = EHCI Extended Capabilities offset = capaddr HCCPARAMS bits 15:8
eecp=*((unsigned char*)(capaddr + 9));
DBG("capaddr=%x opaddr=%x eecp=%x\n", capaddr, opaddr, eecp);
DBG("\tcapaddr=%x opaddr=%x eecp=%x\n", capaddr, opaddr, eecp);
usbcmd = *((unsigned int*)(opaddr));// Command Register
usbsts = *((unsigned int*)(opaddr + 4));// Status Register
usbintr = *((unsigned int*)(opaddr + 8));// Interrupt Enable Register
DBG("usbcmd=%08x usbsts=%08x usbintr=%08x\n", usbcmd, usbsts, usbintr);
DBG("\tusbcmd=%08x usbsts=%08x usbintr=%08x\n", usbcmd, usbsts, usbintr);
// read PCI Config 32bit USBLEGSUP (eecp+0)
usblegsup = pci_config_read32(pci_dev->dev.addr, eecp);
// read PCI Config 32bit USBLEGCTLSTS (eecp+4)
usblegctlsts = pci_config_read32(pci_dev->dev.addr, eecp + 4);
DBG("usblegsup=%08x isOSowned=%d isBIOSowned=%d usblegctlsts=%08x\n", usblegsup, isOSowned, isBIOSowned, usblegctlsts);
DBG("\tusblegsup=%08x isOSowned=%d isBIOSowned=%d usblegctlsts=%08x\n", usblegsup, isOSowned, isBIOSowned, usblegctlsts);
// Reset registers to Legacy OFF
DBG("Clearing USBLEGCTLSTS\n");
DBG("\tClearing USBLEGCTLSTS\n");
pci_config_write32(pci_dev->dev.addr, eecp + 4, 0);//usblegctlsts
delay(100000);
usbsts = *((unsigned int*)(opaddr + 4));
usbintr = *((unsigned int*)(opaddr + 8));
DBG("usbcmd=%08x usbsts=%08x usbintr=%08x\n", usbcmd, usbsts, usbintr);
DBG("\tusbcmd=%08x usbsts=%08x usbintr=%08x\n", usbcmd, usbsts, usbintr);
DBG("Clearing Registers\n");
DBG("\tClearing Registers\n");
// clear registers to default
usbcmd = (usbcmd & 0xffffff00);
// read 32bit USBLEGCTLSTS (eecp+4)
usblegctlsts = pci_config_read32(pci_dev->dev.addr, eecp + 4);
DBG("usblegsup=%08x isOSowned=%d isBIOSowned=%d usblegctlsts=%08x\n", usblegsup, isOSowned, isBIOSowned, usblegctlsts);
DBG("\tusblegsup=%08x isOSowned=%d isBIOSowned=%d usblegctlsts=%08x\n", usblegsup, isOSowned, isBIOSowned, usblegctlsts);
verbose("Legacy USB Off Done\n");
verbose("\tLegacy USB Off Done\n");
return 1;
}
pci_config_write16(pci_dev->dev.addr, 0x04, 0x0002);
base = pci_config_read32(pci_dev->dev.addr, 0x10);
verbose("EHCI controller [%04x:%04x] at %02x:%2x.%x DMA @%x\n",
verbose("\tEHCI controller [%04x:%04x] at %02x:%2x.%x DMA @%x\n",
pci_dev->vendor_id, pci_dev->device_id,
pci_dev->dev.bits.bus, pci_dev->dev.bits.dev, pci_dev->dev.bits.func,
base);
return 1;
}
DBG("eecp=%x\n",eecp);
DBG("\teecp=%x\n",eecp);
// bad way to do it
// pci_conf_write(pci_dev->dev.addr, eecp, 4, 0x01000001);
for (j = 0; j < 8; j++) {
legacy[j] = pci_config_read8(pci_dev->dev.addr, eecp + j);
DBG("%02x ", legacy[j]);
DBG("\t%02x ", legacy[j]);
}
DBG("\n");
isOwnershipConflict = (((legacy[3] & 1) != 0) && ((legacy[2] & 1) != 0));
if (!alwaysHardBIOSReset && isOwnershipConflict) {
DBG("EHCI - Ownership conflict - attempting soft reset ...\n");
DBG("EHCI - toggle OS Ownership to 0\n");
DBG("\tEHCI - Ownership conflict - attempting soft reset ...\n");
DBG("\tEHCI - toggle OS Ownership to 0\n");
pci_config_write8(pci_dev->dev.addr, eecp + 3, 0);
for (k = 0; k < 25; k++) {
for (j = 0; j < 8; j++) {
}
}
DBG("Found USBLEGSUP_ID - value %x:%x - writing OSOwned\n", legacy[3],legacy[2]);
DBG("\tFound USBLEGSUP_ID - value %x:%x - writing OSOwned\n", legacy[3],legacy[2]);
pci_config_write8(pci_dev->dev.addr, eecp + 3, 1);
// wait for kEHCI_USBLEGSUP_BIOSOwned bit to clear
for (j = 0;j < 8; j++) {
legacy[j] = pci_config_read8(pci_dev->dev.addr, eecp + j);
}
DBG ("%x:%x,",legacy[3],legacy[2]);
DBG ("\t%x:%x,",legacy[3],legacy[2]);
if (legacy[2] == 0) {
break;
}
// Soft reset has failed. Assume SMI being ignored
// Hard reset
// Force Clear BIOS BIT
DBG("EHCI - Ownership conflict - attempting hard reset ...\n");
DBG ("%x:%x\n",legacy[3],legacy[2]);
DBG("EHCI - Force BIOS Ownership to 0\n");
DBG("\tEHCI - Ownership conflict - attempting hard reset ...\n");
DBG ("\t%x:%x\n",legacy[3],legacy[2]);
DBG("\tEHCI - Force BIOS Ownership to 0\n");
pci_config_write8(pci_dev->dev.addr, eecp + 2, 0);
for (k = 0; k < 25; k++) {
for (j = 0; j < 8; j++) {
legacy[j] = pci_config_read8(pci_dev->dev.addr, eecp + j);
}
DBG ("%x:%x,",legacy[3],legacy[2]);
DBG ("\t%x:%x,",legacy[3],legacy[2]);
if ((legacy[2]) == 0) {
break;
legacy[j] = pci_config_read8(pci_dev->dev.addr, eecp + j);
}
DBG ("%x:%x\n",legacy[3],legacy[2]);
DBG ("\t%x:%x\n",legacy[3],legacy[2]);
// Final Ownership Resolution Check...
if (legacy[2] & 1) {
DBG("EHCI controller unable to take control from BIOS\n");
DBG("\tEHCI controller unable to take control from BIOS\n");
return 0;
}
DBG("EHCI Acquire OS Ownership done\n");
DBG("\tEHCI Acquire OS Ownership done\n");
return 1;
}
base = pci_config_read32(pci_dev->dev.addr, 0x20);
port_base = (base >> 5) & 0x07ff;
verbose("UHCI controller [%04x:%04x] at %02x:%2x.%x base %x(%x)\n",
verbose("\tUHCI controller [%04x:%04x] at %02x:%2x.%x base %x(%x)\n",
pci_dev->vendor_id, pci_dev->device_id,
pci_dev->dev.bits.bus, pci_dev->dev.bits.dev, pci_dev->dev.bits.func,
port_base, base);
uint32_t bar0, hccparams1, extendCap, value;
int32_t timeOut;
verbose("Setting Legacy USB Off on xHC [%04x:%04x] at %02x:%2x.%x\n",
verbose("\tSetting Legacy USB Off on xHC [%04x:%04x] at %02x:%2x.%x\n",
pci_dev->vendor_id, pci_dev->device_id,
pci_dev->dev.bits.bus, pci_dev->dev.bits.dev, pci_dev->dev.bits.func);
*/
if (bar0 & 1)
{
DBG("%s: BAR0 not a memory range\n", __FUNCTION__);
DBG("\t%s: BAR0 not a memory range\n", __FUNCTION__);
return 0;
}
/*
if (((bar0 & 6) == 4) &&
pci_config_read32(pci_dev->dev.addr, 20))
{
DBG("%s: BAR0 outside 32-bit physical address space\n", __FUNCTION__);
DBG("\t%s: BAR0 outside 32-bit physical address space\n", __FUNCTION__);
return 0;
}
bar0 &= ~15;
hccparams1 = *(uint32_t const volatile*) (bar0 + 16);
if (hccparams1 == ~0)
{
DBG("%s: hccparams1 invalid 0x%x\n", __FUNCTION__, hccparams1);
DBG("\t%s: hccparams1 invalid 0x%x\n", __FUNCTION__, hccparams1);
return 0;
}
extendCap = (hccparams1 >> 14) & 0x3fffc;
}
if ((value & 0xff) == 1) {
#if DEBUG_USB
verbose("%s: Found USBLEGSUP 0x%x, USBLEGCTLSTS 0x%x\n", __FUNCTION__,
verbose("\t%s: Found USBLEGSUP 0x%x, USBLEGCTLSTS 0x%x\n", __FUNCTION__,
value, *(uint32_t const volatile*) (bar0 + extendCap + 4));
#endif
value |= (1 << 24);
}
}
#if DEBUG_USB
verbose("%s: USBLEGSUP 0x%x, USBLEGCTLSTS 0x%x\n", __FUNCTION__,
verbose("\t%s: USBLEGSUP 0x%x, USBLEGCTLSTS 0x%x\n", __FUNCTION__,
value, *(uint32_t const volatile*) (bar0 + extendCap + 4));
#endif
if (timeOut >= 0)
break;
extendCap += ((value >> 6) & 0x3fc);
}
verbose("XHCI Legacy Off Done\n");
verbose("\tXHCI Legacy Off Done\n");
return 1;
}
trunk/i386/libsaio/device_inject.c
6666
6767
6868
69
69
7070
7171
7272
if (cnt2 > 0)
{
DT__AddProperty(node, DEVICE_PROPERTIES_PROP, cnt2, binStr);
DBG("Adding device-properties string to DT");
DBG("Adding device-properties string to DT\n");
}
}
}
trunk/i386/libsaio/hda.c
6868
6969
7070
71
7271
72
73
74
75
76
7377
7478
7579
......
8084
8185
8286
87
88
89
90
91
92
93
94
95
96
8397
8498
8599
......
193207
194208
195209
210
196211
197212
213
198214
199215
216
200217
201218
219
202220
203221
222
204223
205224
206225
......
212231
213232
214233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
215259
216
217260
218261
219
220
221
222
223
262
263
264
265
266
224267
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
282328
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
299347
300348
301349
......
304352
305353
306354
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
350398
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
413461
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
438486
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
487535
488
489
490
491
536
537
538
539
492540
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
508557
509
510
511
512
513
514
515
516
517
518
519
558
559
560
561
562
563
564
565
566
567
568
569
570
520571
521572
522573
......
549600
550601
551602
552
603
553604
554605
555606
......
591642
592643
593644
594
595
645
596646
597647
598648
599649
600
601
602
603
604
605
606
607650
608
609
610
611651
612652
613653
......
619659
620660
621661
622
623
624
662
625663
626664
627665
......
646684
647685
648686
649
687
688
689
650690
691
651692
652693
653694
......
686727
687728
688729
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
713754
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
731772
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
748789
749
750
751
752
753
754
790
791
792
793
794
795
755796
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
786827
787
788
789
790
791
792
793
794
795
796
828
829
830
831
832
833
834
835
836
837
797838
798839
799840
800
801
802
841
842
843
803844
804
805
806
807
845
846
847
848
808849
809
810
850
851
811852
812853
813
814
815
816
817
818
819854
820855
821856
#include "device_inject.h"
#include "convert.h"
#include "hda.h"
//#include "aml_generator.h"
#define STRINGIFY(x) #x
#define TOSTRING(x) STRINGIFY(x)
#define HEADER __FILE__ " [" TOSTRING(__LINE__) "]: "
#ifndef DEBUG_HDA
#define DEBUG_HDA 0
#endif
#define DBG(x...)
#endif
#ifndef DEBUG_CODEC
#define DEBUG_CODEC 0
#endif
#if DEBUG_CODEC
#define CDBG(x...) verbose(x)
#else
#define CDBG(x...)
#endif
extern uint32_t devices_number;
const char *hda_slot_name[]={ "AAPL,slot-name", "Built In" };
{ HDA_ATI_R1000,"R1000" /*, 0, 0 */ }, // HDMi
{ HDA_ATI_SI,"SI" /*, 0, 0 */ },
{ HDA_ATI_VERDE,"Cape Verde" /*, 0, ? */ }, // HDMi
//17f3 RDC Semiconductor, Inc.
{ HDA_RDC_M3010,"M3010" /*, 0, 0 */ },
//1106 VIA Technologies, Inc.
{ HDA_VIA_VT82XX,"VT8251/8237A" /*, 0, 0 */ },
//1039 Silicon Integrated Systems [SiS]
{ HDA_SIS_966,"966" /*, 0, 0 */ },
//10b9 ULi Electronics Inc.(Split off ALi Corporation in 2003)
{ HDA_ULI_M5461,"M5461" /*, 0, 0 */ },
/* Unknown */
{ HDA_INTEL_ALL,"Unknown Intel device" /*, 0, 0 */ },
{ HDA_NVIDIA_ALL,"Unknown NVIDIA device" /*, 0, 0 */ },
#define HDAC_DEVICES_LEN (sizeof(know_hda_controller) / sizeof(know_hda_controller[0]))
/* CODECs */
/*
* ErmaC: There's definitely a lot of different versions of the same audio codec variant out there...
* in the next struct you will find a "generic" but IMHO detailed list of
* possible codec... anyway to specific a new one or find difference beetween revision
* check it under linux enviroment with:
* $cat /proc/asound/Intel/codec#0
* --------------------------------
* Codec: Analog Devices AD1989B
* Address: 0
* AFG Function Id: 0x1 (unsol 0)
* Vendor Id: 0x11d4989b
* Subsystem Id: 0x10438372
* Revision Id: 0x100300
* --------------------------------
* or
* $cat /proc/asound/NVidia/codec#0
* --------------------------------
* Codec: Nvidia GPU 14 HDMI/DP
* Address: 0
* AFG Function Id: 0x1 (unsol 0)
* Vendor Id: 0x10de0014
* Subsystem Id: 0x10de0101
* Revision Id: 0x100100
* --------------------------------
*/
// ErmaC: TODO build function to probe the codecID
/*
static hdacc_codecs know_codecs[] = {
{ HDA_CODEC_CS4206, 0,"Cirrus Logic CS4206" },
{ HDA_CODEC_CS4207, 0,"Cirrus Logic CS4207" },
{ HDA_CODEC_CS4208, 0,"Cirrus Logic CS4208" },
{ HDA_CODEC_CS4210, 0,"Cirrus Logic CS4210" },
{ HDA_CODEC_CS4213, 0, "Cirrus Logic CS4213" },
{ HDA_CODEC_CS4206, 0,"CS4206" },
{ HDA_CODEC_CS4207, 0,"CS4207" },
{ HDA_CODEC_CS4208, 0,"CS4208" },
{ HDA_CODEC_CS4210, 0,"CS4210" },
{ HDA_CODEC_CS4213, 0, "CS4213" },
{ HDA_CODEC_ALC221, 0, "Realtek ALC221" },
{ HDA_CODEC_ALC231, 0, "Realtek ALC231" },
{ HDA_CODEC_ALC233, 0, "Realtek ALC233" },
{ HDA_CODEC_ALC235, 0, "Realtek ALC235" },
{ HDA_CODEC_ALC255, 0, "Realtek ALC255" },
{ HDA_CODEC_ALC256, 0, "Realtek ALC256" },
{ HDA_CODEC_ALC260, 0, "Realtek ALC260" },
{ HDA_CODEC_ALC262, 0, "Realtek ALC262" },
{ HDA_CODEC_ALC267, 0, "Realtek ALC267" },
{ HDA_CODEC_ALC268, 0, "Realtek ALC268" },
{ HDA_CODEC_ALC269, 0, "Realtek ALC269" },
{ HDA_CODEC_ALC270, 0, "Realtek ALC270" },
{ HDA_CODEC_ALC272, 0, "Realtek ALC272" },
{ HDA_CODEC_ALC273, 0, "Realtek ALC273" },
{ HDA_CODEC_ALC275, 0, "Realtek ALC275" },
{ HDA_CODEC_ALC276, 0, "Realtek ALC276" },
{ HDA_CODEC_ALC280, 0, "Realtek ALC280" },
{ HDA_CODEC_ALC282, 0, "Realtek ALC282" },
{ HDA_CODEC_ALC283, 0, "Realtek ALC283" },
{ HDA_CODEC_ALC284, 0, "Realtek ALC284" },
{ HDA_CODEC_ALC285, 0, "Realtek ALC285" },
{ HDA_CODEC_ALC286, 0, "Realtek ALC286" },
{ HDA_CODEC_ALC288, 0, "Realtek ALC288" },
{ HDA_CODEC_ALC290, 0, "Realtek ALC290" },
{ HDA_CODEC_ALC292, 0, "Realtek ALC292" },
{ HDA_CODEC_ALC293, 0, "Realtek ALC293" },
{ HDA_CODEC_ALC298, 0, "Realtek ALC298" },
{ HDA_CODEC_ALC660, 0, "Realtek ALC660-VD" },
{ HDA_CODEC_ALC662, 0, "Realtek ALC662" },
{ HDA_CODEC_ALC662, 0x100101, "Realtek ALC662 rev1" },
{ HDA_CODEC_ALC662, 0x100002, "Realtek ALC662 rev2" },
{ HDA_CODEC_ALC662, 0x100300, "Realtek ALC662 rev3" },
{ HDA_CODEC_ALC663, 0, "Realtek ALC663" },
{ HDA_CODEC_ALC665, 0, "Realtek ALC665" },
{ HDA_CODEC_ALC667, 0, "Realtek ALC667" },
{ HDA_CODEC_ALC668, 0, "Realtek ALC668" },
{ HDA_CODEC_ALC670, 0, "Realtek ALC670" },
{ HDA_CODEC_ALC671, 0, "Realtek ALC671" },
{ HDA_CODEC_ALC680, 0, "Realtek ALC680" },
{ HDA_CODEC_ALC861, 0x100340, "Realtek ALC660" },
{ HDA_CODEC_ALC861, 0, "Realtek ALC861" },
{ HDA_CODEC_ALC861VD, 0, "Realtek ALC861-VD" },
{ HDA_CODEC_ALC867, 0, "Realtek ALC891" },
{ HDA_CODEC_ALC880, 0, "Realtek ALC880" },
{ HDA_CODEC_ALC882, 0, "Realtek ALC882" },
{ HDA_CODEC_ALC883, 0, "Realtek ALC883" },
{ HDA_CODEC_ALC885, 0x100101, "Realtek ALC889A" },
{ HDA_CODEC_ALC885, 0x100103, "Realtek ALC889A" },
{ HDA_CODEC_ALC885, 0, "Realtek ALC885" },
{ HDA_CODEC_ALC887, 0, "Realtek ALC887" },
{ HDA_CODEC_ALC888, 0x100101, "Realtek ALC1200" },
{ HDA_CODEC_ALC888, 0, "Realtek ALC888" },
{ HDA_CODEC_ALC889, 0, "Realtek ALC889" },
{ HDA_CODEC_ALC892, 0, "Realtek ALC892" },
{ HDA_CODEC_ALC898, 0, "Realtek ALC898" },
{ HDA_CODEC_ALC899, 0,"Realtek ALC899" },
{ HDA_CODEC_ALC900, 0, "Realtek ALC1150" },
{ HDA_CODEC_ALC221, 0, "ALC221" },
{ HDA_CODEC_ALC231, 0, "ALC231" },
{ HDA_CODEC_ALC233, 0, "ALC233" },
{ HDA_CODEC_ALC235, 0, "ALC235" },
{ HDA_CODEC_ALC255, 0, "ALC255" },
{ HDA_CODEC_ALC256, 0, "ALC256" },
{ HDA_CODEC_ALC260, 0, "ALC260" },
//{ HDA_CODEC_ALC262, 0x0100,"ALC262" }, // Revision Id: 0x100100
{ HDA_CODEC_ALC262, 0, "ALC262" },
{ HDA_CODEC_ALC267, 0, "ALC267" },
{ HDA_CODEC_ALC268, 0, "ALC268" },
{ HDA_CODEC_ALC269, 0, "ALC269" },
{ HDA_CODEC_ALC270, 0, "ALC270" },
{ HDA_CODEC_ALC272, 0, "ALC272" },
{ HDA_CODEC_ALC273, 0, "ALC273" },
{ HDA_CODEC_ALC275, 0, "ALC275" },
{ HDA_CODEC_ALC276, 0, "ALC276" },
{ HDA_CODEC_ALC280, 0, "ALC280" },
{ HDA_CODEC_ALC282, 0, "ALC282" },
{ HDA_CODEC_ALC283, 0, "ALC283" },
{ HDA_CODEC_ALC284, 0, "ALC284" },
{ HDA_CODEC_ALC285, 0, "ALC285" },
{ HDA_CODEC_ALC286, 0, "ALC286" },
{ HDA_CODEC_ALC288, 0, "ALC288" },
{ HDA_CODEC_ALC290, 0, "ALC290" },
{ HDA_CODEC_ALC292, 0, "ALC292" },
{ HDA_CODEC_ALC293, 0, "ALC293" },
{ HDA_CODEC_ALC298, 0, "ALC298" },
{ HDA_CODEC_ALC660, 0, "ALC660-VD" },
{ HDA_CODEC_ALC662, 0, "ALC662" },
{ HDA_CODEC_ALC662, 0x0101,"ALC662 rev1" },
{ HDA_CODEC_ALC662, 0x0002,"ALC662 rev2" },
{ HDA_CODEC_ALC662, 0x0300,"ALC662 rev3" },
{ HDA_CODEC_ALC663, 0, "ALC663" },
{ HDA_CODEC_ALC665, 0, "ALC665" },
{ HDA_CODEC_ALC667, 0, "ALC667" },
{ HDA_CODEC_ALC668, 0, "ALC668" },
{ HDA_CODEC_ALC670, 0, "ALC670" },
{ HDA_CODEC_ALC671, 0, "ALC671" },
{ HDA_CODEC_ALC680, 0, "ALC680" },
{ HDA_CODEC_ALC861, 0x0340,"ALC660" },
{ HDA_CODEC_ALC861, 0, "ALC861" },
{ HDA_CODEC_ALC861VD, 0, "ALC861-VD" },
{ HDA_CODEC_ALC867, 0, "ALC891" },
//{ HDA_CODEC_ALC880, 0x0800,"ALC880" }, // Revision Id: 0x100800
{ HDA_CODEC_ALC880, 0, "ALC880" },
{ HDA_CODEC_ALC882, 0, "ALC882" },
{ HDA_CODEC_ALC883, 0, "ALC883" },
{ HDA_CODEC_ALC885, 0x0101,"ALC889A" }, // Revision Id: 0x100101
{ HDA_CODEC_ALC885, 0x0103,"ALC889A" }, // Revision Id: 0x100103
{ HDA_CODEC_ALC885, 0, "ALC885" },
{ HDA_CODEC_ALC886, 0, "ALC886" },
{ HDA_CODEC_ALC887, 0, "ALC887" },
{ HDA_CODEC_ALC888, 0x0101,"ALC1200" }, // Revision Id: 0x100101
{ HDA_CODEC_ALC888, 0, "ALC888" },
{ HDA_CODEC_ALC889, 0, "ALC889" },
{ HDA_CODEC_ALC892, 0, "ALC892" },
{ HDA_CODEC_ALC898, 0, "ALC898" },
{ HDA_CODEC_ALC899, 0,"ALC899" },
{ HDA_CODEC_ALC900, 0, "ALC1150" },
{ HDA_CODEC_AD1882, 0, "Analog Devices AD1882" },
{ HDA_CODEC_AD1882A, 0, "Analog Devices AD1882A" },
{ HDA_CODEC_AD1883, 0, "Analog Devices AD1883" },
{ HDA_CODEC_AD1884, 0, "Analog Devices AD1884" },
{ HDA_CODEC_AD1884A, 0, "Analog Devices AD1884A" },
{ HDA_CODEC_AD1981HD, 0, "Analog Devices AD1981HD" },
{ HDA_CODEC_AD1983, 0, "Analog Devices AD1983" },
{ HDA_CODEC_AD1984, 0, "Analog Devices AD1984" },
{ HDA_CODEC_AD1984A, 0, "Analog Devices AD1984A" },
{ HDA_CODEC_AD1984B, 0, "Analog Devices AD1984B" },
{ HDA_CODEC_AD1986A, 0, "Analog Devices AD1986A" },
{ HDA_CODEC_AD1987, 0, "Analog Devices AD1987" },
{ HDA_CODEC_AD1988, 0, "Analog Devices AD1988A" },
{ HDA_CODEC_AD1988B, 0, "Analog Devices AD1988B" },
{ HDA_CODEC_AD1989A, 0, "Analog Devices AD1989A" },
{ HDA_CODEC_AD1989B, 0, "Analog Devices AD1989B" },
{ HDA_CODEC_AD1882, 0, "AD1882" },
{ HDA_CODEC_AD1882A, 0, "AD1882A" },
{ HDA_CODEC_AD1883, 0, "AD1883" },
{ HDA_CODEC_AD1884, 0, "AD1884" },
{ HDA_CODEC_AD1884A, 0, "AD1884A" },
{ HDA_CODEC_AD1981HD, 0, "AD1981HD" },
{ HDA_CODEC_AD1983, 0, "AD1983" },
{ HDA_CODEC_AD1984, 0, "AD1984" },
{ HDA_CODEC_AD1984A, 0, "AD1984A" },
{ HDA_CODEC_AD1984B, 0, "AD1984B" },
{ HDA_CODEC_AD1986A, 0, "AD1986A" },
{ HDA_CODEC_AD1987, 0, "AD1987" },
{ HDA_CODEC_AD1988, 0, "AD1988A" },
{ HDA_CODEC_AD1988B, 0, "AD1988B" },
{ HDA_CODEC_AD1989A, 0, "AD1989A" },
{ HDA_CODEC_AD1989B, 0x0200,"AD2000B" }, // Revision Id: 0x100200
{ HDA_CODEC_AD1989B, 0x0300,"AD2000B" }, // Revision Id: 0x100300
{ HDA_CODEC_AD1989B, 0, "AD1989B" },
{ HDA_CODEC_XFIEA, 0, "Creative X-Fi Extreme A" },
{ HDA_CODEC_XFIED, 0, "Creative X-Fi Extreme D" },
{ HDA_CODEC_CMI9880, 0, "CMedia CMI9880" },
{ HDA_CODEC_CMI98802, 0, "CMedia CMI9880" },
{ HDA_CODEC_CXD9872RDK, 0, "Sigmatel CXD9872RD/K" },
{ HDA_CODEC_CXD9872AKD, 0, "Sigmatel CXD9872AKD" },
{ HDA_CODEC_STAC9200D, 0, "Sigmatel STAC9200D" },
{ HDA_CODEC_STAC9204X, 0, "Sigmatel STAC9204X" },
{ HDA_CODEC_STAC9204D, 0, "Sigmatel STAC9204D" },
{ HDA_CODEC_STAC9205X, 0, "Sigmatel STAC9205X" },
{ HDA_CODEC_STAC9205D, 0, "Sigmatel STAC9205D" },
{ HDA_CODEC_STAC9220, 0, "Sigmatel STAC9220" },
{ HDA_CODEC_STAC9220_A1, 0, "Sigmatel STAC9220_A1" },
{ HDA_CODEC_STAC9220_A2, 0, "Sigmatel STAC9220_A2" },
{ HDA_CODEC_STAC9221, 0, "Sigmatel STAC9221" },
{ HDA_CODEC_STAC9221_A2, 0, "Sigmatel STAC9221_A2" },
{ HDA_CODEC_STAC9221D, 0, "Sigmatel STAC9221D" },
{ HDA_CODEC_STAC922XD, 0, "Sigmatel STAC9220D/9223D" },
{ HDA_CODEC_STAC9227X, 0, "Sigmatel STAC9227X" },
{ HDA_CODEC_STAC9227D, 0, "Sigmatel STAC9227D" },
{ HDA_CODEC_STAC9228X, 0, "Sigmatel STAC9228X" },
{ HDA_CODEC_STAC9228D, 0, "Sigmatel STAC9228D" },
{ HDA_CODEC_STAC9229X, 0, "Sigmatel STAC9229X" },
{ HDA_CODEC_STAC9229D, 0, "Sigmatel STAC9229D" },
{ HDA_CODEC_STAC9230X, 0, "Sigmatel STAC9230X" },
{ HDA_CODEC_STAC9230D, 0, "Sigmatel STAC9230D" },
{ HDA_CODEC_STAC9250, 0, "Sigmatel STAC9250" },
{ HDA_CODEC_STAC9250D, 0,"Sigmatel STAC9250D" },
{ HDA_CODEC_STAC9251, 0, "Sigmatel STAC9251" },
{ HDA_CODEC_STAC9250D_1, 0,"Sigmatel STAC9250D" },
{ HDA_CODEC_STAC9255, 0, "Sigmatel STAC9255" },
{ HDA_CODEC_STAC9255D, 0, "Sigmatel STAC9255D" },
{ HDA_CODEC_STAC9254, 0, "Sigmatel STAC9254" },
{ HDA_CODEC_STAC9254D, 0, "Sigmatel STAC9254D" },
{ HDA_CODEC_STAC9271X, 0, "Sigmatel STAC9271X" },
{ HDA_CODEC_STAC9271D, 0, "Sigmatel STAC9271D" },
{ HDA_CODEC_STAC9272X, 0, "Sigmatel STAC9272X" },
{ HDA_CODEC_STAC9272D, 0, "Sigmatel STAC9272D" },
{ HDA_CODEC_STAC9273X, 0, "Sigmatel STAC9273X" },
{ HDA_CODEC_STAC9273D, 0, "Sigmatel STAC9273D" },
{ HDA_CODEC_STAC9274, 0, "Sigmatel STAC9274" },
{ HDA_CODEC_STAC9274D, 0, "Sigmatel STAC9274D" },
{ HDA_CODEC_STAC9274X5NH, 0, "Sigmatel STAC9274X5NH" },
{ HDA_CODEC_STAC9274D5NH, 0, "Sigmatel STAC9274D5NH" },
{ HDA_CODEC_STAC9202, 0,"Sigmatel STAC9202" },
{ HDA_CODEC_STAC9202D, 0,"Sigmatel STAC9202D" },
{ HDA_CODEC_STAC9872AK, 0, "Sigmatel STAC9872AK" },
{ HDA_CODEC_CXD9872RDK, 0, "CXD9872RD/K" },
{ HDA_CODEC_CXD9872AKD, 0, "CXD9872AKD" },
{ HDA_CODEC_STAC9200D, 0, "STAC9200D" },
{ HDA_CODEC_STAC9204X, 0, "STAC9204X" },
{ HDA_CODEC_STAC9204D, 0, "STAC9204D" },
{ HDA_CODEC_STAC9205X, 0, "STAC9205X" },
{ HDA_CODEC_STAC9205D, 0, "STAC9205D" },
{ HDA_CODEC_STAC9220, 0, "STAC9220" },
{ HDA_CODEC_STAC9220_A1, 0, "STAC9220_A1" },
{ HDA_CODEC_STAC9220_A2, 0, "STAC9220_A2" },
{ HDA_CODEC_STAC9221, 0, "STAC9221" },
{ HDA_CODEC_STAC9221_A2, 0, "STAC9221_A2" },
{ HDA_CODEC_STAC9221D, 0, "STAC9221D" },
{ HDA_CODEC_STAC922XD, 0, "STAC9220D/9223D" },
{ HDA_CODEC_STAC9227X, 0, "STAC9227X" },
{ HDA_CODEC_STAC9227D, 0, "STAC9227D" },
{ HDA_CODEC_STAC9228X, 0, "STAC9228X" },
{ HDA_CODEC_STAC9228D, 0, "STAC9228D" },
{ HDA_CODEC_STAC9229X, 0, "STAC9229X" },
{ HDA_CODEC_STAC9229D, 0, "STAC9229D" },
{ HDA_CODEC_STAC9230X, 0, "STAC9230X" },
{ HDA_CODEC_STAC9230D, 0, "STAC9230D" },
{ HDA_CODEC_STAC9250, 0, "STAC9250" },
{ HDA_CODEC_STAC9250D, 0,"STAC9250D" },
{ HDA_CODEC_STAC9251, 0, "STAC9251" },
{ HDA_CODEC_STAC9250D_1, 0,"STAC9250D" },
{ HDA_CODEC_STAC9255, 0, "STAC9255" },
{ HDA_CODEC_STAC9255D, 0, "STAC9255D" },
{ HDA_CODEC_STAC9254, 0, "STAC9254" },
{ HDA_CODEC_STAC9254D, 0, "STAC9254D" },
{ HDA_CODEC_STAC9271X, 0, "STAC9271X" },
{ HDA_CODEC_STAC9271D, 0, "STAC9271D" },
{ HDA_CODEC_STAC9272X, 0, "STAC9272X" },
{ HDA_CODEC_STAC9272D, 0, "STAC9272D" },
{ HDA_CODEC_STAC9273X, 0, "STAC9273X" },
{ HDA_CODEC_STAC9273D, 0, "STAC9273D" },
{ HDA_CODEC_STAC9274, 0, "STAC9274" },
{ HDA_CODEC_STAC9274D, 0, "STAC9274D" },
{ HDA_CODEC_STAC9274X5NH, 0, "STAC9274X5NH" },
{ HDA_CODEC_STAC9274D5NH, 0, "STAC9274D5NH" },
{ HDA_CODEC_STAC9202, 0,"STAC9202" },
{ HDA_CODEC_STAC9202D, 0,"STAC9202D" },
{ HDA_CODEC_STAC9872AK, 0, "STAC9872AK" },
{ HDA_CODEC_IDT92HD005, 0, "IDT 92HD005" },
{ HDA_CODEC_IDT92HD005D, 0, "IDT 92HD005D" },
{ HDA_CODEC_IDT92HD206X, 0, "IDT 92HD206X" },
{ HDA_CODEC_IDT92HD206D, 0, "IDT 92HD206D" },
{ HDA_CODEC_IDT92HD66B1X5, 0, "IDT 92HD66B1X5" },
{ HDA_CODEC_IDT92HD66B2X5, 0, "IDT 92HD66B2X5" },
{ HDA_CODEC_IDT92HD66B3X5, 0, "IDT 92HD66B3X5" },
{ HDA_CODEC_IDT92HD66C1X5, 0, "IDT 92HD66C1X5" },
{ HDA_CODEC_IDT92HD66C2X5, 0, "IDT 92HD66C2X5" },
{ HDA_CODEC_IDT92HD66C3X5, 0, "IDT 92HD66C3X5" },
{ HDA_CODEC_IDT92HD66B1X3, 0, "IDT 92HD66B1X3" },
{ HDA_CODEC_IDT92HD66B2X3, 0, "IDT 92HD66B2X3" },
{ HDA_CODEC_IDT92HD66B3X3, 0, "IDT 92HD66B3X3" },
{ HDA_CODEC_IDT92HD66C1X3, 0, "IDT 92HD66C1X3" },
{ HDA_CODEC_IDT92HD66C2X3, 0, "IDT 92HD66C2X3" },
{ HDA_CODEC_IDT92HD66C3_65, 0, "IDT 92HD66C3_65" },
{ HDA_CODEC_IDT92HD700X, 0, "IDT 92HD700X" },
{ HDA_CODEC_IDT92HD700D, 0, "IDT 92HD700D" },
{ HDA_CODEC_IDT92HD71B5, 0, "IDT 92HD71B5" },
{ HDA_CODEC_IDT92HD71B5_2, 0, "IDT 92HD71B5" },
{ HDA_CODEC_IDT92HD71B6, 0, "IDT 92HD71B6" },
{ HDA_CODEC_IDT92HD71B6_2, 0, "IDT 92HD71B6" },
{ HDA_CODEC_IDT92HD71B7, 0, "IDT 92HD71B7" },
{ HDA_CODEC_IDT92HD71B7_2, 0, "IDT 92HD71B7" },
{ HDA_CODEC_IDT92HD71B8, 0, "IDT 92HD71B8" },
{ HDA_CODEC_IDT92HD71B8_2, 0, "IDT 92HD71B8" },
{ HDA_CODEC_IDT92HD73C1, 0, "IDT 92HD73C1" },
{ HDA_CODEC_IDT92HD73D1, 0, "IDT 92HD73D1" },
{ HDA_CODEC_IDT92HD73E1, 0, "IDT 92HD73E1" },
{ HDA_CODEC_IDT92HD95, 0,"IDT 92HD95" },
{ HDA_CODEC_IDT92HD75B3, 0, "IDT 92HD75B3" },
{ HDA_CODEC_IDT92HD88B3, 0, "IDT 92HD88B3" },
{ HDA_CODEC_IDT92HD88B1, 0, "IDT 92HD88B1" },
{ HDA_CODEC_IDT92HD88B2, 0, "IDT 92HD88B2" },
{ HDA_CODEC_IDT92HD88B4, 0, "IDT 92HD88B4" },
{ HDA_CODEC_IDT92HD75BX, 0, "IDT 92HD75BX" },
{ HDA_CODEC_IDT92HD81B1C, 0, "IDT 92HD81B1C" },
{ HDA_CODEC_IDT92HD81B1X, 0, "IDT 92HD81B1X" },
{ HDA_CODEC_IDT92HD83C1C, 0, "IDT 92HD83C1C" },
{ HDA_CODEC_IDT92HD83C1X, 0, "IDT 92HD83C1X" },
{ HDA_CODEC_IDT92HD87B1_3, 0, "IDT 92HD87B1/3" },
{ HDA_CODEC_IDT92HD87B2_4, 0, "IDT 92HD87B2/4" },
{ HDA_CODEC_IDT92HD89C3, 0, "IDT 92HD89C3" },
{ HDA_CODEC_IDT92HD89C2, 0, "IDT 92HD89C2" },
{ HDA_CODEC_IDT92HD89C1, 0, "IDT 92HD89C1" },
{ HDA_CODEC_IDT92HD89B3, 0, "IDT 92HD89B3" },
{ HDA_CODEC_IDT92HD89B2, 0, "IDT 92HD89B2" },
{ HDA_CODEC_IDT92HD89B1, 0, "IDT 92HD89B1" },
{ HDA_CODEC_IDT92HD89E3, 0, "IDT 92HD89E3" },
{ HDA_CODEC_IDT92HD89E2, 0, "IDT 92HD89E2" },
{ HDA_CODEC_IDT92HD89E1, 0, "IDT 92HD89E1" },
{ HDA_CODEC_IDT92HD89D3, 0, "IDT 92HD89D3" },
{ HDA_CODEC_IDT92HD89D2, 0, "IDT 92HD89D2" },
{ HDA_CODEC_IDT92HD89D1, 0, "IDT 92HD89D1" },
{ HDA_CODEC_IDT92HD89F3, 0, "IDT 92HD89F3" },
{ HDA_CODEC_IDT92HD89F2, 0, "IDT 92HD89F2" },
{ HDA_CODEC_IDT92HD89F1, 0, "IDT 92HD89F1" },
{ HDA_CODEC_IDT92HD90BXX, 0, "IDT 92HD90BXX" },
{ HDA_CODEC_IDT92HD91BXX, 0, "IDT 92HD91BXX" },
{ HDA_CODEC_IDT92HD93BXX, 0, "IDT 92HD93BXX" },
{ HDA_CODEC_IDT92HD98BXX, 0, "IDT 92HD98BXX" },
{ HDA_CODEC_IDT92HD99BXX, 0, "IDT 92HD99BXX" },
{ HDA_CODEC_IDT92HD005, 0, "92HD005" },
{ HDA_CODEC_IDT92HD005D, 0, "92HD005D" },
{ HDA_CODEC_IDT92HD206X, 0, "92HD206X" },
{ HDA_CODEC_IDT92HD206D, 0, "92HD206D" },
{ HDA_CODEC_IDT92HD66B1X5, 0, "92HD66B1X5" },
{ HDA_CODEC_IDT92HD66B2X5, 0, "92HD66B2X5" },
{ HDA_CODEC_IDT92HD66B3X5, 0, "92HD66B3X5" },
{ HDA_CODEC_IDT92HD66C1X5, 0, "92HD66C1X5" },
{ HDA_CODEC_IDT92HD66C2X5, 0, "92HD66C2X5" },
{ HDA_CODEC_IDT92HD66C3X5, 0, "92HD66C3X5" },
{ HDA_CODEC_IDT92HD66B1X3, 0, "92HD66B1X3" },
{ HDA_CODEC_IDT92HD66B2X3, 0, "92HD66B2X3" },
{ HDA_CODEC_IDT92HD66B3X3, 0, "92HD66B3X3" },
{ HDA_CODEC_IDT92HD66C1X3, 0, "92HD66C1X3" },
{ HDA_CODEC_IDT92HD66C2X3, 0, "92HD66C2X3" },
{ HDA_CODEC_IDT92HD66C3_65, 0, "92HD66C3_65" },
{ HDA_CODEC_IDT92HD700X, 0, "92HD700X" },
{ HDA_CODEC_IDT92HD700D, 0, "92HD700D" },
{ HDA_CODEC_IDT92HD71B5, 0, "92HD71B5" },
{ HDA_CODEC_IDT92HD71B5_2, 0, "92HD71B5" },
{ HDA_CODEC_IDT92HD71B6, 0, "92HD71B6" },
{ HDA_CODEC_IDT92HD71B6_2, 0, "92HD71B6" },
{ HDA_CODEC_IDT92HD71B7, 0, "92HD71B7" },
{ HDA_CODEC_IDT92HD71B7_2, 0, "92HD71B7" },
{ HDA_CODEC_IDT92HD71B8, 0, "92HD71B8" },
{ HDA_CODEC_IDT92HD71B8_2, 0, "92HD71B8" },
{ HDA_CODEC_IDT92HD73C1, 0, "92HD73C1" },
{ HDA_CODEC_IDT92HD73D1, 0, "92HD73D1" },
{ HDA_CODEC_IDT92HD73E1, 0, "92HD73E1" },
{ HDA_CODEC_IDT92HD95, 0,"92HD95" },
{ HDA_CODEC_IDT92HD75B3, 0, "92HD75B3" },
{ HDA_CODEC_IDT92HD88B3, 0, "92HD88B3" },
{ HDA_CODEC_IDT92HD88B1, 0, "92HD88B1" },
{ HDA_CODEC_IDT92HD88B2, 0, "92HD88B2" },
{ HDA_CODEC_IDT92HD88B4, 0, "92HD88B4" },
{ HDA_CODEC_IDT92HD75BX, 0, "92HD75BX" },
{ HDA_CODEC_IDT92HD81B1C, 0, "92HD81B1C" },
{ HDA_CODEC_IDT92HD81B1X, 0, "92HD81B1X" },
{ HDA_CODEC_IDT92HD83C1C, 0, "92HD83C1C" },
{ HDA_CODEC_IDT92HD83C1X, 0, "92HD83C1X" },
{ HDA_CODEC_IDT92HD87B1_3, 0, "92HD87B1/3" },
{ HDA_CODEC_IDT92HD87B2_4, 0, "92HD87B2/4" },
{ HDA_CODEC_IDT92HD89C3, 0, "92HD89C3" },
{ HDA_CODEC_IDT92HD89C2, 0, "92HD89C2" },
{ HDA_CODEC_IDT92HD89C1, 0, "92HD89C1" },
{ HDA_CODEC_IDT92HD89B3, 0, "92HD89B3" },
{ HDA_CODEC_IDT92HD89B2, 0, "92HD89B2" },
{ HDA_CODEC_IDT92HD89B1, 0, "92HD89B1" },
{ HDA_CODEC_IDT92HD89E3, 0, "92HD89E3" },
{ HDA_CODEC_IDT92HD89E2, 0, "92HD89E2" },
{ HDA_CODEC_IDT92HD89E1, 0, "92HD89E1" },
{ HDA_CODEC_IDT92HD89D3, 0, "92HD89D3" },
{ HDA_CODEC_IDT92HD89D2, 0, "92HD89D2" },
{ HDA_CODEC_IDT92HD89D1, 0, "92HD89D1" },
{ HDA_CODEC_IDT92HD89F3, 0, "92HD89F3" },
{ HDA_CODEC_IDT92HD89F2, 0, "92HD89F2" },
{ HDA_CODEC_IDT92HD89F1, 0, "92HD89F1" },
{ HDA_CODEC_IDT92HD90BXX, 0, "92HD90BXX" },
{ HDA_CODEC_IDT92HD91BXX, 0, "92HD91BXX" },
{ HDA_CODEC_IDT92HD93BXX, 0, "92HD93BXX" },
{ HDA_CODEC_IDT92HD98BXX, 0, "92HD98BXX" },
{ HDA_CODEC_IDT92HD99BXX, 0, "92HD99BXX" },
{ HDA_CODEC_CX20549, 0, "Conexant CX20549 (Venice)" },
{ HDA_CODEC_CX20551, 0, "Conexant CX20551 (Waikiki)" },
{ HDA_CODEC_CX20561, 0, "Conexant CX20561 (Hermosa)" },
{ HDA_CODEC_CX20582, 0, "Conexant CX20582 (Pebble)" },
{ HDA_CODEC_CX20583, 0, "Conexant CX20583 (Pebble HSF)" },
{ HDA_CODEC_CX20584, 0, "Conexant CX20584" },
{ HDA_CODEC_CX20585, 0, "Conexant CX20585" },
{ HDA_CODEC_CX20588, 0, "Conexant CX20588" },
{ HDA_CODEC_CX20590, 0, "Conexant CX20590" },
{ HDA_CODEC_CX20631, 0, "Conexant CX20631" },
{ HDA_CODEC_CX20632, 0, "Conexant CX20632" },
{ HDA_CODEC_CX20641, 0, "Conexant CX20641" },
{ HDA_CODEC_CX20642, 0, "Conexant CX20642" },
{ HDA_CODEC_CX20651, 0, "Conexant CX20651" },
{ HDA_CODEC_CX20652, 0, "Conexant CX20652" },
{ HDA_CODEC_CX20664, 0, "Conexant CX20664" },
{ HDA_CODEC_CX20665, 0, "Conexant CX20665" },
{ HDA_CODEC_CX20751, 0,"Conexant CX20751/2" },
{ HDA_CODEC_CX20751_2, 0,"Conexant CX20751/2" },
{ HDA_CODEC_CX20751_4, 0,"Conexant CX20753/4" },
{ HDA_CODEC_CX20755, 0, "Conexant CX20755" },
{ HDA_CODEC_CX20756, 0, "Conexant CX20756" },
{ HDA_CODEC_CX20757, 0, "Conexant CX20757" },
{ HDA_CODEC_CX20952, 0, "Conexant CX20952" },
{ HDA_CODEC_CX20549, 0, "CX20549 (Venice)" },
{ HDA_CODEC_CX20551, 0, "CX20551 (Waikiki)" },
{ HDA_CODEC_CX20561, 0, "CX20561 (Hermosa)" },
{ HDA_CODEC_CX20582, 0, "CX20582 (Pebble)" },
{ HDA_CODEC_CX20583, 0, "CX20583 (Pebble HSF)" },
{ HDA_CODEC_CX20584, 0, "CX20584" },
{ HDA_CODEC_CX20585, 0, "CX20585" },
{ HDA_CODEC_CX20588, 0, "CX20588" },
{ HDA_CODEC_CX20590, 0, "CX20590" },
{ HDA_CODEC_CX20631, 0, "CX20631" },
{ HDA_CODEC_CX20632, 0, "CX20632" },
{ HDA_CODEC_CX20641, 0, "CX20641" },
{ HDA_CODEC_CX20642, 0, "CX20642" },
{ HDA_CODEC_CX20651, 0, "CX20651" },
{ HDA_CODEC_CX20652, 0, "CX20652" },
{ HDA_CODEC_CX20664, 0, "CX20664" },
{ HDA_CODEC_CX20665, 0, "CX20665" },
{ HDA_CODEC_CX20751, 0,"CX20751/2" },
{ HDA_CODEC_CX20751_2, 0,"CX20751/2" },
{ HDA_CODEC_CX20751_4, 0,"CX20753/4" },
{ HDA_CODEC_CX20755, 0, "CX20755" },
{ HDA_CODEC_CX20756, 0, "CX20756" },
{ HDA_CODEC_CX20757, 0, "CX20757" },
{ HDA_CODEC_CX20952, 0, "CX20952" },
{ HDA_CODEC_VT1708_8, 0, "VIA VT1708_8" },
{ HDA_CODEC_VT1708_9, 0, "VIA VT1708_9" },
{ HDA_CODEC_VT1708_A, 0, "VIA VT1708_A" },
{ HDA_CODEC_VT1708_B, 0, "VIA VT1708_B" },
{ HDA_CODEC_VT1709_0, 0, "VIA VT1709_0" },
{ HDA_CODEC_VT1709_1, 0, "VIA VT1709_1" },
{ HDA_CODEC_VT1709_2, 0, "VIA VT1709_2" },
{ HDA_CODEC_VT1709_3, 0, "VIA VT1709_3" },
{ HDA_CODEC_VT1709_4, 0, "VIA VT1709_4" },
{ HDA_CODEC_VT1709_5, 0, "VIA VT1709_5" },
{ HDA_CODEC_VT1709_6, 0, "VIA VT1709_6" },
{ HDA_CODEC_VT1709_7, 0, "VIA VT1709_7" },
{ HDA_CODEC_VT1708B_0, 0, "VIA VT1708B_0" },
{ HDA_CODEC_VT1708B_1, 0, "VIA VT1708B_1" },
{ HDA_CODEC_VT1708B_2, 0, "VIA VT1708B_2" },
{ HDA_CODEC_VT1708B_3, 0, "VIA VT1708B_3" },
{ HDA_CODEC_VT1708B_4, 0, "VIA VT1708B_4" },
{ HDA_CODEC_VT1708B_5, 0, "VIA VT1708B_5" },
{ HDA_CODEC_VT1708B_6, 0, "VIA VT1708B_6" },
{ HDA_CODEC_VT1708B_7, 0, "VIA VT1708B_7" },
{ HDA_CODEC_VT1708S_0, 0, "VIA VT1708S_0" },
{ HDA_CODEC_VT1708S_1, 0, "VIA VT1708S_1" },
{ HDA_CODEC_VT1708S_2, 0, "VIA VT1708S_2" },
{ HDA_CODEC_VT1708S_3, 0, "VIA VT1708S_3" },
{ HDA_CODEC_VT1708S_4, 0, "VIA VT1708S_4" },
{ HDA_CODEC_VT1708S_5, 0, "VIA VT1708S_5" },
{ HDA_CODEC_VT1708S_6, 0, "VIA VT1708S_6" },
{ HDA_CODEC_VT1708S_7, 0, "VIA VT1708S_7" },
{ HDA_CODEC_VT1702_0, 0, "VIA VT1702_0" },
{ HDA_CODEC_VT1702_1, 0, "VIA VT1702_1" },
{ HDA_CODEC_VT1702_2, 0, "VIA VT1702_2" },
{ HDA_CODEC_VT1702_3, 0, "VIA VT1702_3" },
{ HDA_CODEC_VT1702_4, 0, "VIA VT1702_4" },
{ HDA_CODEC_VT1702_5, 0, "VIA VT1702_5" },
{ HDA_CODEC_VT1702_6, 0, "VIA VT1702_6" },
{ HDA_CODEC_VT1702_7, 0, "VIA VT1702_7" },
{ HDA_CODEC_VT1716S_0, 0, "VIA VT1716S_0" },
{ HDA_CODEC_VT1716S_1, 0, "VIA VT1716S_1" },
{ HDA_CODEC_VT1718S_0, 0, "VIA VT1718S_0" },
{ HDA_CODEC_VT1718S_1, 0, "VIA VT1718S_1" },
{ HDA_CODEC_VT1802_0, 0, "VIA VT1802_0" },
{ HDA_CODEC_VT1802_1, 0, "VIA VT1802_1" },
{ HDA_CODEC_VT1812, 0, "VIA VT1812" },
{ HDA_CODEC_VT1818S, 0, "VIA VT1818S" },
{ HDA_CODEC_VT1828S, 0, "VIA VT1828S" },
{ HDA_CODEC_VT2002P_0, 0, "VIA VT2002P_0" },
{ HDA_CODEC_VT2002P_1, 0, "VIA VT2002P_1" },
{ HDA_CODEC_VT2020, 0, "VIA VT2020" },
{ HDA_CODEC_VT1708_8, 0, "VT1708_8" },
{ HDA_CODEC_VT1708_9, 0, "VT1708_9" },
{ HDA_CODEC_VT1708_A, 0, "VT1708_A" },
{ HDA_CODEC_VT1708_B, 0, "VT1708_B" },
{ HDA_CODEC_VT1709_0, 0, "VT1709_0" },
{ HDA_CODEC_VT1709_1, 0, "VT1709_1" },
{ HDA_CODEC_VT1709_2, 0, "VT1709_2" },
{ HDA_CODEC_VT1709_3, 0, "VT1709_3" },
{ HDA_CODEC_VT1709_4, 0, "VT1709_4" },
{ HDA_CODEC_VT1709_5, 0, "VT1709_5" },
{ HDA_CODEC_VT1709_6, 0, "VT1709_6" },
{ HDA_CODEC_VT1709_7, 0, "VT1709_7" },
{ HDA_CODEC_VT1708B_0, 0, "VT1708B_0" },
{ HDA_CODEC_VT1708B_1, 0, "VT1708B_1" },
{ HDA_CODEC_VT1708B_2, 0, "VT1708B_2" },
{ HDA_CODEC_VT1708B_3, 0, "VT1708B_3" },
{ HDA_CODEC_VT1708B_4, 0, "VT1708B_4" },
{ HDA_CODEC_VT1708B_5, 0, "VT1708B_5" },
{ HDA_CODEC_VT1708B_6, 0, "VT1708B_6" },
{ HDA_CODEC_VT1708B_7, 0, "VT1708B_7" },
{ HDA_CODEC_VT1708S_0, 0, "VT1708S_0" },
{ HDA_CODEC_VT1708S_1, 0, "VT1708S_1" },
{ HDA_CODEC_VT1708S_2, 0, "VT1708S_2" },
{ HDA_CODEC_VT1708S_3, 0, "VT1708S_3" },
{ HDA_CODEC_VT1708S_4, 0, "VT1708S_4" },
{ HDA_CODEC_VT1708S_5, 0, "VT1708S_5" },
{ HDA_CODEC_VT1708S_6, 0, "VT1708S_6" },
{ HDA_CODEC_VT1708S_7, 0, "VT1708S_7" },
{ HDA_CODEC_VT1702_0, 0, "VT1702_0" },
{ HDA_CODEC_VT1702_1, 0, "VT1702_1" },
{ HDA_CODEC_VT1702_2, 0, "VT1702_2" },
{ HDA_CODEC_VT1702_3, 0, "VT1702_3" },
{ HDA_CODEC_VT1702_4, 0, "VT1702_4" },
{ HDA_CODEC_VT1702_5, 0, "VT1702_5" },
{ HDA_CODEC_VT1702_6, 0, "VT1702_6" },
{ HDA_CODEC_VT1702_7, 0, "VT1702_7" },
{ HDA_CODEC_VT1716S_0, 0, "VT1716S_0" },
{ HDA_CODEC_VT1716S_1, 0, "VT1716S_1" },
{ HDA_CODEC_VT1718S_0, 0, "VT1718S_0" },
{ HDA_CODEC_VT1718S_1, 0, "VT1718S_1" },
{ HDA_CODEC_VT1802_0, 0, "VT1802_0" },
{ HDA_CODEC_VT1802_1, 0, "VT1802_1" },
{ HDA_CODEC_VT1812, 0, "VT1812" },
{ HDA_CODEC_VT1818S, 0, "VT1818S" },
{ HDA_CODEC_VT1828S, 0, "VT1828S" },
{ HDA_CODEC_VT2002P_0, 0, "VT2002P_0" },
{ HDA_CODEC_VT2002P_1, 0, "VT2002P_1" },
{ HDA_CODEC_VT2020, 0, "VT2020" },
{ HDA_CODEC_ATIRS600_1, 0, "ATI RS600" },
{ HDA_CODEC_ATIRS600_2, 0, "ATI RS600" },
{ HDA_CODEC_ATIRS690, 0, "ATI RS690/780" },
{ HDA_CODEC_ATIR6XX, 0, "ATI R6xx" },
{ HDA_CODEC_ATIRS600_1, 0, "RS600" },
{ HDA_CODEC_ATIRS600_2, 0, "RS600" },
{ HDA_CODEC_ATIRS690, 0, "RS690/780" },
{ HDA_CODEC_ATIR6XX, 0, "R6xx" },
{ HDA_CODEC_NVIDIAMCP67, 0, "NVIDIA MCP67" },
{ HDA_CODEC_NVIDIAMCP73, 0, "NVIDIA MCP73" },
{ HDA_CODEC_NVIDIAMCP78, 0, "NVIDIA MCP78" },
{ HDA_CODEC_NVIDIAMCP78_2, 0, "NVIDIA MCP78" },
{ HDA_CODEC_NVIDIAMCP78_3, 0, "NVIDIA MCP78" },
{ HDA_CODEC_NVIDIAMCP78_4, 0, "NVIDIA MCP78" },
{ HDA_CODEC_NVIDIAMCP7A, 0, "NVIDIA MCP7A" },
{ HDA_CODEC_NVIDIAGT220, 0, "NVIDIA GT220" },
{ HDA_CODEC_NVIDIAGT21X, 0, "NVIDIA GT21x" },
{ HDA_CODEC_NVIDIAMCP89, 0, "NVIDIA MCP89" },
{ HDA_CODEC_NVIDIAGT240, 0, "NVIDIA GT240" },
{ HDA_CODEC_NVIDIAGTS450, 0, "NVIDIA GTS450" },
{ HDA_CODEC_NVIDIAGT440, 0, "NVIDIA GT440" },
{ HDA_CODEC_NVIDIAGTX550, 0, "NVIDIA GTX550" },
{ HDA_CODEC_NVIDIAGTX570, 0, "NVIDIA GTX570" },
{ HDA_CODEC_NVIDIAMCP67, 0, "MCP67" },
{ HDA_CODEC_NVIDIAMCP73, 0, "MCP73" },
{ HDA_CODEC_NVIDIAMCP78, 0, "MCP78" },
{ HDA_CODEC_NVIDIAMCP78_2, 0, "MCP78" },
{ HDA_CODEC_NVIDIAMCP78_3, 0, "MCP78" },
{ HDA_CODEC_NVIDIAMCP78_4, 0, "MCP78" },
{ HDA_CODEC_NVIDIAMCP7A, 0, "MCP7A" },
{ HDA_CODEC_NVIDIAGT220, 0, "GT220" },
{ HDA_CODEC_NVIDIAGT21X, 0, "GT21x" },
{ HDA_CODEC_NVIDIAMCP89, 0, "MCP89" },
{ HDA_CODEC_NVIDIAGT240, 0, "GT240" },
{ HDA_CODEC_NVIDIAGTS450, 0, "GTS450" },
{ HDA_CODEC_NVIDIAGT440, 0, "GT440" }, // Revision Id: 0x100100
{ HDA_CODEC_NVIDIAGT440, 0, "GT440" },
{ HDA_CODEC_NVIDIAGTX550, 0, "GTX550" },
{ HDA_CODEC_NVIDIAGTX570, 0, "GTX570" },
{ HDA_CODEC_INTELIP, 0, "Intel Ibex Peak" },
{ HDA_CODEC_INTELBL, 0, "Intel Bearlake" },
{ HDA_CODEC_INTELCA, 0, "Intel Cantiga" },
{ HDA_CODEC_INTELEL, 0, "Intel Eaglelake" },
{ HDA_CODEC_INTELIP2, 0, "Intel Ibex Peak" },
{ HDA_CODEC_INTELCPT, 0, "Intel Cougar Point" },
{ HDA_CODEC_INTELPPT, 0, "Intel Panther Point" },
{ HDA_CODEC_INTELLLP, 0,"Intel Lynx Point" },
{ HDA_CODEC_INTELCL, 0, "Intel Crestline" },
{ HDA_CODEC_SII1390, 0, "Silicon Image SiI1390 HDMi" },
{ HDA_CODEC_SII1392, 0, "Silicon Image SiI1392 HDMi" },
{ HDA_CODEC_INTELIP, 0, "Ibex Peak" },
{ HDA_CODEC_INTELBL, 0, "Bearlake" },
{ HDA_CODEC_INTELCA, 0, "Cantiga" },
{ HDA_CODEC_INTELEL, 0, "Eaglelake" },
{ HDA_CODEC_INTELIP2, 0, "Ibex Peak" },
{ HDA_CODEC_INTELCPT, 0, "Cougar Point" },
{ HDA_CODEC_INTELPPT, 0, "Panther Point" },
{ HDA_CODEC_INTELLLP, 0, "Lynx Point" },
{ HDA_CODEC_INTELCL, 0, "Crestline" },
{ HDA_CODEC_SII1390, 0, "SiI1390 HDMi" },
{ HDA_CODEC_SII1392, 0, "SiI1392 HDMi" },
// Unknown CODECs
{ HDA_CODEC_ADXXXX, 0, "Analog Devices" },
{ HDA_CODEC_AGEREXXXX, 0, "Lucent/Agere Systems" },
{
static char desc[128];
const char* name_format = "Unknown HD Audio device %s";
const char *name_format = "Unknown HD Audio device %s";
uint32_t controller_model = ((controller_device_id << 16) | controller_vendor_id);
int i;
}
/* Not in table */
snprintf(desc, sizeof(desc),
"Unknown HD Audio device, vendor %04x, model %04x",
snprintf(desc, sizeof(desc), "Unknown HD Audio device, vendor %04x, model %04x",
controller_vendor_id, controller_device_id);
return desc;
}
static int devprop_add_hda_template(struct DevPropDevice *device)
{
if (!device)
{
return 0;
}
devices_number++;
return 1;
}
bool setup_hda_devprop(pci_dt_t *hda_dev)
{
structDevPropDevice*device = NULL;
uint16_tcontroller_device_id = hda_dev->device_id;
const char*value;
verbose("\n------------------------\n");
verbose("\tAUDIO DEVICE INFO\n");
verbose("-------------------------\n");
verbose("\tClass code: [%04x]\n", hda_dev->class_id);
devicepath = get_pci_dev_path(hda_dev);
controller_name = get_hda_controller_name(controller_device_id, controller_vendor_id);
return 0;
}
devprop_add_hda_template(device);
verbose("\tModel name: %s [%04x:%04x] (rev %02x)\n\tSubsystem: [%04x:%04x]\n\t%s\n",
controller_name, hda_dev->vendor_id, hda_dev->device_id, hda_dev->revision_id,
hda_dev->subsys_id.subsys.vendor_id, hda_dev->subsys_id.subsys.device_id, devicepath);
switch ((controller_device_id << 16) | controller_vendor_id)
{
case HDA_INTEL_SRSPLP:
case HDA_INTEL_SRSP:
/* if the key value kHDEFLayoutID as a value set that value, if not will assign a default layout */
if (getValueForKey(kHDEFLayoutID, &value, &len, &bootInfo->chameleonConfig) && len == HDEF_LEN * 2)
{
uint8_t new_HDEF_layout_id[HDEF_LEN];
if (hex2bin(value, new_HDEF_layout_id, HDEF_LEN) == 0)
{
memcpy(default_HDEF_layout_id, new_HDEF_layout_id, HDEF_LEN);
verbose("Using user supplied HDEF layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
default_HDEF_layout_id[0], default_HDEF_layout_id[1], default_HDEF_layout_id[2], default_HDEF_layout_id[3]);
}
}
else
{
verbose("Using default HDEF layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
default_HDEF_layout_id[0], default_HDEF_layout_id[1], default_HDEF_layout_id[2], default_HDEF_layout_id[3]);
}
devprop_add_value(device, "layout-id", default_HDEF_layout_id, HDEF_LEN);
devprop_add_value(device, "AAPL,slot-name", (uint8_t *)"Built-in", 9); // 0x09
devprop_add_value(device, "name", (uint8_t *)"audio", 6); // 0x06
devprop_add_value(device, "device_type", (uint8_t *)"High Definition Audio", 22); // 0x16
devprop_add_value(device, "built-in", &BuiltIn, 1);
devprop_add_value(device, "hda-gfx", (uint8_t *)"onboard-1", 10); // 0x0a
// "AFGLowPowerState" = <03000000>
break;
/* if the key value kHDEFLayoutID as a value set that value, if not will assign a default layout */
if (getValueForKey(kHDEFLayoutID, &value, &len, &bootInfo->chameleonConfig) && len == HDEF_LEN * 2)
{
uint8_t new_HDEF_layout_id[HDEF_LEN];
if (hex2bin(value, new_HDEF_layout_id, HDEF_LEN) == 0)
{
memcpy(default_HDEF_layout_id, new_HDEF_layout_id, HDEF_LEN);
verbose("\tUsing user supplied HDEF layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
default_HDEF_layout_id[0], default_HDEF_layout_id[1], default_HDEF_layout_id[2], default_HDEF_layout_id[3]);
}
}
else
{
verbose("\tUsing default HDEF layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
default_HDEF_layout_id[0], default_HDEF_layout_id[1], default_HDEF_layout_id[2], default_HDEF_layout_id[3]);
}
devprop_add_value(device, "layout-id", default_HDEF_layout_id, HDEF_LEN);
devprop_add_value(device, "AAPL,slot-name", (uint8_t *)"Built-in", 9); // 0x09
devprop_add_value(device, "name", (uint8_t *)"audio", 6); // 0x06
devprop_add_value(device, "device_type", (uint8_t *)"High Definition Audio", 22); // 0x16
devprop_add_value(device, "built-in", &BuiltIn, 1);
devprop_add_value(device, "hda-gfx", (uint8_t *)"onboard-1", 10); // 0x0a
// "AFGLowPowerState" = <03000000>
break;
/****************************************************************************************************************
* The above case are intended as for HDAU (NVIDIA) device onboard audio for GFX card with Audio controller HDMi
****************************************************************************************************************/
case HDA_NVIDIA_GK107:
case HDA_NVIDIA_GF110_1:
case HDA_NVIDIA_GF110_2:
case HDA_NVIDIA_GK106:
case HDA_NVIDIA_GK104:
case HDA_NVIDIA_GF119:
case HDA_NVIDIA_GT116:
case HDA_NVIDIA_GT104:
case HDA_NVIDIA_GT108:
case HDA_NVIDIA_GT106:
case HDA_NVIDIA_GT100:
case HDA_NVIDIA_0BE4:
case HDA_NVIDIA_0BE3:
case HDA_NVIDIA_0BE2:
/*****************************************************************************************************************
* The above case are intended as for HDAU (NVIDIA) device onboard audio for GFX card with Audio controller HDMi *
*****************************************************************************************************************/
case HDA_NVIDIA_GK107:
case HDA_NVIDIA_GF110_1:
case HDA_NVIDIA_GF110_2:
case HDA_NVIDIA_GK106:
case HDA_NVIDIA_GK104:
case HDA_NVIDIA_GF119:
case HDA_NVIDIA_GT116:
case HDA_NVIDIA_GT104:
case HDA_NVIDIA_GT108:
case HDA_NVIDIA_GT106:
case HDA_NVIDIA_GT100:
case HDA_NVIDIA_0BE4:
case HDA_NVIDIA_0BE3:
case HDA_NVIDIA_0BE2:
/* if the key value kHDAULayoutID as a value set that value, if not will assign a default layout */
if (getValueForKey(kHDAULayoutID, &value, &len, &bootInfo->chameleonConfig) && len == HDAU_LEN * 2)
{
uint8_t new_HDAU_layout_id[HDAU_LEN];
if (hex2bin(value, new_HDAU_layout_id, HDAU_LEN) == 0)
{
memcpy(default_HDAU_layout_id, new_HDAU_layout_id, HDAU_LEN);
verbose("Using user supplied HDAU layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
default_HDAU_layout_id[0], default_HDAU_layout_id[1], default_HDAU_layout_id[2], default_HDAU_layout_id[3]);
}
}
else
{
verbose("Using default HDAU layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
default_HDAU_layout_id[0], default_HDAU_layout_id[1], default_HDAU_layout_id[2], default_HDAU_layout_id[3]);
}
/* if the key value kHDAULayoutID as a value set that value, if not will assign a default layout */
if (getValueForKey(kHDAULayoutID, &value, &len, &bootInfo->chameleonConfig) && len == HDAU_LEN * 2)
{
uint8_t new_HDAU_layout_id[HDAU_LEN];
if (hex2bin(value, new_HDAU_layout_id, HDAU_LEN) == 0)
{
memcpy(default_HDAU_layout_id, new_HDAU_layout_id, HDAU_LEN);
verbose("\tUsing user supplied HDAU layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
default_HDAU_layout_id[0], default_HDAU_layout_id[1], default_HDAU_layout_id[2], default_HDAU_layout_id[3]);
}
}
else
{
verbose("\tUsing default HDAU layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
default_HDAU_layout_id[0], default_HDAU_layout_id[1], default_HDAU_layout_id[2], default_HDAU_layout_id[3]);
}
devprop_add_value(device, "layout-id", default_HDAU_layout_id, HDAU_LEN); /*FIX ME*/
devprop_add_value(device, "@0,connector-type", connector_type_value, 4);
devprop_add_value(device, "@1,connector-type", connector_type_value, 4);
devprop_add_value(device, "hda-gfx", (uint8_t *)"onboard-2", 10);
devprop_add_value(device, "built-in", &BuiltIn, 1);
break;
devprop_add_value(device, "layout-id", default_HDAU_layout_id, HDAU_LEN); /*FIX ME*/
devprop_add_value(device, "@0,connector-type", connector_type_value, 4);
devprop_add_value(device, "@1,connector-type", connector_type_value, 4);
devprop_add_value(device, "hda-gfx", (uint8_t *)"onboard-2", 10);
devprop_add_value(device, "built-in", &BuiltIn, 1);
break;
/*************************************************************************************************************
* The above case are intended as for HDAU (ATi) device onboard audio for GFX card with Audio controller HDMi
*************************************************************************************************************/
case HDA_ATI_SB450:
case HDA_ATI_SB600:
case HDA_ATI_HUDSON:
case HDA_ATI_RS600:
case HDA_ATI_RS690:
case HDA_ATI_RS780:
case HDA_ATI_R600:
case HDA_ATI_RV630:
case HDA_ATI_RV610:
case HDA_ATI_RV670:
case HDA_ATI_RV635:
case HDA_ATI_RV620:
case HDA_ATI_RV770:
case HDA_ATI_RV730:
case HDA_ATI_RV710:
case HDA_ATI_RV740:
case HDA_ATI_RV870:
case HDA_ATI_RV840:
case HDA_ATI_RV830:
case HDA_ATI_RV810:
case HDA_ATI_RV970:
case HDA_ATI_RV940:
case HDA_ATI_RV930:
case HDA_ATI_RV910:
case HDA_ATI_R1000:
case HDA_ATI_SI:
case HDA_ATI_VERDE:
/**************************************************************************************************************
* The above case are intended as for HDAU (ATi) device onboard audio for GFX card with Audio controller HDMi *
**************************************************************************************************************/
case HDA_ATI_SB450:
case HDA_ATI_SB600:
case HDA_ATI_HUDSON:
case HDA_ATI_RS600:
case HDA_ATI_RS690:
case HDA_ATI_RS780:
case HDA_ATI_R600:
case HDA_ATI_RV630:
case HDA_ATI_RV610:
case HDA_ATI_RV670:
case HDA_ATI_RV635:
case HDA_ATI_RV620:
case HDA_ATI_RV770:
case HDA_ATI_RV730:
case HDA_ATI_RV710:
case HDA_ATI_RV740:
case HDA_ATI_RV870:
case HDA_ATI_RV840:
case HDA_ATI_RV830:
case HDA_ATI_RV810:
case HDA_ATI_RV970:
case HDA_ATI_RV940:
case HDA_ATI_RV930:
case HDA_ATI_RV910:
case HDA_ATI_R1000:
case HDA_ATI_SI:
case HDA_ATI_VERDE:
/* if the key value kHDAULayoutID as a value set that value, if not will assign a default layout */
if (getValueForKey(kHDAULayoutID, &value, &len, &bootInfo->chameleonConfig) && len == HDAU_LEN * 2)
{
uint8_t new_HDAU_layout_id[HDAU_LEN];
if (hex2bin(value, new_HDAU_layout_id, HDAU_LEN) == 0)
{
memcpy(default_HDAU_layout_id, new_HDAU_layout_id, HDAU_LEN);
verbose("Using user supplied HDAU layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
default_HDAU_layout_id[0], default_HDAU_layout_id[1], default_HDAU_layout_id[2], default_HDAU_layout_id[3]);
}
/* if the key value kHDAULayoutID as a value set that value, if not will assign a default layout */
if (getValueForKey(kHDAULayoutID, &value, &len, &bootInfo->chameleonConfig) && len == HDAU_LEN * 2)
{
uint8_t new_HDAU_layout_id[HDAU_LEN];
if (hex2bin(value, new_HDAU_layout_id, HDAU_LEN) == 0)
{
memcpy(default_HDAU_layout_id, new_HDAU_layout_id, HDAU_LEN);
verbose("\tUsing user supplied HDAU layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
default_HDAU_layout_id[0], default_HDAU_layout_id[1], default_HDAU_layout_id[2], default_HDAU_layout_id[3]);
}
}
else
{
verbose("Using default HDAU layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
default_HDAU_layout_id[0], default_HDAU_layout_id[1], default_HDAU_layout_id[2], default_HDAU_layout_id[3]);
}
verbose("\tUsing default HDAU layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
default_HDAU_layout_id[0], default_HDAU_layout_id[1], default_HDAU_layout_id[2], default_HDAU_layout_id[3]);
}
devprop_add_value(device, "layout-id", default_HDAU_layout_id, HDAU_LEN); /*FIX ME*/
devprop_add_value(device, "hda-gfx", (uint8_t *)"onboard-2", 10);
devprop_add_value(device, "built-in", &BuiltIn, 1);
break;
devprop_add_value(device, "layout-id", default_HDAU_layout_id, HDAU_LEN); /*FIX ME*/
devprop_add_value(device, "hda-gfx", (uint8_t *)"onboard-2", 10);
devprop_add_value(device, "built-in", &BuiltIn, 1);
break;
default:
break;
default:
break;
}
verbose("Class code: [%04x]\nModel name: %s [%04x:%04x] (rev %02x)\nSubsystem: [%04x:%04x]\n%s\ndevice number: %d\n",
hda_dev->class_id, controller_name, hda_dev->vendor_id, hda_dev->device_id, hda_dev->revision_id,
hda_dev->subsys_id.subsys.vendor_id, hda_dev->subsys_id.subsys.device_id, devicepath, devices_number);
verbose("--------------------------------\n");
stringdata = malloc(sizeof(uint8_t) * string->length);
memcpy(stringdata, (uint8_t*)devprop_generate_string(string), string->length);
stringlength = string->length;
trunk/i386/libsaio/dram_controllers.c
2020
2121
2222
23
23
2424
2525
2626
27
27
2828
29
29
3030
3131
3232
......
540540
541541
542542
543
544
543
544
545545
546
546
547547
548548
549549
......
553553
554554
555555
556
556557
557558
558559
559560
560
561
561562
562563
563564
......
574575
575576
576577
577
578
578579
579580
580581
......
583584
584585
585586
587
586588
#include "dram_controllers.h"
#ifndef DEBUG_DRAM
#define DEBUG_DRAM 0
#define DEBUG_DRAM 0
#endif
#if DEBUG_DRAM
#define DBG(x...) printf(x)
#define DBG(x...) printf(x)
#else
#define DBG(x...)
#define DBG(x...)
#endif
/*
{ 0x8086, 0x3401, "5520/5500/X58",setup_nhm, get_fsb_nhm,get_timings_nhm},
{ 0x8086, 0x3402, "5520/5500/X58",setup_nhm, get_fsb_nhm,get_timings_nhm},
{ 0x8086, 0x3403, "5500",setup_nhm, get_fsb_nhm,get_timings_nhm},
{ 0x8086, 0x3404, "5520/5500/X58",setup_nhm, get_fsb_nhm,get_timings_nhm},
{ 0x8086, 0x3405, "5520/5500/X58",setup_nhm, get_fsb_nhm,get_timings_nhm},
{ 0x8086, 0x3404, "X58",setup_nhm, get_fsb_nhm,get_timings_nhm},
{ 0x8086, 0x3405, "X58",setup_nhm, get_fsb_nhm,get_timings_nhm},
{ 0x8086, 0x3406, "5520",setup_nhm, get_fsb_nhm,get_timings_nhm},
{ 0x8086, 0x3407, "5520/5500/X58",setup_nhm, get_fsb_nhm,get_timings_nhm},
{ 0x8086, 0x3407, "X58",setup_nhm, get_fsb_nhm,get_timings_nhm},
};
static const char *memory_channel_types[] =
void scan_dram_controller(pci_dt_t *dram_dev)
{
verbose("[ DRAM CONTROLLER ]\n");
int i;
for(i = 1; i < sizeof(dram_controllers) / sizeof(dram_controllers[0]); i++)
{
if ((dram_controllers[i].vendor == dram_dev->vendor_id) && (dram_controllers[i].device == dram_dev->device_id)) {
verbose("%s%s DRAM Controller [%4x:%4x] at %02x:%02x.%x\n",
verbose("\t%s%s DRAM Controller [%4x:%4x] at %02x:%02x.%x\n",
(dram_dev->vendor_id == 0x8086) ? "Intel " : "" ,
dram_controllers[i].name, dram_dev->vendor_id, dram_dev->device_id,
dram_dev->dev.bits.bus, dram_dev->dev.bits.dev, dram_dev->dev.bits.func);
dram_controllers[i].poll_speed(dram_dev);
}
verbose("Frequency detected: %d MHz (%d) %s Channel \n\tCAS:%d tRC:%d tRP:%d RAS:%d (%d-%d-%d-%d)\n",
verbose("\tFrequency detected: %d MHz (%d) %s Channel \n\t\tCAS:%d tRC:%d tRP:%d RAS:%d (%d-%d-%d-%d)\n",
(uint32_t)Platform.RAM.Frequency / 1000000,
(uint32_t)Platform.RAM.Frequency / 500000,
memory_channel_types[Platform.RAM.Channels]
//getchar();
}
}
verbose("\n");
}
trunk/i386/libsaio/nvidia.c
9191
9292
9393
94
94
9595
9696
9797
......
15911591
15921592
15931593
1594
1594
15951595
15961596
15971597
......
18451845
18461846
18471847
1848
1848
18491849
18501850
18511851
......
18571857
18581858
18591859
1860
18611860
1861
18621862
18631863
18641864
......
19071907
19081908
19091909
1910
1910
19111911
19121912
19131913
......
19511951
19521952
19531953
1954
1954
19551955
1956
1957
19581956
1959
19601957
19611958
19621959
......
19951992
19961993
19971994
1998
1995
19991996
20001997
20011998
......
21162113
21172114
21182115
2116
2117
21192118
21202119
21212120
......
21252124
21262125
21272126
2128
2127
21292128
21302129
21312130
21322131
2133
2132
21342133
21352134
21362135
21372136
2138
2137
21392138
21402139
21412140
......
21572156
21582157
21592158
2160
2159
21612160
21622161
21632162
......
21712170
21722171
21732172
2174
2173
21752174
21762175
21772176
......
21812180
21822181
21832182
2184
2183
21852184
21862185
21872186
21882187
2189
2188
21902189
21912190
21922191
......
21942193
21952194
21962195
2197
2196
21982197
21992198
22002199
......
22152214
22162215
22172216
2218
2217
22192218
22202219
22212220
2222
2221
2222
22232223
22242224
22252225
2226
2226
2227
22272228
22282229
22292230
......
22562257
22572258
22582259
2259
2260
22602261
22612262
22622263
......
23052306
23062307
23072308
2308
2309
23092310
23102311
23112312
......
23182319
23192320
23202321
2321
2322
23222323
23232324
23242325
......
23332334
23342335
23352336
2336
2337
23372338
23382339
23392340
const char *nvidia_device_type_child[]={ "device_type","NVDA,Child" };
const char *nvidia_name_0[] ={ "@0,name","NVDA,Display-A" };
const char *nvidia_name_1[] ={ "@1,name","NVDA,Display-B" };
const char *nvidia_slot_name[] ={ "AAPL,slot-name", "Slot-1" };
//const char *nvidia_slot_name[] ={ "AAPL,slot-name", "Slot-1" };
static uint8_t default_NVCAP[]= {
0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00,
{ 0x10DE1248,0x152D0930,"Quanta GeForce GT 635M" },
{ 0x10DE124D,0x146210CC,"MSi GeForce GT 635M" },
{ 0x10DE124D,0x146210CC,"MSi GeForce GT 635M" }
};
static int patch_nvidia_rom(uint8_t *rom)
int i, j;
// First check in the plist, (for e.g this can override any hardcoded devices)
cardList_t * nvcard = FindCardWithIds(device_id, subsys_id);
cardList_t *nvcard = FindCardWithIds(device_id, subsys_id);
if (nvcard)
{
if (nvcard->model)
//ErmaC added selector for Chameleon "old" style in System Profiler
if (getBoolForKey(kNvidiaGeneric, &showGeneric, &bootInfo->chameleonConfig))
{
verbose("NvidiaGeneric = Yes\n");
for (i = 1; i < (sizeof(nvidia_card_generic) / sizeof(nvidia_card_generic[0])); i++)
{
if (nvidia_card_generic[i].device == device_id)
static int devprop_add_nvidia_template(DevPropDevice *device)
{
char tmp[16];
DBG("devprop_add_nvidia_template\n");
DBG("\tdevprop_add_nvidia_template\n");
if (!device)
{
return 0;
}
}
else
else if (!DP_ADD_TEMP_VAL(device, nvidia_device_type_child))
{
if (!DP_ADD_TEMP_VAL(device, nvidia_device_type_child))
{
return 0;
}
}
// Rek : Dont use sprintf return, it does not WORK !! our custom sprintf() always return 0!
uint64_t vram_size = 0;
// First check if any value exist in the plist
cardList_t * nvcard = FindCardWithIds(device_id, subsys_id);
cardList_t *nvcard = FindCardWithIds(device_id, subsys_id);
if (nvcard)
{
if (nvcard->videoRam > 0)
// get card type
nvCardType = (REG32(0) >> 20) & 0x1ff;
verbose("\tClass code: [%04x]\n", nvda_dev->class_id);
model = get_nvidia_model(((nvda_dev->vendor_id << 16) | nvda_dev->device_id),((nvda_dev->subsys_id.subsys.vendor_id << 16) | nvda_dev->subsys_id.subsys.device_id));
// Amount of VRAM in kilobytes
if (getBoolForKey(kUseNvidiaROM, &doit, &bootInfo->chameleonConfig) && doit)
{
verbose("Looking for nvidia video bios file %s\n", nvFilename);
verbose("\tLooking for nvidia video bios file %s\n", nvFilename);
nvBiosOveride = load_nvidia_bios_file(nvFilename, &rom);
if (nvBiosOveride > 0)
{
verbose("Using nVidia Video BIOS File %s (%d Bytes)\n", nvFilename, nvBiosOveride);
verbose("\tUsing nVidia Video BIOS File %s (%d Bytes)\n", nvFilename, nvBiosOveride);
DBG("%s Signature 0x%02x%02x %d bytes\n", nvFilename, rom[0], rom[1], nvBiosOveride);
}
else
{
printf("ERROR: unable to open nVidia Video BIOS File %s\n", nvFilename);
printf("\tERROR: unable to open nVidia Video BIOS File %s\n", nvFilename);
free(rom);
return false;
}
if (checkNvRomSig(nvRom))
{
bcopy((uint8_t *)nvRom, rom, NVIDIA_ROM_SIZE);
DBG("PROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);
DBG("\tPROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);
}
else
{
if(checkNvRomSig(nvRom))
{
bcopy((uint32_t *)nvRom, rom, NVIDIA_ROM_SIZE);
DBG("PRAM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);
DBG("\tPRAM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);
}
else
{
// Valid Signature ?
if (!checkNvRomSig(rom))
{
printf("ERROR: Unable to locate nVidia Video BIOS\n");
printf("\tERROR: Unable to locate nVidia Video BIOS\n");
return false;
}
else
{
DBG("ROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);
DBG("\tROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);
}
}//end PRAM check
}//end PROM check
if ((nvPatch = patch_nvidia_rom(rom)) == PATCH_ROM_FAILED)
{
printf("ERROR: nVidia ROM Patching Failed!\n");
printf("\tERROR: nVidia ROM Patching Failed!\n");
free(rom);
return false;
}
}
else
{
printf("nVidia incorrect PCI ROM signature: 0x%x\n", rom_pci_header->signature);
printf("\tnVidia incorrect PCI ROM signature: 0x%x\n", rom_pci_header->signature);
}
}
verbose("%s %dMB NV%02x [%04x:%04x]-[%04x:%04x] :: %s device number: %d\n",
verbose("\tdevice number: %d\n\t%s %dMB NV%02x [%04x:%04x]-[%04x:%04x]\n\t%s\n",
devices_number,
model, (uint32_t)(videoRam / 1024 / 1024),
(REG32(0) >> 20) & 0x1ff, nvda_dev->vendor_id, nvda_dev->device_id,
nvda_dev->subsys_id.subsys.vendor_id, nvda_dev->subsys_id.subsys.device_id,
devicepath, devices_number);
devicepath);
verbose("\tNvidiaGeneric = %s\n", showGeneric ? "Yes" : "No");
if (!string)
{
// get bios version
const int MAX_BIOS_VERSION_LENGTH = 32;
char* version_str = (char*)malloc(MAX_BIOS_VERSION_LENGTH);
char *version_str = (char *)malloc(MAX_BIOS_VERSION_LENGTH);
memset(version_str, 0, MAX_BIOS_VERSION_LENGTH);
if (hex2bin(value, new_NVCAP, NVCAP_LEN) == 0)
{
verbose("Using user supplied NVCAP for %s :: %s\n", model, devicepath);
verbose("\tUsing user supplied NVCAP for %s :: %s\n", model, devicepath);
memcpy(default_NVCAP, new_NVCAP, NVCAP_LEN);
}
}
{
memcpy(default_dcfg_0, new_dcfg0, DCFG0_LEN);
verbose("Using user supplied @0,display-cfg\n");
verbose("\tUsing user supplied @0,display-cfg\n");
printf("@0,display-cfg: %02x%02x%02x%02x\n",
default_dcfg_0[0], default_dcfg_0[1], default_dcfg_0[2], default_dcfg_0[3]);
}
memcpy(default_dcfg_1, new_dcfg1, DCFG1_LEN);
verbose("Using user supplied @1,display-cfg\n");
printf("@1,display-cfg: %02x%02x%02x%02x\n",
printf("\t@1,display-cfg: %02x%02x%02x%02x\n",
default_dcfg_1[0], default_dcfg_1[1], default_dcfg_1[2], default_dcfg_1[3]);
}
}
trunk/i386/libsaio/ati.c
25012501
25022502
25032503
2504
2505
25042506
25052507
25062508
......
25482550
25492551
25502552
2551
2553
25522554
25532555
25542556
25552557
25562558
25572559
2558
2559
25602560
25612561
25622562
{
char *devicepath;
verbose("\tClass code: [%04x]\n", ati_dev->class_id );
if (!init_card(ati_dev))
{
return false;
stringlength = string->length;
// -------------------------------------------------
DBG("ATI %s %s %dMB (%s) [%04x:%04x] (subsys [%04x:%04x]):: %s\n",
DBG("\tATI %s %s %dMB (%s) [%04x:%04x] (subsys [%04x:%04x])\n\t%s\n",
chip_family_name[card->info->chip_family], card->info->model_name,
(uint32_t)(card->vram_size / (1024 * 1024)), card->cfg_name,
ati_dev->vendor_id, ati_dev->device_id,
ati_dev->subsys_id.subsys.vendor_id, ati_dev->subsys_id.subsys.device_id,
devicepath);
verbose("---------------------------------------------\n");
free(card);
return true;
trunk/i386/libsaio/cpu.c
328328
329329
330330
331
331
332332
333333
334334
......
367367
368368
369369
370
370
371371
372372
373373
......
705705
706706
707707
708
708
709709
710710
711711
......
731731
732732
733733
734
734
735735
736736
737737
......
10231023
10241024
10251025
1026
1026
10271027
10281028
10291029
1030
1030
10311031
10321032
10331033
......
10421042
10431043
10441044
1045
1046
1047
10481045
1049
1046
10501047
10511048
1052
1049
10531050
10541051
1055
1056
1057
1058
1059
1052
1053
1054
1055
1056
10601057
10611058
1062
1059
10631060
10641061
1065
1062
10661063
10671064
1068
1065
10691066
10701067
1071
1068
10721069
10731070
10741071
10751072
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
10891086
1090
1087
10911088
10921089
10931090
p->CPU.BrandString[0] = '\0';
}
p->CPU.BrandString[47] = '\0';
//DBG("Brandstring = %s\n", p->CPU.BrandString);
//DBG("\tBrandstring = %s\n", p->CPU.BrandString);
}
// ==============================================================
}
void scan_cpu(PlatformInfo_t *p)
{
verbose("[ CPU INFO ]\n");
get_cpuid(p);
uint64_tbusFCvtt2n;
max_ratio = (max_ratio + 5);
}
verbose("Bus-Ratio: min=%d, max=%s\n", bus_ratio_min, newratio);
verbose("\tBus-Ratio: min=%d, max=%s\n", bus_ratio_min, newratio);
// extreme overclockers may love 320 ;)
if ((max_ratio >= min_ratio) && (max_ratio <= 320))
p->CPU.MinRatio = min_ratio;
myfsb = busFrequency / 1000000;
verbose("Sticking with [BCLK: %dMhz, Bus-Ratio: %d]\n", myfsb, max_ratio/10); // Bungo: fixed wrong Bus-Ratio readout
verbose("\tSticking with [BCLK: %dMhz, Bus-Ratio: %d]\n", myfsb, max_ratio/10); // Bungo: fixed wrong Bus-Ratio readout
currcoef = bus_ratio_max;
break;
if (!busFrequency)
{
busFrequency = (DEFAULT_FSB * 1000);
DBG("CPU: busFrequency = 0! using the default value for FSB!\n");
DBG("\tCPU: busFrequency = 0! using the default value for FSB!\n");
cpuFrequency = tscFreq;
}
DBG("cpu freq = 0x%016llxn", timeRDTSC() * 20);
DBG("\tcpu freq = 0x%016llxn", timeRDTSC() * 20);
#endif
p->CPU.CPUFrequency = cpuFrequency;
// keep formatted with spaces instead of tabs
DBG("\n------------------------------\n");
DBG("\tCPU INFO\n");
DBG("------------------------------\n");
DBG("CPUID Raw Values:\n");
DBG("\tCPUID Raw Values:\n");
for (i = 0; i < CPUID_MAX; i++)
{
DBG("%02d: %08X-%08X-%08X-%08X\n", i, p->CPU.CPUID[i][eax], p->CPU.CPUID[i][ebx], p->CPU.CPUID[i][ecx], p->CPU.CPUID[i][edx]);
DBG("\t%02d: %08X-%08X-%08X-%08X\n", i, p->CPU.CPUID[i][eax], p->CPU.CPUID[i][ebx], p->CPU.CPUID[i][ecx], p->CPU.CPUID[i][edx]);
}
DBG("\n");
DBG("Brand String: %s\n",p->CPU.BrandString);// Processor name (BIOS)
DBG("Vendor: 0x%X\n",p->CPU.Vendor);// Vendor ex: GenuineIntel
DBG("Family: 0x%X\n",p->CPU.Family);// Family ex: 6 (06h)
DBG("ExtFamily: 0x%X\n",p->CPU.ExtFamily);
DBG("Signature: 0x%08X\n",p->CPU.Signature);// CPUID signature
DBG("\tBrand String: %s\n",p->CPU.BrandString);// Processor name (BIOS)
DBG("\tVendor: 0x%X\n",p->CPU.Vendor);// Vendor ex: GenuineIntel
DBG("\tFamily: 0x%X\n",p->CPU.Family);// Family ex: 6 (06h)
DBG("\tExtFamily: 0x%X\n",p->CPU.ExtFamily);
DBG("\tSignature: 0x%08X\n",p->CPU.Signature);// CPUID signature
/*switch (p->CPU.Type) {
case PT_OEM:
DBG("Processor type: Intel Original OEM Processor\n");
DBG("\tProcessor type: Intel Original OEM Processor\n");
break;
case PT_OD:
DBG("Processor type: Intel Over Drive Processor\n");
DBG("\tProcessor type: Intel Over Drive Processor\n");
break;
case PT_DUAL:
DBG("Processor type: Intel Dual Processor\n");
DBG("\tProcessor type: Intel Dual Processor\n");
break;
case PT_RES:
DBG("Processor type: Intel Reserved\n");
DBG("\tProcessor type: Intel Reserved\n");
break;
default:
break;
}*/
DBG("Model: 0x%X\n",p->CPU.Model);// Model ex: 37 (025h)
DBG("ExtModel: 0x%X\n",p->CPU.ExtModel);
DBG("Stepping: 0x%X\n",p->CPU.Stepping);// Stepping ex: 5 (05h)
DBG("MaxCoef: %d\n",p->CPU.MaxCoef);
DBG("CurrCoef: %d\n",p->CPU.CurrCoef);
DBG("MaxDiv: %d\n",p->CPU.MaxDiv);
DBG("CurrDiv: %d\n",p->CPU.CurrDiv);
DBG("TSCFreq: %dMHz\n",p->CPU.TSCFrequency / 1000000);
DBG("FSBFreq: %dMHz\n",p->CPU.FSBFrequency / 1000000);
DBG("CPUFreq: %dMHz\n",p->CPU.CPUFrequency / 1000000);
DBG("Cores: %d\n",p->CPU.NoCores);// Cores
DBG("Logical processor: %d\n",p->CPU.NoThreads);// Logical procesor
DBG("Features: 0x%08x\n",p->CPU.Features);
DBG("\tModel: 0x%X\n",p->CPU.Model);// Model ex: 37 (025h)
DBG("\tExtModel: 0x%X\n",p->CPU.ExtModel);
DBG("\tStepping: 0x%X\n",p->CPU.Stepping);// Stepping ex: 5 (05h)
DBG("\tMaxCoef: %d\n",p->CPU.MaxCoef);
DBG("\tCurrCoef: %d\n",p->CPU.CurrCoef);
DBG("\tMaxDiv: %d\n",p->CPU.MaxDiv);
DBG("\tCurrDiv: %d\n",p->CPU.CurrDiv);
DBG("\tTSCFreq: %dMHz\n",p->CPU.TSCFrequency / 1000000);
DBG("\tFSBFreq: %dMHz\n",p->CPU.FSBFrequency / 1000000);
DBG("\tCPUFreq: %dMHz\n",p->CPU.CPUFrequency / 1000000);
DBG("\tCores: %d\n",p->CPU.NoCores);// Cores
DBG("\tLogical processor: %d\n",p->CPU.NoThreads);// Logical procesor
DBG("\tFeatures: 0x%08x\n",p->CPU.Features);
DBG("\n---------------------------------------------\n");
verbose("\n");
#if DEBUG_CPU
pause();
#endif
trunk/i386/libsaio/pci_setup.c
1818
1919
2020
21
22
21
22
23
2324
2425
2526
......
2829
2930
3031
31
32
33
34
35
36
37
38
39
40
3241
3342
34
35
43
3644
45
46
47
48
49
50
51
3752
53
54
3855
3956
4057
......
5370
5471
5572
56
57
58
59
73
74
6075
6176
6277
6378
64
65
66
67
79
80
6881
6982
7083
......
7487
7588
7689
77
90
7891
7992
8093
8194
8295
96
8397
98
8499
85100
86101
87102
88
103
89104
90105
91106
92107
93108
109
94110
111
95112
96113
97114
98115
99
116
100117
101118
102119
103120
104121
122
105123
124
106125
107126
108127
......
113132
114133
115134
116
135
117136
118137
138
119139
140
120141
121142
122143
......
125146
126147
127148
149
150
151
152
153
154
155
156
157
158
159
128160
129
161
130162
131163
164
132165
166
133167
134168
135169
extern bool setup_nvidia_devprop(pci_dt_t *nvda_dev);
extern bool setup_gma_devprop(pci_dt_t *gma_dev);
extern bool setup_hda_devprop(pci_dt_t *hda_dev);
extern void setup_eth_builtin(pci_dt_t *eth_dev);
extern void setup_wifi_airport(pci_dt_t *wifi_dev);
extern void setup_eth_devdrop(pci_dt_t *eth_dev);
extern void setup_wifi_devdrop(pci_dt_t *wifi_dev);
extern void notify_usb_dev(pci_dt_t *pci_dev);
extern void force_enable_hpet(pci_dt_t *lpc_dev);
void setup_pci_devs(pci_dt_t *pci_dt)
{
char *devicepath;
bool doit, do_eth_devprop, do_wifi_devprop, do_gfx_devprop, do_enable_hpet, do_hda_devprop = false;
bool do_gfx_devprop = false;
bool do_skip_n_devprop = false;
bool do_skip_a_devprop = false;
bool do_skip_i_devprop = false;
bool do_enable_hpet = false;
bool do_hda_devprop = false;
pci_dt_t *current = pci_dt;
getBoolForKey(kEthernetBuiltIn, &do_eth_devprop, &bootInfo->chameleonConfig);
getBoolForKey(kEnableWifi, &do_wifi_devprop, &bootInfo->chameleonConfig);
// GraphicsEnabler
getBoolForKey(kGraphicsEnabler, &do_gfx_devprop, &bootInfo->chameleonConfig);
// Skip keys
getBoolForKey(kSkipNvidiaGfx, &do_skip_n_devprop, &bootInfo->chameleonConfig);
getBoolForKey(kSkipAtiGfx, &do_skip_a_devprop, &bootInfo->chameleonConfig);
getBoolForKey(kSkipIntelGfx, &do_skip_i_devprop, &bootInfo->chameleonConfig);
// HDAEnable
getBoolForKey(kHDAEnabler, &do_hda_devprop, &bootInfo->chameleonConfig);
// ForceHPET
getBoolForKey(kForceHPET, &do_enable_hpet, &bootInfo->chameleonConfig);
while (current)
case PCI_CLASS_NETWORK_ETHERNET:
DBG("Setup ETHERNET %s enabled\n", do_eth_devprop? "is":"is not");
if (do_eth_devprop)
{
setup_eth_builtin(current);
}
verbose("[ ETHERNET DEVICE INFO ]\n");
setup_eth_devdrop(current);
break; // PCI_CLASS_NETWORK_ETHERNET
case PCI_CLASS_NETWORK_OTHER:
DBG("Setup WIRELESS %s enabled\n", do_wifi_devprop? "is":"is not");
if (do_wifi_devprop)
{
setup_wifi_airport(current);
}
verbose("[ WIRELESS DEVICE INFO ]\n");
setup_wifi_devdrop(current);
break; // PCI_CLASS_NETWORK_OTHER
case PCI_CLASS_DISPLAY_VGA:
switch (current->vendor_id)
{
case PCI_VENDOR_ID_ATI:
if (getBoolForKey(kSkipAtiGfx, &doit, &bootInfo->chameleonConfig) && doit)
if ( do_skip_a_devprop )
{
verbose("Skip ATi/AMD gfx device!\n");
}
else
{
verbose("[ ATi GFX DEVICE INFO ]\n");
setup_ati_devprop(current);
verbose("\n");
}
break; // PCI_VENDOR_ID_ATI
case PCI_VENDOR_ID_INTEL:
if (getBoolForKey(kSkipIntelGfx, &doit, &bootInfo->chameleonConfig) && doit)
if ( do_skip_i_devprop )
{
verbose("Skip Intel gfx device!\n");
}
else
{
verbose("[ INTEL GMA DEVICE INFO ]\n");
setup_gma_devprop(current);
verbose("\n");
}
break; // PCI_VENDOR_ID_INTEL
case PCI_VENDOR_ID_NVIDIA:
if (getBoolForKey(kSkipNvidiaGfx, &doit, &bootInfo->chameleonConfig) && doit)
if ( do_skip_n_devprop )
{
verbose("Skip Nvidia gfx device!\n");
}
else
{
verbose("[ NVIDIA GFX DEVICE INFO ]\n");
setup_nvidia_devprop(current);
verbose("\n");
}
break; // PCI_VENDOR_ID_NVIDIA
break; // PCI_CLASS_DISPLAY_VGA
case PCI_CLASS_MULTIMEDIA_AUDIO_DEV:
DBG("Setup HDEF %s enabled\n", do_hda_devprop? "is":"is not");
DBG("Setup HDEF %s enabled\n", do_hda_devprop ? "is":"is not");
if (do_hda_devprop)
{
verbose("[ AUDIO DEVICE INFO ]\n");
setup_hda_devprop(current);
verbose("\n");
}
break; // PCI_CLASS_MULTIMEDIA_AUDIO_DEV
notify_usb_dev(current);
break; // PCI_CLASS_SERIAL_USB
case PCI_CLASS_SERIAL_FIREWIRE:
DBG("FireWire\n");
verbose("[ FIREWIRE DEVICE INFO ]\n");
verbose("\tClass code: [%04x]\n\tFireWire device [%04x:%04x]-[%04x:%04x]\n\t%s\n",
current->class_id,current->vendor_id, current->device_id,
current->subsys_id.subsys.vendor_id,
current->subsys_id.subsys.device_id, devicepath);
//set_fwr_devdrop(current);
verbose("\n");
break; // PCI_CLASS_SERIAL_FIREWIRE
case PCI_CLASS_BRIDGE_ISA:
DBG("Force HPET %s enabled\n", do_enable_hpet? "is":"is not");
DBG("Force HPET %s enabled\n", do_enable_hpet ? "is":"is not");
if (do_enable_hpet)
{
verbose("[ HPET ]\n");
force_enable_hpet(current);
verbose("\n");
}
break; // PCI_CLASS_BRIDGE_ISA
trunk/i386/libsaio/cpu.h
243243
244244
245245
246
247246
248247
249248
: : "d"(value) : "%al");
}
inline static uint64_t
get_PIT2(unsigned int *value)
{
trunk/i386/libsaio/smbios.c
10961096
10971097
10981098
1099
1100
1101
1099
1100
1101
1102
11021103
11031104
11041105
......
12381239
12391240
12401241
1242
12411243
12421244
12431245
......
12651267
12661268
12671269
1268
1270
12691271
12701272
12711273
}
*/
//-------------------------------------------------------------------------------------------------------------------------
// EndOfTable
//-------------------------------------------------------------------------------------------------------------------------
/* ==============================================
EndOfTable
================================================ */
void addSMBEndOfTable(SMBStructPtrs *structPtr)
{
structPtr->new->type= kSMBTypeEndOfTable;
case kSMBTypeMemorySPD:
case kSMBTypeOemProcessorType:
case kSMBTypeOemProcessorBusSpeed:
//case kSMBTypeOemPlatformFeature:
/* And this one too, to be added at the end */
case kSMBTypeEndOfTable:
break;
addSMBMemorySPD(structPtr);
addSMBOemProcessorType(structPtr);
addSMBOemProcessorBusSpeed(structPtr);
//addSMBOemPlatformFeature(structPtr);
addSMBEndOfTable(structPtr);
}
trunk/i386/libsaio/smbios_decode.c
659659
660660
661661
662
662
663663
664664
665665
decodeOemProcessorBusSpeed(structHeader);
break;
//kSMBTypeOemPlatformFeature: // Type 133
//case kSMBTypeOemPlatformFeature: // Type 133
//decodeOemPlatformFeature(structHeader);
//break;
trunk/i386/libsaio/hpet.c
319319
320320
321321
322
322
323323
324324
325325
326326
327
327
328328
329329
330330
......
332332
333333
334334
335
335
336336
337
337
338338
339339
340340
341341
342
342
343343
344344
345
345
346346
347347
348348
349349
350350
351351
352
352
353353
354354
355355
......
368368
369369
370370
371
371
372372
373373
374374
......
384384
385385
386386
387
387
388388
389389
390390
391
391
392392
393393
394394
......
409409
410410
411411
412
412
413413
414414
415415
416416
417
417
418418
419419
420420
......
422422
423423
424424
425
425
426426
427
427
428428
429429
430430
431431
432
432
433433
434434
435
435
436436
437437
438438
439439
440440
441441
442
442
443443
444444
445445
rcba = (void *)(pci_config_read32(lpc_dev->dev.addr, 0xF0) & 0xFFFFC000);
DBG("nVidia(R) %s LPC Interface [%04x:%04x], MMIO @ 0x%lx\n",
DBG("\tnVidia(R) %s LPC Interface [%04x:%04x], MMIO @ 0x%lx\n",
lpc_controllers_nvidia[i].name, lpc_dev->vendor_id, lpc_dev->device_id, rcba);
if (rcba == 0)
{
printf(" RCBA disabled; cannot force enable HPET\n");
printf("\tRCBA disabled; cannot force enable HPET\n");
}
else
{
if (val & 0x80)
{
// HPET is enabled in HPTC. Just not reported by BIOS
DBG(" HPET is enabled in HPTC, just not reported by BIOS\n");
DBG("\tHPET is enabled in HPTC, just not reported by BIOS\n");
hpet_address |= (val & 3) << 12 ;
DBG(" HPET MMIO @ 0x%lx\n", hpet_address);
DBG("\tHPET MMIO @ 0x%lx\n", hpet_address);
}
else
{
// HPET disabled in HPTC. Trying to enable
DBG(" HPET is disabled in HPTC, trying to enable\n");
DBG("\tHPET is disabled in HPTC, trying to enable\n");
REG32(rcba, 0x3404) = val | 0x80;
hpet_address |= (val & 3) << 12 ;
DBG(" Force enabled HPET, MMIO @ 0x%lx\n", hpet_address);
DBG("\tForce enabled HPET, MMIO @ 0x%lx\n", hpet_address);
}
// verify if the job is done
val = REG32(rcba, 0x3404);
if (!(val & 0x80))
{
printf(" Failed to force enable HPET\n");
printf("\tFailed to force enable HPET\n");
}
}
break;
{
val = pci_config_read32(lpc_dev->dev.addr, 0x68);
DBG("VIA %s LPC Interface [%04x:%04x], MMIO\n",
DBG("\tVIA %s LPC Interface [%04x:%04x], MMIO\n",
lpc_controllers_via[i].name, lpc_dev->vendor_id, lpc_dev->device_id);
if (val & 0x80)
if (val & 0x80)
{
hpet_address = (val & ~0x3ff);
DBG("Force enabled HPET at 0x%lx\n", hpet_address);
DBG("\tForce enabled HPET at 0x%lx\n", hpet_address);
}
else
{
DBG("Unable to enable HPET");
DBG("\tUnable to enable HPET");
}
}
}
rcba = (void *)(pci_config_read32(lpc_dev->dev.addr, 0xF0) & 0xFFFFC000);
DBG("Intel(R) %s LPC Interface [%04x:%04x], MMIO @ 0x%lx\n",
DBG("\tIntel(R) %s LPC Interface [%04x:%04x], MMIO @ 0x%lx\n",
lpc_controllers_intel[i].name, lpc_dev->vendor_id, lpc_dev->device_id, rcba);
if (rcba == 0)
{
printf(" RCBA disabled; cannot force enable HPET\n");
printf("\tRCBA disabled; cannot force enable HPET\n");
}
else
{
if (val & 0x80)
{
// HPET is enabled in HPTC. Just not reported by BIOS
DBG(" HPET is enabled in HPTC, just not reported by BIOS\n");
DBG("\tHPET is enabled in HPTC, just not reported by BIOS\n");
hpet_address |= (val & 3) << 12 ;
DBG(" HPET MMIO @ 0x%lx\n", hpet_address);
DBG("\tHPET MMIO @ 0x%lx\n", hpet_address);
}
else
{
// HPET disabled in HPTC. Trying to enable
DBG(" HPET is disabled in HPTC, trying to enable\n");
DBG("\tHPET is disabled in HPTC, trying to enable\n");
REG32(rcba, 0x3404) = val | 0x80;
hpet_address |= (val & 3) << 12 ;
DBG(" Force enabled HPET, MMIO @ 0x%lx\n", hpet_address);
DBG("\tForce enabled HPET, MMIO @ 0x%lx\n", hpet_address);
}
// verify if the job is done
val = REG32(rcba, 0x3404);
if (!(val & 0x80))
{
printf(" Failed to force enable HPET\n");
printf("\tFailed to force enable HPET\n");
}
}
break;
trunk/i386/libsaio/biosfn.c
4444
4545
4646
47
48
49
50
51
52
53
54
55
56
4757
4858
4959
......
126136
127137
128138
129
139
130140
131141
132142
......
197207
198208
199209
200
210
211
212
201213
202214
203215
......
267279
268280
269281
270
282
271283
272284
273285
#include "libsaio.h"
#ifndef DEBUG_MEMRANGE
#define DEBUG_MEMRANGE 0
#endif
#if DEBUG_MEMRANGE
#define DBG(x...)printf(x)
#else
#define DBG(x...)msglog(x)
#endif
#define MAX_DRIVES 8
static biosBuf_t bb;
#endif
}
#if 0
#if DEBUG_MEMRANGE
static unsigned long rerangeMemoryMap(unsigned long count);
static unsigned long rerangeMemoryMap(unsigned long count)
MemoryRange *range = (MemoryRange *)BIOS_ADDR;
unsigned longcount = 0;
// unsigned longrerangedCount;
#if DEBUG_MEMRANGE
unsigned longrerangedCount;
#endif
unsigned long longconMemSize = 0;
unsigned long longextMemSize = 0;
*conMemSizePtr = conMemSize / 1024; // size in KB
*extMemSizePtr = extMemSize / 1024; // size in KB
#if 0
#if DEBUG_MEMRANGE
rerangedCount = rerangeMemoryMap(count);
range += rerangedCount - count;
#endif
trunk/i386/libsaio/pci.h
941941
942942
943943
944
945
944946
945947
946
947948
948949
949950
950951
952
951953
952954
953955
/* Several ID's we need in the library */
#define PCI_VENDOR_ID_TEXAS_INSTRUMENTS0x104c
#define PCI_VENDOR_ID_ATI0x1002
#define PCI_VENDOR_ID_MOTOROLA0x1057
#define PCI_VENDOR_ID_APPLE0x106b
#define PCI_VENDOR_ID_AMD0x1022
#define PCI_VENDOR_ID_ATI0x1002
#define PCI_VENDOR_ID_NVIDIA0x10de
#define PCI_VENDOR_ID_REALTEK0x10ec
#define PCI_VENDOR_ID_VIA0x1106
#define PCI_VENDOR_ID_MARVELL0x11ab
#define PCI_VENDOR_ID_BROADCOM0x14e4
#define PCI_VENDOR_ID_ATHEROS0x168c
#define PCI_VENDOR_ID_QUALCOMM0x1969
trunk/i386/libsaio/state_generator.c
4141
4242
4343
44
44
4545
4646
4747
4848
4949
50
50
5151
5252
5353
......
6262
6363
6464
65
65
6666
6767
6868
......
7878
7979
8080
81
81
8282
8383
8484
......
8888
8989
9090
91
91
9292
9393
9494
......
125125
126126
127127
128
128129
129130
130131
131
132
132133
133134
134135
135136
136137
137
138
138139
139140
140141
......
156157
157158
158159
159
160
160
161
161162
162
163
163164
164165
165166
......
223224
224225
225226
226
227
227228
228229
229230
......
238239
239240
240241
242
241243
242244
243245
......
296298
297299
298300
301
299302
300303
301304
......
305308
306309
307310
308
311
312
309313
310314
311315
......
316320
317321
318322
319
323
320324
321325
322326
323327
324
328
325329
326330
327331
......
341345
342346
343347
344
348
345349
346350
347351
......
353357
354358
355359
356
360
357361
358362
359
360
361
363
364
365
362366
363367
364368
365
369
366370
367371
368372
......
372376
373377
374378
375
379
376380
377381
378382
......
396400
397401
398402
399
403
400404
401405
402406
403407
404408
405409
406
410
407411
408412
413
414
409415
410416
411417
412418
413419
420
414421
415422
416423
417
424
418425
419426
420427
421428
422429
423
430
424431
425432
426433
......
428435
429436
430437
431
438
432439
433440
434441
......
632639
633640
634641
635
642
636643
637644
638645
639646
640647
641
648
642649
643650
651
652
644653
645654
{
uint32_t i;
DBG("ACPIpatcher: start finding cpu names. Length %d\n", length);
DBG("\tACPI patcher: start finding cpu names. Length %d\n", length);
for (i=0; i<length-7; i++)
{
if (dsdt[i] == 0x5B && dsdt[i+1] == 0x83) // ProcessorOP
{
DBG("ACPIpatcher: DSDT[%X%X]\n", dsdt[i], dsdt[i+1]);
DBG("\tACPIpatcher: DSDT[%X%X]\n", dsdt[i], dsdt[i+1]);
uint32_t offset = i + 3 + (dsdt[i+2] >> 6);
if (!aml_isvalidchar(c))
{
add_name = false;
DBG("ACPIpatcher: invalid character found in ProcessorOP '0x%X'!\n", c);
DBG("\tACPI patcher: invalid character found in ProcessorOP '0x%X'!\n", c);
break;
}
}
acpi_cpu_p_blk = dsdt[i] | (dsdt[i+1] << 8);
}
DBG("ACPIpatcher: found ACPI CPU [%c%c%c%c]\n", acpi_cpu_name[acpi_cpu_count][0], acpi_cpu_name[acpi_cpu_count][1], acpi_cpu_name[acpi_cpu_count][2], acpi_cpu_name[acpi_cpu_count][3]);
DBG("\tACPI patcher: found ACPI CPU [%c%c%c%c]\n", acpi_cpu_name[acpi_cpu_count][0], acpi_cpu_name[acpi_cpu_count][1], acpi_cpu_name[acpi_cpu_count][2], acpi_cpu_name[acpi_cpu_count][3]);
if (++acpi_cpu_count == 32)
{
}
}
DBG("ACPIpatcher: finished finding cpu names. Found: %d.\n", acpi_cpu_count);
DBG("\tACPIpatcher: finished finding cpu names. Found: %d.\n", acpi_cpu_count);
}
static char const pss_ssdt_header[] =
struct acpi_2_ssdt *generate_pss_ssdt(struct acpi_2_dsdt *dsdt)
{
verbose("[ GENERATE P-STATES ]\n");
if (Platform.CPU.Vendor != CPUID_VENDOR_INTEL) // 0x756E6547
{
DBG("Not an Intel platform: P-States will not be generated !!!\n");
DBG("\tNot an Intel platform: P-States will not be generated !!!\n");
return NULL;
}
if (!(Platform.CPU.Features & CPU_FEATURE_MSR))
{
DBG("Unsupported CPU: P-States will not be generated !!! No MSR support\n");
DBG("\tUnsupported CPU: P-States will not be generated !!! No MSR support\n");
return NULL;
}
switch (Platform.CPU.Model)
{
case CPUID_MODEL_DOTHAN:// Intel Pentium M
case CPUID_MODEL_YONAH:// Intel Mobile Core Solo, Duo
case CPUID_MODEL_MEROM:// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
case CPUID_MODEL_YONAH:// Intel Mobile Core Solo, Duo
case CPUID_MODEL_MEROM:// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
case CPUID_MODEL_PENRYN:// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
case CPUID_MODEL_ATOM:// Intel Atom (45nm)
case CPUID_MODEL_ATOM:// Intel Atom (45nm)
{
bool cpu_dynamic_fsb = false;
// Sanity check
if (maximum.CID < minimum.CID)
{
DBG("P-States: Insane FID values!");
DBG("\tP-States: Insane FID values!");
p_states_count = 0;
}
else
{
p_states_count = 32;
}
DBG("\tPStates count=%d\n", p_states_count);
vidstep = ((maximum.VID << 2) - (minimum.VID << 2)) / (p_states_count - 1);
case CPUID_MODEL_HASWELL_SVR://
case CPUID_MODEL_HASWELL_ULT://
case CPUID_MODEL_HASWELL_ULX://
case CPUID_MODEL_ATOM_3700:
{
if ( (Platform.CPU.Model == CPUID_MODEL_SANDYBRIDGE) ||
(Platform.CPU.Model == CPUID_MODEL_IVYBRIDGE_XEON) ||
(Platform.CPU.Model == CPUID_MODEL_HASWELL_SVR) ||
(Platform.CPU.Model == CPUID_MODEL_HASWELL_ULT) ||
(Platform.CPU.Model == CPUID_MODEL_HASWELL_ULX) )
(Platform.CPU.Model == CPUID_MODEL_HASWELL_ULX) ||
(Platform.CPU.Model == CPUID_MODEL_ATOM_3700) )
{
maximum.Control = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0xff;
}
minimum.Control = (rdmsr64(MSR_PLATFORM_INFO) >> 40) & 0xff;
DBG("P-States: min 0x%x, max 0x%x\n", minimum.Control, maximum.Control);
DBG("\tP-States: min 0x%x, max 0x%x\n", minimum.Control, maximum.Control);
// Sanity check
if (maximum.Control < minimum.Control)
{
DBG("Insane control values!");
DBG("\tInsane control values!");
p_states_count = 0;
}
else
break;
}
default:
DBG("Unsupported CPU (0x%X): P-States not generated !!!\n", Platform.CPU.Family);
DBG("\tUnsupported CPU (0x%X): P-States not generated !!!\n", Platform.CPU.Family);
break;
}
}
int i;
AML_CHUNK* root = aml_create_node(NULL);
AML_CHUNK *root = aml_create_node(NULL);
aml_add_buffer(root, pss_ssdt_header, sizeof(pss_ssdt_header)); // SSDT header
AML_CHUNK* scop = aml_add_scope(root, "\\_PR_");
AML_CHUNK* name = aml_add_name(scop, "PSS_");
AML_CHUNK* pack = aml_add_package(name);
AML_CHUNK *scop = aml_add_scope(root, "\\_PR_");
AML_CHUNK *name = aml_add_name(scop, "PSS_");
AML_CHUNK *pack = aml_add_package(name);
for (i = 0; i < p_states_count; i++)
{
AML_CHUNK* pstt = aml_add_package(pack);
AML_CHUNK *pstt = aml_add_package(pack);
aml_add_dword(pstt, p_states[i].Frequency);
aml_add_dword(pstt, 0x00000000); // Power
aml_add_dword(pstt, i+1); // Status
}
// Add aliaces
// Add aliaces CPUs
for (i = 0; i < acpi_cpu_count; i++)
{
char name[9];
//dumpPhysAddr("P-States SSDT content: ", ssdt, ssdt->Length);
DBG("SSDT with CPU P-States generated successfully\n");
DBG("\tSSDT with CPU P-States generated successfully\n");
return ssdt;
}
}
else
{
DBG("ACPI CPUs not found: P-States not generated !!!\n");
DBG("\tACPI CPUs not found: P-States not generated !!!\n");
}
verbose("\n");
return NULL;
}
struct acpi_2_ssdt *generate_cst_ssdt(struct acpi_2_fadt *fadt)
{
verbose("[ GENERATE C-STATES ]\n");
if (Platform.CPU.Vendor != CPUID_VENDOR_INTEL) // 0x756E6547
{
DBG("Not an Intel platform: C-States will not be generated !!!\n");
DBG("\tNot an Intel platform: C-States will not be generated !!!\n");
return NULL;
}
if (fadt == NULL)
{
DBG("FACP not exists: C-States will not be generated !!!\n");
DBG("\tFACP not exists: C-States will not be generated !!!\n");
return NULL;
}
if (dsdt == NULL)
{
DBG("DSDT not found: C-States will not be generated !!!\n");
DBG("\tDSDT not found: C-States will not be generated !!!\n");
return NULL;
}
// dumpPhysAddr("C-States SSDT content: ", ssdt, ssdt->Length);
DBG("SSDT with CPU C-States generated successfully\n");
DBG("\tSSDT with CPU C-States generated successfully\n");
return ssdt;
}
else
{
DBG("ACPI CPUs not found: C-States not generated !!!\n");
DBG("\tACPI CPUs not found: C-States not generated !!!\n");
}
verbose("\n");
return NULL;
}
trunk/i386/libsaio/fake_efi.c
437437
438438
439439
440
440
441441
442442
443443
......
478478
479479
480480
481
481
482482
483483
484484
......
649649
650650
651651
652
652
653653
654654
655655
*/
/* From Foundation/Efi/Guid/Smbios/SmBios.c */
EFI_GUID constgEfiSmbiosTableGuid = SMBIOS_TABLE_GUID;
EFI_GUID const gEfiSmbiosTableGuid = SMBIOS_TABLE_GUID;
#define SMBIOS_RANGE_START0x000F0000
#define SMBIOS_RANGE_END0x000FFFFF
static EFI_CHAR16 *getSmbiosChar16(const char *key, size_t *len)
{
const char*src = getStringForKey(key, &bootInfo->smbiosConfig);
EFI_CHAR16* dst = 0;
EFI_CHAR16*dst = 0;
size_t i = 0;
if (!key || !(*key) || !len || !src)
}
// Now fill in the /efi/platform Node
Node *efiPlatformNode = DT__AddChild(node, "platform");
Node *efiPlatformNode = DT__AddChild(node, "platform"); // "/efi/platform"
// NOTE WELL: If you do add FSB Frequency detection, make sure to store
// the value in the fsbFrequency global and not an malloc'd pointer
trunk/i386/libsaio/smbios_getters.c
2323
2424
2525
26
2726
2827
2928
......
153152
154153
155154
155
156
157
158
159
160
156161
157162
158163
159164
160
165
161166
162167
163168
#define CORE_I5 "Core(TM) i5"
#define CORE_I7 "Core(TM) i7"
bool getProcessorInformationExternalClock(returnType *value)
{
if (Platform.CPU.Vendor == CPUID_VENDOR_INTEL) // Intel
return false; //Unsupported CPU type
}
//bool getSMBOemPlatformFeature(returnType *value)
//{
// value->word = (uint64_t)(0x0000000000000001);
// return true;
//}
uint16_t simpleGetSMBOemProcessorType(void)
{
if (Platform.CPU.NoCores >= 4)
{
return 0x501;// 1281 - Quad-Core Xeon
return 0x402;// 1026 - Quad-Core Xeon
}
else if (Platform.CPU.NoCores == 1)
{
trunk/i386/boot2/boot.h
109109
110110
111111
112
112
113113
114114
115115
......
137137
138138
139139
140
140
141141
142142
143143
......
170170
171171
172172
173
173
174174
175175
176176
#define kUseNvidiaROM"UseNvidiaROM"/* nvidia.c */
#define kVBIOS"VBIOS"/* nvidia.c && ati.c */
#define kPCIRootUID"PCIRootUID"/* pci_root.c */
#define kEthernetBuiltIn"EthernetBuiltIn"/* pci_setup.c */
#define kEthernetBuiltIn"EthernetBuiltIn"/* networking.c */
#define kGraphicsEnabler"GraphicsEnabler"/* pci_setup.c */
#define kForceHPET"ForceHPET"/* pci_setup.c */
#define kUseMemDetect"UseMemDetect"/* platform.c */
/* Meklort: added these keys */
#define kMD0Image"md0"/* ramdisk.h */
#define kEnableWifi"EnableWifi"/* pci_setup.c */
#define kEnableWifi"EnableWifi"/* networking.c */
/* Andyvand: added these keys */
/* cparm: added these keys */
/* ErmaC: added these keys */
#define kEnableDualLink"EnableDualLink"/* nvidia.c && gma.c*/
#define kEnableDualLink"EnableDualLink"/* ati.c && nvidia.c && gma.c*/
#define kNvidiaGeneric"NvidiaGeneric"/* nvidia.c */
#define kSkipIntelGfx"SkipIntelGfx"/* pci_setup.c */
#define kSkipNvidiaGfx"SkipNvidiaGfx"/* pci_setup.c */

Archive Download the corresponding diff file

Revision: 2687