Chameleon

Chameleon Commit Details

Date:2010-10-30 22:05:27 (13 years 5 months ago)
Author:Azimutz
Commit:625
Parents: 624
Message:Adding HPET module.
Changes:
D/branches/azimutz/Chazi/i386/libsaio/hpet.c
D/branches/azimutz/Chazi/i386/libsaio/hpet.h
A/branches/azimutz/Chazi/i386/modules/HPET/Makefile
A/branches/azimutz/Chazi/i386/modules/HPET
A/branches/azimutz/Chazi/i386/modules/HPET/HPET.c
A/branches/azimutz/Chazi/i386/modules/HPET/hpet.h
M/branches/azimutz/Chazi/i386/modules/Makefile
M/branches/azimutz/Chazi/i386/libsaio/pci_setup.c
M/branches/azimutz/Chazi/i386/libsaio/Makefile

File differences

branches/azimutz/Chazi/i386/libsaio/hpet.c
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/*
*
*/
//#include "libsaio.h" - was included on hpet.h; included on pci.h for now.
#include "pci.h"
#include "hpet.h"
#ifndef DEBUG_HPET
#define DEBUG_HPET 0
#endif
#if DEBUG_HPET
#define DBG(x...) printf(x)
#else
#define DBG(x...)
#endif
static struct lpc_controller_t lpc_controllers[] = {
// Default unknown chipset
{ 0, 0, "" },
// Intel
{ 0x8086, 0x24dc, "ICH5" },
{ 0x8086, 0x2640, "ICH6" },
{ 0x8086, 0x2641, "ICH6M" },
{ 0x8086, 0x27b0, "ICH7 DH" },
{ 0x8086, 0x27b8, "ICH7" },
{ 0x8086, 0x27b9, "ICH7M" },
{ 0x8086, 0x27bd, "ICH7M DH" },
{ 0x8086, 0x2810, "ICH8R" },
{ 0x8086, 0x2811, "ICH8M-E" },
{ 0x8086, 0x2812, "ICH8DH" },
{ 0x8086, 0x2814, "ICH8DO" },
{ 0x8086, 0x2815, "ICH8M" },
{ 0x8086, 0x2912, "ICH9DH" },
{ 0x8086, 0x2914, "ICH9DO" },
{ 0x8086, 0x2916, "ICH9R" },
{ 0x8086, 0x2917, "ICH9M-E" },
{ 0x8086, 0x2918, "ICH9" },
{ 0x8086, 0x2919, "ICH9M" },
{ 0x8086, 0x3a14, "ICH10DO" },
{ 0x8086, 0x3a16, "ICH10R" },
{ 0x8086, 0x3a18, "ICH10" },
{ 0x8086, 0x3a1a, "ICH10D" },
};
void force_enable_hpet(pci_dt_t *lpc_dev)
{
int i;
uint32_tval, hpet_address = 0xFED00000;
void*rcba;
/* LPC on Intel ICH is always (?) at 00:1f.0 */
for(i = 1; i < sizeof(lpc_controllers) / sizeof(lpc_controllers[0]); i++)
if ((lpc_controllers[i].vendor == lpc_dev->vendor_id)
&& (lpc_controllers[i].device == lpc_dev->device_id))
{
rcba = (void *)(pci_config_read32(lpc_dev->dev.addr, 0xF0) & 0xFFFFC000);
DBG("Intel(R) %s LPC Interface [%04x:%04x], MMIO @ 0x%lx\n",
lpc_controllers[i].name, lpc_dev->vendor_id, lpc_dev->device_id, rcba);
if (rcba == 0)
printf(" RCBA disabled; cannot force enable HPET\n");
else
{
val = REG32(rcba, 0x3404);
if (val & 0x80)
{
// HPET is enabled in HPTC. Just not reported by BIOS
DBG(" HPET is enabled in HPTC, just not reported by BIOS\n");
hpet_address |= (val & 3) << 12 ;
DBG(" HPET MMIO @ 0x%lx\n", hpet_address);
}
else
{
// HPET disabled in HPTC. Trying to enable
DBG(" HPET is disabled in HPTC, trying to enable\n");
REG32(rcba, 0x3404) = val | 0x80;
hpet_address |= (val & 3) << 12 ;
DBG(" Force enabled HPET, MMIO @ 0x%lx\n", hpet_address);
}
// verify if the job is done
val = REG32(rcba, 0x3404);
if (!(val & 0x80))
printf(" Failed to force enable HPET\n");
}
break;
}
#if DEBUG_HPET
printf("Press [Enter] to continue...\n");
getc();
#endif
}
branches/azimutz/Chazi/i386/libsaio/hpet.h
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/*
*
*/
#ifndef __LIBSAIO_HPET_H
#define __LIBSAIO_HPET_H
//#include "libsaio.h" // check pci.h/hpet.c
#define REG32(base, reg) ((volatile uint32_t *)base)[(reg) >> 2]
void force_enable_hpet(pci_dt_t *lpc_dev);
struct lpc_controller_t {
unsigned vendor;
unsigned device;
char *name;
};
#endif /* !__LIBSAIO_HPET_H */
branches/azimutz/Chazi/i386/libsaio/Makefile
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xml.o ntfs.o msdos.o md5c.o device_tree.o \
cpu.o platform.o acpi_patcher.o \
smbios_patcher.o fake_efi.o ext2fs.o \
hpet.o usb.o pci_setup.o \
usb.o pci_setup.o \
device_inject.o pci_root.o convert.o aml_generator.o \
nvidia_resolution.o ati_resolution.o gma_resolution.o \
autoresolution.o edid.o
branches/azimutz/Chazi/i386/libsaio/pci_setup.c
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#include "boot.h"
#include "pci.h"
#include "modules.h"
//#include "nvidia.h"
//#include "ati.h"
//#include "gma.h" //Azi:autoresolution
extern void set_eth_builtin(pci_dt_t *eth_dev);
extern void notify_usb_dev(pci_dt_t *pci_dev);
extern void force_enable_hpet(pci_dt_t *lpc_dev);
void setup_pci_devs(pci_dt_t *pci_dt)
{
bool do_eth_devprop, do_enable_hpet;
bool do_eth_devprop;
pci_dt_t *current = pci_dt;
do_eth_devprop = do_enable_hpet = false;
do_eth_devprop = false;
getBoolForKey(kEthernetBuiltInKey, &do_eth_devprop, &bootInfo->bootConfig);
getBoolForKey(kForceHPETKey, &do_enable_hpet, &bootInfo->bootConfig);
while (current)
{
case PCI_CLASS_SERIAL_USB:
notify_usb_dev(current);
break;
case PCI_CLASS_BRIDGE_ISA:
if (do_enable_hpet)
force_enable_hpet(current);
break;
}
setup_pci_devs(current->children);
branches/azimutz/Chazi/i386/modules/HPET/HPET.c
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/*
* Force HPET enabled, via fix from:
*
* http://forum.voodooprojects.org/index.php/topic,1596.0.html
*/
//#include "libsaio.h"
#include "boot.h"
#include "pci.h"
#include "hpet.h"
#include "modules.h"
/*#ifndef DEBUG_HPET
#define DEBUG_HPET 0
#endif
#if DEBUG_HPET
#define DBG(x...) printf(x)
#else
#define DBG(x...)
#endif
*/
void force_enable_hpet_intel(pci_dt_t *lpc_dev);
void force_enable_hpet_via(pci_dt_t *lpc_dev);
void HPET_hook(void* arg1, void* arg2, void* arg3, void* arg4)
{
bool do_enable_hpet = false;
pci_dt_t* current = arg1;
if (current->class_id != PCI_CLASS_BRIDGE_ISA)
return;
getBoolForKey(kForceHPETKey, &do_enable_hpet, &bootInfo->bootConfig);
if (do_enable_hpet)
force_enable_hpet(current);
}
void HPET_start()
{
register_hook_callback("PCIDevice", &HPET_hook);
}
// Intel chipsets
static struct lpc_controller_t lpc_controllers_intel[] = {
// Default unknown chipset
{ 0, 0, "" },
// Intel
{ 0x8086, 0x24dc, "ICH5" },
{ 0x8086, 0x2640, "ICH6" },
{ 0x8086, 0x2641, "ICH6M" },
{ 0x8086, 0x27b0, "ICH7 DH" },
{ 0x8086, 0x27b8, "ICH7" },
{ 0x8086, 0x27b9, "ICH7M" },
{ 0x8086, 0x27bd, "ICH7M DH" },
{ 0x8086, 0x27bc, "NM10" }, // Atom
{ 0x8086, 0x2810, "ICH8R" },
{ 0x8086, 0x2811, "ICH8M-E" },
{ 0x8086, 0x2812, "ICH8DH" },
{ 0x8086, 0x2814, "ICH8DO" },
{ 0x8086, 0x2815, "ICH8M" },
{ 0x8086, 0x2912, "ICH9DH" },
{ 0x8086, 0x2914, "ICH9DO" },
{ 0x8086, 0x2916, "ICH9R" },
{ 0x8086, 0x2917, "ICH9M-E" },
{ 0x8086, 0x2918, "ICH9" },
{ 0x8086, 0x2919, "ICH9M" },
{ 0x8086, 0x3a14, "ICH10DO" },
{ 0x8086, 0x3a16, "ICH10R" },
{ 0x8086, 0x3a18, "ICH10" },
{ 0x8086, 0x3a1a, "ICH10D" },
};
// VIA chipsets
static struct lpc_controller_t lpc_controllers_via[] = {
// Default unknown chipset
{ 0, 0, "" },
{ 0x1106, 0x3372, "VT8237S" },
};
void force_enable_hpet(pci_dt_t *lpc_dev)
{
switch(lpc_dev->vendor_id)
{
case 0x8086:
force_enable_hpet_intel(lpc_dev);
break;
case 0x1106:
force_enable_hpet_via(lpc_dev);
break;
}
/*#if DEBUG_HPET
pause();
#endif*/
}
void force_enable_hpet_via(pci_dt_t *lpc_dev)
{
int i;
uint32_t val, hpet_address = 0xFED00000;
for (i = 1; i < sizeof(lpc_controllers_via) / sizeof(lpc_controllers_via[0]); i++)
{
if ((lpc_controllers_via[i].vendor == lpc_dev->vendor_id)
&& (lpc_controllers_via[i].device == lpc_dev->device_id))
{
val = pci_config_read32(lpc_dev->dev.addr, 0x68);
verbose("VIA %s LPC Interface [%04x:%04x], MMIO\n",
lpc_controllers_via[i].name, lpc_dev->vendor_id, lpc_dev->device_id);
if (val & 0x80)
{
hpet_address = (val & ~0x3ff);
verbose("HPET at 0x%lx\n", hpet_address);
}
else
{
val = 0xfed00000 | 0x80;
pci_config_write32(lpc_dev->dev.addr, 0x68, val);
val = pci_config_read32(lpc_dev->dev.addr, 0x68);
if (val & 0x80)
{
hpet_address = (val & ~0x3ff);
verbose("Force enabled HPET at 0x%lx\n", hpet_address);
}
else
{
verbose("Unable to enable HPET");
}
}
}
}
}
void force_enable_hpet_intel(pci_dt_t *lpc_dev)
{
inti;
void *rcba;
uint32_tval, hpet_address = 0xFED00000;
/* LPC on Intel ICH is always (?) at 00:1f.0 */
for(i = 1; i < sizeof(lpc_controllers_intel) / sizeof(lpc_controllers_intel[0]); i++)
{
if ((lpc_controllers_intel[i].vendor == lpc_dev->vendor_id)
&& (lpc_controllers_intel[i].device == lpc_dev->device_id))
{
rcba = (void *)(pci_config_read32(lpc_dev->dev.addr, 0xF0) & 0xFFFFC000);
verbose("Intel(R) %s LPC Interface [%04x:%04x], MMIO @ 0x%lx\n",
lpc_controllers_intel[i].name, lpc_dev->vendor_id, lpc_dev->device_id, rcba);
if (rcba == 0)
verbose(" RCBA disabled; cannot force enable HPET\n");
else
{
val = REG32(rcba, 0x3404);
if (val & 0x80)
{
// HPET is enabled in HPTC. Just not reported by BIOS
verbose(" HPET is enabled in HPTC, just not reported by BIOS\n");
hpet_address |= (val & 3) << 12 ;
verbose(" HPET MMIO @ 0x%lx\n", hpet_address);
}
else
{
// HPET disabled in HPTC. Trying to enable
verbose(" HPET is disabled in HPTC, trying to enable\n");
REG32(rcba, 0x3404) = val | 0x80;
hpet_address |= (val & 3) << 12 ;
verbose(" Force enabled HPET, MMIO @ 0x%lx\n", hpet_address);
}
// verify if the job is done
val = REG32(rcba, 0x3404);
if (!(val & 0x80))
verbose(" Failed to force enable HPET\n");
}
break;
}
}
}
branches/azimutz/Chazi/i386/modules/HPET/hpet.h
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/*
*
*/
#ifndef __LIBSAIO_HPET_H
#define __LIBSAIO_HPET_H
//#include "libsaio.h" // check pci.h/hpet.c
#define REG32(base, reg) ((volatile uint32_t *)base)[(reg) >> 2]
void force_enable_hpet(pci_dt_t *lpc_dev);
struct lpc_controller_t {
unsigned vendor;
unsigned device;
char *name;
};
#endif /* !__LIBSAIO_HPET_H */
branches/azimutz/Chazi/i386/modules/HPET/Makefile
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MODULE_NAME = HPET
MODULE_VERSION = "1.0.0"
MODULE_COMPAT_VERSION = "1.0.0"
MODULE_START = _$(MODULE_NAME)_start
MODULE_DEPENDENCIES =
DIR = HPET
include ../../MakePaths.dir
OBJROOT=../../../obj/i386/modules/$(DIR)
SYMROOT=../../../sym/i386/modules/
DSTROOT=../../../dst/i386/modules/
UTILDIR = ../../util
LIBSADIR = ../../libsa
LIBSAIODIR = ../../libsaio
BOOT2DIR = ../../boot2
INSTALLDIR = $(DSTROOT)/System/Library/Frameworks/System.framework/Versions/B/PrivateHeaders/standalone
OPTIM = -Os -Oz
DEBUG = -DNOTHING
#DEBUG = -DDEBUG_HELLO_WORLD=1
CFLAGS= $(RC_CFLAGS) $(OPTIM) $(MORECPP) -arch i386 -g -Wmost \
-D__ARCHITECTURE__=\"i386\" -DSAIO_INTERNAL_USER \
-DRCZ_COMPRESSED_FILE_SUPPORT $(DEBUG) \
-fno-builtin $(OMIT_FRAME_POINTER_CFLAG) \
-mpreferred-stack-boundary=2 -fno-align-functions -fno-stack-protector \
-march=pentium4 -msse2 -mfpmath=sse -msoft-float -fno-common
DEFINES=
CONFIG = hd
INC = -I. -I.. -I$(SYMROOT) -I$(UTILDIR) -I$(LIBSADIR) -I$(LIBSAIODIR) -I$(BOOT2DIR)
ifneq "" "$(wildcard /bin/mkdirs)"
MKDIRS = /bin/mkdirs
else
MKDIRS = /bin/mkdir -p
endif
AS = as
LD = ld
# LIBS= -lc_static
LIBS=
VPATH = $(OBJROOT):$(SYMROOT)
HPET_OBJS = HPET.o
SFILES =
CFILES =
HFILES =
EXPORTED_HFILES =
INSTALLED_HFILES =
OTHERFILES = Makefile
ALLSRC = $(SFILES) $(CFILES) \
$(HFILES) $(OTHERFILES)
DIRS_NEEDED = $(OBJROOT) $(SYMROOT)
all embedtheme optionrom: ${HPET_OBJS} dylib
dylib: ${HPET_OBJS}
ld -arch i386 \
-undefined dynamic_lookup \
-alias $(MODULE_START) start \
-dylib -read_only_relocs suppress \
-S -x -Z -dead_strip_dylibs \
-no_uuid \
-current_version $(MODULE_VERSION) -compatibility_version $(MODULE_COMPAT_VERSION) \
-final_output $(MODULE_NAME) \
$(OBJROOT)/*.o \
-weak_library $(SYMROOT)/*.dylib \
-o $(SYMROOT)/$(MODULE_NAME).dylib
HPET.o:
$(CC) $(CPPFLAGS) $(CFLAGS) $(DEFINES) -c "HPET.c" $(INC) -o "$(OBJROOT)/HPET.o"
include ../../MakeInc.dir
# dependencies
-include $(OBJROOT)/Makedep
branches/azimutz/Chazi/i386/modules/Makefile
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VPATH = $(OBJROOT):$(SYMROOT)
# The order of building is important.
# TODO: exclude Symbols from find so it isn't compiled twice
#Azi:---
#SUBDIRS = Symbols `find ./ -type d -depth 1 -not -name ".*"`
SUBDIRS = Symbols Memory KernelPatcher HelloWorld GraphicsEnabler
#AutoResolution
# The order of building is important. ??
SUBDIRS = Symbols Memory KernelPatcher GraphicsEnabler HPET
#AutoResolution HelloWorld
all embedtheme tags debug install installhdrs:
@rm -rf $(OBJROOT)

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Revision: 625