| ␊ |
| /* Option ROM header */␊ |
| typedef struct {␊ |
| ␉uint16_t␉signature;␉␉// 0x55AA␊ |
| ␉uint16_t␉signature;␉␉// 0xAA55␊ |
| ␉uint8_t␉␉rom_size;␊ |
| ␉uint32_t␉entry_point;␊ |
| ␉uint8_t␉␉reserved[17];␊ |
| ␉uint8_t␉␉reserved[15];␊ |
| ␉uint16_t␉pci_header_offset;␊ |
| ␉uint16_t␉expansion_header_offset;␊ |
| } option_rom_header_t;␊ |
| ␊ |
| /* Option ROM PCI Data Structure */␊ |
| typedef struct {␊ |
| ␉uint32_t␉signature;␉␉// 0x50434952 'PCIR'␊ |
| ␉uint32_t␉signature;␉␉// 0x52494350␉'PCIR'␊ |
| ␉uint16_t␉vendor_id;␊ |
| ␉uint16_t␉device_id;␊ |
| ␉uint16_t␉vital_product_data_offset;␊ |
