Chameleon

Chameleon Commit Details

Date:2011-05-19 18:38:58 (8 years 5 months ago)
Author:Azimutz
Commit:839
Parents: 838
Message:Merging trunk changes (r825 --> 833).
Changes:
D/branches/azimutz/Cleancut/i386/libsaio/mem.c
D/branches/azimutz/Cleancut/i386/libsaio/mem.h
D/branches/azimutz/Cleancut/i386/libsaio/SMBIOS.h
C/trunk/i386/modules/Resolution/Readme.txt → /branches/azimutz/Cleancut/i386/modules/Resolution/Readme.txt
C/trunk/i386/libsaio/smbios.h → /branches/azimutz/Cleancut/i386/libsaio/smbios.h
C/trunk/i386/modules/klibc/Readme.txt → /branches/azimutz/Cleancut/i386/modules/klibc/Readme.txt
C/trunk/i386/modules/uClibc++/Readme.txt → /branches/azimutz/Cleancut/i386/modules/uClibc++/Readme.txt
M/branches/azimutz/Cleancut/i386/libsaio/acpi_patcher.c
M/branches/azimutz/Cleancut/i386/modules/Makefile
M/branches/azimutz/Cleancut/Chameleon.xcodeproj/project.pbxproj
M/branches/azimutz/Cleancut/i386/libsaio/spd.c
M/branches/azimutz/Cleancut/i386/libsaio/cpu.c
M/branches/azimutz/Cleancut/i386/libsaio/smbios_getters.c
M/branches/azimutz/Cleancut/i386/libsaio/platform.h
M/branches/azimutz/Cleancut/i386/libsaio/fake_efi.c
M/branches/azimutz/Cleancut/i386/libsaio/cpu.h
M/branches/azimutz/Cleancut/i386/libsaio/smbios.c
M/branches/azimutz/Cleancut/i386/libsaio/smbios_getters.h
M/branches/azimutz/Cleancut
M/branches/azimutz/Cleancut/i386/boot2/boot.h

File differences

branches/azimutz/Cleancut/Chameleon.xcodeproj/project.pbxproj
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B0056D4A11F3868000754B65 /* load.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; path = load.c; sourceTree = "<group>"; };
B0056D4B11F3868000754B65 /* Makefile */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.make; path = Makefile; sourceTree = "<group>"; };
B0056D4C11F3868000754B65 /* md5c.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; path = md5c.c; sourceTree = "<group>"; };
B0056D4D11F3868000754B65 /* mem.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; path = mem.c; sourceTree = "<group>"; };
B0056D4E11F3868000754B65 /* mem.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = mem.h; sourceTree = "<group>"; };
B0056D4F11F3868000754B65 /* memvendors.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = memvendors.h; sourceTree = "<group>"; };
B0056D5011F3868000754B65 /* misc.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; path = misc.c; sourceTree = "<group>"; };
B0056D5111F3868000754B65 /* msdos.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; path = msdos.c; sourceTree = "<group>"; };
B0056D4A11F3868000754B65 /* load.c */,
B0056D4B11F3868000754B65 /* Makefile */,
B0056D4C11F3868000754B65 /* md5c.c */,
B0056D4D11F3868000754B65 /* mem.c */,
B0056D4E11F3868000754B65 /* mem.h */,
B0056D4F11F3868000754B65 /* memvendors.h */,
B0056D5011F3868000754B65 /* misc.c */,
B0056D5111F3868000754B65 /* msdos.c */,
branches/azimutz/Cleancut/i386/libsaio/SMBIOS.h
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/*
* Copyright (c) 1998-2009 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
*
* The contents of this file constitute Original Code as defined in and
* are subject to the Apple Public Source License Version 1.1 (the
* "License"). You may not use this file except in compliance with the
* License. Please obtain a copy of the License at
* http://www.apple.com/publicsource and read it before using this file.
*
* This Original Code and all software distributed under the License are
* distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
* License for the specific language governing rights and limitations
* under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
#ifndef __LIBSAIO_SMBIOS_H
#define __LIBSAIO_SMBIOS_H
//
// Based on System Management BIOS Reference Specification v2.5
//
typedef uint8_t SMBString;
typedef uint8_t SMBByte;
typedef uint16_t SMBWord;
typedef uint32_t SMBDWord;
typedef uint64_t SMBQWord;
typedef struct DMIEntryPoint {
SMBByte anchor[5];
SMBByte checksum;
SMBWord tableLength;
SMBDWord tableAddress;
SMBWord structureCount;
SMBByte bcdRevision;
} __attribute__((packed)) DMIEntryPoint;
typedef struct SMBEntryPoint {
SMBByte anchor[4];
SMBByte checksum;
SMBByte entryPointLength;
SMBByte majorVersion;
SMBByte minorVersion;
SMBWord maxStructureSize;
SMBByte entryPointRevision;
SMBByte formattedArea[5];
DMIEntryPoint dmi;
} __attribute__((packed)) SMBEntryPoint;
//
// Header common to all SMBIOS structures
//
typedef struct SMBStructHeader {
SMBByte type;
SMBByte length;
SMBWord handle;
} __attribute__((packed)) SMBStructHeader;
#define SMB_STRUCT_HEADER SMBStructHeader header;
typedef struct SMBAnchor
{
const SMBStructHeader *header;
const uint8_t *next;
const uint8_t *end;
} SMBAnchor;
#define SMB_ANCHOR_IS_VALID(x)\
((x) && ((x)->header) && ((x)->next) && ((x)->end))
#define SMB_ANCHOR_RESET(x)\
bzero(x, sizeof(typedef struct SMBAnchor));
//
// SMBIOS structure types.
//
enum {
kSMBTypeBIOSInformation = 0,
kSMBTypeSystemInformation = 1,
kSMBTypeBaseBoard= 2,
kSMBTypeSystemEnclosure = 3,
kSMBTypeProcessorInformation = 4,
kSMBTypeMemoryModule = 6,
kSMBTypeCacheInformation = 7,
kSMBTypeSystemSlot = 9,
kSMBTypePhysicalMemoryArray = 16,
kSMBTypeMemoryDevice = 17,
kSMBType32BitMemoryErrorInfo = 18,
kSMBType64BitMemoryErrorInfo = 33,
kSMBTypeEndOfTable = 127,
/* Apple Specific Structures */
kSMBTypeFirmwareVolume = 128,
kSMBTypeMemorySPD = 130,
kSMBTypeOemProcessorType = 131,
kSMBTypeOemProcessorBusSpeed = 132
};
//
// BIOS Information (Type 0)
//
typedef struct SMBBIOSInformation {
SMB_STRUCT_HEADER // Type 0
SMBString vendor; // BIOS vendor name
SMBString version; // BIOS version
SMBWord startSegment; // BIOS segment start
SMBString releaseDate; // BIOS release date
SMBByte romSize; // (n); 64K * (n+1) bytes
SMBQWord characteristics; // supported BIOS functions
} __attribute__((packed)) SMBBIOSInformation;
//
// System Information (Type 1)
//
typedef struct SMBSystemInformation {
// 2.0+ spec (8 bytes)
SMB_STRUCT_HEADER // Type 1
SMBString manufacturer;
SMBString productName;
SMBString version;
SMBString serialNumber;
// 2.1+ spec (25 bytes)
SMBByte uuid[16]; // can be all 0 or all 1's
SMBByte wakeupReason; // reason for system wakeup
// 2.4+ spec (27 bytes)
SMBString skuNumber;
SMBString family;
} __attribute__((packed)) SMBSystemInformation;
//
// Base Board (Type 2)
//
typedef struct SMBBaseBoard {
SMB_STRUCT_HEADER // Type 2
SMBStringmanufacturer;
SMBStringproduct;
SMBStringversion;
SMBStringserialNumber;
SMBStringassetTagNumber;
SMBBytefeatureFlags;
SMBStringlocationInChassis;
SMBWordchassisHandle;
SMBByteboardType;
SMBBytenumberOfContainedHandles;
// 0 - 255 contained handles go here but we do not include
// them in our structure. Be careful to use numberOfContainedHandles
// times sizeof(SMBWord) when computing the actual record size,
// if you need it.
} __attribute__((packed)) SMBBaseBoard;
// Values for boardType in Type 2 records
enum {
kSMBBaseBoardUnknown= 0x01,
kSMBBaseBoardOther= 0x02,
kSMBBaseBoardServerBlade= 0x03,
kSMBBaseBoardConnectivitySwitch= 0x04,
kSMBBaseBoardSystemMgmtModule= 0x05,
kSMBBaseBoardProcessorModule= 0x06,
kSMBBaseBoardIOModule= 0x07,
kSMBBaseBoardMemoryModule= 0x08,
kSMBBaseBoardDaughter= 0x09,
kSMBBaseBoardMotherboard= 0x0A,
kSMBBaseBoardProcessorMemoryModule= 0x0B,
kSMBBaseBoardProcessorIOModule= 0x0C,
kSMBBaseBoardInterconnect= 0x0D,
};
//
// System Enclosure (Type 3)
//
typedef struct SMBSystemEnclosure {
SMB_STRUCT_HEADER // Type 3
SMBString manufacturer;
SMBByte type;
SMBString version;
SMBString serialNumber;
SMBString assetTagNumber;
SMBByte bootupState;
SMBByte powerSupplyState;
SMBByte thermalState;
SMBByte securityStatus;
SMBDWord oemDefined;
} __attribute__((packed)) SMBSystemEnclosure;
//
// Processor Information (Type 4)
//
typedef struct SMBProcessorInformation {
// 2.0+ spec (26 bytes)
SMB_STRUCT_HEADER // Type 4
SMBString socketDesignation;
SMBByte processorType; // CPU = 3
SMBByte processorFamily; // processor family enum
SMBString manufacturer;
SMBQWord processorID; // based on CPUID
SMBString processorVersion;
SMBByte voltage; // bit7 cleared indicate legacy mode
SMBWord externalClock; // external clock in MHz
SMBWord maximumClock; // max internal clock in MHz
SMBWord currentClock; // current internal clock in MHz
SMBByte status;
SMBByte processorUpgrade; // processor upgrade enum
// 2.1+ spec (32 bytes)
SMBWord L1CacheHandle;
SMBWord L2CacheHandle;
SMBWord L3CacheHandle;
// 2.3+ spec (35 bytes)
SMBString serialNumber;
SMBString assetTag;
SMBString partNumber;
} __attribute__((packed)) SMBProcessorInformation;
#define kSMBProcessorInformationMinSize 26
//
// Memory Module Information (Type 6)
// Obsoleted since SMBIOS version 2.1
//
typedef struct SMBMemoryModule {
SMB_STRUCT_HEADER // Type 6
SMBString socketDesignation;
SMBByte bankConnections;
SMBByte currentSpeed;
SMBWord currentMemoryType;
SMBByte installedSize;
SMBByte enabledSize;
SMBByte errorStatus;
} __attribute__((packed)) SMBMemoryModule;
#define kSMBMemoryModuleSizeNotDeterminable 0x7D
#define kSMBMemoryModuleSizeNotEnabled 0x7E
#define kSMBMemoryModuleSizeNotInstalled 0x7F
//
// Cache Information (Type 7)
//
typedef struct SMBCacheInformation {
SMB_STRUCT_HEADER // Type 7
SMBString socketDesignation;
SMBWord cacheConfiguration;
SMBWord maximumCacheSize;
SMBWord installedSize;
SMBWord supportedSRAMType;
SMBWord currentSRAMType;
SMBByte cacheSpeed;
SMBByte errorCorrectionType;
SMBByte systemCacheType;
SMBByte associativity;
} __attribute__((packed)) SMBCacheInformation;
typedef struct SMBSystemSlot {
// 2.0+ spec (12 bytes)
SMB_STRUCT_HEADER // Type 9
SMBString slotDesignation;
SMBByte slotType;
SMBByte slotDataBusWidth;
SMBByte currentUsage;
SMBByte slotLength;
SMBWord slotID;
SMBByte slotCharacteristics1;
// 2.1+ spec (13 bytes)
SMBByte slotCharacteristics2;
} __attribute__((packed)) SMBSystemSlot;
//
// Physical Memory Array (Type 16)
//
typedef struct SMBPhysicalMemoryArray {
// 2.1+ spec (15 bytes)
SMB_STRUCT_HEADER // Type 16
SMBByte physicalLocation; // physical location
SMBByte arrayUse; // the use for the memory array
SMBByte errorCorrection; // error correction/detection method
SMBDWord maximumCapacity; // maximum memory capacity in kilobytes
SMBWord errorHandle; // handle of a previously detected error
SMBWord numMemoryDevices; // number of memory slots or sockets
} __attribute__((packed)) SMBPhysicalMemoryArray;
// Memory Array - Use
enum {
kSMBMemoryArrayUseOther = 0x01,
kSMBMemoryArrayUseUnknown = 0x02,
kSMBMemoryArrayUseSystemMemory = 0x03,
kSMBMemoryArrayUseVideoMemory = 0x04,
kSMBMemoryArrayUseFlashMemory = 0x05,
kSMBMemoryArrayUseNonVolatileMemory = 0x06,
kSMBMemoryArrayUseCacheMemory = 0x07
};
// Memory Array - Error Correction Types
enum {
kSMBMemoryArrayErrorCorrectionTypeOther = 0x01,
kSMBMemoryArrayErrorCorrectionTypeUnknown = 0x02,
kSMBMemoryArrayErrorCorrectionTypeNone = 0x03,
kSMBMemoryArrayErrorCorrectionTypeParity = 0x04,
kSMBMemoryArrayErrorCorrectionTypeSingleBitECC = 0x05,
kSMBMemoryArrayErrorCorrectionTypeMultiBitECC = 0x06,
kSMBMemoryArrayErrorCorrectionTypeCRC = 0x07
};
//
// Memory Device (Type 17)
//
typedef struct SMBMemoryDevice {
// 2.1+ spec (21 bytes)
SMB_STRUCT_HEADER // Type 17
SMBWord arrayHandle; // handle of the parent memory array
SMBWord errorHandle; // handle of a previously detected error
SMBWord totalWidth; // total width in bits; including ECC bits
SMBWord dataWidth; // data width in bits
SMBWord memorySize; // bit15 is scale, 0 = MB, 1 = KB
SMBByte formFactor; // memory device form factor
SMBByte deviceSet; // parent set of identical memory devices
SMBString deviceLocator; // labeled socket; e.g. "SIMM 3"
SMBString bankLocator; // labeled bank; e.g. "Bank 0" or "A"
SMBByte memoryType; // type of memory
SMBWord memoryTypeDetail; // additional detail on memory type
// 2.3+ spec (27 bytes)
SMBWord memorySpeed; // speed of device in MHz (0 for unknown)
SMBString manufacturer;
SMBString serialNumber;
SMBString assetTag;
SMBString partNumber;
} __attribute__((packed)) SMBMemoryDevice;
//
// Firmware Volume Description (Apple Specific - Type 128)
//
enum {
FW_REGION_RESERVED = 0,
FW_REGION_RECOVERY = 1,
FW_REGION_MAIN = 2,
FW_REGION_NVRAM = 3,
FW_REGION_CONFIG = 4,
FW_REGION_DIAGVAULT = 5,
NUM_FLASHMAP_ENTRIES = 8
};
typedef struct FW_REGION_INFO
{
SMBDWord StartAddress;
SMBDWord EndAddress;
} __attribute__((packed)) FW_REGION_INFO;
typedef struct SMBFirmwareVolume {
SMB_STRUCT_HEADER // Type 128
SMBByte RegionCount;
SMBByte Reserved[3];
SMBDWord FirmwareFeatures;
SMBDWord FirmwareFeaturesMask;
SMBByte RegionType[ NUM_FLASHMAP_ENTRIES ];
FW_REGION_INFO FlashMap[ NUM_FLASHMAP_ENTRIES ];
} __attribute__((packed)) SMBFirmwareVolume;
//
// Memory SPD Data (Apple Specific - Type 130)
//
typedef struct SMBMemorySPD {
SMB_STRUCT_HEADER // Type 130
SMBWord Type17Handle;
SMBWord Offset;
SMBWord Size;
SMBWord Data[];
} __attribute__((packed)) SMBMemorySPD;
static const char *
SMBMemoryDeviceTypes[] =
{
"RAM", /* 00h Undefined */
"RAM", /* 01h Other */
"RAM", /* 02h Unknown */
"DRAM", /* 03h DRAM */
"EDRAM", /* 04h EDRAM */
"VRAM", /* 05h VRAM */
"SRAM", /* 06h SRAM */
"RAM", /* 07h RAM */
"ROM", /* 08h ROM */
"FLASH", /* 09h FLASH */
"EEPROM", /* 0Ah EEPROM */
"FEPROM", /* 0Bh FEPROM */
"EPROM", /* 0Ch EPROM */
"CDRAM", /* 0Dh CDRAM */
"3DRAM", /* 0Eh 3DRAM */
"SDRAM", /* 0Fh SDRAM */
"SGRAM", /* 10h SGRAM */
"RDRAM", /* 11h RDRAM */
"DDR SDRAM", /* 12h DDR */
"DDR2 SDRAM", /* 13h DDR2 */
"DDR2 FB-DIMM", /* 14h DDR2 FB-DIMM */
"RAM",/* 15h unused */
"RAM",/* 16h unused */
"RAM",/* 17h unused */
"DDR3",/* 18h DDR3, chosen in [5776134] */
};
static const int
kSMBMemoryDeviceTypeCount = sizeof(SMBMemoryDeviceTypes) /
sizeof(SMBMemoryDeviceTypes[0]);
//
// OEM Processor Type (Apple Specific - Type 131)
//
typedef struct SMBOemProcessorType {
SMB_STRUCT_HEADER
SMBWord ProcessorType;
} __attribute__((packed)) SMBOemProcessorType;
//
// OEM Processor Bus Speed (Apple Specific - Type 132)
//
typedef struct SMBOemProcessorBusSpeed {
SMB_STRUCT_HEADER
SMBWord ProcessorBusSpeed; // MT/s unit
} __attribute__((packed)) SMBOemProcessorBusSpeed;
//----------------------------------------------------------------------------------------------------------
/* From Foundation/Efi/Guid/Smbios/SmBios.h */
/* Modified to wrap Data4 array init with {} */
#define EFI_SMBIOS_TABLE_GUID {0xeb9d2d31, 0x2d88, 0x11d3, {0x9a, 0x16, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d}}
#define SMBIOS_ORIGINAL0
#define SMBIOS_PATCHED1
extern void *getSmbios(int which);
extern void readSMBIOSInfo(SMBEntryPoint *eps);
extern void setupSMBIOSTable(void);
extern void decodeSMBIOSTable(SMBEntryPoint *eps);
#endif /* !__LIBSAIO_SMBIOS_H */
branches/azimutz/Cleancut/i386/libsaio/mem.c
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/*
* Copyright 2010 AsereBLN. All rights reserved. <aserebln@googlemail.com>
*
* mem.c - obtain system memory information
*/
#include "libsaio.h"
#include "pci.h"
#include "platform.h"
#include "cpu.h"
#include "mem.h"
#include "smbios_patcher.h"
#ifndef DEBUG_MEM
#define DEBUG_MEM 0
#endif
#if DEBUG_MEM
#define DBG(x...)printf(x)
#else
#define DBG(x...)
#endif
#define DC(c) (c >= 0x20 && c < 0x7f ? (char) c : '.')
#define STEP 16
void dumpPhysAddr(const char * title, void * a, int len)
{
int i,j;
u_int8_t* ad = (u_int8_t*) a;
char buffer[80];
char str[16];
if(ad==NULL) return;
printf("%s addr=0x%08x len=%04d\n",title ? title : "Dump of ", a, len);
printf("Ofs-00-01-02-03-04-05-06-07-08-09-0A-0B-0C-0D-0E-0F ASCII\n");
i = (len/STEP)*STEP;
for (j=0; j < i; j+=STEP)
{
printf("%02x: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c\n",
j,
ad[j], ad[j+1], ad[j+2], ad[j+3] , ad[j+4], ad[j+5], ad[j+6], ad[j+7],
ad[j+8], ad[j+9], ad[j+10], ad[j+11] , ad[j+12], ad[j+13], ad[j+14], ad[j+15],
DC(ad[j]), DC(ad[j+1]), DC(ad[j+2]), DC(ad[j+3]) , DC(ad[j+4]), DC(ad[j+5]), DC(ad[j+6]), DC(ad[j+7]),
DC(ad[j+8]), DC(ad[j+9]), DC(ad[j+10]), DC(ad[j+11]) , DC(ad[j+12]), DC(ad[j+13]), DC(ad[j+14]), DC(ad[j+15])
);
}
if (len%STEP==0) return;
sprintf(buffer,"%02x:", i);
for (j=0; j < STEP; j++) {
if (j<(len%STEP))
sprintf(str, " %02x", ad[i+j]);
else
strcpy(str, " " );
strncat(buffer, str, sizeof(buffer));
}
strncat(buffer," ", sizeof(buffer));
for (j=0; j < (len%STEP); j++) {
sprintf(str, "%c", DC(ad[i+j]));
strncat(buffer, str, sizeof(buffer));
}
printf("%s\n",buffer);
}
void dumpAllTablesOfType(int i)
{
char title[32];
struct DMIHeader * dmihdr;
for(dmihdr = FindFirstDmiTableOfType(i, 4);
dmihdr;
dmihdr = FindNextDmiTableOfType(i, 4)) {
sprintf(title,"Table (type %d) :" , i);
dumpPhysAddr(title, dmihdr, dmihdr->length+32);
}
}
const char * getDMIString(struct DMIHeader * dmihdr, uint8_t strNum)
{
const char * ret =NULL;
const char * startAddr = (const char *) dmihdr;
const char * limit = NULL;
if (!dmihdr || dmihdr->length<4 || strNum==0) return NULL;
startAddr += dmihdr->length;
limit = startAddr + 256;
for(; strNum; strNum--) {
if ((*startAddr)==0 && *(startAddr+1)==0) break;
if (*startAddr && strNum<=1) {
ret = startAddr; // current str
break;
}
while(*startAddr && startAddr<limit) startAddr++;
if (startAddr==limit) break; // no terminator found
else if((*startAddr==0) && *(startAddr+1)==0) break;
else startAddr++;
}
return ret;
}
void scan_memory(PlatformInfo_t *p)
{
int i=0;
struct DMIHeader * dmihdr = NULL;
struct DMIMemoryModuleInfo* memInfo[MAX_RAM_SLOTS]; // 6
struct DMIPhysicalMemoryArray* physMemArray; // 16
struct DMIMemoryDevice* memDev[MAX_RAM_SLOTS]; //17
/* We mainly don't use obsolete tables 5,6 because most of computers don't handle it anymore */
Platform.DMI.MemoryModules = 0;
/* Now lets peek info rom table 16,17 as for some bios, table 5 & 6 are not used */
physMemArray = (struct DMIPhysicalMemoryArray*) FindFirstDmiTableOfType(16, 4);
Platform.DMI.MaxMemorySlots = physMemArray ? physMemArray->numberOfMemoryDevices : 0;
i = 0;
for(dmihdr = FindFirstDmiTableOfType(17, 4);
dmihdr;
dmihdr = FindNextDmiTableOfType(17, 4) ) {
memDev[i] = (struct DMIMemoryDevice*) dmihdr;
if (memDev[i]->size !=0 ) Platform.DMI.MemoryModules++;
if (memDev[i]->speed>0) Platform.RAM.DIMM[i].Frequency = memDev[i]->speed; // take it here for now but we'll check spd and dmi table 6 as well
i++;
}
// for table 6, we only have a look at the current speed
i = 0;
for(dmihdr = FindFirstDmiTableOfType(6, 4);
dmihdr;
dmihdr = FindNextDmiTableOfType(6, 4) ) {
memInfo[i] = (struct DMIMemoryModuleInfo*) dmihdr;
if (memInfo[i]->currentSpeed > Platform.RAM.DIMM[i].Frequency)
Platform.RAM.DIMM[i].Frequency = memInfo[i]->currentSpeed; // favor real overclocked speed if any
i++;
}
#if 0
dumpAllTablesOfType(17);
getc();
#endif
}
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/*
* Copyright 2010 AsereBLN. All rights reserved. <aserebln@googlemail.com>
*
* mem.h
*/
#ifndef __LIBSAIO_MEM_H
#define __LIBSAIO_MEM_H
#include "platform.h"
extern void scan_memory(PlatformInfo_t *);
#endif/* __LIBSAIO_MEM_H */
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#define SMBIOS_RANGE_START 0x000F0000
#define SMBIOS_RANGE_END 0x000FFFFF
#define NOT_AVAILABLE"N/A"
typedef enum {
kSMBString,
kSMBByte,
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case CPU_MODEL_NEHALEM_EX:
case CPU_MODEL_WESTMERE:
case CPU_MODEL_WESTMERE_EX:
case CPU_MODEL_SANDY:
case CPU_MODEL_SANDY_XEON:
{
maximum.Control = rdmsr64(MSR_IA32_PERF_STATUS) & 0xff; // Seems it always contains maximum multiplier value (with turbo, that's we need)...
minimum.Control = (rdmsr64(MSR_PLATFORM_INFO) >> 40) & 0xff;
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}
return strdup(asciiPartNo);
return NULL;
}
int mapping []= {0,2,1,3,4,6,5,7,8,10,9,11};
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#include "libsaio.h"
#include "platform.h"
#include "cpu.h"
#include "bootstruct.h"
#include "boot.h"
#ifndef DEBUG_CPU
#define DEBUG_CPU 0
{
uint64_ttscFrequency, fsbFrequency, cpuFrequency;
uint64_tmsr, flex_ratio;
uint8_tmaxcoef, maxdiv, currcoef, currdiv;
uint8_tmaxcoef, maxdiv, currcoef, bus_ratio_max, currdiv;
const char *newratio;
int len, myfsb;
uint8_t bus_ratio_min;
uint32_t max_ratio, min_ratio;
maxcoef = maxdiv = currcoef = currdiv = 0;
max_ratio = min_ratio = myfsb = bus_ratio_min = 0;
maxcoef = maxdiv = bus_ratio_max = currcoef = currdiv = 0;
/* get cpuid values */
do_cpuid(0x00000000, p->CPU.CPUID[CPUID_0]);
p->CPU.Family= bitfield(p->CPU.CPUID[CPUID_1][0], 11, 8);
p->CPU.ExtModel= bitfield(p->CPU.CPUID[CPUID_1][0], 19, 16);
p->CPU.ExtFamily= bitfield(p->CPU.CPUID[CPUID_1][0], 27, 20);
p->CPU.NoThreads= bitfield(p->CPU.CPUID[CPUID_1][1], 23, 16);
p->CPU.NoCores= bitfield(p->CPU.CPUID[CPUID_4][0], 31, 26) + 1;
p->CPU.Model += (p->CPU.ExtModel << 4);
p->CPU.Model += (p->CPU.ExtModel << 4);
if (p->CPU.Vendor == 0x756E6547 /* Intel */ && p->CPU.Family == 0x06 && p->CPU.Model >= 0x1a){
msr = rdmsr64(MSR_CORE_THREAD_COUNT);// Undocumented MSR in Nehalem and newer CPUs
p->CPU.NoCores= bitfield((uint32_t)msr, 31, 16);// Using undocumented MSR to get actual values
p->CPU.NoThreads= bitfield((uint32_t)msr, 15, 0);// Using undocumented MSR to get actual values
} else {
p->CPU.NoThreads= bitfield(p->CPU.CPUID[CPUID_1][1], 23, 16);// Use previous method for Cores and Threads
p->CPU.NoCores= bitfield(p->CPU.CPUID[CPUID_4][0], 31, 26) + 1;
}
/* get brand string (if supported) */
/* Copyright: from Apple's XNU cpuid.c */
if (p->CPU.CPUID[CPUID_80][0] > 0x80000004) {
cpuFrequency = 0;
if ((p->CPU.Vendor == 0x756E6547 /* Intel */) && ((p->CPU.Family == 0x06) || (p->CPU.Family == 0x0f))) {
int intelCPU = p->CPU.Model;
if ((p->CPU.Family == 0x06 && p->CPU.Model >= 0x0c) || (p->CPU.Family == 0x0f && p->CPU.Model >= 0x03)) {
/* Nehalem CPU model */
if (p->CPU.Family == 0x06 && (p->CPU.Model == 0x1a || p->CPU.Model == 0x1e
|| p->CPU.Model == 0x1f || p->CPU.Model == 0x25 || p->CPU.Model == 0x2c)) {
if (p->CPU.Family == 0x06 && (p->CPU.Model == CPU_MODEL_NEHALEM ||
p->CPU.Model == CPU_MODEL_FIELDS ||
p->CPU.Model == CPU_MODEL_DALES ||
p->CPU.Model == CPU_MODEL_DALES_32NM ||
p->CPU.Model == CPU_MODEL_WESTMERE ||
p->CPU.Model == CPU_MODEL_NEHALEM_EX ||
p->CPU.Model == CPU_MODEL_WESTMERE_EX ||
p->CPU.Model == CPU_MODEL_SANDY ||
p->CPU.Model == CPU_MODEL_SANDY_XEON)) {
msr = rdmsr64(MSR_PLATFORM_INFO);
DBG("msr(%d): platform_info %08x\n", __LINE__, msr & 0xffffffff);
currcoef = (msr >> 8) & 0xff;
bus_ratio_max = (msr >> 8) & 0xff;
bus_ratio_min = (msr >> 40) & 0xff; //valv: not sure about this one (Remarq.1)
msr = rdmsr64(MSR_FLEX_RATIO);
DBG("msr(%d): flex_ratio %08x\n", __LINE__, msr & 0xffffffff);
if ((msr >> 16) & 0x01) {
flex_ratio = (msr >> 8) & 0xff;
if (currcoef > flex_ratio) {
currcoef = flex_ratio;
/* bcc9: at least on the gigabyte h67ma-ud2h,
where the cpu multipler can't be changed to
allow overclocking, the flex_ratio msr has unexpected (to OSX)
contents. These contents cause mach_kernel to
fail to compute the bus ratio correctly, instead
causing the system to crash since tscGranularity
is inadvertently set to 0.
*/
if (flex_ratio == 0) {
/* Clear bit 16 (evidently the
presence bit) */
wrmsr64(MSR_FLEX_RATIO, (msr & 0xFFFFFFFFFFFEFFFFULL));
msr = rdmsr64(MSR_FLEX_RATIO);
verbose("Unusable flex ratio detected. Patched MSR now %08x\n", msr & 0xffffffff);
} else {
if (bus_ratio_max > flex_ratio) {
bus_ratio_max = flex_ratio;
}
}
}
if (currcoef) {
fsbFrequency = (tscFrequency / currcoef);
if (bus_ratio_max) {
fsbFrequency = (tscFrequency / bus_ratio_max);
}
cpuFrequency = tscFrequency;
//valv: Turbo Ratio Limit
if ((intelCPU != 0x2e) && (intelCPU != 0x2f)) {
msr = rdmsr64(MSR_TURBO_RATIO_LIMIT);
cpuFrequency = bus_ratio_max * fsbFrequency;
max_ratio = bus_ratio_max * 10;
} else {
cpuFrequency = tscFrequency;
}
if ((getValueForKey(kbusratio, &newratio, &len, &bootInfo->bootConfig)) && (len <= 4)) {
max_ratio = atoi(newratio);
max_ratio = (max_ratio * 10);
if (len >= 3) max_ratio = (max_ratio + 5);
verbose("Bus-Ratio: min=%d, max=%s\n", bus_ratio_min, newratio);
// extreme overclockers may love 320 ;)
if ((max_ratio >= min_ratio) && (max_ratio <= 320)) {
cpuFrequency = (fsbFrequency * max_ratio) / 10;
if (len >= 3) maxdiv = 1;
else maxdiv = 0;
} else {
max_ratio = (bus_ratio_max * 10);
}
}
//valv: to be uncommented if Remarq.1 didn't stick
/*if(bus_ratio_max > 0) bus_ratio = flex_ratio;*/
p->CPU.MaxRatio = max_ratio;
p->CPU.MinRatio = min_ratio;
myfsb = fsbFrequency / 1000000;
verbose("Sticking with [BCLK: %dMhz, Bus-Ratio: %d]\n", myfsb, max_ratio);
currcoef = bus_ratio_max;
} else {
msr = rdmsr64(MSR_IA32_PERF_STATUS);
DBG("msr(%d): ia32_perf_stat 0x%08x\n", __LINE__, msr & 0xffffffff);
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#define CPU_MODEL_FIELDS0x1E/* Lynnfield, Clarksfield, Jasper */
#define CPU_MODEL_DALES0x1F/* Havendale, Auburndale */
#define CPU_MODEL_DALES_32NM0x25/* Clarkdale, Arrandale */
#define CPU_MODEL_SANDY0x2a/* Sandy bridge */
#define CPU_MODEL_WESTMERE0x2C/* Gulftown, Westmere-EP, Westmere-WS */
#define CPU_MODEL_SANDY_XEON0x2D
#define CPU_MODEL_NEHALEM_EX0x2E
#define CPU_MODEL_WESTMERE_EX0x2F
uint64_tTSCFrequency;// TSC Frequency Hz
uint64_tFSBFrequency;// FSB Frequency Hz
uint64_tCPUFrequency;// CPU Frequency Hz
uint32_tMaxRatio;// Max Bus Ratio
uint32_tMinRatio;// Min Bus Ratio
charBrandString[48];// 48 Byte Branding String
uint32_tCPUID[CPUID_MAX][4];// CPUID 0..4, 80..81 Raw Values
} CPU;
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// defaults for an iMac11,1 core i3/i5/i7
#define kDefaultiMacNehalem"iMac11,1"
#define kDefaultiMacNehalemBIOSVersion" IM111.88Z.0034.B00.0903051113"
// defaults for an iMac12,1
#define kDefaultiMacSandy"iMac12,1"
#define kDefaultiMacSandyBIOSVersion" IM121.88Z.0047.B00.1102091756"
// defaults for a Mac Pro
#define kDefaultMacProFamily"MacPro"
defaultSystemInfo.family= kDefaultiMacFamily;
break;
case CPU_MODEL_SANDY:
case CPU_MODEL_SANDY_XEON:
defaultBIOSInfo.version= kDefaultiMacSandyBIOSVersion;
defaultSystemInfo.productName= kDefaultiMacSandy;
defaultSystemInfo.family= kDefaultiMacFamily;
break;
case CPU_MODEL_NEHALEM:
case CPU_MODEL_NEHALEM_EX:
defaultBIOSInfo.version= kDefaultMacProNehalemBIOSVersion;
}
}
/* Used for SM*_N smbios.plist keys */
/* Used for SM*n smbios.plist keys */
bool getSMBValueForKey(SMBStructHeader *structHeader, const char *keyString, const char **string, returnType *value)
{
static int idx = -1;
strSize = strlen(string);
// remove any spaces found at the end
while (string[strSize - 1] == ' ')
while ((string[strSize - 1] == ' ') && strSize != 0)
strSize--;
if (strSize == 0)
{
*field = 0;
return;
}
memcpy((uint8_t *)structHeader + structHeader->length + stringsSize, string, strSize);
*field = stringIndex;
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#define MSR_IA32_PERF_CONTROL0x199
#define MSR_IA32_EXT_CONFIG0x00EE
#define MSR_FLEX_RATIO0x194
#define MSR_TURBO_RATIO_LIMIT0x1AD
#defineMSR_PLATFORM_INFO0xCE
#define MSR_CORE_THREAD_COUNT0x35// Undocumented
#define K8_FIDVID_STATUS0xC0010042
#define K10_COFVID_STATUS0xC0010071
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/*
* Copyright (c) 1998-2009 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
*
* The contents of this file constitute Original Code as defined in and
* are subject to the Apple Public Source License Version 1.1 (the
* "License"). You may not use this file except in compliance with the
* License. Please obtain a copy of the License at
* http://www.apple.com/publicsource and read it before using this file.
*
* This Original Code and all software distributed under the License are
* distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
* License for the specific language governing rights and limitations
* under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
#ifndef __LIBSAIO_SMBIOS_H
#define __LIBSAIO_SMBIOS_H
//
// Based on System Management BIOS Reference Specification v2.5
//
typedef uint8_t SMBString;
typedef uint8_t SMBByte;
typedef uint16_t SMBWord;
typedef uint32_t SMBDWord;
typedef uint64_t SMBQWord;
typedef struct DMIEntryPoint {
SMBByte anchor[5];
SMBByte checksum;
SMBWord tableLength;
SMBDWord tableAddress;
SMBWord structureCount;
SMBByte bcdRevision;
} __attribute__((packed)) DMIEntryPoint;
typedef struct SMBEntryPoint {
SMBByte anchor[4];
SMBByte checksum;
SMBByte entryPointLength;
SMBByte majorVersion;
SMBByte minorVersion;
SMBWord maxStructureSize;
SMBByte entryPointRevision;
SMBByte formattedArea[5];
DMIEntryPoint dmi;
} __attribute__((packed)) SMBEntryPoint;
//
// Header common to all SMBIOS structures
//
typedef struct SMBStructHeader {
SMBByte type;
SMBByte length;
SMBWord handle;
} __attribute__((packed)) SMBStructHeader;
#define SMB_STRUCT_HEADER SMBStructHeader header;
typedef struct SMBAnchor
{
const SMBStructHeader *header;
const uint8_t *next;
const uint8_t *end;
} SMBAnchor;
#define SMB_ANCHOR_IS_VALID(x)\
((x) && ((x)->header) && ((x)->next) && ((x)->end))
#define SMB_ANCHOR_RESET(x)\
bzero(x, sizeof(typedef struct SMBAnchor));
//
// SMBIOS structure types.
//
enum {
kSMBTypeBIOSInformation = 0,
kSMBTypeSystemInformation = 1,
kSMBTypeBaseBoard= 2,
kSMBTypeSystemEnclosure = 3,
kSMBTypeProcessorInformation = 4,
kSMBTypeMemoryModule = 6,
kSMBTypeCacheInformation = 7,
kSMBTypeSystemSlot = 9,
kSMBTypePhysicalMemoryArray = 16,
kSMBTypeMemoryDevice = 17,
kSMBType32BitMemoryErrorInfo = 18,
kSMBType64BitMemoryErrorInfo = 33,
kSMBTypeEndOfTable = 127,
/* Apple Specific Structures */
kSMBTypeFirmwareVolume = 128,
kSMBTypeMemorySPD = 130,
kSMBTypeOemProcessorType = 131,
kSMBTypeOemProcessorBusSpeed = 132
};
//
// BIOS Information (Type 0)
//
typedef struct SMBBIOSInformation {
SMB_STRUCT_HEADER // Type 0
SMBString vendor; // BIOS vendor name
SMBString version; // BIOS version
SMBWord startSegment; // BIOS segment start
SMBString releaseDate; // BIOS release date
SMBByte romSize; // (n); 64K * (n+1) bytes
SMBQWord characteristics; // supported BIOS functions
} __attribute__((packed)) SMBBIOSInformation;
//
// System Information (Type 1)
//
typedef struct SMBSystemInformation {
// 2.0+ spec (8 bytes)
SMB_STRUCT_HEADER // Type 1
SMBString manufacturer;
SMBString productName;
SMBString version;
SMBString serialNumber;
// 2.1+ spec (25 bytes)
SMBByte uuid[16]; // can be all 0 or all 1's
SMBByte wakeupReason; // reason for system wakeup
// 2.4+ spec (27 bytes)
SMBString skuNumber;
SMBString family;
} __attribute__((packed)) SMBSystemInformation;
//
// Base Board (Type 2)
//
typedef struct SMBBaseBoard {
SMB_STRUCT_HEADER // Type 2
SMBStringmanufacturer;
SMBStringproduct;
SMBStringversion;
SMBStringserialNumber;
SMBStringassetTagNumber;
SMBBytefeatureFlags;
SMBStringlocationInChassis;
SMBWordchassisHandle;
SMBByteboardType;
SMBBytenumberOfContainedHandles;
// 0 - 255 contained handles go here but we do not include
// them in our structure. Be careful to use numberOfContainedHandles
// times sizeof(SMBWord) when computing the actual record size,
// if you need it.
} __attribute__((packed)) SMBBaseBoard;
// Values for boardType in Type 2 records
enum {
kSMBBaseBoardUnknown= 0x01,
kSMBBaseBoardOther= 0x02,
kSMBBaseBoardServerBlade= 0x03,
kSMBBaseBoardConnectivitySwitch= 0x04,
kSMBBaseBoardSystemMgmtModule= 0x05,
kSMBBaseBoardProcessorModule= 0x06,
kSMBBaseBoardIOModule= 0x07,
kSMBBaseBoardMemoryModule= 0x08,
kSMBBaseBoardDaughter= 0x09,
kSMBBaseBoardMotherboard= 0x0A,
kSMBBaseBoardProcessorMemoryModule= 0x0B,
kSMBBaseBoardProcessorIOModule= 0x0C,
kSMBBaseBoardInterconnect= 0x0D,
};
//
// System Enclosure (Type 3)
//
typedef struct SMBSystemEnclosure {
SMB_STRUCT_HEADER // Type 3
SMBString manufacturer;
SMBByte type;
SMBString version;
SMBString serialNumber;
SMBString assetTagNumber;
SMBByte bootupState;
SMBByte powerSupplyState;
SMBByte thermalState;
SMBByte securityStatus;
SMBDWord oemDefined;
} __attribute__((packed)) SMBSystemEnclosure;
//
// Processor Information (Type 4)
//
typedef struct SMBProcessorInformation {
// 2.0+ spec (26 bytes)
SMB_STRUCT_HEADER // Type 4
SMBString socketDesignation;
SMBByte processorType; // CPU = 3
SMBByte processorFamily; // processor family enum
SMBString manufacturer;
SMBQWord processorID; // based on CPUID
SMBString processorVersion;
SMBByte voltage; // bit7 cleared indicate legacy mode
SMBWord externalClock; // external clock in MHz
SMBWord maximumClock; // max internal clock in MHz
SMBWord currentClock; // current internal clock in MHz
SMBByte status;
SMBByte processorUpgrade; // processor upgrade enum
// 2.1+ spec (32 bytes)
SMBWord L1CacheHandle;
SMBWord L2CacheHandle;
SMBWord L3CacheHandle;
// 2.3+ spec (35 bytes)
SMBString serialNumber;
SMBString assetTag;
SMBString partNumber;
} __attribute__((packed)) SMBProcessorInformation;
#define kSMBProcessorInformationMinSize 26
//
// Memory Module Information (Type 6)
// Obsoleted since SMBIOS version 2.1
//
typedef struct SMBMemoryModule {
SMB_STRUCT_HEADER // Type 6
SMBString socketDesignation;
SMBByte bankConnections;
SMBByte currentSpeed;
SMBWord currentMemoryType;
SMBByte installedSize;
SMBByte enabledSize;
SMBByte errorStatus;
} __attribute__((packed)) SMBMemoryModule;
#define kSMBMemoryModuleSizeNotDeterminable 0x7D
#define kSMBMemoryModuleSizeNotEnabled 0x7E
#define kSMBMemoryModuleSizeNotInstalled 0x7F
//
// Cache Information (Type 7)
//
typedef struct SMBCacheInformation {
SMB_STRUCT_HEADER // Type 7
SMBString socketDesignation;
SMBWord cacheConfiguration;
SMBWord maximumCacheSize;
SMBWord installedSize;
SMBWord supportedSRAMType;
SMBWord currentSRAMType;
SMBByte cacheSpeed;
SMBByte errorCorrectionType;
SMBByte systemCacheType;
SMBByte associativity;
} __attribute__((packed)) SMBCacheInformation;
typedef struct SMBSystemSlot {
// 2.0+ spec (12 bytes)
SMB_STRUCT_HEADER // Type 9
SMBString slotDesignation;
SMBByte slotType;
SMBByte slotDataBusWidth;
SMBByte currentUsage;
SMBByte slotLength;
SMBWord slotID;
SMBByte slotCharacteristics1;
// 2.1+ spec (13 bytes)
SMBByte slotCharacteristics2;
} __attribute__((packed)) SMBSystemSlot;
//
// Physical Memory Array (Type 16)
//
typedef struct SMBPhysicalMemoryArray {
// 2.1+ spec (15 bytes)
SMB_STRUCT_HEADER // Type 16
SMBByte physicalLocation; // physical location
SMBByte arrayUse; // the use for the memory array
SMBByte errorCorrection; // error correction/detection method
SMBDWord maximumCapacity; // maximum memory capacity in kilobytes
SMBWord errorHandle; // handle of a previously detected error
SMBWord numMemoryDevices; // number of memory slots or sockets
} __attribute__((packed)) SMBPhysicalMemoryArray;
// Memory Array - Use
enum {
kSMBMemoryArrayUseOther = 0x01,
kSMBMemoryArrayUseUnknown = 0x02,
kSMBMemoryArrayUseSystemMemory = 0x03,
kSMBMemoryArrayUseVideoMemory = 0x04,
kSMBMemoryArrayUseFlashMemory = 0x05,
kSMBMemoryArrayUseNonVolatileMemory = 0x06,
kSMBMemoryArrayUseCacheMemory = 0x07
};
// Memory Array - Error Correction Types
enum {
kSMBMemoryArrayErrorCorrectionTypeOther = 0x01,
kSMBMemoryArrayErrorCorrectionTypeUnknown = 0x02,
kSMBMemoryArrayErrorCorrectionTypeNone = 0x03,
kSMBMemoryArrayErrorCorrectionTypeParity = 0x04,
kSMBMemoryArrayErrorCorrectionTypeSingleBitECC = 0x05,
kSMBMemoryArrayErrorCorrectionTypeMultiBitECC = 0x06,
kSMBMemoryArrayErrorCorrectionTypeCRC = 0x07
};
//
// Memory Device (Type 17)
//
typedef struct SMBMemoryDevice {
// 2.1+ spec (21 bytes)
SMB_STRUCT_HEADER // Type 17
SMBWord arrayHandle; // handle of the parent memory array
SMBWord errorHandle; // handle of a previously detected error
SMBWord totalWidth; // total width in bits; including ECC bits
SMBWord dataWidth; // data width in bits
SMBWord memorySize; // bit15 is scale, 0 = MB, 1 = KB
SMBByte formFactor; // memory device form factor
SMBByte deviceSet; // parent set of identical memory devices
SMBString deviceLocator; // labeled socket; e.g. "SIMM 3"
SMBString bankLocator; // labeled bank; e.g. "Bank 0" or "A"
SMBByte memoryType; // type of memory
SMBWord memoryTypeDetail; // additional detail on memory type
// 2.3+ spec (27 bytes)
SMBWord memorySpeed; // speed of device in MHz (0 for unknown)
SMBString manufacturer;
SMBString serialNumber;
SMBString assetTag;
SMBString partNumber;
} __attribute__((packed)) SMBMemoryDevice;
//
// Firmware Volume Description (Apple Specific - Type 128)
//
enum {
FW_REGION_RESERVED = 0,
FW_REGION_RECOVERY = 1,
FW_REGION_MAIN = 2,
FW_REGION_NVRAM = 3,
FW_REGION_CONFIG = 4,
FW_REGION_DIAGVAULT = 5,
NUM_FLASHMAP_ENTRIES = 8
};
typedef struct FW_REGION_INFO
{
SMBDWord StartAddress;
SMBDWord EndAddress;
} __attribute__((packed)) FW_REGION_INFO;
typedef struct SMBFirmwareVolume {
SMB_STRUCT_HEADER // Type 128
SMBByte RegionCount;
SMBByte Reserved[3];
SMBDWord FirmwareFeatures;
SMBDWord FirmwareFeaturesMask;
SMBByte RegionType[ NUM_FLASHMAP_ENTRIES ];
FW_REGION_INFO FlashMap[ NUM_FLASHMAP_ENTRIES ];
} __attribute__((packed)) SMBFirmwareVolume;
//
// Memory SPD Data (Apple Specific - Type 130)
//
typedef struct SMBMemorySPD {
SMB_STRUCT_HEADER // Type 130
SMBWord Type17Handle;
SMBWord Offset;
SMBWord Size;
SMBWord Data[];
} __attribute__((packed)) SMBMemorySPD;
static const char *
SMBMemoryDeviceTypes[] =
{
"RAM", /* 00h Undefined */
"RAM", /* 01h Other */
"RAM", /* 02h Unknown */
"DRAM", /* 03h DRAM */
"EDRAM", /* 04h EDRAM */
"VRAM", /* 05h VRAM */
"SRAM", /* 06h SRAM */
"RAM", /* 07h RAM */
"ROM", /* 08h ROM */
"FLASH", /* 09h FLASH */
"EEPROM", /* 0Ah EEPROM */
"FEPROM", /* 0Bh FEPROM */
"EPROM", /* 0Ch EPROM */
"CDRAM", /* 0Dh CDRAM */
"3DRAM", /* 0Eh 3DRAM */
"SDRAM", /* 0Fh SDRAM */
"SGRAM", /* 10h SGRAM */
"RDRAM", /* 11h RDRAM */
"DDR SDRAM", /* 12h DDR */
"DDR2 SDRAM", /* 13h DDR2 */
"DDR2 FB-DIMM", /* 14h DDR2 FB-DIMM */
"RAM",/* 15h unused */
"RAM",/* 16h unused */
"RAM",/* 17h unused */
"DDR3",/* 18h DDR3, chosen in [5776134] */
};
static const int
kSMBMemoryDeviceTypeCount = sizeof(SMBMemoryDeviceTypes) /
sizeof(SMBMemoryDeviceTypes[0]);
//
// OEM Processor Type (Apple Specific - Type 131)
//
typedef struct SMBOemProcessorType {
SMB_STRUCT_HEADER
SMBWord ProcessorType;
} __attribute__((packed)) SMBOemProcessorType;
//
// OEM Processor Bus Speed (Apple Specific - Type 132)
//
typedef struct SMBOemProcessorBusSpeed {
SMB_STRUCT_HEADER
SMBWord ProcessorBusSpeed; // MT/s unit
} __attribute__((packed)) SMBOemProcessorBusSpeed;
//----------------------------------------------------------------------------------------------------------
/* From Foundation/Efi/Guid/Smbios/SmBios.h */
/* Modified to wrap Data4 array init with {} */
#define EFI_SMBIOS_TABLE_GUID {0xeb9d2d31, 0x2d88, 0x11d3, {0x9a, 0x16, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d}}
#define SMBIOS_ORIGINAL0
#define SMBIOS_PATCHED1
extern void *getSmbios(int which);
extern void readSMBIOSInfo(SMBEntryPoint *eps);
extern void setupSMBIOSTable(void);
extern void decodeSMBIOSTable(SMBEntryPoint *eps);
#endif /* !__LIBSAIO_SMBIOS_H */
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}
}
void saveOriginalSMBIOS(void)
{
Node *node;
SMBEntryPoint *origeps;
void *tableAddress;
node = DT__FindNode("/efi/platform", false);
if (!node)
{
verbose("/efi/platform node not found\n");
return;
}
origeps = getSmbios(SMBIOS_ORIGINAL);
if (!origeps)
{
return;
}
tableAddress = (void *)AllocateKernelMemory(origeps->dmi.tableLength);
if (!tableAddress)
{
return;
}
memcpy(tableAddress, (void *)origeps->dmi.tableAddress, origeps->dmi.tableLength);
DT__AddProperty(node, "SMBIOS", origeps->dmi.tableLength, tableAddress);
}
/*
* Entrypoint from boot.c
*/
setup_pci_devs(root_pci_dev);
readSMBIOSInfo(getSmbios(SMBIOS_ORIGINAL));
// load smbios.plist file if any
setupSmbiosConfigFile("smbios.plist");
// Initialize the device tree
setupEfiDeviceTree();
saveOriginalSMBIOS();
// Add configuration table entries to both the services table and the device tree
setupEfiConfigurationTable();
}
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return false;
case 0x19:// Intel Core i5 650 @3.20 Ghz
case CPU_MODEL_SANDY:// Intel Core i5, i7 LGA1155 sandy bridge
case CPU_MODEL_SANDY_XEON:
case CPU_MODEL_NEHALEM:// Intel Core i7 LGA1366 (45nm)
case CPU_MODEL_FIELDS:// Intel Core i5, i7 LGA1156 (45nm)
case CPU_MODEL_DALES:// Intel Core i5, i7 LGA1156 (45nm) ???
value->word = 0x0701;// Core i7
return true;
case CPU_MODEL_SANDY:// Intel Core i3, i5, i7 LGA1155 sandy bridge
case CPU_MODEL_SANDY_XEON:
case CPU_MODEL_DALES_32NM:// Intel Core i3, i5, i7 LGA1156 (32nm) (Clarkdale, Arrandale)
if (strstr(Platform.CPU.BrandString, "Core(TM) i3"))
value->word = 0x901;// Core i3
}
}
return false;
//value->string = "N/A";
//return true;
//return false;
value->string = NOT_AVAILABLE;
return true;
}
bool getSMBMemoryDeviceSerialNumber(returnType *value)
map = Platform.DMI.DIMM[idx];
if (Platform.RAM.DIMM[map].InUse && strlen(Platform.RAM.DIMM[map].SerialNo) > 0)
{
DBG("name = %s, map=%d, RAM Detected SerialNo[%d]='%s'\n", name ? name : "",
map, idx, Platform.RAM.DIMM[map].SerialNo);
DBG("map=%d, RAM Detected SerialNo[%d]='%s'\n", map, idx, Platform.RAM.DIMM[map].SerialNo);
value->string = Platform.RAM.DIMM[map].SerialNo;
return true;
}
}
return false;
//value->string = "N/A";
//return true;
//return false;
value->string = NOT_AVAILABLE;
return true;
}
bool getSMBMemoryDevicePartNumber(returnType *value)
map = Platform.DMI.DIMM[idx];
if (Platform.RAM.DIMM[map].InUse && strlen(Platform.RAM.DIMM[map].PartNo) > 0)
{
DBG("Ram Detected PartNo[%d]='%s'\n", idx, Platform.RAM.DIMM[map].PartNo);
DBG("map=%d, RAM Detected PartNo[%d]='%s'\n", map, idx, Platform.RAM.DIMM[map].PartNo);
value->string = Platform.RAM.DIMM[map].PartNo;
return true;
}
}
return false;
//value->string = "N/A";
//return true;
//return false;
value->string = NOT_AVAILABLE;
return true;
}
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#define kDefaultPartition"Default Partition"/* sys.c */
#define kMD0Image"md0"/* ramdisk.h */
#define kbusratio"busratio"/* cpu.c */
/*
* Flags to the booter or kernel
branches/azimutz/Cleancut/i386/modules/Resolution/Readme.txt
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Module:Resolution
Description: This module reads the edid information from the monitor attached to the main display. The module is currently not integrated into trunk and has minimal uses as it stands. Additionally, the module will patch the vesa modes available in pre intel hd graphics cards to provide proper resolution while booting.
Dependencies: none
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Module:klibc
Source: http://www.kernel.org/pub/linux/libs/klibc/
Description: This module provides a standard c library for modules to link to if the library provided by chameleon is insufficient. This is currently only used by the uClibc++ library.
Dependencies: none
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Module:uClibc++
Source: http://cxx.uclibc.org/
Description: This module provides a minimalistic c++ runtime library for use in other modules. This does not provide functionality by itself, instead it is used to allow for the c++ language to be used in other modules. Please note that rtti and exceptions has both been disabled.
Dependencies: klibc
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done
objroot_dirs:
@rm -rf "$(OBJROOT)"
@mkdir "$(OBJROOT)" &> /dev/null
@rm -rf module_includes
@mkdir module_includes
@rm -rf "$(SYMROOT)/modules/"

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