Chameleon

Chameleon Commit Details

Date:2011-05-20 08:36:19 (7 years 4 months ago)
Author:Azimutz
Commit:842
Parents: 841
Message:Merge trunk (r827/828/829). Update xcodeproj.
Changes:
D/branches/azimutz/Chazi/i386/modules/Memory/mem.h
D/branches/azimutz/Chazi/i386/modules/Memory/mem.c
M/branches/azimutz/Chazi/i386/libsaio/smbios_getters.h
M/branches/azimutz/Chazi/i386/libsaio/acpi_patcher.c
M/branches/azimutz/Chazi
M/branches/azimutz/Chazi/Chameleon.xcodeproj/project.pbxproj
M/branches/azimutz/Chazi/i386/modules/Memory/spd.c
M/branches/azimutz/Chazi/i386/libsaio/cpu.c
M/branches/azimutz/Chazi/i386/libsaio/fake_efi.c
M/branches/azimutz/Chazi/i386/libsaio/platform.h
M/branches/azimutz/Chazi/i386/libsaio/smbios_getters.c
M/branches/azimutz/Chazi/i386/boot2/boot.h
M/branches/azimutz/Chazi/i386/libsaio/cpu.h
M/branches/azimutz/Chazi/i386/libsaio/smbios.c

File differences

branches/azimutz/Chazi/Chameleon.xcodeproj/project.pbxproj
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032B50F113863B9A00CA6C31 /* sstream */,
032B50F213863B9A00CA6C31 /* stack */,
032B50F313863B9A00CA6C31 /* stdexcept */,
032B50F413863B9A00CA6C31 /* streambuf */,
032B50F513863B9A00CA6C31 /* string */,
032B50F613863B9A00CA6C31 /* string_iostream */,
032B50F713863B9A00CA6C31 /* support */,
032B50F813863B9A00CA6C31 /* system_configuration.h */,
032B50F913863B9A00CA6C31 /* type_traits */,
032B50FA13863B9A00CA6C31 /* typeinfo */,
032B50FB13863B9A00CA6C31 /* types */,
032B50FC13863B9A00CA6C31 /* unwind-cxx.h */,
032B50FD13863B9A00CA6C31 /* utility */,
032B50FE13863B9A00CA6C31 /* valarray */,
032B50FF13863B9A00CA6C31 /* vector */,
);
path = include;
sourceTree = "<group>";
};
08FB7794FE84155DC02AAC07 /* Chameleon */ = {
isa = PBXGroup;
children = (
B0056CE511F3868000754B65 /* i386 */ = {
isa = PBXGroup;
children = (
032B502D13863B9900CA6C31 /* modules */,
B0056CE611F3868000754B65 /* boot0 */,
B0056CEA11F3868000754B65 /* boot1 */,
B0056CF211F3868000754B65 /* boot2 */,
B00F494A11F6089500B1D7C5 /* aml_generator.c */,
B00F494911F6089500B1D7C5 /* aml_generator.h */,
B0056D2911F3868000754B65 /* asm.s */,
012E60F7137AC68F00E35218 /* ati_reg.h */,
B0056D2A11F3868000754B65 /* ati.c */,
B0056D2C11F3868000754B65 /* bios.h */,
B0056D2D11F3868000754B65 /* bios.s */,
B0056D2E11F3868000754B65 /* biosfn.c */,
B0056D3A11F3868000754B65 /* device_tree.h */,
B0056D3B11F3868000754B65 /* disk.c */,
65ED53931204B83200B22507 /* disk.h */,
0172D0DC11FB66820030222E /* dram_controllers.h */,
0172D0DD11FB66820030222E /* dram_controllers.c */,
B0056D3C11F3868000754B65 /* efi.h */,
B0056D3D11F3868000754B65 /* ext2fs.c */,
B0056D3E11F3868000754B65 /* ext2fs.h */,
B0056D4311F3868000754B65 /* hfs.h */,
B0056D4411F3868000754B65 /* hfs_CaseTables.h */,
B0056D4511F3868000754B65 /* hfs_compare.c */,
B0056D4611F3868000754B65 /* hpet.c */,
B0056D4711F3868000754B65 /* hpet.h */,
B0056D4811F3868000754B65 /* io_inline.h */,
B0056D4911F3868000754B65 /* libsaio.h */,
B0056D4A11F3868000754B65 /* load.c */,
B0056D4B11F3868000754B65 /* Makefile */,
B0056D4C11F3868000754B65 /* md5c.c */,
B0056D4D11F3868000754B65 /* mem.c */,
B0056D4E11F3868000754B65 /* mem.h */,
B0056D4F11F3868000754B65 /* memvendors.h */,
B0056D5011F3868000754B65 /* misc.c */,
B0056D5111F3868000754B65 /* msdos.c */,
B0056D5611F3868000754B65 /* ntfs.c */,
B0056D5711F3868000754B65 /* ntfs.h */,
B0056D5811F3868000754B65 /* ntfs_private.h */,
B0056D5911F3868000754B65 /* nvidia.c */,
B0056D5A11F3868000754B65 /* nvidia.h */,
B0056D5B11F3868000754B65 /* pci.c */,
B0056D5C11F3868000754B65 /* pci.h */,
B0056D5D11F3868000754B65 /* pci_root.c */,
012E60F9137AC68F00E35218 /* smbios_getters.c */,
012E60FA137AC68F00E35218 /* smbios_getters.h */,
012E60FB137AC68F00E35218 /* smbios.c */,
B0056D6811F3868000754B65 /* spd.c */,
B0056D6911F3868000754B65 /* spd.h */,
B0056D6A11F3868000754B65 /* stringTable.c */,
B0056D6B11F3868000754B65 /* sys.c */,
B0056D6C11F3868000754B65 /* table.c */,
branches/azimutz/Chazi/i386/libsaio/smbios_getters.h
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#define SMBIOS_RANGE_START 0x000F0000
#define SMBIOS_RANGE_END 0x000FFFFF
#define NOT_AVAILABLE"N/A"
typedef enum {
kSMBString,
kSMBByte,
branches/azimutz/Chazi/i386/libsaio/acpi_patcher.c
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case CPU_MODEL_NEHALEM_EX:
case CPU_MODEL_WESTMERE:
case CPU_MODEL_WESTMERE_EX:
case CPU_MODEL_SANDY:
case CPU_MODEL_SANDY_XEON:
{
// Seems it always contains maximum multiplier value (with turbo, that's what we need)...
maximum.Control = rdmsr64(MSR_IA32_PERF_STATUS) & 0xff;
minimum.Control = (rdmsr64(MSR_PLATFORM_INFO) >> 40) & 0xff;
verbose("P-States: min 0x%x, max 0x%x\n", minimum.Control, maximum.Control);
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//#include "libsaio.h"
#include "platform.h"
#include "cpu.h"
#include "boot.h"
#ifndef DEBUG_CPU
#define DEBUG_CPU 0
void scan_cpu(PlatformInfo_t *p)
{
uint64_ttscFrequency, fsbFrequency, cpuFrequency;
uint64_tmsr, flex_ratio;
uint8_tmaxcoef, maxdiv, currcoef, currdiv;
const char *newratio;
intlen, myfsb;
uint8_tmaxcoef, maxdiv, currcoef, bus_ratio_max, bus_ratio_min, currdiv;
uint32_tmax_ratio, min_ratio;
uint64_ttscFrequency, fsbFrequency, cpuFrequency, msr, flex_ratio;
maxcoef = maxdiv = currcoef = currdiv = 0;
max_ratio = min_ratio = myfsb = bus_ratio_min = 0;
maxcoef = maxdiv = bus_ratio_max = currcoef = currdiv = 0;
/* get cpuid values */
do_cpuid(0x00000000, p->CPU.CPUID[CPUID_0]);
p->CPU.Family= bitfield(p->CPU.CPUID[CPUID_1][0], 11, 8);
p->CPU.ExtModel= bitfield(p->CPU.CPUID[CPUID_1][0], 19, 16);
p->CPU.ExtFamily= bitfield(p->CPU.CPUID[CPUID_1][0], 27, 20);
p->CPU.NoThreads= bitfield(p->CPU.CPUID[CPUID_1][1], 23, 16);
p->CPU.NoCores= bitfield(p->CPU.CPUID[CPUID_4][0], 31, 26) + 1;
p->CPU.Model += (p->CPU.ExtModel << 4);
if (p->CPU.Vendor == 0x756E6547 /* Intel */ && p->CPU.Family == 0x06 && p->CPU.Model >= 0x1a){
msr = rdmsr64(MSR_CORE_THREAD_COUNT);// Undocumented MSR in Nehalem and newer CPUs
p->CPU.NoCores= bitfield((uint32_t)msr, 31, 16);// Using undocumented MSR to get actual values
p->CPU.NoThreads= bitfield((uint32_t)msr, 15, 0);// Using undocumented MSR to get actual values
} else {
p->CPU.NoThreads= bitfield(p->CPU.CPUID[CPUID_1][1], 23, 16);// Use previous method for Cores and Threads
p->CPU.NoCores= bitfield(p->CPU.CPUID[CPUID_4][0], 31, 26) + 1;
}
/* get brand string (if supported) */
/* Copyright: from Apple's XNU cpuid.c */
if (p->CPU.CPUID[CPUID_80][0] > 0x80000004) {
cpuFrequency = 0;
if ((p->CPU.Vendor == 0x756E6547 /* Intel */) && ((p->CPU.Family == 0x06) || (p->CPU.Family == 0x0f))) {
int intelCPU = p->CPU.Model;
if ((p->CPU.Family == 0x06 && p->CPU.Model >= 0x0c) || (p->CPU.Family == 0x0f && p->CPU.Model >= 0x03)) {
/* Nehalem CPU model */
if (p->CPU.Family == 0x06 && (p->CPU.Model == 0x1a || p->CPU.Model == 0x1e
|| p->CPU.Model == 0x1f || p->CPU.Model == 0x25 || p->CPU.Model == 0x2c)) {
if (p->CPU.Family == 0x06 && (p->CPU.Model == CPU_MODEL_NEHALEM ||
p->CPU.Model == CPU_MODEL_FIELDS ||
p->CPU.Model == CPU_MODEL_DALES ||
p->CPU.Model == CPU_MODEL_DALES_32NM ||
p->CPU.Model == CPU_MODEL_WESTMERE ||
p->CPU.Model == CPU_MODEL_NEHALEM_EX ||
p->CPU.Model == CPU_MODEL_WESTMERE_EX ||
p->CPU.Model == CPU_MODEL_SANDY ||
p->CPU.Model == CPU_MODEL_SANDY_XEON)) {
msr = rdmsr64(MSR_PLATFORM_INFO);
//DBG("msr(%d): platform_info %08x\n", __LINE__, msr & 0xffffffff);
DBG("MSR_PLATFORM_INFO (0xCE): 0x%08X%08X\n", (uint32_t)(msr >> 32), (uint32_t)msr);
currcoef = (msr >> 8) & 0xff;
DBG("msr(%d): platform_info %08x\n", __LINE__, msr & 0xffffffff);
//kabylDBG("MSR_PLATFORM_INFO (0xCE): 0x%08X%08X\n", (uint32_t)(msr >> 32), (uint32_t)msr);
bus_ratio_max = (msr >> 8) & 0xff;
bus_ratio_min = (msr >> 40) & 0xff; //valv: not sure about this one (Remarq.1)
msr = rdmsr64(MSR_FLEX_RATIO);
//DBG("msr(%d): flex_ratio %08x\n", __LINE__, msr & 0xffffffff);
DBG("MSR_FLEX_RATIO (0x194): 0x%08X%08X\n", (uint32_t)(msr >> 32), (uint32_t)msr);
DBG("msr(%d): flex_ratio %08x\n", __LINE__, msr & 0xffffffff);
//kabylDBG("MSR_FLEX_RATIO (0x194): 0x%08X%08X\n", (uint32_t)(msr >> 32), (uint32_t)msr);
if ((msr >> 16) & 0x01) {
flex_ratio = (msr >> 8) & 0xff;
if (currcoef > flex_ratio) {
currcoef = flex_ratio;
/* bcc9: at least on the gigabyte h67ma-ud2h,
where the cpu multipler can't be changed to
allow overclocking, the flex_ratio msr has unexpected (to OSX)
contents. These contents cause mach_kernel to
fail to compute the bus ratio correctly, instead
causing the system to crash since tscGranularity
is inadvertently set to 0.
*/
if (flex_ratio == 0) {
/* Clear bit 16 (evidently the
presence bit) */
wrmsr64(MSR_FLEX_RATIO, (msr & 0xFFFFFFFFFFFEFFFFULL));
msr = rdmsr64(MSR_FLEX_RATIO);
verbose("Unusable flex ratio detected. Patched MSR now %08x\n", msr & 0xffffffff);
} else {
if (bus_ratio_max > flex_ratio) {
bus_ratio_max = flex_ratio;
}
}
}
if (currcoef) {
fsbFrequency = (tscFrequency / currcoef);
if (bus_ratio_max) {
fsbFrequency = (tscFrequency / bus_ratio_max);
}
cpuFrequency = tscFrequency;
//valv: Turbo Ratio Limit
if ((intelCPU != 0x2e) && (intelCPU != 0x2f)) {
msr = rdmsr64(MSR_TURBO_RATIO_LIMIT);
cpuFrequency = bus_ratio_max * fsbFrequency;
max_ratio = bus_ratio_max * 10;
} else {
cpuFrequency = tscFrequency;
}
if ((getValueForKey(kBusRatioKey, &newratio, &len, &bootInfo->bootConfig)) && (len <= 4)) {
max_ratio = atoi(newratio);
max_ratio = (max_ratio * 10);
if (len >= 3) max_ratio = (max_ratio + 5);
verbose("Bus-Ratio: min=%d, max=%s\n", bus_ratio_min, newratio);
// extreme overclockers may love 320 ;)
if ((max_ratio >= min_ratio) && (max_ratio <= 320)) {
cpuFrequency = (fsbFrequency * max_ratio) / 10;
if (len >= 3) maxdiv = 1;
else maxdiv = 0;
} else {
max_ratio = (bus_ratio_max * 10);
}
}
//valv: to be uncommented if Remarq.1 didn't stick
/*if(bus_ratio_max > 0) bus_ratio = flex_ratio;*/
p->CPU.MaxRatio = max_ratio;
p->CPU.MinRatio = min_ratio;
myfsb = fsbFrequency / 1000000;
verbose("Sticking with [BCLK: %dMhz, Bus-Ratio: %d]\n", myfsb, max_ratio);
currcoef = bus_ratio_max;
} else {
msr = rdmsr64(MSR_IA32_PERF_STATUS);
//Azi: __FILE__ %d, __LINE__ %d, __FUNCTION__ %s
//msglog("%s - %d\n", __FUNCTION__, __LINE__);
//DBG("msr(%d): ia32_perf_stat 0x%08x\n", __LINE__, msr & 0xffffffff);
DBG("msr(%d): ia32_perf_stat 0x%08x\n", __LINE__, msr & 0xffffffff);
//Azi: 0x00000F2700000F27
DBG("MSR_IA32_PERF_STATUS (0x198): 0x%08X%08X\n", (uint32_t)(msr >> 32), (uint32_t)msr);
//kabylDBG("MSR_IA32_PERF_STATUS (0x198): 0x%08X%08X\n", (uint32_t)(msr >> 32), (uint32_t)msr);
currcoef = (msr >> 8) & 0x1f;
/* Non-integer bus ratio for the max-multi*/
maxdiv = (msr >> 46) & 0x01;
branches/azimutz/Chazi/i386/libsaio/platform.h
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#define CPU_MODEL_FIELDS0x1E// Lynnfield, Clarksfield, Jasper
#define CPU_MODEL_DALES0x1F// Havendale, Auburndale
#define CPU_MODEL_DALES_32NM0x25// Clarkdale, Arrandale
#define CPU_MODEL_SANDY0x2a// Sandy bridge
#define CPU_MODEL_WESTMERE0x2C// Gulftown, Westmere-EP, Westmere-WS
#define CPU_MODEL_SANDY_XEON0x2D
#define CPU_MODEL_NEHALEM_EX0x2E
#define CPU_MODEL_WESTMERE_EX0x2F
uint64_tTSCFrequency;// TSC Frequency Hz
uint64_tFSBFrequency;// FSB Frequency Hz
uint64_tCPUFrequency;// CPU Frequency Hz
uint32_tMaxRatio;// Max Bus Ratio
uint32_tMinRatio;// Min Bus Ratio
charBrandString[48];// 48 Byte Branding String
uint32_tCPUID[CPUID_MAX][4];// CPUID 0..4, 80..81 Raw Values
} CPU;
branches/azimutz/Chazi/i386/libsaio/smbios.c
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#define kDefaultiMacNehalem"iMac11,1"
#define kDefaultiMacNehalemBIOSVersion" IM111.88Z.0034.B00.0802091538"
#define kDefaultiMacNehalemBoardProduct"Mac-F2268DAE"
// defaults for an iMac12,1
#define kDefaultiMacSandy"iMac12,1"
#define kDefaultiMacSandyBIOSVersion" IM121.88Z.0047.B00.1102091756"
#define kDefaultiMacSandyBoardProduct"Mac-F2268DAE" // find value ??
// defaults for a Mac Pro
#define kDefaultMacProFamily"MacPro"
defaultBaseBoard.product= kDefaultiMacNehalemBoardProduct;
break;
case CPU_MODEL_SANDY:
case CPU_MODEL_SANDY_XEON:
defaultBIOSInfo.version= kDefaultiMacSandyBIOSVersion;
defaultSystemInfo.productName= kDefaultiMacSandy;
defaultSystemInfo.family= kDefaultiMacFamily;
defaultBaseBoard.product= kDefaultiMacSandyBoardProduct; // ??
break;
case CPU_MODEL_NEHALEM:
case CPU_MODEL_NEHALEM_EX:
defaultBIOSInfo.version= kDefaultMacProNehalemBIOSVersion;
}
}
/* Used for SM*_N smbios.plist keys */
/* Used for SM*n smbios.plist keys */
bool getSMBValueForKey(SMBStructHeader *structHeader, const char *keyString, const char **string, returnType *value)
{
static int idx = -1;
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#define MSR_IA32_PERF_CONTROL0x199
#define MSR_IA32_EXT_CONFIG0x00EE
#define MSR_FLEX_RATIO0x194
#define MSR_TURBO_RATIO_LIMIT0x1AD
#defineMSR_PLATFORM_INFO0xCE
#define K8_FIDVID_STATUS0xC0010042
#define K10_COFVID_STATUS0xC0010071
#define MSR_CORE_THREAD_COUNT0x35// Undocumented
//#define DEFAULT_FSB100000 // for now, hardcoding 100MHz for old CPUs - disabled
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}
}
/**
what for ??
**/
void saveOriginalSMBIOS(void)
{
Node *node;
SMBEntryPoint *origeps;
void *tableAddress;
node = DT__FindNode("/efi/platform", false);
if (!node)
{
verbose("/efi/platform node not found\n");
return;
}
origeps = getSmbios(SMBIOS_ORIGINAL);
if (!origeps)
{
return;
}
tableAddress = (void *)AllocateKernelMemory(origeps->dmi.tableLength);
if (!tableAddress)
{
return;
}
memcpy(tableAddress, (void *)origeps->dmi.tableAddress, origeps->dmi.tableLength);
DT__AddProperty(node, "SMBIOS", origeps->dmi.tableLength, tableAddress);
}
/*
* Entrypoint from boot.c
*/
setup_pci_devs(root_pci_dev);
readSMBIOSInfo(getSmbios(SMBIOS_ORIGINAL));
// load smbios.plist file if any
//setupSmbiosConfigFile("SMBIOS.plist");
scan_mem();
// Initialize the device tree
setupEfiDeviceTree();
saveOriginalSMBIOS();
// Add configuration table entries to both the services table and the device tree
setupEfiConfigurationTable();
}
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return false;
case 0x19:// Intel Core i5 650 @3.20 Ghz
case CPU_MODEL_SANDY:// Intel Core i5, i7 LGA1155 sandy bridge
case CPU_MODEL_SANDY_XEON:
case CPU_MODEL_NEHALEM:// Intel Core i7 LGA1366 (45nm)
case CPU_MODEL_FIELDS:// Intel Core i5, i7 LGA1156 (45nm)
case CPU_MODEL_DALES:// Intel Core i5, i7 LGA1156 (45nm) ???
value->word = 0x0701;// Core i7
return true;
case CPU_MODEL_SANDY:// Intel Core i3, i5, i7 LGA1155 sandy bridge
case CPU_MODEL_SANDY_XEON:
case CPU_MODEL_DALES_32NM:// Intel Core i3, i5, i7 LGA1156 (32nm) (Clarkdale, Arrandale)
if (strstr(Platform.CPU.BrandString, "Core(TM) i3"))
value->word = 0x901;// Core i3
}
}
return false;
//value->string = "N/A";
//return true;
//return false;
value->string = NOT_AVAILABLE;
return true;
}
bool getSMBMemoryDeviceSerialNumber(returnType *value)
map = Platform.DMI.DIMM[idx];
if (Platform.RAM.DIMM[map].InUse && strlen(Platform.RAM.DIMM[map].SerialNo) > 0)
{
DBG("name = %s, map=%d, RAM Detected SerialNo[%d]='%s'\n", name ? name : "",
map, idx, Platform.RAM.DIMM[map].SerialNo);
DBG("map=%d, RAM Detected SerialNo[%d]='%s'\n", map, idx, Platform.RAM.DIMM[map].SerialNo);
value->string = Platform.RAM.DIMM[map].SerialNo;
return true;
}
}
return false;
//value->string = "N/A";
//return true;
//return false;
value->string = NOT_AVAILABLE;
return true;
}
bool getSMBMemoryDevicePartNumber(returnType *value)
map = Platform.DMI.DIMM[idx];
if (Platform.RAM.DIMM[map].InUse && strlen(Platform.RAM.DIMM[map].PartNo) > 0)
{
DBG("Ram Detected PartNo[%d]='%s'\n", idx, Platform.RAM.DIMM[map].PartNo);
DBG("map=%d, RAM Detected PartNo[%d]='%s'\n", map, idx, Platform.RAM.DIMM[map].PartNo);
value->string = Platform.RAM.DIMM[map].PartNo;
return true;
}
}
return false;
//value->string = "N/A";
//return true;
//return false;
value->string = NOT_AVAILABLE;
return true;
}
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#define kEHCIhardKey "EHCIhard" // usb.cgetBoolFK- ??
#define kUHCIresetKey "UHCIreset" // usb.cgetBoolFK
#define kLegacyOffKey "USBLegacyOff" // usb.cgetBoolFK
#define kBusRatioKey "busratio" // cpu.cgetValFK
/*
* Flags to the booter and/or kernel - these end with "Flag".
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/*
* Copyright 2010 AsereBLN. All rights reserved. <aserebln@googlemail.com>
*
* mem.c - obtain system memory information
*/
#include "libsaio.h"
#include "pci.h"
#include "platform.h"
#include "cpu.h"
#include "mem.h"
#include "smbios_patcher.h"
#ifndef DEBUG_MEM
#define DEBUG_MEM 0
#endif
#if DEBUG_MEM
#define DBG(x...)printf(x)
#else
#define DBG(x...)
#endif
#define DC(c) (c >= 0x20 && c < 0x7f ? (char) c : '.')
#define STEP 16
void dumpPhysAddr(const char * title, void * a, int len)
{
int i,j;
u_int8_t* ad = (u_int8_t*) a;
char buffer[80];
char str[16];
if(ad==NULL) return;
printf("%s addr=0x%08x len=%04d\n",title ? title : "Dump of ", a, len);
printf("Ofs-00-01-02-03-04-05-06-07-08-09-0A-0B-0C-0D-0E-0F ASCII\n");
i = (len/STEP)*STEP;
for (j=0; j < i; j+=STEP)
{
printf("%02x: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c\n",
j,
ad[j], ad[j+1], ad[j+2], ad[j+3] , ad[j+4], ad[j+5], ad[j+6], ad[j+7],
ad[j+8], ad[j+9], ad[j+10], ad[j+11] , ad[j+12], ad[j+13], ad[j+14], ad[j+15],
DC(ad[j]), DC(ad[j+1]), DC(ad[j+2]), DC(ad[j+3]) , DC(ad[j+4]), DC(ad[j+5]), DC(ad[j+6]), DC(ad[j+7]),
DC(ad[j+8]), DC(ad[j+9]), DC(ad[j+10]), DC(ad[j+11]) , DC(ad[j+12]), DC(ad[j+13]), DC(ad[j+14]), DC(ad[j+15])
);
}
if (len%STEP==0) return;
sprintf(buffer,"%02x:", i);
for (j=0; j < STEP; j++) {
if (j<(len%STEP))
sprintf(str, " %02x", ad[i+j]);
else
strcpy(str, " " );
strncat(buffer, str, sizeof(buffer));
}
strncat(buffer," ", sizeof(buffer));
for (j=0; j < (len%STEP); j++) {
sprintf(str, "%c", DC(ad[i+j]));
strncat(buffer, str, sizeof(buffer));
}
printf("%s\n",buffer);
}
void dumpAllTablesOfType(int i)
{
char title[32];
struct DMIHeader * dmihdr;
for(dmihdr = FindFirstDmiTableOfType(i, 4);
dmihdr;
dmihdr = FindNextDmiTableOfType(i, 4)) {
sprintf(title,"Table (type %d) :" , i);
dumpPhysAddr(title, dmihdr, dmihdr->length+32);
}
}
const char * getDMIString(struct DMIHeader * dmihdr, uint8_t strNum)
{
const char * ret =NULL;
const char * startAddr = (const char *) dmihdr;
const char * limit = NULL;
if (!dmihdr || dmihdr->length<4 || strNum==0) return NULL;
startAddr += dmihdr->length;
limit = startAddr + 256;
for(; strNum; strNum--) {
if ((*startAddr)==0 && *(startAddr+1)==0) break;
if (*startAddr && strNum<=1) {
ret = startAddr; // current str
break;
}
while(*startAddr && startAddr<limit) startAddr++;
if (startAddr==limit) break; // no terminator found
else if((*startAddr==0) && *(startAddr+1)==0) break;
else startAddr++;
}
return ret;
}
void scan_memory(PlatformInfo_t *p)
{
int i=0;
struct DMIHeader * dmihdr = NULL;
struct DMIMemoryModuleInfo* memInfo[MAX_RAM_SLOTS]; // 6
struct DMIPhysicalMemoryArray* physMemArray; // 16
struct DMIMemoryDevice* memDev[MAX_RAM_SLOTS]; //17
/* We mainly don't use obsolete tables 5,6 because most of computers don't handle it anymore */
Platform.DMI.MemoryModules = 0;
/* Now lets peek info rom table 16,17 as for some bios, table 5 & 6 are not used */
physMemArray = (struct DMIPhysicalMemoryArray*) FindFirstDmiTableOfType(16, 4);
Platform.DMI.MaxMemorySlots = physMemArray ? physMemArray->numberOfMemoryDevices : 0;
i = 0;
for(dmihdr = FindFirstDmiTableOfType(17, 4);
dmihdr;
dmihdr = FindNextDmiTableOfType(17, 4) ) {
memDev[i] = (struct DMIMemoryDevice*) dmihdr;
if (memDev[i]->size !=0 ) Platform.DMI.MemoryModules++;
if (memDev[i]->speed>0) Platform.RAM.DIMM[i].Frequency = memDev[i]->speed; // take it here for now but we'll check spd and dmi table 6 as well
i++;
}
// for table 6, we only have a look at the current speed
i = 0;
for(dmihdr = FindFirstDmiTableOfType(6, 4);
dmihdr;
dmihdr = FindNextDmiTableOfType(6, 4) ) {
memInfo[i] = (struct DMIMemoryModuleInfo*) dmihdr;
if (memInfo[i]->currentSpeed > Platform.RAM.DIMM[i].Frequency)
Platform.RAM.DIMM[i].Frequency = memInfo[i]->currentSpeed; // favor real overclocked speed if any
i++;
}
#if 0
dumpAllTablesOfType(17);
getc();
#endif
}
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/*
* Copyright 2010 AsereBLN. All rights reserved. <aserebln@googlemail.com>
*
* mem.h
*/
#ifndef __LIBSAIO_MEM_H
#define __LIBSAIO_MEM_H
#include "platform.h"
extern void scan_memory(PlatformInfo_t *);
#endif/* __LIBSAIO_MEM_H */
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}
return strdup(asciiPartNo);
return NULL;
}
int mapping []= {0,2,1,3,4,6,5,7,8,10,9,11};

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Revision: 842