Chameleon

Chameleon Commit Details

Date:2011-05-27 19:15:33 (12 years 10 months ago)
Author:Azimutz
Commit:897
Parents: 896
Message:"Small" clean up: typos and white space. Thanks to Fabio, for collecting many of these from the branches into a patch.
Changes:
M/trunk/i386/boot2/resume.c
M/trunk/i386/boot2/boot.c
M/trunk/i386/libsaio/bootstruct.c
M/trunk/TODO
M/trunk/i386/libsa/printf.c
M/trunk/i386/libsaio/nvidia.c
M/trunk/i386/boot2/boot.h
M/trunk/i386/libsaio/bootstruct.h
M/trunk/i386/libsaio/aml_generator.c
M/trunk/i386/config/Makefile
M/trunk/i386/libsaio/pci.h
M/trunk/i386/libsaio/acpi_patcher.c
M/trunk/i386/boot2/gui.c
M/trunk/i386/libsaio/usb.c
M/trunk/i386/libsaio/platform.h
M/trunk/i386/libsaio/disk.c
M/trunk/i386/libsaio/saio_internal.h
M/trunk/i386/libsaio/Makefile
M/trunk/i386/doc/README
M/trunk/i386/libsaio/xml.c
M/trunk/i386/libsaio/console.c
M/trunk/i386/libsa/Makefile
M/trunk/i386/libsaio/xml.h
M/trunk/i386/libsaio/fdisk.h
M/trunk/CHANGES
M/trunk/i386/libsaio/biosfn.c
M/trunk/Makefile
M/trunk/i386/modules/Makefile
M/trunk/i386/cdboot/Makefile
M/trunk/i386/libsaio/fake_efi.c
M/trunk/i386/libsaio/cpu.h
M/trunk/i386/boot2/Makefile

File differences

trunk/i386/libsaio/xml.c
6767
6868
6969
70
71
70
7271
7372
7473
......
151150
152151
153152
154
155153
156154
157155
......
305303
306304
307305
308
309
310
311306
307
308
309
312310
313
314
315
316
311
312
313
314
317315
318
319
320
321
322
323
324
325
326
327
328
329
316
317
318
319
320
321
322
323
324
325
326
327
330328
331
332
333
334
329
330
331
332
335333
336334
337
338
339
340
341
342
335
336
337
338
339
340
343341
344342
345343
......
350348
351349
352350
353
351
354352
355353
356354
......
360358
361359
362360
363
364361
365
366362
367363
368
364
369365
370366
371367
......
377373
378374
379375
380
376
381377
382378
383379
......
387383
388384
389385
390
391386
392
393387
394388
395389
......
404398
405399
406400
407
408
401
409402
410403
411
412
413
414
415
416
404
405
406
407
408
409
417410
418411
419412
......
423416
424417
425418
426
419
427420
428421
429422
......
433426
434427
435428
436
437429
438
439430
440431
441432
......
450441
451442
452443
453
444
454445
455446
456447
......
460451
461452
462453
463
464454
465
466455
467456
468457
......
472461
473462
474463
475
464
476465
477466
478467
479468
480
481
469
470
482471
483472
484473
485474
486475
487476
488
489
490
491
477
478
479
480
492481
493
494
495
496
497
498
499
482
483
484
485
486
487
488
500489
501490
502491
503
504
505
492
493
494
506495
507496
508
509
510
511
497
498
499
500
512501
513
514
515
516
502
503
504
505
517506
518507
519
520
521
522
508
509
510
511
523512
524
525
526
527
528
529
530
513
514
515
516
517
518
519
531520
532521
533
534
535
536
537
538
539
540
541
542
522
523
524
525
526
527
528
529
530
543531
544532
545533
......
679667
680668
681669
682
683
670
684671
685672
686673
......
708695
709696
710697
711
698
712699
713700
714701
......
726713
727714
728715
729
730716
731
732717
733718
734719
......
766751
767752
768753
769
754
770755
771756
772757
......
10361021
10371022
10381023
1039
1024
10401025
10411026
10421027
......
10811066
10821067
10831068
1084
1085
10861069
10871070
10881071
10891072
10901073
10911074
1092
10931075
10941076
10951077
......
10981080
10991081
11001082
1101
11021083
11031084
11041085
......
11301111
11311112
11321113
1133
11341114
11351115
11361116
return "";
}
struct Module {
struct Module {
struct Module *nextModule;
long willLoad;
TagPtr dict;
return 0;
}
// XMLGetTag(int index)
// XMLTagCount( TagPtr dict )
{
long length, pos;
char * tagName;
length = GetNextTag(buffer, &tagName, 0);
if (length == -1) return -1;
length = GetNextTag(buffer, &tagName, 0);
if (length == -1) return -1;
pos = length;
if (!strncmp(tagName, kXMLTagPList, 6))
{
length = 0;
}
if (!strncmp(tagName, kXMLTagPList, 6))
{
length = 0;
}
/***** dict ****/
else if (!strcmp(tagName, kXMLTagDict))
{
length = ParseTagList(buffer + pos, tag, kTagTypeDict, 0);
}
else if (!strncmp(tagName, kXMLTagDict, strlen(kXMLTagDict)) && tagName[strlen(tagName)-1] == '/')
{
length = ParseTagList(buffer + pos, tag, kTagTypeDict, 1);
}
else if (!strncmp(tagName, kXMLTagDict " ", strlen(kXMLTagDict " ")))
{
length = ParseTagList(buffer + pos, tag, kTagTypeDict, 0);
}
else if (!strcmp(tagName, kXMLTagDict))
{
length = ParseTagList(buffer + pos, tag, kTagTypeDict, 0);
}
else if (!strncmp(tagName, kXMLTagDict, strlen(kXMLTagDict)) && tagName[strlen(tagName)-1] == '/')
{
length = ParseTagList(buffer + pos, tag, kTagTypeDict, 1);
}
else if (!strncmp(tagName, kXMLTagDict " ", strlen(kXMLTagDict " ")))
{
length = ParseTagList(buffer + pos, tag, kTagTypeDict, 0);
}
/***** key ****/
else if (!strcmp(tagName, kXMLTagKey))
{
length = ParseTagKey(buffer + pos, tag);
}
else if (!strcmp(tagName, kXMLTagKey))
{
length = ParseTagKey(buffer + pos, tag);
}
/***** string ****/
else if (!strcmp(tagName, kXMLTagString))
{
length = ParseTagString(buffer + pos, tag);
}
else if (!strncmp(tagName, kXMLTagString " ", strlen(kXMLTagString " ")))
{
else if (!strcmp(tagName, kXMLTagString))
{
length = ParseTagString(buffer + pos, tag);
}
else if (!strncmp(tagName, kXMLTagString " ", strlen(kXMLTagString " ")))
{
// TODO: save tag if if found
if(!strncmp(tagName + strlen(kXMLTagString " "), kXMLStringID, strlen(kXMLStringID)))
{
tagName[cnt] = 0;
char* val = tagName + strlen(kXMLTagString " " kXMLStringID "\"");
while(*val)
{
{
if ((*val >= '0' && *val <= '9'))// 0 - 9
{
id = (id * 10) + (*val++ - '0');
printf("ParseStringID error (0x%x)\n", *val);
getc();
return -1;
}
}
length = ParseTagString(buffer + pos, tag);
SaveRefString(buffer + pos, id);
}
else if(!strncmp(tagName + strlen(kXMLTagString " "), kXMLStringIDRef, strlen(kXMLStringIDRef)))
tagName[cnt] = 0;
char* val = tagName + strlen(kXMLTagString " " kXMLStringIDRef "\"");
while(*val)
{
{
if ((*val >= '0' && *val <= '9'))// 0 - 9
{
id = (id * 10) + (*val++ - '0');
printf("ParseStringIDREF error (0x%x)\n", *val);
getc();
return -1;
}
}
char* str = GetRefString(id);
length = 0;
//printf("Located IDREF, id = %d, string = %s\n", id, str);
}
}
}
/***** integer ****/
else if (!strcmp(tagName, kXMLTagInteger))
{
length = ParseTagInteger(buffer + pos, tag);
}
else if (!strncmp(tagName, kXMLTagInteger " ", strlen(kXMLTagInteger " ")))
{
else if (!strcmp(tagName, kXMLTagInteger))
{
length = ParseTagInteger(buffer + pos, tag);
}
else if (!strncmp(tagName, kXMLTagInteger " ", strlen(kXMLTagInteger " ")))
{
if(!strncmp(tagName + strlen(kXMLTagInteger " "), kXMLStringID, strlen(kXMLStringID)))
{
// ID=
tagName[cnt] = 0;
char* val = tagName + strlen(kXMLTagInteger " " kXMLStringID "\"");
while(*val)
{
{
if ((*val >= '0' && *val <= '9'))// 0 - 9
{
id = (id * 10) + (*val++ - '0');
printf("ParseIntegerID error (0x%x)\n", *val);
getc();
return -1;
}
}
length = ParseTagInteger(buffer + pos, tag);
tagName[cnt] = 0;
char* val = tagName + strlen(kXMLTagInteger " " kXMLStringIDRef "\"");
while(*val)
{
{
if ((*val >= '0' && *val <= '9'))// 0 - 9
{
id = (id * 10) + (*val++ - '0');
printf("ParseStringIDREF error (0x%x)\n", *val);
getc();
return -1;
}
}
int integer = (int)GetRefString(id);
tmpTag->tag = 0;
tmpTag->tagNext = 0;
tmpTag->offset = buffer_start ? buffer - buffer_start + pos : 0;
*tag = tmpTag;
length = 0;
//printf("Located IDREF, id = %d, string = %s\n", id, str);
}
else
}
else
{
length = ParseTagInteger(buffer + pos, tag);
}
}
/***** data ****/
else if (!strcmp(tagName, kXMLTagData))
{
length = ParseTagData(buffer + pos, tag);
}
else if (!strcmp(tagName, kXMLTagData))
{
length = ParseTagData(buffer + pos, tag);
}
else if (!strncmp(tagName, kXMLTagData " ", strlen(kXMLTagData " ")))
{
length = ParseTagData(buffer + pos, tag);
}
else if (!strcmp(tagName, kXMLTagDate))
{
length = ParseTagDate(buffer + pos, tag);
}
{
length = ParseTagData(buffer + pos, tag);
}
else if (!strcmp(tagName, kXMLTagDate))
{
length = ParseTagDate(buffer + pos, tag);
}
/***** date ****/
else if (!strncmp(tagName, kXMLTagDate " ", strlen(kXMLTagDate " ")))
{
length = ParseTagDate(buffer + pos, tag);
}
{
length = ParseTagDate(buffer + pos, tag);
}
/***** false ****/
else if (!strcmp(tagName, kXMLTagFalse))
{
length = ParseTagBoolean(buffer + pos, tag, kTagTypeFalse);
}
else if (!strcmp(tagName, kXMLTagFalse))
{
length = ParseTagBoolean(buffer + pos, tag, kTagTypeFalse);
}
/***** true ****/
else if (!strcmp(tagName, kXMLTagTrue))
{
length = ParseTagBoolean(buffer + pos, tag, kTagTypeTrue);
}
else if (!strcmp(tagName, kXMLTagTrue))
{
length = ParseTagBoolean(buffer + pos, tag, kTagTypeTrue);
}
/***** array ****/
else if (!strcmp(tagName, kXMLTagArray))
{
length = ParseTagList(buffer + pos, tag, kTagTypeArray, 0);
}
else if (!strcmp(tagName, kXMLTagArray))
{
length = ParseTagList(buffer + pos, tag, kTagTypeArray, 0);
}
else if (!strncmp(tagName, kXMLTagArray " ", strlen(kXMLTagArray " ")))
{
length = ParseTagList(buffer + pos, tag, kTagTypeArray, 0);
}
else if (!strcmp(tagName, kXMLTagArray "/"))
{
length = ParseTagList(buffer + pos, tag, kTagTypeArray, 1);
}
{
length = ParseTagList(buffer + pos, tag, kTagTypeArray, 0);
}
else if (!strcmp(tagName, kXMLTagArray "/"))
{
length = ParseTagList(buffer + pos, tag, kTagTypeArray, 1);
}
/***** unknown ****/
else
{
*tag = 0;
length = 0;
}
if (length == -1) return -1;
return pos + length;
else
{
*tag = 0;
length = 0;
}
if (length == -1) return -1;
return pos + length;
}
//==========================================================================
char* val = buffer;
int size;
if(buffer[0] == '<')
if(buffer[0] == '<')
{
printf("Warning integer is non existant\n");
getc();
{
val += 2;
while(*val)
{
{
if ((*val >= '0' && *val <= '9'))// 0 - 9
{
integer = (integer * 16) + (*val++ - '0');
printf("ParseTagInteger hex error (0x%x) in buffer %s\n", *val, buffer);
getc();
return -1;
}
}
}
else if ( size )// Decimal value
tmpTag->tagNext = 0;
*tag = tmpTag;
return length;
}
#if DOFREE
static void
FreeSymbol( char * string )
{
{
SymbolPtr symbol, prev;
prev = 0;
return symbol;
}
bool XMLIsType(TagPtr dict, enum xmltype type)
{
if(!dict) return (type == kTagTypeNone);
return (dict->type == type);
}
/*** Cast functions ***/
TagPtr XMLCastArray(TagPtr dict)
{
else return NULL;
}
TagPtr XMLCastDict(TagPtr dict)
{
if(!dict) return NULL;
}
}
bool XMLCastBoolean(TagPtr dict)
{
if(!dict) return false;
trunk/i386/libsaio/console.c
5252
5353
5454
55
56
57
58
59
60
61
62
55
56
57
58
59
60
61
62
6363
6464
6565
......
7171
7272
7373
74
74
75
7576
7677
7778
......
120121
121122
122123
123
124124
125125
126126
......
176176
177177
178178
179
179
180180
181181
182182
......
197197
198198
199199
200
200
201201
202202
203203
......
208208
209209
210210
211
211
212212
213213
214214
......
259259
260260
261261
262
262
263263
264264
bool gVerboseMode;
bool gErrors;
/* Kabyl: BooterLog */
//Azi: Doubled log available size.
// 64kb are not enough to hold the full log while booting with -f argument (ignore caches).
// It also seems to fix some reported problems while booting with the mentioned argument.
// Note: 96kb are enough to hold full log, booting with -f; even so, this depends on how much
// we "play" at the boot prompt, with what patches we're playing and how much they print to the log,
// kexts loaded, etc...
// Please remove this comment when this gets checked by a "true" dev.
/** Kabyl: BooterLog
Azi: Doubled available log size; this seems to fix some hangs and instant reboots caused by
booting with -f (ignore caches). 96kb are enough to hold full log, booting with -f; even so,
this depends on how much we "play" at the boot prompt and with what patches we're playing,
depending on how much they print to the log.
**/ //Azi: closing **/ alows colapse/expand... is this desirable?? colapsing an entire page
// will also colapse comments....
#define BOOTER_LOG_SIZE(128 * 1024)
#define SAFE_LOG_SIZE134
char * last_str;
};
static int sputc(int c, struct putc_info * pi)
static int
sputc(int c, struct putc_info * pi) //Azi: exists on printf.c & gui.c
{
if (pi->last_str)
if (pi->str == pi->last_str)
}
/* Kabyl: !BooterLog */
/*
* write one character to console
*/
vprf(fmt, ap);
{
/* Kabyl: BooterLog */
// Kabyl: BooterLog
struct putc_info pi;
if (!msgbuf)
int verbose(const char * fmt, ...)
{
va_list ap;
va_start(ap, fmt);
if (gVerboseMode)
{
}
{
/* Kabyl: BooterLog */
// Kabyl: BooterLog
struct putc_info pi;
if (!msgbuf)
/** Print a "Press a key to continue..." message and wait for a key press. */
void pause()
{
printf("Press a key to continue...");
printf("Press a key to continue...\n");
getc();
}
trunk/i386/libsaio/xml.h
3838
3939
4040
41
4241
4342
4443
......
6362
6463
6564
66
6765
6866
6967
kTagTypeArray
};
struct string_ref
{
char* string;
#define kXMLStringID"ID="
#define kXMLStringIDRef "IDREF="
#define kPropCFBundleIdentifier ("CFBundleIdentifier")
#define kPropCFBundleExecutable ("CFBundleExecutable")
#define kPropOSBundleRequired ("OSBundleRequired")
trunk/i386/libsaio/bootstruct.c
66
77
88
9
9
1010
1111
1212
......
4343
4444
4545
46
47
48
49
50
51
52
46
47
48
49
50
51
52
5353
54
55
56
57
58
54
55
56
57
58
5959
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
60
9861
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
9999
100
100
101101
102
103
104
102
103
105104
106105
107106
......
110109
111110
112111
113
114
112
113
114
115115
116116
117117
......
121121
122122
123123
124
125124
126125
127126
128127
129128
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
152151
153152
154153
......
162161
163162
164163
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
164
165
166
167
168
169
188170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
189188
190189
191190
......
196195
197196
198197
199
198
200199
201200
202201
......
211210
212211
213212
214
215213
* Portions Copyright (c) 1999-2003 Apple Computer, Inc. All Rights
* Reserved. This file contains Original Code and/or Modifications of
* Original Code as defined in and that are subject to the Apple Public
* Source License Version 2.0 (the "License"). You may not use this file
* Source License Version 2.0 (the "License").You may not use this file
* except in compliance with the License. Please obtain a copy of the
* License at http://www.apple.com/publicsource and read it before using
* this file.
void initKernBootStruct( void )
{
Node *node;
int nameLen;
static int init_done = 0;
if ( !init_done )
{
bootArgs = (boot_args *)malloc(sizeof(boot_args));
Node *node;
int nameLen;
static int init_done = 0;
if ( !init_done )
{
bootArgs = (boot_args *)malloc(sizeof(boot_args));
bootArgsPreLion = (boot_args_pre_lion *)malloc(sizeof(boot_args_pre_lion));
bootInfo = (PrivateBootInfo_t *)malloc(sizeof(PrivateBootInfo_t));
if (bootArgs == 0 || bootInfo == 0)
stop("Couldn't allocate boot info\n");
bzero(bootArgs, sizeof(boot_args));
bootInfo = (PrivateBootInfo_t *)malloc(sizeof(PrivateBootInfo_t));
if (bootArgs == 0 || bootInfo == 0)
stop("Couldn't allocate boot info\n");
bzero(bootArgs, sizeof(boot_args));
bzero(bootArgsPreLion, sizeof(boot_args_pre_lion));
bzero(bootInfo, sizeof(PrivateBootInfo_t));
// Get system memory map. Also update the size of the
// conventional/extended memory for backwards compatibility.
bootInfo->memoryMapCount =
getMemoryMap( bootInfo->memoryMap, kMemoryMapCountMax,
(unsigned long *) &bootInfo->convmem,
(unsigned long *) &bootInfo->extmem );
if ( bootInfo->memoryMapCount == 0 )
{
// BIOS did not provide a memory map, systems with
// discontiguous memory or unusual memory hole locations
// may have problems.
bootInfo->convmem = getConventionalMemorySize();
bootInfo->extmem = getExtendedMemorySize();
}
bootInfo->configEnd = bootInfo->config;
bootArgs->Video.v_display = VGA_TEXT_MODE;
DT__Initialize();
node = DT__FindNode("/", true);
if (node == 0) {
stop("Couldn't create root node");
}
getPlatformName(platformName);
nameLen = strlen(platformName) + 1;
DT__AddProperty(node, "compatible", nameLen, platformName);
DT__AddProperty(node, "model", nameLen, platformName);
gMemoryMapNode = DT__FindNode("/chosen/memory-map", true);
bootArgs->Version = kBootArgsVersion;
bootArgs->Revision = kBootArgsRevision;
bzero(bootInfo, sizeof(PrivateBootInfo_t));
// Get system memory map. Also update the size of the
// conventional/extended memory for backwards compatibility.
bootInfo->memoryMapCount =
getMemoryMap( bootInfo->memoryMap, kMemoryMapCountMax,
(unsigned long *) &bootInfo->convmem,
(unsigned long *) &bootInfo->extmem );
if ( bootInfo->memoryMapCount == 0 )
{
// BIOS did not provide a memory map, systems with
// discontiguous memory or unusual memory hole locations
// may have problems.
bootInfo->convmem = getConventionalMemorySize();
bootInfo->extmem = getExtendedMemorySize();
}
bootInfo->configEnd = bootInfo->config;
bootArgs->Video.v_display = VGA_TEXT_MODE;
DT__Initialize();
node = DT__FindNode("/", true);
if (node == 0) {
stop("Couldn't create root node");
}
getPlatformName(platformName);
nameLen = strlen(platformName) + 1;
DT__AddProperty(node, "compatible", nameLen, platformName);
DT__AddProperty(node, "model", nameLen, platformName);
gMemoryMapNode = DT__FindNode("/chosen/memory-map", true);
bootArgs->Version = kBootArgsVersion;
bootArgs->Revision = kBootArgsRevision;
bootArgsPreLion->Version = kBootArgsPreLionVersion;
bootArgsPreLion->Revision = kBootArgsPreLionRevision;
bootArgsPreLion->Revision = kBootArgsPreLionRevision;
init_done = 1;
}
init_done = 1;
}
}
void
reserveKernBootStruct(void)
{
if ((gMacOSVersion[0] == '1') && (gMacOSVersion[1] == '0') && (gMacOSVersion[2] == '.') && (gMacOSVersion[3] == '7'))
{
if ((gMacOSVersion[0] == '1') && (gMacOSVersion[1] == '0')
&& (gMacOSVersion[2] == '.') && (gMacOSVersion[3] == '7'))
{
void *oldAddr = bootArgs;
bootArgs = (boot_args *)AllocateKernelMemory(sizeof(boot_args));
bcopy(oldAddr, bootArgs, sizeof(boot_args));
bootArgsPreLion = (boot_args_pre_lion *)AllocateKernelMemory(sizeof(boot_args_pre_lion));
bcopy(oldAddr, bootArgsPreLion, sizeof(boot_args_pre_lion));
}
}
void
finalizeBootStruct(void)
{
uint32_t size;
void *addr;
int i;
EfiMemoryRange *memoryMap;
MemoryRange *range;
int memoryMapCount = bootInfo->memoryMapCount;
if (memoryMapCount == 0) {
// XXX could make a two-part map here
stop("Unable to convert memory map into proper format\n");
}
// convert memory map to boot_args memory map
memoryMap = (EfiMemoryRange *)AllocateKernelMemory(sizeof(EfiMemoryRange) * memoryMapCount);
bootArgs->MemoryMap = (uint32_t)memoryMap;
bootArgs->MemoryMapSize = sizeof(EfiMemoryRange) * memoryMapCount;
bootArgs->MemoryMapDescriptorSize = sizeof(EfiMemoryRange);
bootArgs->MemoryMapDescriptorVersion = 0;
for (i=0; i<memoryMapCount; i++, memoryMap++) {
range = &bootInfo->memoryMap[i];
switch(range->type) {
uint32_t size;
void *addr;
int i;
EfiMemoryRange *memoryMap;
MemoryRange *range;
int memoryMapCount = bootInfo->memoryMapCount;
if (memoryMapCount == 0) {
// XXX could make a two-part map here
stop("Unable to convert memory map into proper format\n");
}
// convert memory map to boot_args memory map
memoryMap = (EfiMemoryRange *)AllocateKernelMemory(sizeof(EfiMemoryRange) * memoryMapCount);
bootArgs->MemoryMap = (uint32_t)memoryMap;
bootArgs->MemoryMapSize = sizeof(EfiMemoryRange) * memoryMapCount;
bootArgs->MemoryMapDescriptorSize = sizeof(EfiMemoryRange);
bootArgs->MemoryMapDescriptorVersion = 0;
for (i=0; i<memoryMapCount; i++, memoryMap++) {
range = &bootInfo->memoryMap[i];
switch(range->type) {
case kMemoryRangeACPI:
memoryMap->Type = kEfiACPIReclaimMemory;
break;
default:
memoryMap->Type = kEfiReservedMemoryType;
break;
}
memoryMap->PhysicalStart = range->base;
memoryMap->VirtualStart = range->base;
memoryMap->NumberOfPages = range->length >> I386_PGSHIFT;
memoryMap->Attribute = 0;
}
// copy bootFile into device tree
// XXX
// add PCI info somehow into device tree
// XXX
// Flatten device tree
DT__FlattenDeviceTree(0, &size);
addr = (void *)AllocateKernelMemory(size);
if (addr == 0) {
stop("Couldn't allocate device tree\n");
}
DT__FlattenDeviceTree((void **)&addr, &size);
bootArgs->deviceTreeP = (uint32_t)addr;
bootArgs->deviceTreeLength = size;
}
memoryMap->PhysicalStart = range->base;
memoryMap->VirtualStart = range->base;
memoryMap->NumberOfPages = range->length >> I386_PGSHIFT;
memoryMap->Attribute = 0;
}
// copy bootFile into device tree
// XXX
// add PCI info somehow into device tree
// XXX
// Flatten device tree
DT__FlattenDeviceTree(0, &size);
addr = (void *)AllocateKernelMemory(size);
if (addr == 0) {
stop("Couldn't allocate device tree\n");
}
DT__FlattenDeviceTree((void **)&addr, &size);
bootArgs->deviceTreeP = (uint32_t)addr;
bootArgs->deviceTreeLength = size;
// Copy BootArgs values to older structure
memcpy(&bootArgsPreLion->CommandLine, &bootArgs->CommandLine, BOOT_LINE_LENGTH);
bootArgsPreLion->MemoryMapDescriptorSize = bootArgs->MemoryMapDescriptorSize;
bootArgsPreLion->MemoryMapDescriptorVersion = bootArgs->MemoryMapDescriptorVersion;
bootArgsPreLion->deviceTreeP = bootArgs->deviceTreeP;
bootArgsPreLion->deviceTreeP = bootArgs->deviceTreeP;
bootArgsPreLion->deviceTreeLength = bootArgs->deviceTreeLength;
bootArgsPreLion->kaddr = bootArgs->kaddr;
bootArgsPreLion->performanceDataStart = bootArgs->performanceDataStart;
bootArgsPreLion->performanceDataSize = bootArgs->performanceDataSize;
bootArgsPreLion->efiRuntimeServicesVirtualPageStart = bootArgs->efiRuntimeServicesVirtualPageStart;
}
trunk/i386/libsaio/bootstruct.h
3030
3131
3232
33
33
3434
3535
3636
......
4747
4848
4949
50
50
5151
5252
5353
......
125125
126126
127127
128
128
129129
130
131
130
131
132132
133133
134134
#include "bios.h"
#include "device_tree.h"
/*!
/*! <--- Azi: check these! against these /**
Kernel boot args global also used by booter for its own data.
*/
extern boot_args *bootArgs;
#define CONFIG_SIZE (40 * 4096)
/*
* Max size fo config data array, in bytes.
* Max size for config data array, in bytes.
*/
#define IO_CONFIG_DATA_SIZE163840
char * configEnd; // pointer to end of config files
char config[CONFIG_SIZE];
config_file_t bootConfig; // boot.plist
config_file_t bootConfig; // boot.plist
config_file_t overrideConfig; // additional boot.plist which can override bootConfig keys
config_file_t themeConfig; // theme.plist
config_file_t smbiosConfig; // smbios.plist
config_file_t themeConfig; // theme.plist
config_file_t smbiosConfig; // smbios.plist
config_file_t helperConfig; // boot helper partition's boot.plist
config_file_t ramdiskConfig; // RAMDisk.plist
} PrivateBootInfo_t;
trunk/i386/libsaio/acpi_patcher.c
490490
491491
492492
493
493
494494
495495
496496
497497
498
498
499499
500500
501501
case CPU_MODEL_FIELDS:
case CPU_MODEL_DALES:
case CPU_MODEL_DALES_32NM:
case CPU_MODEL_NEHALEM:
case CPU_MODEL_NEHALEM:
case CPU_MODEL_NEHALEM_EX:
case CPU_MODEL_WESTMERE:
case CPU_MODEL_WESTMERE_EX:
case CPU_MODEL_SANDY:
case CPU_MODEL_SANDY_XEON:
case CPU_MODEL_SANDY_XEON:
{
maximum.Control = rdmsr64(MSR_IA32_PERF_STATUS) & 0xff; // Seems it always contains maximum multiplier value (with turbo, that's we need)...
minimum.Control = (rdmsr64(MSR_PLATFORM_INFO) >> 40) & 0xff;
trunk/i386/libsaio/Makefile
2323
2424
2525
26
26
2727
2828
2929
......
5656
5757
5858
59
6059
60
6161
6262
-fno-builtin -static $(OMIT_FRAME_POINTER_CFLAG) \
-mpreferred-stack-boundary=2 -fno-align-functions -fno-stack-protector \
-march=pentium4 -msse2 -mfpmath=sse -msoft-float -nostdinc -include $(SRCROOT)/autoconf.h
CPPFLAGS := $(CPPFLAGS) -nostdinc++
INC = -I. -I$(SYMROOT) -I$(LIBSADIR) -I$(BOOT2DIR) -I${SRCROOT}/i386/include
@ar q $@ $^ &> /dev/null
@echo "\t[RANLIB] $(@F)"
@ranlib $(SYMROOT)/$(@F)
# dependencies
-include $(OBJROOT)/Makedep
trunk/i386/libsaio/aml_generator.c
2121
2222
2323
24
24
2525
2626
2727
2828
29
29
3030
3131
3232
......
173173
174174
175175
176
176
177177
178178
179179
......
190190
191191
192192
193
193
194194
195195
196196
case AML_CHUNK_DWORD:
case AML_CHUNK_QWORD:
case AML_CHUNK_ALIAS:
verbose("aml_add_to_parent: node doesn't support child nodes!");
verbose("aml_add_to_parent: node doesn't support child nodes!\n");
return false;
case AML_CHUNK_NAME:
if (parent->First)
{
verbose("aml_add_to_parent: name node supports only one child node!");
verbose("aml_add_to_parent: name node supports only one child node!\n");
return false;
}
break;
{
if (strlen(name) < 4)
{
verbose("aml_fill_simple_name: simple name %s has incorrect lengh! Must be 4.", name);
verbose("aml_fill_simple_name: simple name %s has incorrect lengh! Must be 4.\n", name);
return 0;
}
if ((len % 4) > 1 || count == 0)
{
verbose("aml_fill_name: pathname %s has incorrect length! Must be 4, 8, 12, 16, etc...", name);
verbose("aml_fill_name: pathname %s has incorrect length! Must be 4, 8, 12, 16, etc...\n", name);
return 0;
}
trunk/i386/libsaio/usb.c
3838
3939
4040
41
4241
4342
4443
// Add usb device to the list
void notify_usb_dev(pci_dt_t *pci_dev)
{
struct pciList* current = usbList;
if(!usbList)
{
trunk/i386/libsaio/fdisk.h
3535
3636
3737
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
5757
5858
5959
#ifndef __LIBSAIO_FDISK_H
#define __LIBSAIO_FDISK_H
#define DISK_BLK0 0 /* blkno of boot block */
#define DISK_BLK0SZ 512 /* size of boot block */
#define DISK_BOOTSZ 446 /* size of boot code in boot block */
#define DISK_SIGNATURE 0xAA55 /* signature of the boot record */
#define FDISK_NPART 4 /* number of entries in fdisk table */
#define FDISK_ACTIVE 0x80 /* indicator of active partition */
#define FDISK_NEXTNAME 0xA7 /* indicator of NeXT partition */
#define FDISK_DOS12 0x01 /* 12-bit fat < 10MB dos partition */
#define FDISK_DOS16S 0x04 /* 16-bit fat < 32MB dos partition */
#define FDISK_DOSEXT 0x05 /* extended dos partition */
#define FDISK_DOS16B 0x06 /* 16-bit fat >= 32MB dos partition */
#define FDISK_NTFS 0x07 /* NTFS partition */
#define FDISK_SMALLFAT32 0x0b /* FAT32 partition */
#define FDISK_FAT32 0x0c /* FAT32 partition */
#define FDISK_DOS16SLBA 0x0e
#define FDISK_LINUX0x83
#define FDISK_UFS 0xa8 /* Apple UFS partition */
#define FDISK_HFS 0xaf /* Apple HFS partition */
#define FDISK_BOOTER 0xab /* Apple booter partition */
#define DISK_BLK00/* blkno of boot block */
#define DISK_BLK0SZ512/* size of boot block */
#define DISK_BOOTSZ446/* size of boot code in boot block */
#define DISK_SIGNATURE0xAA55/* signature of the boot record */
#define FDISK_NPART4/* number of entries in fdisk table */
#define FDISK_ACTIVE0x80/* indicator of active partition */
#define FDISK_NEXTNAME0xA7/* indicator of NeXT partition */
#define FDISK_DOS120x01/* 12-bit fat < 10MB dos partition */
#define FDISK_DOS16S0x04/* 16-bit fat < 32MB dos partition */
#define FDISK_DOSEXT0x05/* extended dos partition */
#define FDISK_DOS16B0x06/* 16-bit fat >= 32MB dos partition */
#define FDISK_NTFS0x07/* NTFS partition */
#define FDISK_SMALLFAT320x0b /* FAT32 partition */
#define FDISK_FAT320x0c/* FAT32 partition */
#define FDISK_DOS16SLBA 0x0e
#define FDISK_LINUX0x83
#define FDISK_UFS0xa8/* Apple UFS partition */
#define FDISK_HFS0xaf/* Apple HFS partition */
#define FDISK_BOOTER0xab/* Apple booter partition */
/*
* Format of fdisk partion entry (if present).
trunk/i386/libsaio/nvidia.c
1919
2020
2121
22
23
22
23
2424
2525
2626
......
707707
708708
709709
710
710
711711
712712
713713
714714
715
715
716716
717717
718718
......
730730
731731
732732
733
733
734734
735735
736736
......
744744
745745
746746
747
747
748748
749749
750750
......
773773
774774
775775
776
776
777777
778778
779779
......
923923
924924
925925
926
927926
928927
929928
/*
* Alternatively you can choose to comply with APSL
*/
/*
* DCB-Table parsing is based on software (nouveau driver) originally distributed under following license:
*
char*p;
inti;
charbuf[3];
if (hex == NULL || bin == NULL || len <= 0 || strlen(hex) != len * 2) {
printf("[ERROR] bin2hex input error\n");
return -1;
}
buf[2] = '\0';
p = (char *) hex;
for (i=0; i<len; i++) {
unsigned long long mem_detect(volatile uint8_t *regs, uint8_t nvCardType, pci_dt_t *nvda_dev)
{
unsigned long long vram_size = 0;
if (nvCardType < NV_ARCH_50) {
vram_size = REG32(NV04_PFB_FIFO_DATA);
vram_size &= NV10_PFB_FIFO_DATA_RAM_AMOUNT_MB_MASK;
vram_size = REG32(NVC0_MEM_CTRLR_RAM_AMOUNT) << 20;
vram_size *= REG32(NVC0_MEM_CTRLR_COUNT);
}
return vram_size;
}
devicepath = get_pci_dev_path(nvda_dev);
bar[0] = pci_config_read32(nvda_dev->dev.addr, 0x10 );
regs = (uint8_t *) (bar[0] & ~0x0f);
// get card type
nvCardType = (REG32(0) >> 20) & 0x1ff;
default_NVCAP[12], default_NVCAP[13], default_NVCAP[14], default_NVCAP[15],
default_NVCAP[16], default_NVCAP[17], default_NVCAP[18], default_NVCAP[19]);
#endif
devprop_add_nvidia_template(device);
devprop_add_value(device, "NVCAP", default_NVCAP, NVCAP_LEN);
trunk/i386/libsaio/platform.h
2828
2929
3030
31
32
33
34
35
31
32
33
34
35
3636
3737
3838
......
7171
7272
7373
74
74
7575
7676
7777
......
9090
9191
9292
93
94
93
94
9595
9696
9797
98
98
9999
100100
101
101
102102
103
104103
105104
106105
107106
108
109
110
111
112
113
114
115
116
117
118
107
108
109
110
111
112
113
114
115
116
117
119118
120
119
121120
122
123
124
121
122
123
125124
126125
127
126
128127
129128
130
129
131130
132131
133132
......
140139
141140
142141
143
142
144143
145
146
147
148
144
145
146
147
149148
150
149
150
151151
152152
153153
#define CPU_MODEL_PENRYN0x17
#define CPU_MODEL_NEHALEM0x1A
#define CPU_MODEL_ATOM0x1C
#define CPU_MODEL_FIELDS0x1E/* Lynnfield, Clarksfield, Jasper */
#define CPU_MODEL_DALES0x1F/* Havendale, Auburndale */
#define CPU_MODEL_DALES_32NM0x25/* Clarkdale, Arrandale */
#define CPU_MODEL_SANDY0x2a/* Sandy bridge */
#define CPU_MODEL_WESTMERE0x2C/* Gulftown, Westmere-EP, Westmere-WS */
#define CPU_MODEL_FIELDS0x1E/* Lynnfield, Clarksfield, Jasper */
#define CPU_MODEL_DALES0x1F/* Havendale, Auburndale */
#define CPU_MODEL_DALES_32NM0x25/* Clarkdale, Arrandale */
#define CPU_MODEL_SANDY0x2a/* Sandy bridge */
#define CPU_MODEL_WESTMERE0x2C/* Gulftown, Westmere-EP, Westmere-WS */
#define CPU_MODEL_SANDY_XEON0x2D
#define CPU_MODEL_NEHALEM_EX0x2E
#define CPU_MODEL_WESTMERE_EX0x2F
#define SMB_MEM_TYPE_DDR18
#define SMB_MEM_TYPE_DDR219
#define SMB_MEM_TYPE_FBDIMM20
#define SMB_MEM_TYPE_DDR324// Supported in 10.5.6+ AppleSMBIOS
#define SMB_MEM_TYPE_DDR324// Supported in 10.5.6+ AppleSMBIOS
/* Memory Configuration Types */
#define SMB_MEM_CHANNEL_UNKNOWN0
#define UUID_LEN16
typedef struct _RamSlotInfo_t {
uint32_tModuleSize;// Size of Module in MB
uint32_tFrequency; // in Mhz
uint32_tModuleSize;// Size of Module in MB
uint32_tFrequency;// in Mhz
const char*Vendor;
const char*PartNo;
const char*SerialNo;
char*spd;// SPD Dump
char*spd;// SPD Dump
boolInUse;
uint8_tType;
uint8_tBankConnections; // table type 6, see (3.3.7)
uint8_tBankConnections;// table type 6, see (3.3.7)
uint8_tBankConnCnt;
} RamSlotInfo_t;
typedef struct _PlatformInfo_t {
struct CPU {
uint32_tFeatures;// CPU Features like MMX, SSE2, VT, MobileCPU
uint32_tVendor;// Vendor
uint32_tSignature;// Signature
uint32_tStepping;// Stepping
uint32_tModel;// Model
uint32_tExtModel;// Extended Model
uint32_tFamily;// Family
uint32_tExtFamily;// Extended Family
uint32_tNoCores;// No Cores per Package
uint32_tNoThreads;// Threads per Package
uint8_tMaxCoef;// Max Multiplier
uint32_tFeatures;// CPU Features like MMX, SSE2, VT, MobileCPU
uint32_tVendor;// Vendor
uint32_tSignature;// Signature
uint32_tStepping;// Stepping
uint32_tModel;// Model
uint32_tExtModel;// Extended Model
uint32_tFamily;// Family
uint32_tExtFamily;// Extended Family
uint32_tNoCores;// No Cores per Package
uint32_tNoThreads;// Threads per Package
uint8_tMaxCoef;// Max Multiplier
uint8_tMaxDiv;
uint8_tCurrCoef;// Current Multiplier
uint8_tCurrCoef;// Current Multiplier
uint8_tCurrDiv;
uint64_tTSCFrequency;// TSC Frequency Hz
uint64_tFSBFrequency;// FSB Frequency Hz
uint64_tCPUFrequency;// CPU Frequency Hz
uint64_tTSCFrequency;// TSC Frequency Hz
uint64_tFSBFrequency;// FSB Frequency Hz
uint64_tCPUFrequency;// CPU Frequency Hz
uint32_tMaxRatio;// Max Bus Ratio
uint32_tMinRatio;// Min Bus Ratio
charBrandString[48];// 48 Byte Branding String
charBrandString[48];// 48 Byte Branding String
uint32_tCPUID[CPUID_MAX][4];// CPUID 0..4, 80..81 Raw Values
} CPU;
struct RAM {
uint64_tFrequency;// Ram Frequency
uint32_tDivider;// Memory divider
uint8_tType;// Standard SMBIOS v2.5 Memory Type
RamSlotInfo_tDIMM[MAX_RAM_SLOTS];// Information about each slot
} RAM;
struct DMI {
intMaxMemorySlots;// number of memory slots polulated by SMBIOS
intCntMemorySlots;// number of memory slots counted
intMemoryModules;// number of memory modules installed
intDIMM[MAX_RAM_SLOTS];// Information and SPD mapping for each slot
intMaxMemorySlots;// number of memory slots polulated by SMBIOS
intCntMemorySlots;// number of memory slots counted
intMemoryModules;// number of memory modules installed
intDIMM[MAX_RAM_SLOTS];// Information and SPD mapping for each slot
} DMI;
uint8_tType;// System Type: 1=Desktop, 2=Portable... according ACPI2.0 (FACP: PM_Profile)
uint8_tType; // System Type: 1=Desktop, 2=Portable... according ACPI2.0 (FACP: PM_Profile)
uint8_t*UUID;
} PlatformInfo_t;
trunk/i386/libsaio/disk.c
16751675
16761676
16771677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
16911691
16921692
16931693
static const struct NamedValue fdiskTypes[] =
{
{ FDISK_NTFS, "Windows NTFS" },
{ FDISK_DOS12, "Windows FAT12" },
{ FDISK_DOS16B, "Windows FAT16" },
{ FDISK_DOS16S, "Windows FAT16" },
{ FDISK_DOS16SLBA, "Windows FAT16" },
{ FDISK_SMALLFAT32, "Windows FAT32" },
{ FDISK_FAT32, "Windows FAT32" },
{ FDISK_LINUX, "Linux" },
{ FDISK_UFS, "Apple UFS" },
{ FDISK_HFS, "Apple HFS" },
{ FDISK_BOOTER, "Apple Boot/UFS" },
{ 0xCD, "CD-ROM" },
{ 0x00, 0 } /* must be last */
{ FDISK_NTFS,"Windows NTFS" },
{ FDISK_DOS12,"Windows FAT12" },
{ FDISK_DOS16B, "Windows FAT16" },
{ FDISK_DOS16S, "Windows FAT16" },
{ FDISK_DOS16SLBA,"Windows FAT16" },
{ FDISK_SMALLFAT32,"Windows FAT32" },
{ FDISK_FAT32,"Windows FAT32" },
{ FDISK_LINUX,"Linux" },
{ FDISK_UFS,"Apple UFS" },
{ FDISK_HFS,"Apple HFS" },
{ FDISK_BOOTER,"Apple Boot/UFS" },
{ 0xCD,"CD-ROM" },
{ 0x00,0 }/* must be last */
};
//==========================================================================
trunk/i386/libsaio/cpu.h
1414
1515
1616
17
17
1818
1919
2020
#define bitmask(h,l)((bit(h)|(bit(h)-1)) & ~(bit(l)-1))
#define bitfield(x,h,l)(((x) & bitmask(h,l)) >> l)
#define CPU_STRING_UNKNOWN"Unknown CPU Typ"
#define CPU_STRING_UNKNOWN"Unknown CPU Type"
#defineMSR_IA32_PERF_STATUS0x198
#define MSR_IA32_PERF_CONTROL0x199
trunk/i386/libsaio/pci.h
3232
3333
3434
35
36
35
36
3737
3838
3939
......
431431
432432
433433
434
435
434
435
436436
437437
438
439
438440
439441
440442
......
463465
464466
465467
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
614616
615617
616
617
618
619
620
621
618
619
620
621
622
623
622624
623625
624
625
626
627
626628
627629
628630
......
665667
666668
667669
668
669
670
671
672
673
674
670
671
672
673
674
675
676
675677
676678
677
678
679
680
679681
680682
681683
682684
683685
684686
685
687
686688
687689
688690
......
713715
714716
715717
716
718
717719
718720
719721
720
722
721723
722
723
724
725
724726
725727
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
750752
751753
752754
......
758760
759761
760762
761
762
763
764
763765
764766
765767
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
768781
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
782784
783
784
785
786
785
786
787
788
787789
788
789
790
791
792
790
791
792
793
794
793795
794
795
796
797
796
797
798
799
798800
799
801
800802
801
802
803
804
803
804
805
806
805807
806
807
808
809
810
811
812
813
814
815
816
817
818
808
809
810
811
812
813
814
815
816
817
818
819
820
819821
820822
821823
......
824826
825827
826828
827
828
829
830
831
829
830
831
832
833
832834
833835
834836
struct {
uint16_tvendor_id;
uint16_tdevice_id;
}subsys;
uint32_tsubsys_id;
} subsys;
uint32_t subsys_id;
}subsys_id;
uint16_tclass_id;
#define PCI_PCIX_STATUS_DESIGNED_MAX_OUTSTANDING_SPLIT_TRANS 0x03800000
#define PCI_PCIX_STATUS_DESIGNED_MAX_CUMULATIVE_READ_SIZE 0x1c000000
#define PCI_PCIX_STATUS_RCVD_SC_ERR_MESS 0x20000000 /* Received Split Completion Error Message */
#define PCI_PCIX_STATUS_266MHZ0x40000000 /* 266 MHz capable */
#define PCI_PCIX_STATUS_533MHZ 0x80000000 /* 533 MHz capable */
#define PCI_PCIX_STATUS_266MHZ 0x40000000 /* 266 MHz capable */
#define PCI_PCIX_STATUS_533MHZ 0x80000000 /* 533 MHz capable */
#define PCI_PCIX_SIZEOF4
//Azi: check this gui top to bottom!!
/* PCI-X Bridges */
#define PCI_PCIX_BRIDGE_SEC_STATUS 2 /* Secondary bus status register offset */
#define PCI_PCIX_BRIDGE_SEC_STATUS_64BIT 0x0001
#define PCI_PCIX_BRIDGE_SIZEOF 12
/* PCI Express */
#define PCI_EXP_FLAGS0x2/* Capabilities register */
#define PCI_EXP_FLAGS_VERS0x000f/* Capability version */
#define PCI_EXP_FLAGS_TYPE0x00f0/* Device/Port type */
#define PCI_EXP_TYPE_ENDPOINT0x0/* Express Endpoint */
#define PCI_EXP_TYPE_LEG_END0x1/* Legacy Endpoint */
#define PCI_EXP_TYPE_ROOT_PORT 0x4/* Root Port */
#define PCI_EXP_TYPE_UPSTREAM0x5/* Upstream Port */
#define PCI_EXP_TYPE_DOWNSTREAM 0x6/* Downstream Port */
#define PCI_EXP_TYPE_PCI_BRIDGE 0x7/* PCI/PCI-X Bridge */
#define PCI_EXP_TYPE_PCIE_BRIDGE 0x8/* PCI/PCI-X to PCIE Bridge */
#define PCI_EXP_TYPE_ROOT_INT_EP 0x9/* Root Complex Integrated Endpoint */
#define PCI_EXP_TYPE_ROOT_EC 0xa/* Root Complex Event Collector */
#define PCI_EXP_FLAGS_SLOT0x0100/* Slot implemented */
#define PCI_EXP_FLAGS_IRQ0x3e00/* Interrupt message number */
#define PCI_EXP_DEVCAP0x4/* Device capabilities */
#define PCI_EXP_DEVCAP_PAYLOAD0x07/* Max_Payload_Size */
#define PCI_EXP_DEVCAP_PHANTOM0x18/* Phantom functions */
#define PCI_EXP_DEVCAP_EXT_TAG0x20/* Extended tags */
#define PCI_EXP_DEVCAP_L0S0x1c0/* L0s Acceptable Latency */
#define PCI_EXP_DEVCAP_L10xe00/* L1 Acceptable Latency */
#define PCI_EXP_DEVCAP_ATN_BUT0x1000/* Attention Button Present */
#define PCI_EXP_DEVCAP_ATN_IND0x2000/* Attention Indicator Present */
#define PCI_EXP_DEVCAP_PWR_IND0x4000/* Power Indicator Present */
#define PCI_EXP_DEVCAP_RBE0x8000/* Role-Based Error Reporting */
#define PCI_EXP_DEVCAP_PWR_VAL0x3fc0000 /* Slot Power Limit Value */
#define PCI_EXP_DEVCAP_PWR_SCL0xc000000 /* Slot Power Limit Scale */
#define PCI_EXP_DEVCAP_FLRESET0x10000000 /* Function-Level Reset */
#define PCI_EXP_DEVCTL0x8/* Device Control */
#define PCI_EXP_DEVCTL_CERE0x0001/* Correctable Error Reporting En. */
#define PCI_EXP_DEVCTL_NFERE0x0002/* Non-Fatal Error Reporting Enable */
#define PCI_EXP_DEVCTL_FERE0x0004/* Fatal Error Reporting Enable */
#define PCI_EXP_DEVCTL_URRE0x0008/* Unsupported Request Reporting En. */
#define PCI_EXP_DEVCTL_RELAXED0x0010/* Enable Relaxed Ordering */
#define PCI_EXP_DEVCTL_PAYLOAD0x00e0/* Max_Payload_Size */
#define PCI_EXP_DEVCTL_EXT_TAG0x0100/* Extended Tag Field Enable */
#define PCI_EXP_DEVCTL_PHANTOM0x0200/* Phantom Functions Enable */
#define PCI_EXP_DEVCTL_AUX_PME0x0400/* Auxiliary Power PM Enable */
#define PCI_EXP_DEVCTL_NOSNOOP0x0800/* Enable No Snoop */
#define PCI_EXP_DEVCTL_READRQ0x7000/* Max_Read_Request_Size */
#define PCI_EXP_DEVCTL_BCRE0x8000/* Bridge Configuration Retry Enable */
#define PCI_EXP_DEVCTL_FLRESET0x8000/* Function-Level Reset [bit shared with BCRE] */
#define PCI_EXP_DEVSTA0xa/* Device Status */
#define PCI_EXP_DEVSTA_CED0x01/* Correctable Error Detected */
#define PCI_EXP_DEVSTA_NFED0x02/* Non-Fatal Error Detected */
#define PCI_EXP_DEVSTA_FED0x04/* Fatal Error Detected */
#define PCI_EXP_DEVSTA_URD0x08/* Unsupported Request Detected */
#define PCI_EXP_DEVSTA_AUXPD0x10/* AUX Power Detected */
#define PCI_EXP_DEVSTA_TRPND0x20/* Transactions Pending */
#define PCI_EXP_LNKCAP0xc/* Link Capabilities */
#define PCI_EXP_LNKCAP_SPEED0x0000f/* Maximum Link Speed */
#define PCI_EXP_LNKCAP_WIDTH0x003f0/* Maximum Link Width */
#define PCI_EXP_LNKCAP_ASPM0x00c00/* Active State Power Management */
#define PCI_EXP_LNKCAP_L0S0x07000/* L0s Acceptable Latency */
#define PCI_EXP_LNKCAP_L10x38000/* L1 Acceptable Latency */
#define PCI_EXP_LNKCAP_CLOCKPM0x40000/* Clock Power Management */
#define PCI_EXP_LNKCAP_SURPRISE 0x80000 /* Surprise Down Error Reporting */
#define PCI_EXP_LNKCAP_DLLA0x100000 /* Data Link Layer Active Reporting */
#define PCI_EXP_LNKCAP_LBNC0x200000 /* Link Bandwidth Notification Capability */
#define PCI_EXP_LNKCAP_PORT0xff000000 /* Port Number */
#define PCI_EXP_LNKCTL0x10/* Link Control */
#define PCI_EXP_LNKCTL_ASPM0x0003/* ASPM Control */
#define PCI_EXP_LNKCTL_RCB0x0008/* Read Completion Boundary */
#define PCI_EXP_LNKCTL_DISABLE0x0010/* Link Disable */
#define PCI_EXP_LNKCTL_RETRAIN0x0020/* Retrain Link */
#define PCI_EXP_LNKCTL_CLOCK0x0040/* Common Clock Configuration */
#define PCI_EXP_LNKCTL_XSYNCH0x0080/* Extended Synch */
#define PCI_EXP_LNKCTL_CLOCKPM0x0100/* Clock Power Management */
#define PCI_EXP_LNKCTL_HWAUTWD0x0200/* Hardware Autonomous Width Disable */
#define PCI_EXP_LNKCTL_BWMIE0x0400/* Bandwidth Mgmt Interrupt Enable */
#define PCI_EXP_LNKCTL_AUTBWIE0x0800/* Autonomous Bandwidth Mgmt Interrupt Enable */
#define PCI_EXP_LNKSTA0x12/* Link Status */
#define PCI_EXP_LNKSTA_SPEED0x000f/* Negotiated Link Speed */
#define PCI_EXP_LNKSTA_WIDTH0x03f0/* Negotiated Link Width */
#define PCI_EXP_LNKSTA_TR_ERR0x0400/* Training Error (obsolete) */
#define PCI_EXP_LNKSTA_TRAIN0x0800/* Link Training */
#define PCI_EXP_LNKSTA_SL_CLK0x1000/* Slot Clock Configuration */
#define PCI_EXP_LNKSTA_DL_ACT0x2000/* Data Link Layer in DL_Active State */
#define PCI_EXP_LNKSTA_BWMGMT0x4000/* Bandwidth Mgmt Status */
#define PCI_EXP_LNKSTA_AUTBW0x8000/* Autonomous Bandwidth Mgmt Status */
#define PCI_EXP_SLTCAP0x14/* Slot Capabilities */
#define PCI_EXP_SLTCAP_ATNB0x0001/* Attention Button Present */
#define PCI_EXP_SLTCAP_PWRC0x0002/* Power Controller Present */
#define PCI_EXP_SLTCAP_MRL0x0004/* MRL Sensor Present */
#define PCI_EXP_SLTCAP_ATNI0x0008/* Attention Indicator Present */
#define PCI_EXP_SLTCAP_PWRI0x0010/* Power Indicator Present */
#define PCI_EXP_SLTCAP_HPS0x0020/* Hot-Plug Surprise */
#define PCI_EXP_SLTCAP_HPC0x0040/* Hot-Plug Capable */
#define PCI_EXP_SLTCAP_PWR_VAL0x00007f80 /* Slot Power Limit Value */
#define PCI_EXP_SLTCAP_PWR_SCL0x00018000 /* Slot Power Limit Scale */
#define PCI_EXP_SLTCAP_INTERLOCK 0x020000 /* Electromechanical Interlock Present */
#define PCI_EXP_SLTCAP_NOCMDCOMP 0x040000 /* No Command Completed Support */
#define PCI_EXP_SLTCAP_PSN0xfff80000 /* Physical Slot Number */
#define PCI_EXP_SLTCTL0x18/* Slot Control */
#define PCI_EXP_SLTCTL_ATNB0x0001/* Attention Button Pressed Enable */
#define PCI_EXP_SLTCTL_PWRF0x0002/* Power Fault Detected Enable */
#define PCI_EXP_SLTCTL_MRLS0x0004/* MRL Sensor Changed Enable */
#define PCI_EXP_SLTCTL_PRSD0x0008/* Presence Detect Changed Enable */
#define PCI_EXP_SLTCTL_CMDC0x0010/* Command Completed Interrupt Enable */
#define PCI_EXP_SLTCTL_HPIE0x0020/* Hot-Plug Interrupt Enable */
#define PCI_EXP_SLTCTL_ATNI0x00c0/* Attention Indicator Control */
#define PCI_EXP_SLTCTL_PWRI0x0300/* Power Indicator Control */
#define PCI_EXP_SLTCTL_PWRC0x0400/* Power Controller Control */
#define PCI_EXP_SLTCTL_INTERLOCK 0x0800 /* Electromechanical Interlock Control */
#define PCI_EXP_SLTCTL_LLCHG0x1000/* Data Link Layer State Changed Enable */
#define PCI_EXP_SLTSTA0x1a/* Slot Status */
#define PCI_EXP_SLTSTA_ATNB0x0001/* Attention Button Pressed */
#define PCI_EXP_SLTSTA_PWRF0x0002/* Power Fault Detected */
#define PCI_EXP_SLTSTA_MRLS0x0004/* MRL Sensor Changed */
#define PCI_EXP_SLTSTA_PRSD0x0008/* Presence Detect Changed */
#define PCI_EXP_SLTSTA_CMDC0x0010/* Command Completed */
#define PCI_EXP_SLTSTA_MRL_ST0x0020/* MRL Sensor State */
#define PCI_EXP_SLTSTA_PRES0x0040/* Presence Detect State */
#define PCI_EXP_SLTSTA_INTERLOCK 0x0080 /* Electromechanical Interlock Status */
#define PCI_EXP_SLTSTA_LLCHG0x0100/* Data Link Layer State Changed */
#define PCI_EXP_RTCTL0x1c/* Root Control */
#define PCI_EXP_RTCTL_SECEE0x0001/* System Error on Correctable Error */
#define PCI_EXP_RTCTL_SENFEE0x0002/* System Error on Non-Fatal Error */
#define PCI_EXP_RTCTL_SEFEE0x0004/* System Error on Fatal Error */
#define PCI_EXP_RTCTL_PMEIE0x0008/* PME Interrupt Enable */
#define PCI_EXP_RTCTL_CRSVIS0x0010/* Configuration Request Retry Status Visible to SW */
#define PCI_EXP_RTCAP0x1e/* Root Capabilities */
#define PCI_EXP_RTCAP_CRSVIS0x0010/* Configuration Request Retry Status Visible to SW */
#define PCI_EXP_RTSTA0x20/* Root Status */
#define PCI_EXP_RTSTA_PME_REQID 0x0000ffff /* PME Requester ID */
#define PCI_EXP_RTSTA_PME_STATUS 0x00010000 /* PME Status */
#define PCI_EXP_RTSTA_PME_PENDING 0x00020000 /* PME is Pending */
#define PCI_EXP_DEVCAP20x24/* Device capabilities 2 */
#define PCI_EXP_DEVCTL20x28/* Device Control */
#define PCI_EXP_DEV2_TIMEOUT_RANGE(x)((x) & 0xf) /* Completion Timeout Ranges Supported */
#define PCI_EXP_DEV2_TIMEOUT_VALUE(x)((x) & 0xf) /* Completion Timeout Value */
#define PCI_EXP_DEV2_TIMEOUT_DIS0x0010/* Completion Timeout Disable Supported */
#define PCI_EXP_DEV2_ARI0x0020/* ARI Forwarding */
#define PCI_EXP_DEVSTA20x2a/* Device Status */
#define PCI_EXP_LNKCAP20x2c/* Link Capabilities */
#define PCI_EXP_LNKCTL20x30/* Link Control */
#define PCI_EXP_LNKCTL2_SPEED(x)((x) & 0xf) /* Target Link Speed */
#define PCI_EXP_LNKCTL2_CMPLNC0x0010/* Enter Compliance */
#define PCI_EXP_LNKCTL2_SPEED_DIS0x0020/* Hardware Autonomous Speed Disable */
#define PCI_EXP_LNKCTL2_DEEMPHASIS(x)(((x) >> 6) & 1) /* Selectable De-emphasis */
#define PCI_EXP_LNKCTL2_MARGIN(x)(((x) >> 7) & 7) /* Transmit Margin */
#define PCI_EXP_LNKCTL2_MOD_CMPLNC0x0400/* Enter Modified Compliance */
#define PCI_EXP_LNKCTL2_CMPLNC_SOS0x0800/* Compliance SOS */
#define PCI_EXP_LNKCTL2_COM_DEEMPHASIS(x) (((x) >> 12) & 1) /* Compliance De-emphasis */
#define PCI_EXP_LNKSTA20x32/* Link Status */
#define PCI_EXP_LINKSTA2_DEEMPHASIS(x)((x) & 1)/* Current De-emphasis Level */
#define PCI_EXP_SLTCAP20x34/* Slot Capabilities */
#define PCI_EXP_SLTCTL20x38/* Slot Control */
#define PCI_EXP_SLTSTA20x3a/* Slot Status */
#define PCI_EXP_FLAGS0x2/* Capabilities register */
#define PCI_EXP_FLAGS_VERS0x000f/* Capability version */
#define PCI_EXP_FLAGS_TYPE0x00f0/* Device/Port type */
#define PCI_EXP_TYPE_ENDPOINT0x0/* Express Endpoint */
#define PCI_EXP_TYPE_LEG_END0x1/* Legacy Endpoint */
#define PCI_EXP_TYPE_ROOT_PORT 0x4/* Root Port */
#define PCI_EXP_TYPE_UPSTREAM0x5/* Upstream Port */
#define PCI_EXP_TYPE_DOWNSTREAM 0x6/* Downstream Port */
#define PCI_EXP_TYPE_PCI_BRIDGE 0x7/* PCI/PCI-X Bridge */
#define PCI_EXP_TYPE_PCIE_BRIDGE 0x8/* PCI/PCI-X to PCIE Bridge */
#define PCI_EXP_TYPE_ROOT_INT_EP 0x9/* Root Complex Integrated Endpoint */
#define PCI_EXP_TYPE_ROOT_EC 0xa/* Root Complex Event Collector */
#define PCI_EXP_FLAGS_SLOT0x0100/* Slot implemented */
#define PCI_EXP_FLAGS_IRQ0x3e00/* Interrupt message number */
#define PCI_EXP_DEVCAP0x4/* Device capabilities */
#define PCI_EXP_DEVCAP_PAYLOAD0x07/* Max_Payload_Size */
#define PCI_EXP_DEVCAP_PHANTOM0x18/* Phantom functions */
#define PCI_EXP_DEVCAP_EXT_TAG0x20/* Extended tags */
#define PCI_EXP_DEVCAP_L0S0x1c0/* L0s Acceptable Latency */
#define PCI_EXP_DEVCAP_L10xe00/* L1 Acceptable Latency */
#define PCI_EXP_DEVCAP_ATN_BUT0x1000/* Attention Button Present */
#define PCI_EXP_DEVCAP_ATN_IND0x2000/* Attention Indicator Present */
#define PCI_EXP_DEVCAP_PWR_IND0x4000/* Power Indicator Present */
#define PCI_EXP_DEVCAP_RBE0x8000/* Role-Based Error Reporting */
#define PCI_EXP_DEVCAP_PWR_VAL0x3fc0000 /* Slot Power Limit Value */
#define PCI_EXP_DEVCAP_PWR_SCL0xc000000 /* Slot Power Limit Scale */
#define PCI_EXP_DEVCAP_FLRESET0x10000000 /* Function-Level Reset */
#define PCI_EXP_DEVCTL0x8/* Device Control */
#define PCI_EXP_DEVCTL_CERE0x0001/* Correctable Error Reporting En. */
#define PCI_EXP_DEVCTL_NFERE0x0002/* Non-Fatal Error Reporting Enable */
#define PCI_EXP_DEVCTL_FERE0x0004/* Fatal Error Reporting Enable */
#define PCI_EXP_DEVCTL_URRE0x0008/* Unsupported Request Reporting En. */
#define PCI_EXP_DEVCTL_RELAXED0x0010/* Enable Relaxed Ordering */
#define PCI_EXP_DEVCTL_PAYLOAD0x00e0/* Max_Payload_Size */
#define PCI_EXP_DEVCTL_EXT_TAG0x0100/* Extended Tag Field Enable */
#define PCI_EXP_DEVCTL_PHANTOM0x0200/* Phantom Functions Enable */
#define PCI_EXP_DEVCTL_AUX_PME0x0400/* Auxiliary Power PM Enable */
#define PCI_EXP_DEVCTL_NOSNOOP0x0800/* Enable No Snoop */
#define PCI_EXP_DEVCTL_READRQ0x7000/* Max_Read_Request_Size */
#define PCI_EXP_DEVCTL_BCRE0x8000/* Bridge Configuration Retry Enable */
#define PCI_EXP_DEVCTL_FLRESET0x8000/* Function-Level Reset [bit shared with BCRE] */
#define PCI_EXP_DEVSTA0xa/* Device Status */
#define PCI_EXP_DEVSTA_CED0x01/* Correctable Error Detected */
#define PCI_EXP_DEVSTA_NFED0x02/* Non-Fatal Error Detected */
#define PCI_EXP_DEVSTA_FED0x04/* Fatal Error Detected */
#define PCI_EXP_DEVSTA_URD0x08/* Unsupported Request Detected */
#define PCI_EXP_DEVSTA_AUXPD0x10/* AUX Power Detected */
#define PCI_EXP_DEVSTA_TRPND0x20/* Transactions Pending */
#define PCI_EXP_LNKCAP0xc/* Link Capabilities */
#define PCI_EXP_LNKCAP_SPEED0x0000f/* Maximum Link Speed */
#define PCI_EXP_LNKCAP_WIDTH0x003f0/* Maximum Link Width */
#define PCI_EXP_LNKCAP_ASPM0x00c00/* Active State Power Management */
#define PCI_EXP_LNKCAP_L0S0x07000/* L0s Acceptable Latency */
#define PCI_EXP_LNKCAP_L10x38000/* L1 Acceptable Latency */
#define PCI_EXP_LNKCAP_CLOCKPM0x40000/* Clock Power Management */
#define PCI_EXP_LNKCAP_SURPRISE0x80000 /* Surprise Down Error Reporting */
#define PCI_EXP_LNKCAP_DLLA0x100000 /* Data Link Layer Active Reporting */
#define PCI_EXP_LNKCAP_LBNC0x200000 /* Link Bandwidth Notification Capability */
#define PCI_EXP_LNKCAP_PORT0xff000000 /* Port Number */
#define PCI_EXP_LNKCTL0x10/* Link Control */
#define PCI_EXP_LNKCTL_ASPM0x0003/* ASPM Control */
#define PCI_EXP_LNKCTL_RCB0x0008/* Read Completion Boundary */
#define PCI_EXP_LNKCTL_DISABLE0x0010/* Link Disable */
#define PCI_EXP_LNKCTL_RETRAIN0x0020/* Retrain Link */
#define PCI_EXP_LNKCTL_CLOCK0x0040/* Common Clock Configuration */
#define PCI_EXP_LNKCTL_XSYNCH0x0080/* Extended Synch */
#define PCI_EXP_LNKCTL_CLOCKPM0x0100/* Clock Power Management */
#define PCI_EXP_LNKCTL_HWAUTWD0x0200/* Hardware Autonomous Width Disable */
#define PCI_EXP_LNKCTL_BWMIE0x0400/* Bandwidth Mgmt Interrupt Enable */
#define PCI_EXP_LNKCTL_AUTBWIE0x0800/* Autonomous Bandwidth Mgmt Interrupt Enable */
#define PCI_EXP_LNKSTA0x12/* Link Status */
#define PCI_EXP_LNKSTA_SPEED0x000f/* Negotiated Link Speed */
#define PCI_EXP_LNKSTA_WIDTH0x03f0/* Negotiated Link Width */
#define PCI_EXP_LNKSTA_TR_ERR0x0400/* Training Error (obsolete) */
#define PCI_EXP_LNKSTA_TRAIN0x0800/* Link Training */
#define PCI_EXP_LNKSTA_SL_CLK0x1000/* Slot Clock Configuration */
#define PCI_EXP_LNKSTA_DL_ACT0x2000/* Data Link Layer in DL_Active State */
#define PCI_EXP_LNKSTA_BWMGMT0x4000/* Bandwidth Mgmt Status */
#define PCI_EXP_LNKSTA_AUTBW0x8000/* Autonomous Bandwidth Mgmt Status */
#define PCI_EXP_SLTCAP0x14/* Slot Capabilities */
#define PCI_EXP_SLTCAP_ATNB0x0001/* Attention Button Present */
#define PCI_EXP_SLTCAP_PWRC0x0002/* Power Controller Present */
#define PCI_EXP_SLTCAP_MRL0x0004/* MRL Sensor Present */
#define PCI_EXP_SLTCAP_ATNI0x0008/* Attention Indicator Present */
#define PCI_EXP_SLTCAP_PWRI0x0010/* Power Indicator Present */
#define PCI_EXP_SLTCAP_HPS0x0020/* Hot-Plug Surprise */
#define PCI_EXP_SLTCAP_HPC0x0040/* Hot-Plug Capable */
#define PCI_EXP_SLTCAP_PWR_VAL0x00007f80 /* Slot Power Limit Value */
#define PCI_EXP_SLTCAP_PWR_SCL0x00018000 /* Slot Power Limit Scale */
#define PCI_EXP_SLTCAP_INTERLOCK 0x020000 /* Electromechanical Interlock Present */
#define PCI_EXP_SLTCAP_NOCMDCOMP 0x040000 /* No Command Completed Support */
#define PCI_EXP_SLTCAP_PSN0xfff80000 /* Physical Slot Number */
#define PCI_EXP_SLTCTL0x18/* Slot Control */
#define PCI_EXP_SLTCTL_ATNB0x0001/* Attention Button Pressed Enable */
#define PCI_EXP_SLTCTL_PWRF0x0002/* Power Fault Detected Enable */
#define PCI_EXP_SLTCTL_MRLS0x0004/* MRL Sensor Changed Enable */
#define PCI_EXP_SLTCTL_PRSD0x0008/* Presence Detect Changed Enable */
#define PCI_EXP_SLTCTL_CMDC0x0010/* Command Completed Interrupt Enable */
#define PCI_EXP_SLTCTL_HPIE0x0020/* Hot-Plug Interrupt Enable */
#define PCI_EXP_SLTCTL_ATNI0x00c0/* Attention Indicator Control */
#define PCI_EXP_SLTCTL_PWRI0x0300/* Power Indicator Control */
#define PCI_EXP_SLTCTL_PWRC0x0400/* Power Controller Control */
#define PCI_EXP_SLTCTL_INTERLOCK 0x0800 /* Electromechanical Interlock Control */
#define PCI_EXP_SLTCTL_LLCHG0x1000/* Data Link Layer State Changed Enable */
#define PCI_EXP_SLTSTA0x1a/* Slot Status */
#define PCI_EXP_SLTSTA_ATNB0x0001/* Attention Button Pressed */
#define PCI_EXP_SLTSTA_PWRF0x0002/* Power Fault Detected */
#define PCI_EXP_SLTSTA_MRLS0x0004/* MRL Sensor Changed */
#define PCI_EXP_SLTSTA_PRSD0x0008/* Presence Detect Changed */
#define PCI_EXP_SLTSTA_CMDC0x0010/* Command Completed */
#define PCI_EXP_SLTSTA_MRL_ST0x0020/* MRL Sensor State */
#define PCI_EXP_SLTSTA_PRES0x0040/* Presence Detect State */
#define PCI_EXP_SLTSTA_INTERLOCK0x0080 /* Electromechanical Interlock Status */
#define PCI_EXP_SLTSTA_LLCHG0x0100/* Data Link Layer State Changed */
#define PCI_EXP_RTCTL0x1c/* Root Control */
#define PCI_EXP_RTCTL_SECEE0x0001/* System Error on Correctable Error */
#define PCI_EXP_RTCTL_SENFEE0x0002/* System Error on Non-Fatal Error */
#define PCI_EXP_RTCTL_SEFEE0x0004/* System Error on Fatal Error */
#define PCI_EXP_RTCTL_PMEIE0x0008/* PME Interrupt Enable */
#define PCI_EXP_RTCTL_CRSVIS0x0010/* Configuration Request Retry Status Visible to SW */
#define PCI_EXP_RTCAP0x1e/* Root Capabilities */
#define PCI_EXP_RTCAP_CRSVIS0x0010/* Configuration Request Retry Status Visible to SW */
#define PCI_EXP_RTSTA0x20/* Root Status */
#define PCI_EXP_RTSTA_PME_REQID 0x0000ffff /* PME Requester ID */
#define PCI_EXP_RTSTA_PME_STATUS 0x00010000 /* PME Status */
#define PCI_EXP_RTSTA_PME_PENDING 0x00020000 /* PME is Pending */
#define PCI_EXP_DEVCAP20x24/* Device capabilities 2 */
#define PCI_EXP_DEVCTL20x28/* Device Control */
#define PCI_EXP_DEV2_TIMEOUT_RANGE(x)((x) & 0xf) /* Completion Timeout Ranges Supported */
#define PCI_EXP_DEV2_TIMEOUT_VALUE(x)((x) & 0xf) /* Completion Timeout Value */
#define PCI_EXP_DEV2_TIMEOUT_DIS0x0010/* Completion Timeout Disable Supported */
#define PCI_EXP_DEV2_ARI0x0020/* ARI Forwarding */
#define PCI_EXP_DEVSTA20x2a/* Device Status */
#define PCI_EXP_LNKCAP20x2c/* Link Capabilities */
#define PCI_EXP_LNKCTL20x30/* Link Control */
#define PCI_EXP_LNKCTL2_SPEED(x)((x) & 0xf) /* Target Link Speed */
#define PCI_EXP_LNKCTL2_CMPLNC0x0010/* Enter Compliance */
#define PCI_EXP_LNKCTL2_SPEED_DIS0x0020/* Hardware Autonomous Speed Disable */
#define PCI_EXP_LNKCTL2_DEEMPHASIS(x)(((x) >> 6) & 1) /* Selectable De-emphasis */
#define PCI_EXP_LNKCTL2_MARGIN(x)(((x) >> 7) & 7) /* Transmit Margin */
#define PCI_EXP_LNKCTL2_MOD_CMPLNC0x0400/* Enter Modified Compliance */
#define PCI_EXP_LNKCTL2_CMPLNC_SOS0x0800/* Compliance SOS */
#define PCI_EXP_LNKCTL2_COM_DEEMPHASIS(x)(((x) >> 12) & 1) /* Compliance De-emphasis */
#define PCI_EXP_LNKSTA20x32/* Link Status */
#define PCI_EXP_LINKSTA2_DEEMPHASIS(x)((x) & 1)/* Current De-emphasis Level */
#define PCI_EXP_SLTCAP20x34/* Slot Capabilities */
#define PCI_EXP_SLTCTL20x38/* Slot Control */
#define PCI_EXP_SLTSTA20x3a/* Slot Status */
/* MSI-X */
#define PCI_MSIX_ENABLE0x8000
#define PCI_MSIX_MASK0x4000
#define PCI_MSIX_TABSIZE0x03ff
#define PCI_MSIX_TABLE4
#define PCI_MSIX_PBA8
#define PCI_MSIX_BIR0x7
#define PCI_MSIX_ENABLE0x8000
#define PCI_MSIX_MASK0x4000
#define PCI_MSIX_TABSIZE0x03ff
#define PCI_MSIX_TABLE4
#define PCI_MSIX_PBA8
#define PCI_MSIX_BIR0x7
/* Subsystem vendor/device ID for PCI bridges */
#define PCI_SSVID_VENDOR4
#define PCI_SSVID_DEVICE6
#define PCI_SSVID_VENDOR4
#define PCI_SSVID_DEVICE6
/* Advanced Error Reporting */
#define PCI_ERR_UNCOR_STATUS4/* Uncorrectable Error Status */
#define PCI_ERR_ROOT_SRC54
/* Virtual Channel */
#define PCI_VC_PORT_REG14
#define PCI_VC_PORT_REG28
#define PCI_VC_PORT_CTRL12
#define PCI_VC_PORT_STATUS14
#define PCI_VC_RES_CAP16
#define PCI_VC_RES_CTRL20
#define PCI_VC_RES_STATUS26
#define PCI_VC_PORT_REG14
#define PCI_VC_PORT_REG28
#define PCI_VC_PORT_CTRL12
#define PCI_VC_PORT_STATUS14
#define PCI_VC_RES_CAP16
#define PCI_VC_RES_CTRL20
#define PCI_VC_RES_STATUS26
/* Power Budgeting */
#define PCI_PWR_DSR4/* Data Select Register */
#define PCI_PWR_DATA8/* Data Register */
#define PCI_PWR_DSR4/* Data Select Register */
#define PCI_PWR_DATA8/* Data Register */
#define PCI_PWR_DATA_BASE(x)((x) & 0xff) /* Base Power */
#define PCI_PWR_DATA_SCALE(x)(((x) >> 8) & 3) /* Data Scale */
#define PCI_PWR_DATA_PM_SUB(x)(((x) >> 10) & 7) /* PM Sub State */
#define PCI_PWR_DATA_PM_STATE(x) (((x) >> 13) & 3) /* PM State */
#define PCI_PWR_DATA_TYPE(x)(((x) >> 15) & 7) /* Type */
#define PCI_PWR_DATA_RAIL(x)(((x) >> 18) & 7) /* Power Rail */
#define PCI_PWR_CAP12/* Capability */
#define PCI_PWR_CAP12/* Capability */
#define PCI_PWR_CAP_BUDGET(x)((x) & 1)/* Included in system budget */
/* Access Control Services */
#define PCI_ARI_CTRL0x06/* ARI Control Register */
#define PCI_ARI_CTRL_MFVC0x0001/* MFVC Function Groups Enable */
#define PCI_ARI_CTRL_ACS0x0002/* ACS Function Groups Enable */
#define PCI_ARI_CTRL_FG(x)(((x) >> 4) & 7) /* Function Group */
#define PCI_ARI_CTRL_FG(x)(((x) >> 4) & 7) /* Function Group */
/* Address Translation Service */
#define PCI_ATS_CAP0x04/* ATS Capability Register */
#define PCI_ATS_CAP_IQD(x)((x) & 0x1f) /* Invalidate Queue Depth */
#define PCI_ATS_CAP_IQD(x)((x) & 0x1f) /* Invalidate Queue Depth */
#define PCI_ATS_CTRL0x06/* ATS Control Register */
#define PCI_ATS_CTRL_STU(x)((x) & 0x1f) /* Smallest Translation Unit */
#define PCI_ATS_CTRL_ENABLE0x8000/* ATS Enable */
#define PCI_ATS_CTRL_STU(x)((x) & 0x1f) /* Smallest Translation Unit */
#define PCI_ATS_CTRL_ENABLE0x8000/* ATS Enable */
/* Single Root I/O Virtualization */
#define PCI_IOV_CAP0x04/* SR-IOV Capability Register */
#define PCI_IOV_CAP_VFM0x00000001 /* VF Migration Capable */
#define PCI_IOV_CAP_IMN(x)((x) >> 21) /* VF Migration Interrupt Message Number */
#define PCI_IOV_CTRL0x08/* SR-IOV Control Register */
#define PCI_IOV_CTRL_VFE0x0001/* VF Enable */
#define PCI_IOV_CTRL_VFME0x0002/* VF Migration Enable */
#define PCI_IOV_CTRL_VFMIE0x0004/* VF Migration Interrupt Enable */
#define PCI_IOV_CTRL_MSE0x0008/* VF MSE */
#define PCI_IOV_CTRL_ARI0x0010/* ARI Capable Hierarchy */
#define PCI_IOV_STATUS0x0a/* SR-IOV Status Register */
#define PCI_IOV_STATUS_MS0x0001/* VF Migration Status */
#define PCI_IOV_INITIALVF0x0c/* Number of VFs that are initially associated */
#define PCI_IOV_TOTALVF0x0e/* Maximum number of VFs that could be associated */
#define PCI_IOV_NUMVF0x10/* Number of VFs that are available */
#define PCI_IOV_FDL0x12/* Function Dependency Link */
#define PCI_IOV_OFFSET0x14/* First VF Offset */
#define PCI_IOV_STRIDE0x16/* Routing ID offset from one VF to the next one */
#define PCI_IOV_DID0x1a/* VF Device ID */
#define PCI_IOV_SUPPS0x1c/* Supported Page Sizes */
#define PCI_IOV_SYSPS0x20/* System Page Size */
#define PCI_IOV_BAR_BASE0x24/* VF BAR0, VF BAR1, ... VF BAR5 */
#define PCI_IOV_NUM_BAR6/* Number of VF BARs */
#define PCI_IOV_MSAO0x3c/* VF Migration State Array Offset */
#define PCI_IOV_MSA_BIR(x)((x) & 7) /* VF Migration State BIR */
#define PCI_IOV_CAP0x04/* SR-IOV Capability Register */
#define PCI_IOV_CAP_VFM0x00000001 /* VF Migration Capable */
#define PCI_IOV_CAP_IMN(x)((x) >> 21) /* VF Migration Interrupt Message Number */
#define PCI_IOV_CTRL0x08/* SR-IOV Control Register */
#define PCI_IOV_CTRL_VFE0x0001/* VF Enable */
#define PCI_IOV_CTRL_VFME0x0002/* VF Migration Enable */
#define PCI_IOV_CTRL_VFMIE0x0004/* VF Migration Interrupt Enable */
#define PCI_IOV_CTRL_MSE0x0008/* VF MSE */
#define PCI_IOV_CTRL_ARI0x0010/* ARI Capable Hierarchy */
#define PCI_IOV_STATUS0x0a/* SR-IOV Status Register */
#define PCI_IOV_STATUS_MS0x0001/* VF Migration Status */
#define PCI_IOV_INITIALVF0x0c/* Number of VFs that are initially associated */
#define PCI_IOV_TOTALVF0x0e/* Maximum number of VFs that could be associated */
#define PCI_IOV_NUMVF0x10/* Number of VFs that are available */
#define PCI_IOV_FDL0x12/* Function Dependency Link */
#define PCI_IOV_OFFSET0x14/* First VF Offset */
#define PCI_IOV_STRIDE0x16/* Routing ID offset from one VF to the next one */
#define PCI_IOV_DID0x1a/* VF Device ID */
#define PCI_IOV_SUPPS0x1c/* Supported Page Sizes */
#define PCI_IOV_SYSPS0x20/* System Page Size */
#define PCI_IOV_BAR_BASE0x24/* VF BAR0, VF BAR1, ... VF BAR5 */
#define PCI_IOV_NUM_BAR6/* Number of VF BARs */
#define PCI_IOV_MSAO0x3c/* VF Migration State Array Offset */
#define PCI_IOV_MSA_BIR(x)((x) & 7) /* VF Migration State BIR */
#define PCI_IOV_MSA_OFFSET(x)((x) & 0xfffffff8) /* VF Migration State Offset */
/*
*2:0 = function
*/
#define PCI_DEVFN(slot,func)((((slot) & 0x1f) << 3) | ((func) & 0x07))
#define PCI_SLOT(devfn)(((devfn) >> 3) & 0x1f)
#define PCI_FUNC(devfn)((devfn) & 0x07)
#define PCI_SLOT(devfn)(((devfn) >> 3) & 0x1f)
#define PCI_FUNC(devfn)((devfn) & 0x07)
/* Device classes and subclasses */
#define PCI_CLASS_NOT_DEFINED0x0000
#define PCI_CLASS_NOT_DEFINED_VGA0x0001
#define PCI_CLASS_NOT_DEFINED0x0000
#define PCI_CLASS_NOT_DEFINED_VGA0x0001
#define PCI_BASE_CLASS_STORAGE0x01
#define PCI_CLASS_STORAGE_SCSI0x0100
#define PCI_CLASS_STORAGE_IDE0x0101
#define PCI_CLASS_STORAGE_FLOPPY0x0102
#define PCI_CLASS_STORAGE_IPI0x0103
#define PCI_CLASS_STORAGE_RAID0x0104
#define PCI_CLASS_STORAGE_ATA0x0105
#define PCI_CLASS_STORAGE_SATA0x0106
#define PCI_CLASS_STORAGE_SAS0x0107
#define PCI_CLASS_STORAGE_OTHER0x0180
#define PCI_BASE_CLASS_STORAGE0x01
#define PCI_CLASS_STORAGE_SCSI0x0100
#define PCI_CLASS_STORAGE_IDE0x0101
#define PCI_CLASS_STORAGE_FLOPPY0x0102
#define PCI_CLASS_STORAGE_IPI0x0103
#define PCI_CLASS_STORAGE_RAID0x0104
#define PCI_CLASS_STORAGE_ATA0x0105
#define PCI_CLASS_STORAGE_SATA0x0106
#define PCI_CLASS_STORAGE_SAS0x0107
#define PCI_CLASS_STORAGE_OTHER0x0180
#define PCI_BASE_CLASS_NETWORK0x02
#define PCI_CLASS_NETWORK_ETHERNET0x0200
#define PCI_BASE_CLASS_NETWORK0x02
#define PCI_CLASS_NETWORK_ETHERNET0x0200
#define PCI_CLASS_NETWORK_TOKEN_RING0x0201
#define PCI_CLASS_NETWORK_FDDI0x0202
#define PCI_CLASS_NETWORK_ATM0x0203
#define PCI_CLASS_NETWORK_ISDN0x0204
#define PCI_CLASS_NETWORK_OTHER0x0280
#define PCI_CLASS_NETWORK_FDDI0x0202
#define PCI_CLASS_NETWORK_ATM0x0203
#define PCI_CLASS_NETWORK_ISDN0x0204
#define PCI_CLASS_NETWORK_OTHER0x0280
#define PCI_BASE_CLASS_DISPLAY0x03
#define PCI_CLASS_DISPLAY_VGA0x0300
#define PCI_CLASS_DISPLAY_XGA0x0301
#define PCI_CLASS_DISPLAY_3D0x0302
#define PCI_CLASS_DISPLAY_OTHER0x0380
#define PCI_BASE_CLASS_DISPLAY0x03
#define PCI_CLASS_DISPLAY_VGA0x0300
#define PCI_CLASS_DISPLAY_XGA0x0301
#define PCI_CLASS_DISPLAY_3D0x0302
#define PCI_CLASS_DISPLAY_OTHER0x0380
#define PCI_BASE_CLASS_MULTIMEDIA0x04
#define PCI_CLASS_MULTIMEDIA_VIDEO0x0400
#define PCI_CLASS_MULTIMEDIA_AUDIO0x0401
#define PCI_CLASS_MULTIMEDIA_PHONE0x0402
#define PCI_BASE_CLASS_MULTIMEDIA0x04
#define PCI_CLASS_MULTIMEDIA_VIDEO0x0400
#define PCI_CLASS_MULTIMEDIA_AUDIO0x0401
#define PCI_CLASS_MULTIMEDIA_PHONE0x0402
#define PCI_CLASS_MULTIMEDIA_AUDIO_DEV0x0403
#define PCI_CLASS_MULTIMEDIA_OTHER0x0480
#define PCI_CLASS_MULTIMEDIA_OTHER0x0480
#define PCI_BASE_CLASS_MEMORY0x05
#define PCI_CLASS_MEMORY_RAM0x0500
#define PCI_CLASS_MEMORY_FLASH0x0501
#define PCI_CLASS_MEMORY_OTHER0x0580
#define PCI_BASE_CLASS_MEMORY0x05
#define PCI_CLASS_MEMORY_RAM0x0500
#define PCI_CLASS_MEMORY_FLASH0x0501
#define PCI_CLASS_MEMORY_OTHER0x0580
#define PCI_BASE_CLASS_BRIDGE0x06
#define PCI_CLASS_BRIDGE_HOST0x0600
#define PCI_CLASS_BRIDGE_ISA0x0601
#define PCI_CLASS_BRIDGE_EISA0x0602
#define PCI_CLASS_BRIDGE_MC0x0603
#define PCI_CLASS_BRIDGE_PCI0x0604
#define PCI_CLASS_BRIDGE_PCMCIA0x0605
#define PCI_CLASS_BRIDGE_NUBUS0x0606
#define PCI_CLASS_BRIDGE_CARDBUS0x0607
#define PCI_CLASS_BRIDGE_RACEWAY0x0608
#define PCI_CLASS_BRIDGE_PCI_SEMI0x0609
#define PCI_CLASS_BRIDGE_IB_TO_PCI0x060a
#define PCI_CLASS_BRIDGE_OTHER0x0680
#define PCI_BASE_CLASS_BRIDGE0x06
#define PCI_CLASS_BRIDGE_HOST0x0600
#define PCI_CLASS_BRIDGE_ISA0x0601
#define PCI_CLASS_BRIDGE_EISA0x0602
#define PCI_CLASS_BRIDGE_MC0x0603
#define PCI_CLASS_BRIDGE_PCI0x0604
#define PCI_CLASS_BRIDGE_PCMCIA0x0605
#define PCI_CLASS_BRIDGE_NUBUS0x0606
#define PCI_CLASS_BRIDGE_CARDBUS0x0607
#define PCI_CLASS_BRIDGE_RACEWAY0x0608
#define PCI_CLASS_BRIDGE_PCI_SEMI0x0609
#define PCI_CLASS_BRIDGE_IB_TO_PCI0x060a
#define PCI_CLASS_BRIDGE_OTHER0x0680
#define PCI_BASE_CLASS_COMMUNICATION0x07
#define PCI_CLASS_COMMUNICATION_SERIAL0x0700
#define PCI_CLASS_COMMUNICATION_MODEM0x0703
#define PCI_CLASS_COMMUNICATION_OTHER0x0780
#define PCI_BASE_CLASS_SYSTEM0x08
#define PCI_CLASS_SYSTEM_PIC0x0800
#define PCI_CLASS_SYSTEM_DMA0x0801
#define PCI_CLASS_SYSTEM_TIMER0x0802
#define PCI_CLASS_SYSTEM_RTC0x0803
#define PCI_BASE_CLASS_SYSTEM0x08
#define PCI_CLASS_SYSTEM_PIC0x0800
#define PCI_CLASS_SYSTEM_DMA0x0801
#define PCI_CLASS_SYSTEM_TIMER0x0802
#define PCI_CLASS_SYSTEM_RTC0x0803
#define PCI_CLASS_SYSTEM_PCI_HOTPLUG0x0804
#define PCI_CLASS_SYSTEM_OTHER0x0880
trunk/i386/libsaio/biosfn.c
470470
471471
472472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501501
502
503
504
505
506
507
508
509
510
502
503
504
505
506
507
508
509
510
511511
512
513
514
515
516
517
518
512
513
514
515
516
517
518
519
519520
520
521
522
521
523522
524523
525524
......
528527
529528
530529
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
567565
568566
569567
570568
571569
572570
573
574
575
571
572
573
576574
577
578
579
580
581
582
583
584
585
586
587
575
576
577
578
579
580
581
582
583
584
585
588586
587
588
589
590
591
592
589593
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
594
595
596
597
598
599
600
601
602
603
631604
632
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
633635
634636
635637
636638
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
661663
662
663664
664
665
666
667
668
669
670
665
666
667
668
669
670
671
671672
672
673
674
675
673
674
675
676
676677
677678
678
679
680
681
679
680
681
682
682683
683684
684685
/* Check to see if the passed-in drive is in El Torito no-emulation mode. */
int is_no_emulation(int drive)
{
struct packet {
unsigned char packet_size;
unsigned char media_type;
unsigned char drive_num;
unsigned char ctrlr_index;
unsigned long lba;
unsigned short device_spec;
unsigned short buffer_segment;
unsigned short load_segment;
unsigned short sector_count;
unsigned char cyl_count;
unsigned char sec_count;
unsigned char head_count;
unsigned char reseved;
} __attribute__((packed));
static struct packet pkt;
bzero(&pkt, sizeof(pkt));
pkt.packet_size = 0x13;
bb.intno = 0x13;
bb.eax.r.h = 0x4b;
bb.eax.r.l = 0x01; // subfunc: get info
bb.edx.r.l = drive;
bb.esi.rr = NORMALIZED_OFFSET((unsigned)&pkt);
bb.ds = NORMALIZED_SEGMENT((unsigned)&pkt);
bios(&bb);
struct packet {
unsigned char packet_size;
unsigned char media_type;
unsigned char drive_num;
unsigned char ctrlr_index;
unsigned long lba;
unsigned short device_spec;
unsigned short buffer_segment;
unsigned short load_segment;
unsigned short sector_count;
unsigned char cyl_count;
unsigned char sec_count;
unsigned char head_count;
unsigned char reseved;
} __attribute__((packed));
static struct packet pkt;
bzero(&pkt, sizeof(pkt));
pkt.packet_size = 0x13;
bb.intno= 0x13;
bb.eax.r.h= 0x4b;
bb.eax.r.l= 0x01; // subfunc: get info
bb.edx.r.l= drive;
bb.esi.rr= NORMALIZED_OFFSET((unsigned)&pkt);
bb.ds= NORMALIZED_SEGMENT((unsigned)&pkt);
bios(&bb);
#if DEBUG
printf("el_torito info drive %x\n", drive);
printf("--> cf %x, eax %x\n", bb.flags.cf, bb.eax.rr);
printf("pkt_size: %x\n", pkt.packet_size);
printf("media_type: %x\n", pkt.media_type);
printf("drive_num: %x\n", pkt.drive_num);
printf("device_spec: %x\n", pkt.device_spec);
printf("press a key->\n");getc();
printf("el_torito info drive %x\n", drive);
printf("--> cf %x, eax %x\n", bb.flags.cf, bb.eax.rr);
printf("pkt_size: %x\n", pkt.packet_size);
printf("media_type: %x\n", pkt.media_type);
printf("drive_num: %x\n", pkt.drive_num);
printf("device_spec: %x\n", pkt.device_spec);
printf("press a key->\n");getc();
#endif
/* Some BIOSes erroneously return cf = 1 */
/* Just check to see if the drive number is the same. */
if (pkt.drive_num == drive) {
if ((pkt.media_type & 0x0F) == 0) {
/* We are in no-emulation mode. */
return 1;
/* Some BIOSes erroneously return cf = 1 */
/* Just check to see if the drive number is the same. */
if (pkt.drive_num == drive) {
if ((pkt.media_type & 0x0F) == 0) {
/* We are in no-emulation mode. */
return 1;
}
}
}
return 0;
return 0;
}
#if DEBUG
*/
void print_drive_info(boot_drive_info_t *dp)
{
// printf("buf_size = %x\n", dp->params.buf_size);
printf("info_flags = %x\n", dp->params.info_flags);
printf(" phys_cyls = %lx\n", dp->params. phys_cyls);
printf(" phys_heads = %lx\n", dp->params. phys_heads);
printf(" phys_spt = %lx\n", dp->params. phys_spt);
printf("phys_sectors = %lx%lx\n", ((unsigned long *)(&dp->params.phys_sectors))[1],
((unsigned long *)(&dp->params.phys_sectors))[0]);
printf("phys_nbps = %x\n", dp->params.phys_nbps);
// printf("dpte_offset = %x\n", dp->params.dpte_offset);
// printf("dpte_segment = %x\n", dp->params.dpte_segment);
// printf("key = %x\n", dp->params.key);
// printf("path_len = %x\n", dp->params. path_len);
// printf("reserved1 = %x\n", dp->params. reserved1);
// printf("reserved2 = %x\n", dp->params.reserved2);
//printf("bus_type[4] = %x\n", dp->params. bus_type[4]);
//printf("interface_type[8] = %x\n", dp->params. interface_type[8]);
//printf("interface_path[8] = %x\n", dp->params. interface_path[8]);
//printf("dev_path[8] = %x\n", dp->params. dev_path[8]);
// printf("reserved3 = %x\n", dp->params. reserved3);
// printf("checksum = %x\n", dp->params. checksum);
printf(" io_port_base = %x\n", dp->dpte.io_port_base);
printf(" control_port_base = %x\n", dp->dpte.control_port_base);
printf(" head_flags = %x\n", dp->dpte. head_flags);
printf(" vendor_info = %x\n", dp->dpte. vendor_info);
printf(" irq = %x\n", dp->dpte. irq);
// printf(" irq_unused = %x\n", dp->dpte. irq_unused);
printf(" block_count = %x\n", dp->dpte. block_count);
printf(" dma_channe = %x\n", dp->dpte. dma_channel);
printf(" dma_type = %x\n", dp->dpte. dma_type);
printf(" pio_type = %x\n", dp->dpte. pio_type);
printf(" pio_unused = %x\n", dp->dpte. pio_unused);
printf(" option_flags = %x\n", dp->dpte.option_flags);
// printf(" reserved = %x\n", dp->dpte.reserved);
printf(" revision = %x\n", dp->dpte. revision);
// printf(" checksum = %x\n", dp->dpte. checksum);
//printf("buf_size = %x\n", dp->params.buf_size);
printf("info_flags = %x\n", dp->params.info_flags);
printf("phys_cyls = %lx\n", dp->params. phys_cyls);
printf("phys_heads = %lx\n", dp->params. phys_heads);
printf("phys_spt = %lx\n", dp->params. phys_spt);
printf("phys_sectors = %lx%lx\n", ((unsigned long *)(&dp->params.phys_sectors))[1],
((unsigned long *)(&dp->params.phys_sectors))[0]);
printf("phys_nbps = %x\n", dp->params.phys_nbps);
//printf("dpte_offset = %x\n", dp->params.dpte_offset);
//printf("dpte_segment = %x\n", dp->params.dpte_segment);
//printf("key = %x\n", dp->params.key);
//printf("path_len = %x\n", dp->params. path_len);
//printf("reserved1 = %x\n", dp->params. reserved1);
//printf("reserved2 = %x\n", dp->params.reserved2);
//printf("bus_type[4] = %x\n", dp->params. bus_type[4]);
//printf("interface_type[8] = %x\n", dp->params. interface_type[8]);
//printf("interface_path[8] = %x\n", dp->params. interface_path[8]);
//printf("dev_path[8] = %x\n", dp->params. dev_path[8]);
//printf("reserved3 = %x\n", dp->params. reserved3);
//printf("checksum = %x\n", dp->params. checksum);
printf("io_port_base = %x\n", dp->dpte.io_port_base);
printf("control_port_base = %x\n", dp->dpte.control_port_base);
printf("head_flags = %x\n", dp->dpte. head_flags);
printf("vendor_info = %x\n", dp->dpte. vendor_info);
printf("irq = %x\n", dp->dpte. irq);
//printf("irq_unused = %x\n", dp->dpte. irq_unused);
printf("block_count = %x\n", dp->dpte. block_count);
printf("dma_channe = %x\n", dp->dpte. dma_channel);
printf("dma_type = %x\n", dp->dpte. dma_type);
printf("pio_type = %x\n", dp->dpte. pio_type);
printf("pio_unused = %x\n", dp->dpte. pio_unused);
printf("option_flags = %x\n", dp->dpte.option_flags);
//printf("reserved = %x\n", dp->dpte.reserved);
printf("revision = %x\n", dp->dpte. revision);
//printf("checksum = %x\n", dp->dpte. checksum);
}
#endif
int get_drive_info(int drive, struct driveInfo *dp)
{
boot_drive_info_t *di = &dp->di;
int ret = 0;
boot_drive_info_t *di = &dp->di;
int ret = 0;
#if UNUSED
if (maxhd == 0) {
bb.intno = 0x13;
bb.eax.r.h = 0x08;
bb.edx.r.l = 0x80;
bios(&bb);
if (bb.flags.cf == 0)
maxhd = 0x7f + bb.edx.r.l;
};
if (drive > maxhd)
return 0;
if (maxhd == 0) {
bb.intno = 0x13;
bb.eax.r.h = 0x08;
bb.edx.r.l = 0x80;
bios(&bb);
if (bb.flags.cf == 0)
maxhd = 0x7f + bb.edx.r.l;
};
if (drive > maxhd)
return 0;
#endif
bzero(dp, sizeof(struct driveInfo));
dp->biosdev = drive;
/* Check for El Torito no-emulation mode. */
dp->no_emulation = is_no_emulation(drive);
bzero(dp, sizeof(struct driveInfo));
dp->biosdev = drive;
/* Check for El Torito no-emulation mode. */
dp->no_emulation = is_no_emulation(drive);
/* Check drive for EBIOS support. */
bb.intno = 0x13;
bb.eax.r.h = 0x41;
bb.edx.r.l = drive;
bb.ebx.rr = 0x55aa;
bios(&bb);
if((bb.ebx.rr == 0xaa55) && (bb.flags.cf == 0)) {
/* Get flags for supported operations. */
dp->uses_ebios = bb.ecx.r.l;
}
if (dp->uses_ebios & (EBIOS_ENHANCED_DRIVE_INFO | EBIOS_LOCKING_ACCESS | EBIOS_FIXED_DISK_ACCESS)) {
/* Get EBIOS drive info. */
static struct drive_params params;
params.buf_size = sizeof(params);
bb.intno = 0x13;
bb.eax.r.h = 0x48;
bb.edx.r.l = drive;
bb.esi.rr = NORMALIZED_OFFSET((unsigned)&params);
bb.ds = NORMALIZED_SEGMENT((unsigned)&params);
bios(&bb);
if(bb.flags.cf != 0 /* || params.phys_sectors < 2097152 */) {
dp->uses_ebios = 0;
di->params.buf_size = 1;
} else {
bcopy(&params, &di->params, sizeof(params));
if (drive >= BASE_HD_DRIVE &&
(dp->uses_ebios & EBIOS_ENHANCED_DRIVE_INFO) &&
di->params.buf_size >= 30 &&
!(di->params.dpte_offset == 0xFFFF && di->params.dpte_segment == 0xFFFF)) {
void *ptr = (void *)(di->params.dpte_offset + ((unsigned int)di->params.dpte_segment << 4));
bcopy(ptr, &di->dpte, sizeof(di->dpte));
}
/* Check drive for EBIOS support. */
bb.intno = 0x13;
bb.eax.r.h = 0x41;
bb.edx.r.l = drive;
bb.ebx.rr = 0x55aa;
bios(&bb);
if ((bb.ebx.rr == 0xaa55) && (bb.flags.cf == 0)) {
/* Get flags for supported operations. */
dp->uses_ebios = bb.ecx.r.l;
}
}
if (dp->uses_ebios & (EBIOS_ENHANCED_DRIVE_INFO | EBIOS_LOCKING_ACCESS | EBIOS_FIXED_DISK_ACCESS)) {
/* Get EBIOS drive info. */
static struct drive_params params;
params.buf_size = sizeof(params);
bb.intno = 0x13;
bb.eax.r.h = 0x48;
bb.edx.r.l = drive;
bb.esi.rr = NORMALIZED_OFFSET((unsigned)&params);
bb.ds = NORMALIZED_SEGMENT((unsigned)&params);
bios(&bb);
if (bb.flags.cf != 0 /* || params.phys_sectors < 2097152 */) {
dp->uses_ebios = 0;
di->params.buf_size = 1;
}
else
{
bcopy(&params, &di->params, sizeof(params));
if (drive >= BASE_HD_DRIVE &&
(dp->uses_ebios & EBIOS_ENHANCED_DRIVE_INFO) &&
di->params.buf_size >= 30 &&
!(di->params.dpte_offset == 0xFFFF && di->params.dpte_segment == 0xFFFF)) {
void *ptr = (void *)(di->params.dpte_offset + ((unsigned int)di->params.dpte_segment << 4));
bcopy(ptr, &di->dpte, sizeof(di->dpte));
}
}
}
/*
* zef: This code will fail on recent JMicron and Intel option ROMs
*/
// if (di->params.phys_heads == 0 || di->params.phys_spt == 0) {
///* Either it's not EBIOS, or EBIOS didn't tell us. */
//bb.intno = 0x13;
//bb.eax.r.h = 0x08;
//bb.edx.r.l = drive;
//bios(&bb);
//if (bb.flags.cf == 0 && bb.eax.r.h == 0) {
// unsigned long cyl;
// unsigned long sec;
// unsigned long hds;
//
// hds = bb.edx.r.h;
// sec = bb.ecx.r.l & 0x3F;
// if((dp->uses_ebios & EBIOS_ENHANCED_DRIVE_INFO) && (sec != 0)) {
//cyl = (di->params.phys_sectors / ((hds + 1) * sec)) - 1;
// }
// else {
//cyl = bb.ecx.r.h | ((bb.ecx.r.l & 0xC0) << 2);
// }
// di->params.phys_heads = hds;
// di->params.phys_spt = sec;
// di->params.phys_cyls = cyl;
//} else {
// ret = -1;
//if (di->params.phys_heads == 0 || di->params.phys_spt == 0) {
///* Either it's not EBIOS, or EBIOS didn't tell us. */
//bb.intno = 0x13;
//bb.eax.r.h = 0x08;
//bb.edx.r.l = drive;
//bios(&bb);
//if (bb.flags.cf == 0 && bb.eax.r.h == 0) {
//unsigned long cyl;
//unsigned long sec;
//unsigned long hds;
//
//hds = bb.edx.r.h;
//sec = bb.ecx.r.l & 0x3F;
//if ((dp->uses_ebios & EBIOS_ENHANCED_DRIVE_INFO) && (sec != 0)) {
//cyl = (di->params.phys_sectors / ((hds + 1) * sec)) - 1;
//} else {
//cyl = bb.ecx.r.h | ((bb.ecx.r.l & 0xC0) << 2);
//}
//di->params.phys_heads = hds;
//di->params.phys_spt = sec;
//di->params.phys_cyls = cyl;
//} else {
//ret = -1;
//}
//}
// }
if (dp->no_emulation) {
/* Some BIOSes give us erroneous EBIOS support information.
* Assume that if you're on a CD, then you can use
* EBIOS disk calls.
*/
dp->uses_ebios |= EBIOS_FIXED_DISK_ACCESS;
}
if (dp->no_emulation) {
/* Some BIOSes give us erroneous EBIOS support information.
* Assume that if you're on a CD, then you can use
* EBIOS disk calls.
*/
dp->uses_ebios |= EBIOS_FIXED_DISK_ACCESS;
}
#if DEBUG
print_drive_info(di);
printf("uses_ebios = 0x%x\n", dp->uses_ebios);
printf("result %d\n", ret);
printf("press a key->\n");getc();
print_drive_info(di);
printf("uses_ebios = 0x%x\n", dp->uses_ebios);
printf("result %d\n", ret);
printf("press a key->\n");getc();
#endif
if (ret == 0) {
dp->valid = 1;
}
return ret;
if (ret == 0) {
dp->valid = 1;
}
return ret;
}
int ebiosEjectMedia(int biosdev)
trunk/i386/libsaio/fake_efi.c
2222
2323
2424
25
25
2626
2727
2828
2929
3030
31
31
3232
3333
3434
35
35
3636
37
37
3838
3939
4040
......
4343
4444
4545
46
46
4747
4848
4949
......
5353
5454
5555
56
5756
5857
5958
......
6463
6564
6665
67
6866
6967
7068
......
140138
141139
142140
143
144
145
146
141
142
143
144
147145
148146
149147
......
152150
153151
154152
155
156153
157154
158155
......
410407
411408
412409
413
410
414411
415412
416413
417414
418
415
419416
420417
421418
......
438435
439436
440437
441
442438
443439
444440
445
446441
447442
448443
......
462457
463458
464459
465
466460
467461
468462
......
491485
492486
493487
494
495488
496489
497490
......
517510
518511
519512
520
521513
522514
523515
......
615607
616608
617609
618
619610
620611
621612
......
631622
632623
633624
634
635625
636626
637627
......
663653
664654
665655
666
667
668
669
656
657
658
670659
671660
672661
673662
674663
675664
676
677665
678666
679667
......
729717
730718
731719
732
733720
734721
735722
/*
* Modern Darwin kernels require some amount of EFI because Apple machines all
* have EFI. Modifying the kernel source to not require EFI is of course
* have EFI. Modifying the kernel source to not require EFI is of course
* possible but would have to be maintained as a separate patch because it is
* unlikely that Apple wishes to add legacy support to their kernel.
*
* As you can see from the Apple-supplied code in bootstruct.c, it seems that
* the intention was clearly to modify this booter to provide EFI-like structures
* to the kernel rather than modifying the kernel to handle non-EFI stuff. This
* to the kernel rather than modifying the kernel to handle non-EFI stuff. This
* makes a lot of sense from an engineering point of view as it means the kernel
* for the as yet unreleased EFI-only Macs could still be booted by the non-EFI
* DTK systems so long as the kernel checked to ensure the boot tables were
* filled in appropriately. Modern xnu requires a system table and a runtime
* filled in appropriately.Modern xnu requires a system table and a runtime
* services table and performs no checks whatsoever to ensure the pointers to
* these tables are non-NULL.Therefore, any modern xnu kernel will page fault
* these tables are non-NULL. Therefore, any modern xnu kernel will page fault
* early on in the boot process if the system table pointer is zero.
*
* Even before that happens, the tsc_init function in modern xnu requires the FSB
*
* As of this writing, the current implementation found here is good enough
* to make the currently available xnu kernel boot without modification on a
* system with an appropriate processor. With a minor source modification to
* system with an appropriate processor. With a minor source modification to
* the tsc_init function to remove the explicit check for Core or Core 2
* processors the kernel can be made to boot on other processors so long as
* the code can be executed by the processor and the machine contains the
/*==========================================================================
* Utility function to make a device tree string from an EFI_GUID
*/
static inline char * mallocStringForGuid(EFI_GUID const *pGuid)
{
char *string = malloc(37);
/*==========================================================================
* Function to map 32 bit physical address to 64 bit virtual address
*/
static uint64_t ptov64(uint32_t addr)
{
return ((uint64_t)addr | 0xFFFFFF8000000000ULL);
//Azi: crc32 done in place, on the cases were it wasn't.
/*static inline void fixupEfiSystemTableCRC32(EFI_SYSTEM_TABLE_64 *efiSystemTable)
{
efiSystemTable->Hdr.CRC32 = 0;
efiSystemTable->Hdr.CRC32 = crc32(0L, efiSystemTable, efiSystemTable->Hdr.HeaderSize);
}*/
{
efiSystemTable->Hdr.CRC32 = 0;
efiSystemTable->Hdr.CRC32 = crc32(0L, efiSystemTable, efiSystemTable->Hdr.HeaderSize);
}*/
/*
* What we do here is simply allocate a fake EFI system table and a fake EFI
* Because we build against modern headers with kBootArgsRevision 4 we
* also take care to set efiMode = 32.
*/
void setupEfiTables32(void)
{
// We use the fake_efi_pages struct so that we only need to do one kernel
#define EFI_ACPI_TABLE_GUID \
{ \
0xeb9d2d30, 0x2d88, 0x11d3, { 0x9a, 0x16, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
0xeb9d2d30, 0x2d88, 0x11d3, { 0x9a, 0x16, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
}
#define EFI_ACPI_20_TABLE_GUID \
{ \
0x8868e871, 0xe4f1, 0x11d3, { 0xbc, 0x22, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
0x8868e871, 0xe4f1, 0x11d3, { 0xbc, 0x22, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
}
EFI_GUID gEfiAcpiTableGuid = EFI_ACPI_TABLE_GUID;
static const char const MODEL_PROP[] = "Model";
static const char const BOARDID_PROP[] = "board-id";
/*
* Get an smbios option string option to convert to EFI_CHAR16 string
*/
static EFI_CHAR16* getSmbiosChar16(const char * key, size_t* len)
{
const char*src = getStringForKey(key, &bootInfo->smbiosConfig);
/*
* Get the SystemID from the bios dmi info
*/
staticEFI_CHAR8* getSmbiosUUID()
{
static EFI_CHAR8 uuid[UUID_LEN];
* return a binary UUID value from the overriden SystemID and SMUUID if found,
* or from the bios if not, or from a fixed value if no bios value is found
*/
static EFI_CHAR8* getSystemID()
{
// unable to determine UUID for host. Error: 35 fix
* Must be called AFTER setup Acpi because we need to take care of correct
* facp content to reflect in ioregs
*/
void setupSystemType()
{
Node *node = DT__FindNode("/", false);
/*
* Must be called AFTER getSmbios
*/
void setupBoardId()
{
Node *node;
/*
* Load the smbios.plist override config file if any
*/
static void setupSmbiosConfigFile(const char *filename)
{
chardirSpecSMBIOS[128] = "";
verbose("No SMBIOS replacement found.\n");
}
// get a chance to scan mem dynamically if user asks for it while having the config options loaded as well,
// as opposed to when it was in scan_platform(); also load the orig. smbios so that we can access dmi info without
// patching the smbios yet
// get a chance to scan mem dynamically if user asks for it while having the config options
// loaded as well, as opposed to when it was in scan_platform(); also load the orig. smbios
// so that we can access dmi info, without patching the smbios yet.
scan_mem();
}
/*
* Installs all the needed configuration table entries
*/
static void setupEfiConfigurationTable()
{
smbios_p = (EFI_PTR32)getSmbios(SMBIOS_PATCHED);
/*
* Entrypoint from boot.c
*/
void setupFakeEfi(void)
{
// Generate efi device strings
trunk/i386/libsaio/saio_internal.h
4747
4848
4949
50
50
5151
5252
5353
......
8181
8282
8383
84
84
8585
8686
8787
......
100100
101101
102102
103
103
104104
105
105
106106
107107
108108
......
127127
128128
129129
130
130
131131
132132
133133
......
168168
169169
170170
171
171
172172
173173
174174
extern int ebioswrite(int dev, long sec, int count);
extern int get_drive_info(int drive, struct driveInfo *dp);
extern int ebiosEjectMedia(int biosdev);
extern void bios_putchar(int ch);
extern void bios_putchar(int ch);
extern void putca(int ch, int attr, int repeat);
extern int getc(void);
extern void pause();
extern void finalizeBootStruct(void);
/* cache.c */
extern void CacheReset();
extern void CacheReset();
extern void CacheInit(CICell ih, long blockSize);
extern long CacheRead(CICell ih, char *buffer, long long offset,
long length, long cache);
extern void stop(const char *format, ...);
/* disk.c */
extern void rescanBIOSDevice(int biosdev);
extern void rescanBIOSDevice(int biosdev);
extern struct DiskBVMap* diskResetBootVolumes(int biosdev);
extern void diskFreeMap(struct DiskBVMap *map);
extern void diskFreeMap(struct DiskBVMap *map);
extern int testBiosread( int biosdev, unsigned long long secno );
extern BVRef diskScanBootVolumes(int biosdev, int *count);
extern void diskSeek(BVRef bvr, long long position);
u_int16_t *ucslen, u_int32_t bufsize, int byte_order );
/* load.c */
extern bool gHaveKernelCache;
extern bool gHaveKernelCache;
extern long ThinFatFile(void **binary, unsigned long *length);
extern long DecodeMachO(void *binary, entry_t *rentry, char **raddr, int *rsize);
extern int ParseXMLFile( char * buffer, TagPtr * dict );
/* sys.c */
extern BVRef getBootVolumeRef( const char * path, const char ** outPath );
extern BVRef getBootVolumeRef( const char * path, const char ** outPath );
extern long LoadVolumeFile(BVRef bvr, const char *fileSpec);
extern long LoadFile(const char *fileSpec);
extern long ReadFileAtOffset(const char * fileSpec, void *buffer, uint64_t offset, uint64_t length);
trunk/i386/boot2/Makefile
2323
2424
2525
26
26
2727
2828
2929
......
119119
120120
121121
122
123122
124
125
126
127123
128124
129125
130126
131127
132
133128
134129
135130
......
141136
142137
143138
144
139
145140
146141
147142
......
154149
155150
156151
157
152
158153
159154
160155
-fno-builtin -DSAIO_INTERNAL_USER -static $(OMIT_FRAME_POINTER_CFLAG) \
-mpreferred-stack-boundary=2 -fno-align-functions -fno-stack-protector \
-march=pentium4 -msse2 -mfpmath=sse -msoft-float -nostdinc -include $(SRCROOT)/autoconf.h
CPPFLAGS := $(CPPFLAGS) -nostdinc++ -include $(SRCROOT)/autoconf.h
DEFINES=
-final_output Symbols \
-macosx_version_min 10.6 \
-o $(OBJROOT)/Symbols_LINKER_ONLY.dylib
endif
@make embed_symbols# this is done in a sub process after boot.sys exists so the strings are populated correctly
@${RM} $(SYMROOT)/boot2.sys
@##size $(SYMROOT)/boot.sys
@ls -l $(SYMROOT)/boot
exit 1;\
fi)
embed_symbols:
ifeq (${CONFIG_MODULES}, y)
@echo ================= Embedding Symbols.dylib =================
@echo "\t[MACHOCONV] boot"
@$(SYMROOT)/machOconv $(SYMROOT)/boot.sys $(SYMROOT)/boot
$(SYMROOT)/vers.h:
@echo "#define I386BOOT_VERSION \"5.0.132\"" > $(SYMROOT)/vers.h
@echo "#define I386BOOT_BUILDDATE \"`date \"+%Y-%m-%d %H:%M:%S\"`\"" >> $(SYMROOT)/vers.h
trunk/i386/boot2/resume.c
106106
107107
108108
109
109
110110
111111
112112
......
126126
127127
128128
129
129
130130
131131
132132
133133
134134
135135
136
136
137137
138
138
139139
140
140
141141
142142
143143
......
146146
147147
148148
149
149
150150
151151
152
152
153153
154154
155155
......
157157
158158
159159
160
160
161161
162162
163163
164164
165165
166166
167
167
168168
169169
170170
171171
172
172
173173
174174
175175
......
197197
198198
199199
200
200
201201
202
202
203203
204204
205205
size = ReadFileAtOffset (image_filename, header, 0, sizeof(IOHibernateImageHeader));
printf("header read size %x\n", size);
imageSize = header->image1Size;
codeSize = header->restore1PageCount << 12;
if (kIOHibernateHeaderSignature != header->signature)
#if 0
{
uint32_t machineSignature;
size = GetProp(gChosenPH, kIOHibernateMachineSignatureKey,
size = GetProp(gChosenPH, kIOHibernateMachineSignatureKey,
(char *)&machineSignature, sizeof(machineSignature));
if (size != sizeof(machineSignature)) machineSignature = 0;
if (machineSignature != header->machineSignature)
break;
}
#endif
allocSize = imageSize + ((4095 + sizeof(hibernate_graphics_t)) & ~4095);
mem_base = getmemorylimit() - allocSize;//TODO: lower this
printf("mem_base %x\n", mem_base);
// Rek : hibernate fix
if (!((long long)mem_base+allocSize<1024*bootInfo->extmem+0x100000))
getc ();
return;
}
bcopy(header, (void *) mem_base, sizeof(IOHibernateImageHeader));
header = (IOHibernateImageHeader *) mem_base;
imageSize -= sizeof(IOHibernateImageHeader);
buffer = (long)(header + 1);
{
uint64_t preview_offset = header->fileExtentMapSize - sizeof(header->fileExtentMap) + codeSize;
uint8_t progressSaveUnder[kIOHibernateProgressCount][kIOHibernateProgressSaveUnderSize];
ReadFileAtOffset (image_filename, (char *)buffer, sizeof(IOHibernateImageHeader), preview_offset+header->previewSize);
drawPreview ((void *)(long)(buffer+preview_offset + header->previewPageListSize), &(progressSaveUnder[0][0]));
previewTotalSectors = (imageSize-(preview_offset+header->previewSize))/512;
previewLoadedSectors = 0;
previewSaveunder = &(progressSaveUnder[0][0]);
if (preview_offset+header->previewSize<imageSize)
ReadFileAtOffset (image_filename, (char *)(long)(buffer+preview_offset+header->previewSize),
ReadFileAtOffset (image_filename, (char *)(long)(buffer+preview_offset+header->previewSize),
sizeof(IOHibernateImageHeader)+preview_offset+header->previewSize,
imageSize-(preview_offset+header->previewSize));
previewTotalSectors = 0;
previewLoadedSectors = 0;
previewSaveunder = 0;
previewSaveunder = 0;
#if 0
AsereBLN:
check_vga_nvidia() didn't work as expected (recursion level > 0 & return value).
&cryptvars->ctx.decrypt);
// set the vector for the following decryptions
bcopy(((uint8_t *) header) + header->image1Size - AES_BLOCK_SIZE,
bcopy(((uint8_t *) header) + header->image1Size - AES_BLOCK_SIZE,
&cryptvars->aes_iv[0], AES_BLOCK_SIZE);
// decrypt the buffer
uint32_t len = (uint32_t)(header->image1Size - header->encryptStart);
aes_decrypt_cbc(((uint8_t *) header) + header->encryptStart,
trunk/i386/boot2/boot.c
134134
135135
136136
137
138
139
140
137
138
139
140
141141
142
143
144
145
146
147
148
149
150
151
152
153
142
143
144
145
146
147
148
149
150
151
152
153
154154
155155
156156
157
158
157
158
159159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179179
180
181
182
183
184
185
186
180
181
182
183
184
185
186
187187
188188
189189
190190
191
191
192192
193
194193
195194
196
197
198
199
200
201
202
203
195
196
197
204198
199
200
201
202
203
205204
206205
207
206
208207
209208
210209
211210
212
213
211
212
214213
215214
216215
......
221220
222221
223222
224
225
226
227
228
229
223
224
225
230226
231227
232228
......
495491
496492
497493
498
499
500
501
502
503
494
495
496
497
498
499
500
501
502
503
504504
505505
506506
......
602602
603603
604604
605
605
606606
607607
608608
......
622622
623623
624624
625
625
626626
627627
628628
......
630630
631631
632632
633
634
635633
636634
637635
......
658656
659657
660658
661
662
663
659
660
661
664662
665663
666664
667
665
668666
669667
670668
static int ExecKernel(void *binary)
{
entry_t kernelEntry;
int ret;
bootArgs->kaddr = bootArgs->ksize = 0;
entry_t kernelEntry;
int ret;
bootArgs->kaddr = bootArgs->ksize = 0;
execute_hook("ExecKernel", (void*)binary, NULL, NULL, NULL);
ret = DecodeKernel(binary,
&kernelEntry,
(char **) &bootArgs->kaddr,
(int *)&bootArgs->ksize );
if ( ret != 0 )
return ret;
// Reserve space for boot args
reserveKernBootStruct();
ret = DecodeKernel(binary,
&kernelEntry,
(char **) &bootArgs->kaddr,
(int *)&bootArgs->ksize );
if ( ret != 0 )
return ret;
// Reserve space for boot args
reserveKernBootStruct();
// Notify modules that the kernel has been decoded
execute_hook("DecodedKernel", (void*)binary, NULL, NULL, NULL);
// Load boot drivers from the specifed root path.
if (!gHaveKernelCache)
// Load boot drivers from the specifed root path.
if (!gHaveKernelCache)
LoadDrivers("/");
clearActivityIndicator();
if (gErrors) {
printf("Errors encountered while starting up the computer.\n");
printf("Pausing %d seconds...\n", kBootErrorTimeout);
sleep(kBootErrorTimeout);
}
setupFakeEfi();
md0Ramdisk();
verbose("Starting Darwin %s\n",( archCpuType == CPU_TYPE_I386 ) ? "x86" : "x86_64");
// Cleanup the PXE base code.
if ( (gBootFileType == kNetworkDeviceType) && gUnloadPXEOnExit ) {
clearActivityIndicator();
if (gErrors) {
printf("Errors encountered while starting up the computer.\n");
printf("Pausing %d seconds...\n", kBootErrorTimeout);
sleep(kBootErrorTimeout);
}
setupFakeEfi();
md0Ramdisk();
verbose("Starting Darwin %s\n",( archCpuType == CPU_TYPE_I386 ) ? "x86" : "x86_64");
// Cleanup the PXE base code.
if ( (gBootFileType == kNetworkDeviceType) && gUnloadPXEOnExit ) {
if ( (ret = nbpUnloadBaseCode()) != nbpStatusSuccess )
{
printf("nbpUnloadBaseCode error %d\n", (int) ret);
sleep(2);
}
}
bool dummyVal;
{
printf("nbpUnloadBaseCode error %d\n", (int) ret);
sleep(2);
}
}
bool dummyVal;
if (getBoolForKey(kWaitForKeypressKey, &dummyVal, &bootInfo->bootConfig) && dummyVal) {
printf("Press any key to continue...");
getc();
}
usb_loop();
execute_hook("Kernel Start", (void*)kernelEntry, (void*)bootArgs, NULL, NULL);// Notify modules that the kernel is about to be started
// If we were in text mode, switch to graphics mode.
// This will draw the boot graphics unless we are in
// verbose mode.
if(gVerboseMode)
setVideoMode( GRAPHICS_MODE, 0 );
else
drawBootGraphics();
// If we were in text mode, switch to graphics mode.
// This will draw the boot graphics unless we are in
// verbose mode.
if(gVerboseMode)
setVideoMode( GRAPHICS_MODE, 0 );
else
drawBootGraphics();
setupBooterLog();
finalizeBootStruct();
finalizeBootStruct();
if (checkOSVersion("10.7")) {
// Masking out so that Lion doesn't doublefault
outb(0x21, 0xff); /* Maskout all interrupts Pic1 */
outb(0xa1, 0xff); /* Maskout all interrupts Pic2 */
outb(0x21, 0xff);/* Maskout all interrupts Pic1 */
outb(0xa1, 0xff);/* Maskout all interrupts Pic2 */
// Jump to kernel's entry point. There's no going back now.
startprog( kernelEntry, bootArgsPreLion );
}
// Not reached
return 0;
// Not reached
return 0;
}
//==========================================================================
else if (checkOSVersion("10.6")) {
sprintf(gBootKernelCacheFile, "kernelcache_%s", (archCpuType == CPU_TYPE_I386) ? "i386" : "x86_64");
int lnam = sizeof(gBootKernelCacheFile) + 9; //with adler32
//Slice - TODO
/*
- but the name is longer .adler32 and more...
kernelcache_i386.E102928C.qSs0
so will opendir and scan for some files
*/
//Slice - TODO ???
// e.g. kernelcache_i386.E102928C.qSs0 = "unsaved" cache file.
//
// See kext_tools-180.2.1/kextcache_main.c:
// "Source directory has changed since starting; "
// "not saving cache file %s."
// or
// "Source kernel has changed since starting; "
// "not saving cache file %s."
char* name;
long prev_time = 0;
ret = GetFileInfo(NULL, bootFileSpec, &flags, &time);
if (ret == -1)
{
// Not found any alternate locations, using the original kernel image path.
// No alternate location found, using the original kernel image path.
strcpy(bootFileSpec, bootFile);
}
}
else ret = 1;
}
else {
//Snow leopard or older
//Snow Leopard or older
verbose("Loading kernel %s\n", bootFileSpec);
ret = LoadThinFatFile(bootFileSpec, &binary);
if (ret <= 0 && archCpuType == CPU_TYPE_X86_64) {
ret = LoadThinFatFile(bootFileSpec, &binary);
}
}
} while (0);
clearActivityIndicator();
// chainboot
if (status==1) {
if (getVideoMode() == GRAPHICS_MODE) {// if we are already in graphics-mode,
setVideoMode(VGA_TEXT_MODE, 0);// switch back to text mode
}
if (getVideoMode() == GRAPHICS_MODE) {// if we are already in graphics-mode,
setVideoMode(VGA_TEXT_MODE, 0);// switch back to text mode
}
}
if ((gBootFileType == kNetworkDeviceType) && gUnloadPXEOnExit) {
nbpUnloadBaseCode();
nbpUnloadBaseCode();
}
}
trunk/i386/boot2/boot.h
109109
110110
111111
112
112
113113
114114
115115
......
170170
171171
172172
173
174
175
176
173
174
175
176
177177
178
179
180
178
179
180
181181
182182
183183
#define kDefaultPartition"Default Partition"/* sys.c */
#define kMD0Image"md0"/* ramdisk.h */
#define kbusratio"busratio"/* cpu.c */
#define kbusratio"busratio"/* cpu.c */
/*
* Flags to the booter or kernel
extern void spinActivityIndicator();
extern void clearActivityIndicator();
extern void drawColorRectangle( unsigned short x,
unsigned short y,
unsigned short width,
unsigned short height,
unsigned char colorIndex );
unsigned short y,
unsigned short width,
unsigned short height,
unsigned char colorIndex );
extern void drawDataRectangle( unsigned short x,
unsigned short y,
unsigned short width,
unsigned short height,
unsigned short y,
unsigned short width,
unsigned short height,
unsigned char * data );
extern int
convertImage( unsigned short width,
trunk/i386/boot2/gui.c
168168
169169
170170
171
171
172
172173
173174
174175
......
189190
190191
191192
192
193
194
193
194
195
195196
196197
197
198
198199
199
200
200201
201202
202203
......
208209
209210
210211
211
212
212213
213214
214215
......
10331034
10341035
10351036
1036
1037
10371038
10381039
10391040
static bool infoMenuNativeBoot = false;
static unsigned long screen_params[4] = {DEFAULT_SCREEN_WIDTH, DEFAULT_SCREEN_HEIGHT, 32, 0};// here we store the used screen resolution
// here we store the used screen resolution
static unsigned long screen_params[4] = {DEFAULT_SCREEN_WIDTH, DEFAULT_SCREEN_HEIGHT, 32, 0};
static int getImageIndexByName(const char *name)
{
int compareIndex = (upperLimit - lowerLimit) >> 1; // Midpoint
int result;
// NOTE: This algorithm assumes that the embeddedImages is sorted.
// This is currently done using the make file. If the array is every
// manualy generated, this *will* fail to work properly.
// NOTE: This algorithm assumes that the embedded images are sorted.
// This is currently done using the make file. If the array is
// generated manualy, this *will* fail to work properly.
while((result = strcmp(name, embeddedImages[compareIndex].name)) != 0)
{
if(result > 0)// We need to search a HIGHER index
if (result > 0)// We need to search a HIGHER index
{
if(compareIndex != lowerLimit)
if (compareIndex != lowerLimit)
{
lowerLimit = compareIndex;
}
}
else // We Need to search a LOWER index
{
if(compareIndex != upperLimit)
if (compareIndex != upperLimit)
{
upperLimit = compareIndex;
}
};
static int
sputc(int c, struct putc_info * pi)
sputc(int c, struct putc_info * pi) //Azi: exists on console.c & printf.c
{
if (pi->last_str)
if (pi->str == pi->last_str) {
trunk/i386/config/Makefile
4747
4848
4949
50
50
5151
5252
5353
config: $(DIRS_NEEDED) $(SYMPROG)
@cd ${SRCROOT} && $(SYMPROG) $(SRCROOT)/Cconfig
rebuild_config: $(DIRS_NEEDED) $(SYMPROG)
@cd ${SRCROOT} && $(SYMPROG) $(SRCROOT)/Cconfig rebuild
trunk/i386/doc/README
2020
2121
2222
23
23
2424
2525
2626
......
5151
5252
5353
54
54
5555
5656
5757
......
6262
6363
6464
65
65
6666
6767
6868
For DOS compatibility reason, one extra stage of boot is required if
the boot device is a hard disk. The first sector of the hard disk will
contain the MOS-DOS boot code and a boot record partition table.
contain the MS-DOS boot code and a boot record partition table.
When this sector is loaded into 0000:7C00H, it will relocate itself
to somewhere else and then load the first sector of the active
partition into 0000:7C00H. Both UNIX and DOS use the command "fdisk"
stage bootstrap loader "boot2()". In order to be able to load the
big kernel image (bigger than 512K or 640K, depends on the memory
configuration), the second stage boot loader will run on the protected
mode. This bootstarp loader does not have any stand alone device
mode. This bootstrap loader does not have any stand alone device
drivers, all the I/O's are through the BIOS calls. Since the first
stage boot code will no longer be used at this moment, the memory
location of the first stage boot code (0000:1000H to 0000:1200H) will
and boot data segments must not be greater than 64K.
The boot loader loads the kernel image at memory location above 1 MB
to skip the memory hole between 521K/640K and 1MB. After the kernel
to skip the memory hole between 512K/640K and 1MB. After the kernel
is loaded, the boot loader stores the information in the stack and
then passes control to kernel. Currently, the three information passed
from the boot loader to the kernel are type of the boot device, size
trunk/i386/modules/Makefile
3737
3838
3939
40
40
4141
4242
4343
44
44
4545
4646
4747
......
5858
5959
6060
61
62
61
62
6363
6464
6565
6666
6767
68
68
6969
7070
7171
"RC_CFLAGS=$(RC_CFLAGS)" $@ \
) || exit $$?; \
done
@# Finish up boot_modules.c
@echo "}" >> $(SYMROOT)/boot_modules.c
else
all: $(SYMROOT) $(OBJROOT) objroot_dirs $(SYMROOT)/boot_modules.c $(SYMROOT)/boot_modules.h
@# Finish up boot_modules.c
@mkdir module_includes
@rm -rf "$(SYMROOT)/modules/"
@mkdir "$(SYMROOT)/modules/"
$(SYMROOT)/boot_modules.c: ${OBJROOT} ${SYMROOT}/modules/ ${OBJROOT} $(addprefix $(OBJROOT)/, ${MODULE_OBJS})
@echo "// Autogenerated - do not modify" > $@
@echo "#include <modules.h>" >> $@
@echo "#include \"boot_modules.h\"" >> $@
@echo "void start_built_in_modules() {" >> $@
$(SYMROOT)/boot_modules.h: ${OBJROOT} ${SYMROOT}/modules/ ${OBJROOT} $(addprefix $(OBJROOT)/, ${MODULE_OBJS})
@echo "// Autogenerated - do not modify" > $@
@echo "void start_built_in_modules(); " > $@
trunk/i386/cdboot/Makefile
66
77
88
9
9
1010
1111
1212
IMGROOT = $(SRCROOT)/sym/cache
IMGSKELROOT = $(SRCROOT)/imgskel
CDBOOT = ${IMGROOT}/usr/standalone/i386/cdboot
DIR = cdboot
include ${SRCROOT}/Make.rules
trunk/i386/libsa/printf.c
3434
3535
3636
37
37
3838
3939
4040
};
static int
sputc(int c, struct putc_info * pi)
sputc(int c, struct putc_info * pi) //Azi: exists on console.c & gui.c
{
if (pi->last_str)
if (pi->str == pi->last_str) {
trunk/i386/libsa/Makefile
1717
1818
1919
20
20
2121
2222
2323
-mpreferred-stack-boundary=2 -fno-align-functions -fno-stack-protector \
-march=pentium4 -msse2 -mfpmath=sse -msoft-float \
-nostdinc -include $(SRCROOT)/autoconf.h
CPPFLAGS := $(CPPFLAGS) -nostdinc++
INC = -I. -I$(SYMROOT) -I$(LIBSAIODIR) -I${SRCROOT}/i386/include
trunk/TODO
11
22
3
3
4
5
6
7
8
49
510
611
712
8
13
14
915
1016
17
1118
1219
13
14
15
16
20
21
22
23
24
25
1726
1827
1928
20
21
22
23
29
30
31
32
33
2434
25
26
35
36
2737
38
2839
29
40
3041
3142
3243
......
6879
6980
7081
71
82
7283
TODO List for Chameleon Boot Loader
====================================
- Create a dummy module for any modules that are compiled in. This is needed for linking modules with dependencies that are not compiled in.
- Bring code closer to coding_standards.txt:
- will change spaces to tabs! If someone opposes to this, please come forward :)
- Create a dummy module for any modules that are compiled in. This is needed for linking modules with
dependencies that are not compiled in.
- Fix the module system when booting chameleon with multiboot. Cleanup the xcode 4 fix.
- Integrate Prasys current work on options and quick shortcut modified version of 18seven
- Add autodetection of efistring algorythm to enabke graphics enabler to beanbled by default while not conflicting whith other efi string overriden content
- Add auto detection of efi string algorithm, so graphics enabler can be enabled by default while not
conflicting with other efi string overridden content
(original idea of Galaxy)
Azi: done?
- Add a more sophisticated acpi loading mechanism to enable loading custom acpi tables when dsdtdrop=y
Here's a specification to think about:
First we must care about if a forced DSDT full path has been specified (was the pb smith had in
his first tries) and take it for the DSDT path as is.
Then we have the case where no DSDT path was set where we run our usual DSDT search algorithm to find this file.
In the latter case, the file has to be named DSDT.aml and be in one of the / /Extra or bt(0,0)/Extra directory.
First we must care about if a forced DSDT full path has been specified
(was what pb smith had in his first tries) and take it for the DSDT path as is.
Then we have the case where no DSDT path was set where we run our usual DSDT search algorithm to
find this file.
In the latter case, the file has to be named DSDT.aml and be in one of the / /Extra or bt(0,0)/Extra
directory.
Now a first idea to implement correctly the acpi tables loading would be:
Whatever the path was hardcoded in the DSDT option or was automatically found, we extract the path part of
the DSDT file that has been successfully found and we run a loop to enumerate all other acpi files in the same directory.
Now for each acpi file found, we should compare the name with an existing acpi table found in the system that
we would normally load and replace this usual injection by the content of the file.
Whether the path was hardcoded in the DSDT option or was automatically found, we extract the path part
of the DSDT file that has been successfully found and we run a loop to enumerate all other acpi
files in the same directory.
Now for each acpi file found, we should compare the name with an existing acpi table found in
the system that we would normally load and replace this usual injection by the content of the file.
Once DropDSDT=y is set, no other acpi table than dsdt is loaded, then it is the responsability of user
to provide any other acpi table.
Once DropDSDT=y is set, no other acpi table than dsdt is loaded, then it is the responsibility of the
user to provide any other acpi table.
Azi: done?
- Add a new module capable of writing proprietary Chameleon data to ioreg:
Using the DT__xxx() API, we will creat e a set of functions to write
Using the DT__xxx() API, we will create a set of functions to write
to log info, chameleon boot info to be retrieved by helper applications...
the only public function for log info purpose of this module would be:
logMessageToIOREG(...); // var args printf style format
getc();
}
- Case unsensitive parsing for the bootConfig options:
- Case insensitive parsing for the bootConfig options:
should help the common/novice user to setup more easily.
trunk/CHANGES
11
22
3
3
4
45
56
67
......
2728
2829
2930
30
31
3132
3233
3334
3435
35
36
3637
3738
3839
......
4142
4243
4344
44
45
4546
4647
4748
48
49
50
4951
5052
5153
5254
5355
5456
55
57
5658
5759
5860
- Modules can now be selected between not compiled, compiled into chameleon, or compiled as modules.
- New makefile + configuration system.
- Added the BOOT2_MAX_LENGTH constant in memory.h. This is now used in mboot.c to relocate the correct number of bytes for boot2.
- Added the BOOT2_MAX_LENGTH constant in memory.h. This is now used in mboot.c to relocate the correct
number of bytes for boot2.
- Added new ATi/AMD Graphics Card Enabler.
- Added new SMBIOS patcher.
- Added module system.
- Optimized cursor spinout in textmode if no verbose mode is set
- Added ram table structures definitions
- Added getSmbios() a param permitting to select between orig and new smbios entries
- Changed "Default Partition" behavior to accept only native system volumes or foreign partitions.
- Changed "Default Partition" behaviour to accept only native system volumes or foreign partitions.
- Added NVIDIA new NVCAP customization support and support for ION gfx cards from aserebln
- Added ATI new framebuffers support and new cards from PCEFI10.6
- improved ACPI file search algo by implementing a cache.
- Nvidia injection fix
- pciroot would not always return correct uid in autodection mode
- pciroot would not always return correct UID in autodection mode
- Fixed the hibernation problem in boot2/resume.c
- Fixed all new booter versions with SystemType would override the facp value even if correct,
now keeps the facp value if correct and no override has been done, implemented a best effort algo.
conversions api, to be completed by function that we should reuse.
- Fixed SystemType would be always forced to a value, now optionally changed
only if overriden
only if overridden
- Kept SystemID as the only option to change manually the system-id
For theses reasons, SystemId from bootConfig and SMUUID from smbiosConfig are now DEPRECATED.
- Integrated JrCs fadt patch (kept for RC5 the existing DSDT.aml retry algo that disappeared in his patch, should be more discussed for RC6)
- Integrated JrCs fadt patch (kept for RC5 the existing DSDT.aml retry algo that disappeared in his patch,
should be more discussed for RC6)
- Added JrCs modified convention name change to coding_standards
- Now malloc (ex. MALLOC in Asere patch) is renamed malloc(size) and is an alias
to safe_malloc(size, file, line) with _FILE_ and _LINE_ preprocessor definitions
- Added a new 'Rename Partition Feature', now permitting to rename partition
like 'System reserved' to a more meaningful name
- Added SystemID option permitting to change the System UUID to a fixed value.
- Added the PciRoot autodetection feature imported from pcefi10.5
- Added the PciRoot auto detection feature imported from pcefi10.5
- Added automatic "system-id" injection from dmi bios, also compatible
with SystemID boot option and former SMUUID from smbios,plist
- Added "system-type' automatic injection (1=Desktop) plus override possibility
trunk/Makefile
4848
4949
5050
51
5251
52
5353
5454
5555
"JAPANESE=$(JAPANESE)" \
"RC_CFLAGS=$$XCFLAGS" $@ \
) || exit $$?; \
all: $(SYMROOT) $(OBJROOT) $(SRCROOT)/auto.conf $(SRCROOT)/autoconf.h $(SRCROOT)/autoconf.inc $(SRCROOT)/.config
@if [ -e ".svn" ]; then svnversion -n | tr -d [:alpha:] > revision; fi
@if [ -z "$(RC_ARCHS)" ]; then \

Archive Download the corresponding diff file

Revision: 897