Index: branches/chucko/i386/libsaio/nvidia.c =================================================================== --- branches/chucko/i386/libsaio/nvidia.c (revision 2442) +++ branches/chucko/i386/libsaio/nvidia.c (revision 2443) @@ -1478,10 +1478,14 @@ static int patch_nvidia_rom(uint8_t *rom) { - if (!rom || (rom[0] != 0x55 && rom[1] != 0xaa)) { - printf("False ROM signature: 0x%02x%02x\n", rom[0], rom[1]); - return PATCH_ROM_FAILED; - } + if (!rom) { + printf("ROM not found\n"); + return PATCH_ROM_FAILED; + } + if (rom[0] != 0x55 && rom[1] != 0xaa) { + printf("False ROM signature: 0x%02x%02x\n", rom[0], rom[1]); + return PATCH_ROM_FAILED; + } uint16_t dcbptr = READ_LE_SHORT(rom, 0x36); @@ -1705,7 +1709,6 @@ for (i = 0; i < (sizeof(nvidia_card_exceptions) / sizeof(nvidia_card_exceptions[0])); i++) { if ((nvidia_card_exceptions[i].device == device_id) && (nvidia_card_exceptions[i].subdev == subsys_id)) { return nvidia_card_exceptions[i].name; - break; } } } @@ -1880,7 +1883,6 @@ option_rom_pci_header_t *rom_pci_header; volatile uint8_t *regs; uint8_t *rom = NULL; - uint8_t *nvRom; uint8_t nvCardType = 0; unsigned long long videoRam = 0; uint32_t nvBiosOveride; @@ -1925,6 +1927,7 @@ return false; } } else { + uint8_t *nvRom; rom = malloc(NVIDIA_ROM_SIZE); // Otherwise read bios from card nvBiosOveride = 0; @@ -1932,6 +1935,7 @@ // PROM first // Enable PROM access (REG32(NV_PBUS_PCI_NV_20)) = NV_PBUS_PCI_NV_20_ROM_SHADOW_DISABLED; + nvRom = (uint8_t*)®s[NV_PROM_OFFSET]; // Valid Signature ? @@ -1967,7 +1971,7 @@ if ((nvPatch = patch_nvidia_rom(rom)) == PATCH_ROM_FAILED) { printf("ERROR: nVidia ROM Patching Failed!\n"); free(rom); - //return false; + return false; } rom_pci_header = (option_rom_pci_header_t*)(rom + *(uint16_t *)&rom[24]);