Index: trunk/i386/libsaio/smbios_getters.h =================================================================== --- trunk/i386/libsaio/smbios_getters.h (revision 2858) +++ trunk/i386/libsaio/smbios_getters.h (revision 2859) @@ -33,7 +33,8 @@ extern bool getProcessorInformationExternalClock(returnType *value); extern bool getProcessorInformationMaximumClock(returnType *value); extern bool getSMBOemProcessorBusSpeed(returnType *value); -//extern bool getSMBOemPlatformFeature(returnType *value); +extern bool getSMBOemPlatformFeature(returnType *value); +//external bool getSMBOemSMCVersion(returnType *value); extern bool getSMBOemProcessorType(returnType *value); extern bool getSMBMemoryDeviceMemoryType(returnType *value); extern bool getSMBMemoryDeviceMemoryErrorHandle(returnType *value); Index: trunk/i386/libsaio/console.c =================================================================== --- trunk/i386/libsaio/console.c (revision 2858) +++ trunk/i386/libsaio/console.c (revision 2859) @@ -207,11 +207,6 @@ int getchar() { register int c = getc(); - -// if ( c == '\r' ) c = '\n'; - -// if ( c >= ' ' && c < 0x7f) putchar(c); - return (c); } @@ -228,24 +223,6 @@ { vprf(fmt, ap); } -/* - { - // Kabyl: BooterLog - struct putc_info pi; - - if (!msgbuf) { - return 0; - } - - if (((cursor - msgbuf) > (BOOTER_LOG_SIZE - SAFE_LOG_SIZE))) { - return 0; - } - pi.str = cursor; - pi.last_str = 0; - prf(fmt, ap, sputc, &pi); - cursor += strlen((char *)cursor); - } -*/ va_end(ap); return 0; } Index: trunk/i386/libsaio/bootargs.h =================================================================== --- trunk/i386/libsaio/bootargs.h (revision 2858) +++ trunk/i386/libsaio/bootargs.h (revision 2859) @@ -148,6 +148,7 @@ #define CSR_ALLOW_UNRESTRICTED_DTRACE (1 << 5) /* Allow unrestricted dtrace */ #define CSR_ALLOW_UNRESTRICTED_NVRAM (1 << 6) /* Allow unrestricted NVRAM */ #define CSR_ALLOW_DEVICE_CONFIGURATION (1 << 7) /* Allow device configuration */ +#define CSR_DISABLE_BASESYSTEM_VERIFICATION (1 << 8) #define CSR_VALID_FLAGS (CSR_ALLOW_UNTRUSTED_KEXTS | \ CSR_ALLOW_UNRESTRICTED_FS | \ @@ -156,7 +157,8 @@ CSR_ALLOW_APPLE_INTERNAL | \ CSR_ALLOW_UNRESTRICTED_DTRACE | \ CSR_ALLOW_UNRESTRICTED_NVRAM | \ - CSR_ALLOW_DEVICE_CONFIGURATION) + CSR_ALLOW_DEVICE_CONFIGURATION | \ + CSR_DISABLE_BASESYSTEM_VERIFICATION) typedef struct boot_args { Index: trunk/i386/libsaio/spd.c =================================================================== --- trunk/i386/libsaio/spd.c (revision 2858) +++ trunk/i386/libsaio/spd.c (revision 2859) @@ -61,11 +61,13 @@ #define rdtsc(low,high) \ __asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high)) +// Intel SMB reg offsets #define SMBHSTSTS 0 #define SMBHSTCNT 2 #define SMBHSTCMD 3 #define SMBHSTADD 4 #define SMBHSTDAT 5 +#define SMBHSTDAT1 6 #define SBMBLKDAT 7 int spd_indexes[] = { Index: trunk/i386/libsaio/hda.c =================================================================== --- trunk/i386/libsaio/hda.c (revision 2858) +++ trunk/i386/libsaio/hda.c (revision 2859) @@ -113,6 +113,7 @@ { HDA_INTEL_HSW2, "Haswell" /*, 0, 0 */ }, { HDA_INTEL_HSW3, "Haswell" /*, 0, 0 */ }, { HDA_INTEL_BDW, "Broadwell" /*, 0, 0 */ }, + { HDA_INTEL_BROXTON_T, "Broxton-T" /*, 0, 0 */ }, { HDA_INTEL_CPT, "Cougar Point" /*, 0, 0 */ }, { HDA_INTEL_PATSBURG, "Patsburg" /*, 0, 0 */ }, { HDA_INTEL_PPT1, "Panther Point" /*, 0, 0 */ }, @@ -127,6 +128,7 @@ { HDA_INTEL_82801JD, "82801JD" /*, 0, 0 */ }, { HDA_INTEL_PCH, "5 Series/3400 Series" /*, 0, 0 */ }, { HDA_INTEL_PCH2, "5 Series/3400 Series" /*, 0, 0 */ }, + { HDA_INTEL_BROXTON_P, "Apollolake" /*, 0, 0 */ }, // Broxton-P { HDA_INTEL_SCH, "SCH" /*, 0, 0 */ }, { HDA_INTEL_LPT1, "Lynx Point" /*, 0, 0 */ }, { HDA_INTEL_LPT2, "Lynx Point" /*, 0, 0 */ }, @@ -137,7 +139,12 @@ { HDA_INTEL_LPTLP1, "Lynx Point-LP" /*, 0, 0 */ }, { HDA_INTEL_LPTLP2, "Lynx Point-LP" /*, 0, 0 */ }, { HDA_INTEL_SRSPLP, "Sunrise Point-LP" /*, 0, 0 */ }, + { HDA_INTEL_KABYLAKE_LP, "Kabylake-LP" /*, 0, 0 */ }, // Kabylake-LP { HDA_INTEL_SRSP, "Sunrise Point" /*, 0, 0 */ }, + { HDA_INTEL_KABYLAKE, "Kabylake" /*, 0, 0 */ }, // Kabylake + { HDA_INTEL_LEWISBURG1, "Lewisburg" /*, 0, 0 */ }, // Lewisburg + { HDA_INTEL_LEWISBURG2, "Lewisburg" /*, 0, 0 */ }, // Lewisburg + { HDA_INTEL_UNPT, "Union Point" /*, 0, 0 */ }, // Kabylake-H //10de NVIDIA Corporation { HDA_NVIDIA_MCP51, "MCP51" /*, 0, HDAC_QUIRK_MSI */ }, @@ -328,6 +335,7 @@ { HDA_CODEC_ALC898, 0, "ALC898" }, // { HDA_CODEC_ALC899, 0, "ALC899" }, { HDA_CODEC_ALC900, 0, "ALC1150" }, + { HDA_CODEC_ALCS1220A, 0, "ALCS1220A" }, { HDA_CODEC_ALC1220, 0, "ALC1220" }, { HDA_CODEC_AD1882, 0, "AD1882" }, @@ -349,12 +357,12 @@ { HDA_CODEC_AD1989B, 0x0300, "AD2000B" }, // Revision Id: 0x100300 { HDA_CODEC_AD1989B, 0, "AD1989B" }, - { HDA_CODEC_XFIEA, 0, "Creative X-Fi Extreme A" }, - { HDA_CODEC_XFIED, 0, "Creative X-Fi Extreme D" }, - { HDA_CODEC_CA0132, 0, "Creative CA0132" }, - { HDA_CODEC_SB0880, 0, "Creative SB0880 X-Fi" }, - { HDA_CODEC_CMI9880, 0, "CMedia CMI9880" }, - { HDA_CODEC_CMI98802, 0, "CMedia CMI9880" }, + { HDA_CODEC_XFIEA, 0, "X-Fi Extreme A" }, + { HDA_CODEC_XFIED, 0, "X-Fi Extreme D" }, + { HDA_CODEC_CA0132, 0, "CA0132" }, + { HDA_CODEC_SB0880, 0, "SB0880 X-Fi" }, + { HDA_CODEC_CMI9880, 0, "CMI9880" }, + { HDA_CODEC_CMI98802, 0, "CMI9880" }, { HDA_CODEC_CXD9872RDK, 0, "CXD9872RD/K" }, { HDA_CODEC_CXD9872AKD, 0, "CXD9872AKD" }, @@ -571,6 +579,8 @@ { HDA_CODEC_INTELLLP, 0, "Haswell" }, { HDA_CODEC_INTELBRW, 0, "Broadwell" }, { HDA_CODEC_INTELSKL, 0, "Skylake" }, + { HDA_CODEC_INTELBRO, 0, "Broxton" }, + { HDA_CODEC_INTELKAB, 0, "Kabylake" }, { HDA_CODEC_INTELCDT, 0, "CedarTrail" }, { HDA_CODEC_INTELVLV, 0, "Valleyview2" }, { HDA_CODEC_INTELBSW, 0, "Braswell" }, @@ -590,6 +600,9 @@ { HDA_CODEC_CSXXXX, 0, "Cirrus Logic" }, { HDA_CODEC_CXXXXX, 0, "Conexant" }, { HDA_CODEC_CHXXXX, 0, "Chrontel" }, +// { HDA_CODEC_LGXXXX, 0, "LG" }, +// { HDA_CODEC_WMXXXX, 0, "Wolfson Microelectronics" }, +// { HDA_CODEC_QEMUXXXX, 0, "QEMU" }, { HDA_CODEC_IDTXXXX, 0, "IDT" }, { HDA_CODEC_INTELXXXX, 0, "Intel" }, { HDA_CODEC_MOTOXXXX, 0, "Motorola" }, Index: trunk/i386/libsaio/hda.h =================================================================== --- trunk/i386/libsaio/hda.h (revision 2858) +++ trunk/i386/libsaio/hda.h (revision 2859) @@ -96,44 +96,49 @@ /* Intel */ #define INTEL_VENDORID PCI_VENDOR_ID_INTEL -#define HDA_INTEL_OAK HDA_MODEL_CONSTRUCT(INTEL, 0x080a) -#define HDA_INTEL_BAY HDA_MODEL_CONSTRUCT(INTEL, 0x0f04) -#define HDA_INTEL_HSW1 HDA_MODEL_CONSTRUCT(INTEL, 0x0a0c) -#define HDA_INTEL_HSW2 HDA_MODEL_CONSTRUCT(INTEL, 0x0c0c) -#define HDA_INTEL_HSW3 HDA_MODEL_CONSTRUCT(INTEL, 0x0d0c) -#define HDA_INTEL_BDW HDA_MODEL_CONSTRUCT(INTEL, 0x160c) -#define HDA_INTEL_CPT HDA_MODEL_CONSTRUCT(INTEL, 0x1c20) -#define HDA_INTEL_PATSBURG HDA_MODEL_CONSTRUCT(INTEL, 0x1d20) -#define HDA_INTEL_PPT1 HDA_MODEL_CONSTRUCT(INTEL, 0x1e20) // Macmini6,2 -#define HDA_INTEL_BRASWELL HDA_MODEL_CONSTRUCT(INTEL, 0x2284) -#define HDA_INTEL_82801F HDA_MODEL_CONSTRUCT(INTEL, 0x2668) -#define HDA_INTEL_63XXESB HDA_MODEL_CONSTRUCT(INTEL, 0x269a) -#define HDA_INTEL_82801G HDA_MODEL_CONSTRUCT(INTEL, 0x27d8) -#define HDA_INTEL_82801H HDA_MODEL_CONSTRUCT(INTEL, 0x284b) -#define HDA_INTEL_82801I HDA_MODEL_CONSTRUCT(INTEL, 0x293e) -#define HDA_INTEL_ICH9 HDA_MODEL_CONSTRUCT(INTEL, 0x293f) -#define HDA_INTEL_82801JI HDA_MODEL_CONSTRUCT(INTEL, 0x3a3e) -#define HDA_INTEL_82801JD HDA_MODEL_CONSTRUCT(INTEL, 0x3a6e) -#define HDA_INTEL_PCH HDA_MODEL_CONSTRUCT(INTEL, 0x3b56) -#define HDA_INTEL_PCH2 HDA_MODEL_CONSTRUCT(INTEL, 0x3b57) +#define HDA_INTEL_OAK HDA_MODEL_CONSTRUCT(INTEL, 0x080a) /* Oaktrail */ +#define HDA_INTEL_BAY HDA_MODEL_CONSTRUCT(INTEL, 0x0f04) /* BayTrail */ +#define HDA_INTEL_HSW1 HDA_MODEL_CONSTRUCT(INTEL, 0x0a0c) /* Haswell */ +#define HDA_INTEL_HSW2 HDA_MODEL_CONSTRUCT(INTEL, 0x0c0c) /* Haswell */ +#define HDA_INTEL_HSW3 HDA_MODEL_CONSTRUCT(INTEL, 0x0d0c) /* Haswell */ +#define HDA_INTEL_BDW HDA_MODEL_CONSTRUCT(INTEL, 0x160c) /* Broadwell */ +#define HDA_INTEL_BROXTON_T HDA_MODEL_CONSTRUCT(INTEL, 0x1a98) /* Broxton-T */ +#define HDA_INTEL_CPT HDA_MODEL_CONSTRUCT(INTEL, 0x1c20) /* CPT */ +#define HDA_INTEL_PATSBURG HDA_MODEL_CONSTRUCT(INTEL, 0x1d20) /* PBG */ +#define HDA_INTEL_PPT1 HDA_MODEL_CONSTRUCT(INTEL, 0x1e20) /* Panther Point */ +#define HDA_INTEL_BRASWELL HDA_MODEL_CONSTRUCT(INTEL, 0x2284) /* Braswell */ +#define HDA_INTEL_82801F HDA_MODEL_CONSTRUCT(INTEL, 0x2668) /* ICH6 */ +#define HDA_INTEL_63XXESB HDA_MODEL_CONSTRUCT(INTEL, 0x269a) /* ESB2 */ +#define HDA_INTEL_82801G HDA_MODEL_CONSTRUCT(INTEL, 0x27d8) /* ICH7 */ +#define HDA_INTEL_82801H HDA_MODEL_CONSTRUCT(INTEL, 0x284b) /* ICH8 */ +#define HDA_INTEL_82801I HDA_MODEL_CONSTRUCT(INTEL, 0x293e) /* ICH9 */ +#define HDA_INTEL_ICH9 HDA_MODEL_CONSTRUCT(INTEL, 0x293f) /* ICH9 */ +#define HDA_INTEL_82801JI HDA_MODEL_CONSTRUCT(INTEL, 0x3a3e) /* ICH10 */ +#define HDA_INTEL_82801JD HDA_MODEL_CONSTRUCT(INTEL, 0x3a6e) /* ICH10 */ +#define HDA_INTEL_PCH HDA_MODEL_CONSTRUCT(INTEL, 0x3b56) /* 5 Series/3400 */ +#define HDA_INTEL_PCH2 HDA_MODEL_CONSTRUCT(INTEL, 0x3b57) /* 5 Series/3400 */ +#define HDA_INTEL_BROXTON_P HDA_MODEL_CONSTRUCT(INTEL, 0x5a98) /* Broxton-P(Apollolake) */ #define HDA_INTEL_MACBOOKPRO92 HDA_MODEL_CONSTRUCT(INTEL, 0x7270) -#define HDA_INTEL_SCH HDA_MODEL_CONSTRUCT(INTEL, 0x811b) -#define HDA_INTEL_LPT1 HDA_MODEL_CONSTRUCT(INTEL, 0x8c20) -#define HDA_INTEL_LPT2 HDA_MODEL_CONSTRUCT(INTEL, 0x8c21) -#define HDA_INTEL_WCPT HDA_MODEL_CONSTRUCT(INTEL, 0x8ca0) -#define HDA_INTEL_WELLS1 HDA_MODEL_CONSTRUCT(INTEL, 0x8d20) -#define HDA_INTEL_WELLS2 HDA_MODEL_CONSTRUCT(INTEL, 0x8d21) -#define HDA_INTEL_WCPTLP HDA_MODEL_CONSTRUCT(INTEL, 0x9ca0) -#define HDA_INTEL_LPTLP1 HDA_MODEL_CONSTRUCT(INTEL, 0x9c20) -#define HDA_INTEL_LPTLP2 HDA_MODEL_CONSTRUCT(INTEL, 0x9c21) -#define HDA_INTEL_SRSPLP HDA_MODEL_CONSTRUCT(INTEL, 0x9d70) -#define HDA_INTEL_SRSP HDA_MODEL_CONSTRUCT(INTEL, 0xa170) +#define HDA_INTEL_SCH HDA_MODEL_CONSTRUCT(INTEL, 0x811b) /* Poulsbo */ +#define HDA_INTEL_LPT1 HDA_MODEL_CONSTRUCT(INTEL, 0x8c20) /* Lynx Point */ +#define HDA_INTEL_LPT2 HDA_MODEL_CONSTRUCT(INTEL, 0x8c21) /* Lynx Point */ +#define HDA_INTEL_WCPT HDA_MODEL_CONSTRUCT(INTEL, 0x8ca0) /* 9 Series */ +#define HDA_INTEL_WELLS1 HDA_MODEL_CONSTRUCT(INTEL, 0x8d20) /* Wellsburg */ +#define HDA_INTEL_WELLS2 HDA_MODEL_CONSTRUCT(INTEL, 0x8d21) /* Wellsburg */ +#define HDA_INTEL_WCPTLP HDA_MODEL_CONSTRUCT(INTEL, 0x9ca0) /* Wildcat Point-LP */ +#define HDA_INTEL_LPTLP1 HDA_MODEL_CONSTRUCT(INTEL, 0x9c20) /* Lynx Point-LP */ +#define HDA_INTEL_LPTLP2 HDA_MODEL_CONSTRUCT(INTEL, 0x9c21) /* Lynx Point-LP */ +#define HDA_INTEL_SRSPLP HDA_MODEL_CONSTRUCT(INTEL, 0x9d70) /* Sunrise Point-LP */ +#define HDA_INTEL_KABYLAKE_LP HDA_MODEL_CONSTRUCT(INTEL, 0x9d71) /* Kabylake-LP */ +#define HDA_INTEL_SRSP HDA_MODEL_CONSTRUCT(INTEL, 0xa170) /* Sunrise Point */ +#define HDA_INTEL_KABYLAKE HDA_MODEL_CONSTRUCT(INTEL, 0xa171) /* Kabylake */ +#define HDA_INTEL_LEWISBURG1 HDA_MODEL_CONSTRUCT(INTEL, 0xa1f0) /* Lewisburg */ +#define HDA_INTEL_LEWISBURG2 HDA_MODEL_CONSTRUCT(INTEL, 0xa270) /* Lewisburg */ +#define HDA_INTEL_UNPT HDA_MODEL_CONSTRUCT(INTEL, 0xa2f0) /* Kabylake-H */ #define HDA_INTEL_ALL HDA_MODEL_CONSTRUCT(INTEL, 0xffff) /* Nvidia */ #define NVIDIA_VENDORID PCI_VENDOR_ID_NVIDIA -// AppleHDA binary contain 0a00de10 (10de000a) -// AppleHDAController binary contain de10ea0b (10de0bea) #define HDA_NVIDIA_MCP51 HDA_MODEL_CONSTRUCT(NVIDIA, 0x026c) #define HDA_NVIDIA_MCP55 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0371) #define HDA_NVIDIA_MCP61_1 HDA_MODEL_CONSTRUCT(NVIDIA, 0x03e4) @@ -157,7 +162,7 @@ #define HDA_NVIDIA_0BE4 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0be4) // [GeForge GT 240] HDACodec 10de000d (0d00de10) #define HDA_NVIDIA_GT100 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0be5) // [GeForge GTX 470] HDACodec 10de0010 (1000de10) #define HDA_NVIDIA_GT106 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0be9) -#define HDA_NVIDIA_GT108 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0bea) // HDACodec +#define HDA_NVIDIA_GT108 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0bea) // HDACodec #define HDA_NVIDIA_GT104 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0beb) #define HDA_NVIDIA_GT116 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0bee) #define HDA_NVIDIA_MCP89_1 HDA_MODEL_CONSTRUCT(NVIDIA, 0x0d94) @@ -177,213 +182,86 @@ /* ATI */ #define ATI_VENDORID PCI_VENDOR_ID_ATI -#define HDA_ATI_SB450 HDA_MODEL_CONSTRUCT(ATI, 0x437b) -#define HDA_ATI_SB600 HDA_MODEL_CONSTRUCT(ATI, 0x4383) -#define HDA_ATI_HUDSON HDA_MODEL_CONSTRUCT(ATI, 0x780d) -#define HDA_ATI_RS600 HDA_MODEL_CONSTRUCT(ATI, 0x793b) -#define HDA_ATI_RS690 HDA_MODEL_CONSTRUCT(ATI, 0x7919) +//#define HDA_ATI_0002 HDA_MODEL_CONSTRUCT(ATI, 0x0002) /* ATI HDMI */ +//#define HDA_ATI_1308 HDA_MODEL_CONSTRUCT(ATI, 0x1308) /* ATI HDMI */ +//#define HDA_ATI_177A HDA_MODEL_CONSTRUCT(ATI, 0x157a) /* ATI HDMI */ +//#define HDA_ATI_15B3 HDA_MODEL_CONSTRUCT(ATI, 0x15b3) /* ATI HDMI */ +#define HDA_ATI_SB450 HDA_MODEL_CONSTRUCT(ATI, 0x437b) /* ATI SB 450/600/700/800/900 */ +#define HDA_ATI_SB600 HDA_MODEL_CONSTRUCT(ATI, 0x4383) /* ATI SB 450/600/700/800/900 */ +#define HDA_ATI_HUDSON HDA_MODEL_CONSTRUCT(ATI, 0x780d) /* PCI_DEVICE(0x1022, 0x780d) */ +#define HDA_ATI_RS600 HDA_MODEL_CONSTRUCT(ATI, 0x793b) /* ATI HDMI */ +#define HDA_ATI_RS690 HDA_MODEL_CONSTRUCT(ATI, 0x7919) /* ATI HDMI */ #define HDA_ATI_RS780 HDA_MODEL_CONSTRUCT(ATI, 0x960f) -#define HDA_ATI_RS880 HDA_MODEL_CONSTRUCT(ATI, 0x970f) -#define HDA_ATI_TRINITY HDA_MODEL_CONSTRUCT(ATI, 0x9902) -#define HDA_ATI_R600 HDA_MODEL_CONSTRUCT(ATI, 0xaa00) -#define HDA_ATI_RV630 HDA_MODEL_CONSTRUCT(ATI, 0xaa08) -#define HDA_ATI_RV610 HDA_MODEL_CONSTRUCT(ATI, 0xaa10) -#define HDA_ATI_RV670 HDA_MODEL_CONSTRUCT(ATI, 0xaa18) -#define HDA_ATI_RV635 HDA_MODEL_CONSTRUCT(ATI, 0xaa20) -#define HDA_ATI_RV620 HDA_MODEL_CONSTRUCT(ATI, 0xaa28) -#define HDA_ATI_RV770 HDA_MODEL_CONSTRUCT(ATI, 0xaa30) -#define HDA_ATI_RV730 HDA_MODEL_CONSTRUCT(ATI, 0xaa38) -#define HDA_ATI_RV710 HDA_MODEL_CONSTRUCT(ATI, 0xaa40) -#define HDA_ATI_RV740 HDA_MODEL_CONSTRUCT(ATI, 0xaa48) -#define HDA_ATI_RV870 HDA_MODEL_CONSTRUCT(ATI, 0xaa50) -#define HDA_ATI_RV840 HDA_MODEL_CONSTRUCT(ATI, 0xaa58) // Codec 021001aa (1002aa01) -#define HDA_ATI_RV830 HDA_MODEL_CONSTRUCT(ATI, 0xaa60) -#define HDA_ATI_RV810 HDA_MODEL_CONSTRUCT(ATI, 0xaa68) -#define HDA_ATI_RV970 HDA_MODEL_CONSTRUCT(ATI, 0xaa80) -#define HDA_ATI_RV940 HDA_MODEL_CONSTRUCT(ATI, 0xaa88) -#define HDA_ATI_RV930 HDA_MODEL_CONSTRUCT(ATI, 0xaa90) -#define HDA_ATI_RV910 HDA_MODEL_CONSTRUCT(ATI, 0xaa98) -#define HDA_ATI_R1000 HDA_MODEL_CONSTRUCT(ATI, 0xaaa0) -#define HDA_ATI_SI HDA_MODEL_CONSTRUCT(ATI, 0xaaa8) -#define HDA_ATI_VERDE HDA_MODEL_CONSTRUCT(ATI, 0xaab0) +#define HDA_ATI_RS880 HDA_MODEL_CONSTRUCT(ATI, 0x970f) /* ATI HDMI */ +//#define HDA_ATI_9840 HDA_MODEL_CONSTRUCT(ATI, 0x9840) /* ATI HDMI */ +#define HDA_ATI_TRINITY HDA_MODEL_CONSTRUCT(ATI, 0x9902) /* ATI HDMI */ +#define HDA_ATI_R600 HDA_MODEL_CONSTRUCT(ATI, 0xaa00) /* ATI HDMI */ +#define HDA_ATI_RV630 HDA_MODEL_CONSTRUCT(ATI, 0xaa08) /* ATI HDMI */ +#define HDA_ATI_RV610 HDA_MODEL_CONSTRUCT(ATI, 0xaa10) /* ATI HDMI */ +#define HDA_ATI_RV670 HDA_MODEL_CONSTRUCT(ATI, 0xaa18) /* ATI HDMI */ +#define HDA_ATI_RV635 HDA_MODEL_CONSTRUCT(ATI, 0xaa20) /* ATI HDMI */ +#define HDA_ATI_RV620 HDA_MODEL_CONSTRUCT(ATI, 0xaa28) /* ATI HDMI */ +#define HDA_ATI_RV770 HDA_MODEL_CONSTRUCT(ATI, 0xaa30) /* ATI HDMI */ +#define HDA_ATI_RV730 HDA_MODEL_CONSTRUCT(ATI, 0xaa38) /* ATI HDMI */ +#define HDA_ATI_RV710 HDA_MODEL_CONSTRUCT(ATI, 0xaa40) /* ATI HDMI */ +#define HDA_ATI_RV740 HDA_MODEL_CONSTRUCT(ATI, 0xaa48) /* ATI HDMI */ +#define HDA_ATI_RV870 HDA_MODEL_CONSTRUCT(ATI, 0xaa50) /* ATI HDMI */ +#define HDA_ATI_RV840 HDA_MODEL_CONSTRUCT(ATI, 0xaa58) /* ATI HDMI */ +#define HDA_ATI_RV830 HDA_MODEL_CONSTRUCT(ATI, 0xaa60) /* ATI HDMI */ +#define HDA_ATI_RV810 HDA_MODEL_CONSTRUCT(ATI, 0xaa68) /* ATI HDMI */ +#define HDA_ATI_RV970 HDA_MODEL_CONSTRUCT(ATI, 0xaa80) /* ATI HDMI */ +#define HDA_ATI_RV940 HDA_MODEL_CONSTRUCT(ATI, 0xaa88) /* ATI HDMI */ +#define HDA_ATI_RV930 HDA_MODEL_CONSTRUCT(ATI, 0xaa90) /* ATI HDMI */ +#define HDA_ATI_RV910 HDA_MODEL_CONSTRUCT(ATI, 0xaa98) /* ATI HDMI */ +#define HDA_ATI_R1000 HDA_MODEL_CONSTRUCT(ATI, 0xaaa0) /* ATI HDMI */ +#define HDA_ATI_SI HDA_MODEL_CONSTRUCT(ATI, 0xaaa8) /* ATI HDMI */ +#define HDA_ATI_VERDE HDA_MODEL_CONSTRUCT(ATI, 0xaab0) /* ATI HDMI */ +//#define HDA_ATI_AAC0 HDA_MODEL_CONSTRUCT(ATI, 0xaac0) /* ATI HDMI */ +//#define HDA_ATI_AAC8 HDA_MODEL_CONSTRUCT(ATI, 0xaac8) /* ATI HDMI */ +//#define HDA_ATI_AAD8 HDA_MODEL_CONSTRUCT(ATI, 0xaad8) /* ATI HDMI */ +//#define HDA_ATI_AAE8 HDA_MODEL_CONSTRUCT(ATI, 0xaae8) /* ATI HDMI */ +//#define HDA_ATI_AAE0 HDA_MODEL_CONSTRUCT(ATI, 0xaae0) /* ATI HDMI */ +//#define HDA_ATI_AAF0 HDA_MODEL_CONSTRUCT(ATI, 0xaaf0) /* ATI HDMI */ #define HDA_ATI_ALL HDA_MODEL_CONSTRUCT(ATI, 0xffff) /* RDC */ #define RDC_VENDORID 0x17f3 -#define HDA_RDC_M3010 HDA_MODEL_CONSTRUCT(RDC, 0x3010) +#define HDA_RDC_M3010 HDA_MODEL_CONSTRUCT(RDC, 0x3010) /* Vortex86MX */ /* VIA */ #define VIA_VENDORID 0x1106 -#define HDA_VIA_VT82XX HDA_MODEL_CONSTRUCT(VIA, 0x3288) +#define HDA_VIA_VT82XX HDA_MODEL_CONSTRUCT(VIA, 0x3288) /* VIA VT8251/VT8237A */ +//#define HDA_VIA_VT71XX HDA_MODEL_CONSTRUCT(VIA, 0x9170) /* VIA GFX VT7122/VX900 */ +//#define HDA_VIA_VT61XX HDA_MODEL_CONSTRUCT(VIA, 0x9140) /* VIA GFX VT6122/VX11 */ #define HDA_VIA_ALL HDA_MODEL_CONSTRUCT(VIA, 0xffff) /* SiS */ #define SIS_VENDORID 0x1039 -#define HDA_SIS_966 HDA_MODEL_CONSTRUCT(SIS, 0x7502) +#define HDA_SIS_966 HDA_MODEL_CONSTRUCT(SIS, 0x7502) /* SIS966 */ #define HDA_SIS_ALL HDA_MODEL_CONSTRUCT(SIS, 0xffff) /* ULI */ #define ULI_VENDORID 0x10b9 -#define HDA_ULI_M5461 HDA_MODEL_CONSTRUCT(ULI, 0x5461) +#define HDA_ULI_M5461 HDA_MODEL_CONSTRUCT(ULI, 0x5461) /* ULI M5461 */ #define HDA_ULI_ALL HDA_MODEL_CONSTRUCT(ULI, 0xffff) -/* OEM/subvendors */ +/* Teradici */ +//{ PCI_DEVICE(0x6549, 0x1200), +//{ PCI_DEVICE(0x6549, 0x2200} -/* Intel */ -#define INTEL_D101GGC_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xd600) +/* CTHDA chips */ +//{ PCI_DEVICE(0x1102, 0x0010), +//{ PCI_DEVICE(0x1102, 0x0012), -/* HP/Compaq */ -#define HP_VENDORID 0x103c -#define HP_V3000_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x30b5) -#define HP_NX7400_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x30a2) -#define HP_NX6310_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x30aa) -#define HP_NX6325_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x30b0) -#define HP_XW4300_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x3013) -#define HP_3010_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x3010) -#define HP_DV5000_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x30a5) -#define HP_DC7700S_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x2801) -#define HP_DC7700_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0x2802) -#define HP_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(HP, 0xffff) -/* What is wrong with XN 2563 anyway? (Got the picture ?) */ -#define HP_NX6325_SUBVENDORX 0x103c30b0 +/* this entry seems still valid -- i.e. without emu20kx chip */ +//{ PCI_DEVICE(0x1102, 0x0009 -/* Dell */ -#define DELL_VENDORID 0x1028 -#define DELL_D630_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x01f9) -#define DELL_D820_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x01cc) -#define DELL_V1400_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x0227) -#define DELL_V1500_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x0228) -#define DELL_I1300_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x01c9) -#define DELL_XPSM1210_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x01d7) -#define DELL_OPLX745_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x01da) -#define DELL_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0xffff) +/* CM8888 */ +//{ PCI_DEVICE(0x13f6, 0x5011), -/* Clevo */ -#define CLEVO_VENDORID 0x1558 -#define CLEVO_D900T_SUBVENDOR HDA_MODEL_CONSTRUCT(CLEVO, 0x0900) -#define CLEVO_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(CLEVO, 0xffff) +/* VMware HDAudio */ +//{ PCI_DEVICE(0x15ad, 0x1977), -/* Acer */ -#define ACER_VENDORID 0x1025 -#define ACER_A5050_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x010f) -#define ACER_A4520_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0127) -#define ACER_A4710_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x012f) -#define ACER_A4715_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0133) -#define ACER_3681WXM_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x0110) -#define ACER_T6292_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x011b) -#define ACER_T5320_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0x011f) -#define ACER_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(ACER, 0xffff) - -/* Asus */ -#define ASUS_VENDORID 0x1043 -#define ASUS_A8X_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1153) -#define ASUS_U5F_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1263) -#define ASUS_W6F_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1263) -#define ASUS_A7M_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1323) -#define ASUS_F3JC_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1338) -#define ASUS_G2K_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1339) -#define ASUS_A7T_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x13c2) -#define ASUS_W2J_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1971) -#define ASUS_M5200_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x1993) -#define ASUS_P5PL2_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x817f) -#define ASUS_P1AH2_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x81cb) -#define ASUS_M2NPVMX_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x81cb) -#define ASUS_M2V_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x81e7) -#define ASUS_P5BWD_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x81ec) -#define ASUS_M2N_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0x8234) -#define ASUS_A8NVMCSM_SUBVENDOR HDA_MODEL_CONSTRUCT(NVIDIA, 0xcb84) -#define ASUS_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(ASUS, 0xffff) - -/* IBM / Lenovo */ -#define IBM_VENDORID 0x1014 -#define IBM_M52_SUBVENDOR HDA_MODEL_CONSTRUCT(IBM, 0x02f6) -#define IBM_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(IBM, 0xffff) - -/* Lenovo */ -#define LENOVO_VENDORID 0x17aa -#define LENOVO_3KN100_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x2066) -#define LENOVO_3KN200_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x384e) -#define LENOVO_B450_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x3a0d) -#define LENOVO_TCA55_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x1015) -#define LENOVO_X300_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x20ac) -#define LENOVO_X1_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x21e8) -#define LENOVO_X1CRBN_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x21f9) -#define LENOVO_X220_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x21da) -#define LENOVO_T420_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x21ce) -#define LENOVO_T430_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x21f3) -#define LENOVO_T430S_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x21fb) -#define LENOVO_T520_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x21cf) -#define LENOVO_T530_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x21f6) -#define LENOVO_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0xffff) - -/* Samsung */ -#define SAMSUNG_VENDORID 0x144d -#define SAMSUNG_Q1_SUBVENDOR HDA_MODEL_CONSTRUCT(SAMSUNG, 0xc027) -#define SAMSUNG_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(SAMSUNG, 0xffff) - -/* Medion ? */ -#define MEDION_VENDORID 0x161f -#define MEDION_MD95257_SUBVENDOR HDA_MODEL_CONSTRUCT(MEDION, 0x203d) -#define MEDION_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(MEDION, 0xffff) - -/* Apple Computer Inc. */ -#define APPLE_VENDORID PCI_VENDOR_ID_APPLE -#define APPLE_MB3_SUBVENDOR HDA_MODEL_CONSTRUCT(APPLE, 0x00a1) - -/* Sony */ -#define SONY_VENDORID 0x104d -#define SONY_S5_SUBVENDOR HDA_MODEL_CONSTRUCT(SONY, 0x81cc) -#define SONY_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(SONY, 0xffff) - -/* - * Apple Intel MacXXXX seems using Sigmatel codec/vendor id - * instead of their own, which is beyond my comprehension - * (see HDA_CODEC_STAC9221 below). - */ -#define APPLE_INTEL_MAC 0x76808384 -#define APPLE_MACBOOKAIR31 0x0d9410de -#define APPLE_MACBOOKPRO55 0xcb7910de -#define APPLE_MACBOOKPRO71 0xcb8910de - -/* LG Electronics */ -#define LG_VENDORID 0x1854 -#define LG_LW20_SUBVENDOR HDA_MODEL_CONSTRUCT(LG, 0x0018) -#define LG_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(LG, 0xffff) - -/* Fujitsu Siemens */ -#define FS_VENDORID 0x1734 -#define FS_PA1510_SUBVENDOR HDA_MODEL_CONSTRUCT(FS, 0x10b8) -#define FS_SI1848_SUBVENDOR HDA_MODEL_CONSTRUCT(FS, 0x10cd) -#define FS_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(FS, 0xffff) - -/* Fujitsu Limited */ -#define FL_VENDORID 0x10cf -#define FL_S7020D_SUBVENDOR HDA_MODEL_CONSTRUCT(FL, 0x1326) -#define FL_U1010_SUBVENDOR HDA_MODEL_CONSTRUCT(FL, 0x142d) -#define FL_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(FL, 0xffff) - -/* Toshiba */ -#define TOSHIBA_VENDORID 0x1179 -#define TOSHIBA_U200_SUBVENDOR HDA_MODEL_CONSTRUCT(TOSHIBA, 0x0001) -#define TOSHIBA_A135_SUBVENDOR HDA_MODEL_CONSTRUCT(TOSHIBA, 0xff01) -#define TOSHIBA_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(TOSHIBA, 0xffff) - -/* Micro-Star International (MSI) */ -#define MSI_VENDORID 0x1462 -#define MSI_MS1034_SUBVENDOR HDA_MODEL_CONSTRUCT(MSI, 0x0349) -#define MSI_MS034A_SUBVENDOR HDA_MODEL_CONSTRUCT(MSI, 0x034a) -#define MSI_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(MSI, 0xffff) - -/* Giga-Byte Technology */ -#define GB_VENDORID 0x1458 -#define GB_G33S2H_SUBVENDOR HDA_MODEL_CONSTRUCT(GB, 0xa022) -#define GP_ALL_SUBVENDOR HDA_MODEL_CONSTRUCT(GB, 0xffff) - -/* Uniwill ? */ -#define UNIWILL_VENDORID 0x1584 -#define UNIWILL_9075_SUBVENDOR HDA_MODEL_CONSTRUCT(UNIWILL, 0x9075) -#define UNIWILL_9080_SUBVENDOR HDA_MODEL_CONSTRUCT(UNIWILL, 0x9080) - //#define HDEF_PATH "PciRoot(0x0)/Pci(0x1b,0x0)" //#define PINCONF_LEN ( sizeof(default_PinConfiguration) / sizeof(uint8_t) ) #define HDA0_LEN ( sizeof(default_HDEF_layout_id) / sizeof(uint8_t) ) @@ -456,6 +334,7 @@ //#define HDA_CODEC_ALC898 HDA_CODEC_CONSTRUCT(REALTEK, 0x0898) //#define HDA_CODEC_ALC899 HDA_CODEC_CONSTRUCT(REALTEK, 0x0899) #define HDA_CODEC_ALC900 HDA_CODEC_CONSTRUCT(REALTEK, 0x0900) +#define HDA_CODEC_ALCS1220A HDA_CODEC_CONSTRUCT(REALTEK, 0x1168) #define HDA_CODEC_ALC1220 HDA_CODEC_CONSTRUCT(REALTEK, 0x1220) #define HDA_CODEC_ALCXXXX HDA_CODEC_CONSTRUCT(REALTEK, 0xffff) @@ -497,6 +376,7 @@ #define HDA_CODEC_CMI9880 HDA_CODEC_CONSTRUCT(CMEDIA, 0x9880) #define HDA_CODEC_CMIXXXX HDA_CODEC_CONSTRUCT(CMEDIA, 0xffff) +/* CMedia */ #define CMEDIA2_VENDORID 0x434d #define HDA_CODEC_CMI98802 HDA_CODEC_CONSTRUCT(CMEDIA2, 0x4980) #define HDA_CODEC_CMIXXXX2 HDA_CODEC_CONSTRUCT(CMEDIA2, 0xffff) @@ -620,7 +500,7 @@ #define HDA_CODEC_SII1392 HDA_CODEC_CONSTRUCT(SII, 0x1392) #define HDA_CODEC_SIIXXXX HDA_CODEC_CONSTRUCT(SII, 0xffff) -/* Lucent/Agere */ +/* LSI - Lucent/Agere */ #define AGERE_VENDORID 0x11c1 #define HDA_CODEC_AGEREXXXX HDA_CODEC_CONSTRUCT(AGERE, 0xffff) @@ -734,6 +614,18 @@ #define CHRONTEL_VENDORID 0x17e8 #define HDA_CODEC_CHXXXX HDA_CODEC_CONSTRUCT(CHRONTEL, 0xffff) +/* LG */ +#define LG_VENDORID 0x1854 +#define HDA_CODEC_LGXXXX HDA_CODEC_CONSTRUCT(LG, 0xffff) + +/* Wolfson Microelectronics */ +#define WOLFSON_VENDORID 0x14ec +#define HDA_CODEC_WMXXXX HDA_CODEC_CONSTRUCT(WOLFSON, 0xffff) + +/* QEMU */ +#define QEMU_VENDORID 0x1af4 +#define HDA_CODEC_QEMUXXXX HDA_CODEC_CONSTRUCT(QEMU, 0xffff) + /* INTEL */ #define HDA_CODEC_INTELIP HDA_CODEC_CONSTRUCT(INTEL, 0x0054) #define HDA_CODEC_INTELBL HDA_CODEC_CONSTRUCT(INTEL, 0x2801) @@ -745,6 +637,8 @@ #define HDA_CODEC_INTELLLP HDA_CODEC_CONSTRUCT(INTEL, 0x2807) // Haswell HDMI #define HDA_CODEC_INTELBRW HDA_CODEC_CONSTRUCT(INTEL, 0x2808) // Broadwell HDMI #define HDA_CODEC_INTELSKL HDA_CODEC_CONSTRUCT(INTEL, 0x2809) // Skylake HDMI +#define HDA_CODEC_INTELBRO HDA_CODEC_CONSTRUCT(INTEL, 0x280a) // Broxton HDMI +#define HDA_CODEC_INTELKAB HDA_CODEC_CONSTRUCT(INTEL, 0x280b) // Kabylake HDMI #define HDA_CODEC_INTELCDT HDA_CODEC_CONSTRUCT(INTEL, 0x2880) // CedarTrail HDMI #define HDA_CODEC_INTELVLV HDA_CODEC_CONSTRUCT(INTEL, 0x2882) // Valleyview2 HDMI #define HDA_CODEC_INTELBSW HDA_CODEC_CONSTRUCT(INTEL, 0x2883) // Braswell HDMI Index: trunk/i386/libsaio/ati.c =================================================================== --- trunk/i386/libsaio/ati.c (revision 2858) +++ trunk/i386/libsaio/ati.c (revision 2859) @@ -1232,7 +1232,7 @@ { 0x67CA, 0x00000000, CHIP_FAMILY_ELLESMERE, "AMD Radeon Polaris 10", kNull }, { 0x67CC, 0x00000000, CHIP_FAMILY_ELLESMERE, "AMD Radeon Polaris 10", kNull }, { 0x67CF, 0x00000000, CHIP_FAMILY_ELLESMERE, "AMD Radeon Polaris 10", kNull }, - { 0x67DF, 0x00000000, CHIP_FAMILY_ELLESMERE, "AMD Radeon RX480", kDayman }, + { 0x67DF, 0x00000000, CHIP_FAMILY_ELLESMERE, "AMD Radeon RX480", kBaladi }, // Polaris 11 { 0x67E0, 0x00000000, CHIP_FAMILY_BAFFIN, "AMD Radeon RX460", kAcre }, @@ -1244,6 +1244,15 @@ { 0x67EB, 0x00000000, CHIP_FAMILY_BAFFIN, "AMD Radeon Polaris 11", kNull }, { 0x67EF, 0x00000000, CHIP_FAMILY_BAFFIN, "AMD Radeon RX460", kAcre }, { 0x67FF, 0x00000000, CHIP_FAMILY_BAFFIN, "AMD Radeon Polaris 11", kNull }, + + // Polaris 12 + { 0x6980, 0x00000000, CHIP_FAMILY_GREENLAND, "AMD Radeon Polaris 12", kNull }, + { 0x6981, 0x00000000, CHIP_FAMILY_GREENLAND, "AMD Radeon Polaris 12", kNull }, + { 0x6985, 0x00000000, CHIP_FAMILY_GREENLAND, "AMD Radeon Polaris 12", kNull }, + { 0x6986, 0x00000000, CHIP_FAMILY_GREENLAND, "AMD Radeon Polaris 12", kNull }, + { 0x6987, 0x00000000, CHIP_FAMILY_GREENLAND, "AMD Radeon Polaris 12", kNull }, + { 0x699F, 0x00000000, CHIP_FAMILY_GREENLAND, "AMD Radeon Polaris 12", kNull }, + // PITCAIRN { 0x6800, 0x00000000, CHIP_FAMILY_PITCAIRN, "AMD Radeon HD 7970M", kBuri }, // Mobile { 0x6801, 0x00000000, CHIP_FAMILY_PITCAIRN, "AMD Radeon HD 8970M Series", kFutomaki }, // Mobile @@ -1832,6 +1841,7 @@ "Tobago", "Ellesmere", "Baffin", + "Greenland", "" }; @@ -2321,57 +2331,54 @@ RegWrite32(AVIVO_D2VGA_CONTROL, d2vga_control); RegWrite32(AVIVO_VGA_RENDER_CONTROL, vga_render_control); RegWrite32(R600_ROM_CNTL, rom_cntl); + } else if (chip_family >= CHIP_FAMILY_R600) { + uint32_t viph_control = RegRead32(RADEON_VIPH_CONTROL); + uint32_t bus_cntl = RegRead32(RADEON_BUS_CNTL); + uint32_t d1vga_control = RegRead32(AVIVO_D1VGA_CONTROL); + uint32_t d2vga_control = RegRead32(AVIVO_D2VGA_CONTROL); + uint32_t vga_render_control = RegRead32(AVIVO_VGA_RENDER_CONTROL); + uint32_t rom_cntl = RegRead32(R600_ROM_CNTL); + uint32_t general_pwrmgt = RegRead32(R600_GENERAL_PWRMGT); + uint32_t low_vid_lower_gpio_cntl = RegRead32(R600_LOW_VID_LOWER_GPIO_CNTL); + uint32_t medium_vid_lower_gpio_cntl = RegRead32(R600_MEDIUM_VID_LOWER_GPIO_CNTL); + uint32_t high_vid_lower_gpio_cntl = RegRead32(R600_HIGH_VID_LOWER_GPIO_CNTL); + uint32_t ctxsw_vid_lower_gpio_cntl = RegRead32(R600_CTXSW_VID_LOWER_GPIO_CNTL); + uint32_t lower_gpio_enable = RegRead32(R600_LOWER_GPIO_ENABLE); + + // disable VIP + RegWrite32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN)); + + // enable the rom + RegWrite32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM)); + + // Disable VGA mode + RegWrite32(AVIVO_D1VGA_CONTROL, (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT))); + RegWrite32(AVIVO_D2VGA_CONTROL, (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT))); + RegWrite32(AVIVO_VGA_RENDER_CONTROL, (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK)); + RegWrite32(R600_ROM_CNTL, ((rom_cntl & ~R600_SCK_PRESCALE_CRYSTAL_CLK_MASK) | (1 << R600_SCK_PRESCALE_CRYSTAL_CLK_SHIFT) | R600_SCK_OVERWRITE)); + RegWrite32(R600_GENERAL_PWRMGT, (general_pwrmgt & ~R600_OPEN_DRAIN_PADS)); + RegWrite32(R600_LOW_VID_LOWER_GPIO_CNTL, (low_vid_lower_gpio_cntl & ~0x400)); + RegWrite32(R600_MEDIUM_VID_LOWER_GPIO_CNTL, (medium_vid_lower_gpio_cntl & ~0x400)); + RegWrite32(R600_HIGH_VID_LOWER_GPIO_CNTL, (high_vid_lower_gpio_cntl & ~0x400)); + RegWrite32(R600_CTXSW_VID_LOWER_GPIO_CNTL, (ctxsw_vid_lower_gpio_cntl & ~0x400)); + RegWrite32(R600_LOWER_GPIO_ENABLE, (lower_gpio_enable | 0x400)); + + ret = read_vbios(true); + + // restore regs + RegWrite32(RADEON_VIPH_CONTROL, viph_control); + RegWrite32(RADEON_BUS_CNTL, bus_cntl); + RegWrite32(AVIVO_D1VGA_CONTROL, d1vga_control); + RegWrite32(AVIVO_D2VGA_CONTROL, d2vga_control); + RegWrite32(AVIVO_VGA_RENDER_CONTROL, vga_render_control); + RegWrite32(R600_ROM_CNTL, rom_cntl); + RegWrite32(R600_GENERAL_PWRMGT, general_pwrmgt); + RegWrite32(R600_LOW_VID_LOWER_GPIO_CNTL, low_vid_lower_gpio_cntl); + RegWrite32(R600_MEDIUM_VID_LOWER_GPIO_CNTL, medium_vid_lower_gpio_cntl); + RegWrite32(R600_HIGH_VID_LOWER_GPIO_CNTL, high_vid_lower_gpio_cntl); + RegWrite32(R600_CTXSW_VID_LOWER_GPIO_CNTL, ctxsw_vid_lower_gpio_cntl); + RegWrite32(R600_LOWER_GPIO_ENABLE, lower_gpio_enable); } - else - if (chip_family >= CHIP_FAMILY_R600) - { - uint32_t viph_control = RegRead32(RADEON_VIPH_CONTROL); - uint32_t bus_cntl = RegRead32(RADEON_BUS_CNTL); - uint32_t d1vga_control = RegRead32(AVIVO_D1VGA_CONTROL); - uint32_t d2vga_control = RegRead32(AVIVO_D2VGA_CONTROL); - uint32_t vga_render_control = RegRead32(AVIVO_VGA_RENDER_CONTROL); - uint32_t rom_cntl = RegRead32(R600_ROM_CNTL); - uint32_t general_pwrmgt = RegRead32(R600_GENERAL_PWRMGT); - uint32_t low_vid_lower_gpio_cntl = RegRead32(R600_LOW_VID_LOWER_GPIO_CNTL); - uint32_t medium_vid_lower_gpio_cntl = RegRead32(R600_MEDIUM_VID_LOWER_GPIO_CNTL); - uint32_t high_vid_lower_gpio_cntl = RegRead32(R600_HIGH_VID_LOWER_GPIO_CNTL); - uint32_t ctxsw_vid_lower_gpio_cntl = RegRead32(R600_CTXSW_VID_LOWER_GPIO_CNTL); - uint32_t lower_gpio_enable = RegRead32(R600_LOWER_GPIO_ENABLE); - - // disable VIP - RegWrite32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN)); - - // enable the rom - RegWrite32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM)); - - // Disable VGA mode - RegWrite32(AVIVO_D1VGA_CONTROL, (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT))); - RegWrite32(AVIVO_D2VGA_CONTROL, (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT))); - RegWrite32(AVIVO_VGA_RENDER_CONTROL, (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK)); - RegWrite32(R600_ROM_CNTL, ((rom_cntl & ~R600_SCK_PRESCALE_CRYSTAL_CLK_MASK) | (1 << R600_SCK_PRESCALE_CRYSTAL_CLK_SHIFT) | R600_SCK_OVERWRITE)); - RegWrite32(R600_GENERAL_PWRMGT, (general_pwrmgt & ~R600_OPEN_DRAIN_PADS)); - RegWrite32(R600_LOW_VID_LOWER_GPIO_CNTL, (low_vid_lower_gpio_cntl & ~0x400)); - RegWrite32(R600_MEDIUM_VID_LOWER_GPIO_CNTL, (medium_vid_lower_gpio_cntl & ~0x400)); - RegWrite32(R600_HIGH_VID_LOWER_GPIO_CNTL, (high_vid_lower_gpio_cntl & ~0x400)); - RegWrite32(R600_CTXSW_VID_LOWER_GPIO_CNTL, (ctxsw_vid_lower_gpio_cntl & ~0x400)); - RegWrite32(R600_LOWER_GPIO_ENABLE, (lower_gpio_enable | 0x400)); - - ret = read_vbios(true); - - // restore regs - RegWrite32(RADEON_VIPH_CONTROL, viph_control); - RegWrite32(RADEON_BUS_CNTL, bus_cntl); - RegWrite32(AVIVO_D1VGA_CONTROL, d1vga_control); - RegWrite32(AVIVO_D2VGA_CONTROL, d2vga_control); - RegWrite32(AVIVO_VGA_RENDER_CONTROL, vga_render_control); - RegWrite32(R600_ROM_CNTL, rom_cntl); - RegWrite32(R600_GENERAL_PWRMGT, general_pwrmgt); - RegWrite32(R600_LOW_VID_LOWER_GPIO_CNTL, low_vid_lower_gpio_cntl); - RegWrite32(R600_MEDIUM_VID_LOWER_GPIO_CNTL, medium_vid_lower_gpio_cntl); - RegWrite32(R600_HIGH_VID_LOWER_GPIO_CNTL, high_vid_lower_gpio_cntl); - RegWrite32(R600_CTXSW_VID_LOWER_GPIO_CNTL, ctxsw_vid_lower_gpio_cntl); - RegWrite32(R600_LOWER_GPIO_ENABLE, lower_gpio_enable); - } return ret; } @@ -2379,7 +2386,7 @@ bool radeon_card_posted(void) { uint32_t reg; - + // first check CRTCs reg = RegRead32(RADEON_CRTC_GEN_CNTL) | RegRead32(RADEON_CRTC2_GEN_CNTL); if (reg & RADEON_CRTC_EN) @@ -2426,8 +2433,8 @@ static bool init_card(pci_dt_t *pci_dev) { bool add_vbios = true; - int i; - int n_ports = 0; + int i; + int n_ports = 0; card = malloc(sizeof(card_t)); if (!card) @@ -2465,12 +2472,12 @@ DBG("Framebuffer @0x%08X MMIO @0x%08X I/O Port @0x%08X ROM Addr @0x%08X\n", (unsigned) card->fb, (unsigned) card->mmio, (unsigned) card->io, pci_config_read32(pci_dev->dev.addr, PCI_ROM_ADDRESS)); - + card->posted = radeon_card_posted(); DBG("ATI card %s, ", card->posted ? "POSTed" : "non-POSTed"); DBG("\n"); get_vram_size(); - + getBoolForKey(kATYbinimage, &add_vbios, &bootInfo->chameleonConfig); if (add_vbios) @@ -2509,9 +2516,7 @@ // which means one of the fb's or kNull DBG("Framebuffer set to device's default: %s\n", card->cfg_name); - } - else - { + } else { // else, use the fb name returned by AtiConfig. verbose("(AtiConfig) Framebuffer set to: %s\n", card->cfg_name); } @@ -2523,9 +2528,7 @@ { card->ports = (uint8_t)n_ports; // use it. DBG("(AtiPorts) Nr of ports set to: %d\n", card->ports); - } - else - { + } else { // else, match cfg_name with card_configs list and retrive default nr of ports. for (i = 0; i < kCfgEnd; i++) { Index: trunk/i386/libsaio/sys.c =================================================================== --- trunk/i386/libsaio/sys.c (revision 2858) +++ trunk/i386/libsaio/sys.c (revision 2859) @@ -102,6 +102,7 @@ // Device entries must be ordered by bios device numbers. static struct devsw devsw[] = { +// { "sd", 0x80, kBIOSDevTypeHardDrive }, /* DEV_SD */ { "hd", 0x80, kBIOSDevTypeHardDrive }, /* DEV_HD */ { "en", 0xE0, kBIOSDevTypeNetwork }, /* DEV_EN */ { "rd", 0x100, kBIOSDevTypeHardDrive }, Index: trunk/i386/libsaio/ati.h =================================================================== --- trunk/i386/libsaio/ati.h (revision 2858) +++ trunk/i386/libsaio/ati.h (revision 2859) @@ -107,6 +107,7 @@ CHIP_FAMILY_TOBAGO, CHIP_FAMILY_ELLESMERE, /* Polaris 10 */ CHIP_FAMILY_BAFFIN, /* Polaris 11 */ + CHIP_FAMILY_GREENLAND, /* Polaris 12 */ CHIP_FAMILY_LAST } ati_chip_family_t; @@ -243,6 +244,7 @@ uint32_t flags; bool posted; } card_t; +card_t *card; /* Flags */ Index: trunk/i386/libsaio/cpu.c =================================================================== --- trunk/i386/libsaio/cpu.c (revision 2858) +++ trunk/i386/libsaio/cpu.c (revision 2859) @@ -1236,6 +1236,7 @@ DBG("\tCores: %d\n", p->CPU.NoCores); // Cores DBG("\tLogical processor: %d\n", p->CPU.NoThreads); // Logical procesor DBG("\tFeatures: 0x%08x\n", p->CPU.Features); +// DBG("\tMicrocode version: %d\n", p->CPU.MCodeVersion); // CPU microcode version verbose("\n"); #if DEBUG_CPU Index: trunk/i386/libsaio/smbios.c =================================================================== --- trunk/i386/libsaio/smbios.c (revision 2858) +++ trunk/i386/libsaio/smbios.c (revision 2859) @@ -104,10 +104,14 @@ // Bungo: #define kSMBMemoryDeviceAssetTagKey "SMmemassettag" // -/* =========================================== - Memory SPD Data (Apple Specific - Type 130) - ============================================= */ +/* ===================================================== + Firmware Volume Description (Apple Specific - Type 128) + ======================================================= */ +/* ========================================= + Memory SPD Data (Apple Specific - Type 130) + =========================================== */ + /* ============================================ OEM Processor Type (Apple Specific - Type 131) ============================================== */ @@ -123,6 +127,12 @@ ================================================ */ //#define kSMBOemPlatformFeatureKey "SMoemplatformfeature" +/* ========================================== + OEM Platform SMC (Apple Specific - Type 134) + ============================================ */ +//#define kSMBOemSMCKey "SMoemsmc" + + /* ==================================================*/ #define getFieldOffset(struct, field) ((uint8_t)(uint32_t)&(((struct *)0)->field)) @@ -368,6 +378,12 @@ Apple Specific ============== */ + // Firmware Volume Description (Apple Specific - Type 128) + // kSMBTypeFirmwareVolume + + // Memory SPD Data (Apple Specific - Type 130) + // kSMBTypeMemorySPD + // OEM Processor Type (Apple Specific - Type 131) {kSMBTypeOemProcessorType, kSMBWord, getFieldOffset(SMBOemProcessorType, ProcessorType), kSMBOemProcessorTypeKey, getSMBOemProcessorType, NULL}, @@ -380,7 +396,13 @@ /* {kSMBTypeOemPlatformFeature, kSMBWord, getFieldOffset(SMBOemPlatformFeature, PlatformFeature), kSMBOemPlatformFeatureKey, getSMBOemPlatformFeature, NULL} + + // OEM Platform Feature (Apple Specific - Type 134) + + {kSMBTypeOemSMCVersion, kSMBWord, getFieldOffset(SMBOemSMCVersion, SMCVersion), kSMBOemSMCVersionKey, + getSMBOemSMCVersion, NULL} */ + }; int numOfSetters = sizeof(SMBSetters) / sizeof(SMBValueSetter); @@ -414,40 +436,16 @@ //#define kDefaultBoardProcessorType "11" // 0xB #define kDefaultSystemVersion "1.0" #define kDefaultBIOSRelease 256 // 256 = 0x0100 -> swap bytes: 0x0001 -> Release: 0.1 (see SMBIOS spec. table Type 0) -//#define kDefaultLocatioInChassis "Part Component" -//#define KDefaultBoardSerialNumber "C02140302D5DMT31M" // new C07019501PLDCVHAD - C02032101R5DC771H //=========== Mac mini =========== #define kDefaultMacMiniFamily "Napa Mac" // Macmini2,1 family = "Napa Mac" not "Mac mini" -//#define kDefaultMacMiniBoardAssetTagNumber "Mini-Aluminum" - #define kDefaultMacMini "Macmini2,1" #define kDefaultMacMiniBIOSVersion " MM21.88Z.009A.B00.0706281359" #define kDefaultMacMiniBIOSReleaseDate "06/28/07" #define kDefaultMacMiniBoardProduct "Mac-F4208EAA" -// MacMini5,1 Mac-8ED6AF5B48C039E1 - MM51.88Z.0077.B0F.1110201309 - -// MacMini5,2 Mac-4BC72D62AD45599E - -// MacMini5,3 -// Bios: MM51.88Z.0077.B10.1201241549 -// Board: Mac-F65AE981FFA204ED -// Data: 01/24/2012 - -// MacMini 6,1 -// Bios: MM61.88Z.0106.B03.1211161202 -// Board: Mac-F65AE981FFA204ED -// Data: 10/14/2012 - -// MacMini 6,2 -// Bios: MM61.88Z.0106.B03.1211161202 -// Board: Mac-FC02E91DDD3FA6A4 -// Data: 10/14/2012 - //=========== MacBook =========== #define kDefaultMacBookFamily "MacBook" -//#define kDefaultMacBookBoardAssetTagNumber "MacBook-Black" #define kDefaultMacBook "MacBook4,1" #define kDefaultMacBookBIOSVersion " MB41.88Z.00C1.B00.0802091535" @@ -457,60 +455,22 @@ //=========== MacBookAir =========== #define kDefaultMacBookAirFamily "MacBook Air" -// MacBookAir4,1 - Mac-C08A6BB70A942AC2 -// MacBookAir4,2 - Mac-742912EFDBEE19B3 - // MacBookAir5,2 #define kDefaultMacBookAir "MacBookAir5,2" #define kDefaultMacBookAirBIOSVersion " MBA51.88Z.00EF.B00.1205221442" #define kDefaultMacBookAirBIOSReleaseDate "05/10/12" #define kDefaultMacBookBoardAirProduct "Mac-2E6FAB96566FE58C" -// MacBookAir6,1 -// Bios: MBA61.88Z.0099.B04.1309271229 -// Board: Mac-35C1E88140C3E6CF -// Data: 24/06/13 - -// MacBookAir6,2 -// Bios: MBA62.88Z.00EF.B00.1205221442 -// Board: Mac-7DF21CB3ED6977E5 -// Data: 24/06/13 - //=========== MacBookPro =========== #define kDefaultMacBookProFamily "MacBook Pro" -//#define kDefaultMacBookProBoardAssetTagNumber "MacBook-Aluminum" #define kDefaultMacBookPro "MacBookPro4,1" #define kDefaultMacBookProBIOSVersion " MBP41.88Z.00C1.B03.0802271651" #define kDefaultMacBookProBIOSReleaseDate "02/27/08" #define kDefaultMacBookProBoardProduct "Mac-F42C89C8" -// MacBookPro8,1 -// Bios: MBP81.88Z.0047.B24.1110141131 -// Board: Mac-94245B3640C91C81 -// Data: 10/14/11 - -// MacBookPro8,2 -// Bios: -// Board: Mac_94245A3940C91C80 -// Data: 10/14/11 - -// MacBookPro8,3 -// Bios: -// Board: Mac-942459F5819B171B -// Data: 10/31/11 - -// MacBookPro10,2 -// Bios: MBP102.88Z.0106.B01.1208311637 -// Board: Mac-AFD8A9D944EA4843 -// Data: 10/02/2012 - -// MacBookPro11,2 - Mac-3CBD00234E554E41 - MBP112.88Z.0138.B03.1310291227 -// MacBookPro11,3 - Mac-2BD1B31983FE1663 - MBP112.88Z.0138.B02.1310181745 - //=========== iMac =========== #define kDefaultiMacFamily "iMac" -//#define kDefaultiMacBoardAssetTagNumber "iMac-Aluminum" #define kDefaultiMac "iMac8,1" #define kDefaultiMacBIOSVersion " IM81.88Z.00C1.B00.0903051113" @@ -524,8 +484,6 @@ #define kDefaultiMacNehalemBIOSVersion " IM111.88Z.0034.B02.1003171314" #define kDefaultiMacNehalemBIOSReleaseDate "03/17/10" #define kDefaultiMacNehalemBoardProduct "Mac-F2268DAE" -// iMac11,2 -// iMac11,3 // iMac12,1 #define kDefaultiMacSandy "iMac12,1" @@ -533,40 +491,13 @@ #define kDefaultiMacSandyBIOSReleaseDate "04/22/11" #define kDefaultiMacSandyBoardProduct "Mac-942B5BF58194151B" -// iMac12,2 -// Bios: IM121.88Z.0047.B1D.1110171110" -// Data: 10/17/11 -// Board: Mac-942B59F58194171B" - -// iMac13,1 -// Bios: IM131.88Z.010A.B05.1211151146 -// Data: 11/15/2012 -// Board: Mac-00BE6ED71E35EB86 - -// iMac13,2 -// Bios: IM131.88Z.00CE.B00.1203281326 -// Data: 03/28/2012 -// Board: Mac-FC02E91DDD3FA6A4 - -// iMac14,1 -// iMac14,2 -// iMac14,3 -// iMac14,4 -// Bios: IM144.88Z.0179.B03.1405241029 -// Data: 05/20/2014 -// Board: Mac-81E3E92DD6088272 - //=========== MacPro =========== #define kDefaultMacProFamily "MacPro" // MacPro's family = "MacPro" not "Mac Pro" -//#define KDefauktMacProBoardAssetTagNumber "Pro-Enclosure" -//#define kDefaultMacProBoardType "0x0B" // 11 #define kDefaultMacPro "MacPro3,1" #define kDefaultMacProBIOSVersion " MP31.88Z.006C.B05.0903051113" #define kDefaultMacProBIOSReleaseDate "08/03/2010" -//#define kDefaultMacProSystemVersion "1.3" #define kDefaultMacProBoardProduct "Mac-F42C88C8" -//#define KDefaultMacProBoardSerialNumber "J593902RA4MFE" // Mac Pro 4,1 core i7/Xeon #define kDefaultMacProNahWestSystemVersion "0.0" @@ -574,43 +505,20 @@ #define kDefaultMacProNehalem "MacPro4,1" #define kDefaultMacProNehalemBIOSVersion " MP41.88Z.0081.B07.0910130729" #define kDefaultMacProNehalemBIOSReleaseDate "10/13/09" -//#define kDefaultMacProNehalemSystemVersion "1.4" #define kDefaultMacProNehalemBoardProduct "Mac-F221BEC8" -//#define KDefaultMacProNehalemBoardSerialNumber "J593004RB1LUE" -// "J591302R61LUC " // 2-cpu board -// "J591002JV4MFB " // 1-cpu board // Mac Pro 5,1 core i7/Xeon #define kDefaultMacProWestmere "MacPro5,1" #define kDefaultMacProWestmereBIOSVersion " MP51.88Z.007F.B03.1010071432" #define kDefaultMacProWestmereBIOSReleaseDate "10/07/10" -//#define kDefaultMacProWestmereSystemVersion "1.2" #define kDefaultMacProWestmereBoardProduct "Mac-F221BEC8" -//#define KDefaultMacProWestmereBoardSerialNumber "J522700H7BH8C" -// "J503104H1BH8A " // 2-cpu board // Mac Pro 6,1 #define kDefaultMacProHaswell "MacPro6,1" #define kDefaultMacProHaswellBIOSVersion "MP61.88Z.0116.B04.1312061508" #define kDefaultMacProHaswellBIOSReleaseDate "12/06/2013" -//#define kDefaultMacProHaswellSystemVersion "1.?" #define kDefaultMacProHaswellBoardProduct "Mac-F60DEB81FF30ACF6" -//#define KDefaultMacProHaswellBoardSerialNumber "F5K3474008JFNN215" -//#define KDefaultBoardSerialNumber "C02140302D5DMT31M" -// "C07019501PLDCVHAD" -// "C02032101R5DC771H" - -// J593902RA4MFE 3,1 -// J5031046RCZJA 5,1 -// J521101A5CZJC 3,1 -// J593004RB1LUE MacPro4,1 -// J513401PZBH8C 5,1 -// J590802LC4ACB 3,1 -// J594900AH1LUE 4,1 -// J512500HZBH8C 5,1 -// J522700H7BH8C MacPro5,1 - /* ============================================ */ bool useSMBIOSdefaults = true; // Bungo @@ -1087,13 +995,31 @@ setSMBValue(structPtr, numOfSetters - 2 , (returnType *)&(p->PlatformFeature)); - structPtr->new = (SMBStructHeader *)((uint8_t *)structPtr->new + sizeof(SMBOemPPlatformFeature) + 2); + structPtr->new = (SMBStructHeader *)((uint8_t *)structPtr->new + sizeof(SMBOemPlatformFeature) + 2); tableLength += sizeof(SMBOemPlatformFeature) + 2; structureCount++; } */ +/* ========================================= + OEM SMC Version (Apple Specific - Type 134) + =========================================== */ +/* +void addSMBOemSMCVersion(SMBStructPtrs *structPtr) +{ + SMBOemSMCVersion *p = (SMBOemSMCVersion *)structPtr->new; + + p->header.type = kSMBTypeOemSMCVersion; + p->header.length = sizeof(SMBOemSMCVersion); + p->header.handle = handle++; + + setSMBValue(structPtr, numOfSetters - 2 , (returnType *)&(p->SMCVersion)); + + structPtr->new = (SMBStructHeader *)((uint8_t *)structPtr->new + sizeof(SMBOemSMCVersion) + 2); + tableLength += sizeof(SMBOemSMCVersion) + 2; + structureCount++; +} +*/ - /* ============================================== EndOfTable ================================================ */ @@ -1237,7 +1163,8 @@ case kSMBTypeOemProcessorType: case kSMBTypeOemProcessorBusSpeed: // case kSMBTypeOemPlatformFeature: - /* And this one too, to be added at the end */ +// case kSMBTypeOemSMCVersion: + /* And this one too, to be added at the end */ case kSMBTypeEndOfTable: break; @@ -1265,6 +1192,7 @@ addSMBOemProcessorType(structPtr); addSMBOemProcessorBusSpeed(structPtr); // addSMBOemPlatformFeature(structPtr); +// addSMBOemSMCVersion(structPtr); addSMBEndOfTable(structPtr); } Index: trunk/i386/libsaio/smbios_decode.c =================================================================== --- trunk/i386/libsaio/smbios_decode.c (revision 2858) +++ trunk/i386/libsaio/smbios_decode.c (revision 2859) @@ -88,7 +88,7 @@ "Sub Notebook", /* 0Eh */ "Space-saving", /* 0Fh */ "Lunch Box", /* 10h */ - "Main Server Chassis", /* 11h */ + "Main Server Chassis", /* 11h */ /* CIM_Chassis.ChassisPackageType says "Main System Chassis" */ "Expansion Chassis", /* 12h */ "SubChassis", /* 13h */ "Bus Expansion Chassis",/* 14h */ @@ -100,7 +100,10 @@ "Compact PCI", /* 1Ah */ "Advanced TCA", /* 1Bh */ "Blade", /* 1Ch */ // An SMBIOS implementation for a Blade would contain a Type 3 Chassis structure - "Blade Enclosing" /* 1Dh */ // A Blade Enclosure is a specialized chassis that contains a set of Blades. + "Blade Enclosing", /* 1Dh */ // A Blade Enclosure is a specialized chassis that contains a set of Blades. + "Tablet", /* 1Eh */ + "Convertible", /* 1Fh */ + "Detachable" /* 0x20h */ }; /*==== @@ -164,7 +167,11 @@ "Socket FM1", "Socket FM2", "Socket LGA2011-3", - "Socket LGA1356-3" /* 2Ch */ + "Socket LGA1356-3", /* 2Ch */ + "Socket LGA1150", + "Socket BGA1168", + "Socket BGA1234", + "Socket BGA1364" /* 0x30h */ }; static const char *SMBMemoryDeviceFormFactors[] = // Bungo: strings for form factor (Table Type 17 - Memory Device) @@ -217,7 +224,11 @@ "RAM", /* 17h unused */ "DDR3", /* 18h DDR3, chosen in [5776134] */ "FBD2", /* 19h FBD2 */ - "DDR4" /* 1Ah DDR4 */ + "DDR4", /* 1Ah DDR4 */ + "LPDDR", /* 1Bh LPDDR */ + "LPDDR2", /* 1Ch LPDDR2 */ + "LPDDR3", /* 1Dh LPDDR3 */ + "LPDDR4" /* 1Eh LPDDR5 */ }; static const int kSMBMemoryDeviceTypeCount = sizeof(SMBMemoryDeviceTypes) / sizeof(SMBMemoryDeviceTypes[0]); Index: trunk/i386/libsaio/smbios.h =================================================================== --- trunk/i386/libsaio/smbios.h (revision 2858) +++ trunk/i386/libsaio/smbios.h (revision 2859) @@ -135,6 +135,7 @@ kSMBTypeOemProcessorType = 131, // Processor Type (Type 131) kSMBTypeOemProcessorBusSpeed = 132, // Processor Bus Speed (Type 132) kSMBTypeOemPlatformFeature = 133 // Platform Feature (Type 133) +// kSMBTypeOemSMCVersion = 134 // SMC Version (Type 134) }; //---------------------------------------------------------------------------------------------------------- @@ -841,7 +842,7 @@ /* ============================================== OEM Platform Feature (Apple Specific - Type 133) ================================================ */ -struct SMBOemPlatformFeature +typedef struct SMBOemPlatformFeature { SMB_STRUCT_HEADER // Type 133 SMBWord PlatformFeature; @@ -849,6 +850,17 @@ //---------------------------------------------------------------------------------------------------------- +/* ========================================= + OEM SMC Version (Apple Specific - Type 134) + =========================================== */ +typedef struct SMBOemSMCVersion +{ + SMB_STRUCT_HEADER // Type 134 + SMBWord SMCVersion; +} __attribute__((packed)) SMBOemSMCVersion; + +//---------------------------------------------------------------------------------------------------------- + #define SMBIOS_ORIGINAL 0 #define SMBIOS_PATCHED 1 Index: trunk/i386/libsaio/stringTable.c =================================================================== --- trunk/i386/libsaio/stringTable.c (revision 2858) +++ trunk/i386/libsaio/stringTable.c (revision 2859) @@ -361,8 +361,8 @@ */ bool getBoolForKey(const char *key, bool *result_val, config_file_t *config) { - const char *key_val; - int size; + const char *key_val; + int size; if (getValueForKey(key, &key_val, &size, config)) { @@ -703,7 +703,7 @@ { char *dirspec[] = { "/Extra/org.chameleon.Boot.plist", - "/Extra/com.apple.Boot.plist", /* DEPRECIATED */ + "/Extra/com.apple.Boot.plist", /* DEPRECATED */ }; int i; @@ -755,7 +755,7 @@ { // Check for depreciated file names and annoy the user about it. if(strstr(full_path, "com.apple.Boot.plist")) { - printf("%s is depreciated.\n", full_path); + printf("%s is deprecated.\n", full_path); full_path[strlen(full_path) - strlen("com.apple.Boot.plist")] = 0; printf("Please use the file %sorg.chameleon.Boot.plist instead.\n", full_path); pause(); @@ -849,7 +849,7 @@ else { // use rfd - fixedsize = MIN(file_size(rfd), IO_CONFIG_DATA_SIZE); + fixedsize = MIN(file_size(rfd), IO_CONFIG_DATA_SIZE); count = read(rfd, config->plist, fixedsize); close(rfd); if (count != fixedsize) return -1; Index: trunk/i386/libsaio/smbios_getters.c =================================================================== --- trunk/i386/libsaio/smbios_getters.c (revision 2858) +++ trunk/i386/libsaio/smbios_getters.c (revision 2859) @@ -107,16 +107,15 @@ int nhm_bus = 0x3F; static long possible_nhm_bus[] = {0xFF, 0x7F, 0x3F}; unsigned long did, vid; - unsigned int i; + unsigned long qpimult, qpibusspeed = 0; + int i; // Nehalem supports Scrubbing // First, locate the PCI bus where the MCH is located for(i = 0; i < (sizeof(possible_nhm_bus)/sizeof(possible_nhm_bus[0])); i++) { - vid = pci_config_read16(PCIADDR(possible_nhm_bus[i], 3, 4), 0x00); - did = pci_config_read16(PCIADDR(possible_nhm_bus[i], 3, 4), 0x02); - vid &= 0xFFFF; - did &= 0xFF00; + vid = (pci_config_read16(PCIADDR(possible_nhm_bus[i], 3, 4), 0x00) & 0xFFFF); + did = (pci_config_read16(PCIADDR(possible_nhm_bus[i], 3, 4), 0x02) & 0xFF00); if(vid == 0x8086 && did >= 0x2C00) { @@ -124,15 +123,13 @@ } } - unsigned long qpimult, qpibusspeed; - qpimult = pci_config_read32(PCIADDR(nhm_bus, 2, 1), 0x50); - qpimult &= 0x7F; + qpimult = (pci_config_read32(PCIADDR(nhm_bus, 2, 1), 0x50) & 0x7F); DBG("qpimult %d\n", qpimult); qpibusspeed = (qpimult * 2 * (Platform.CPU.FSBFrequency/1000000LL)); // Rek: rounding decimals to match original mac profile info - if (qpibusspeed%100 != 0) + if (qpibusspeed % 100 != 0) { - qpibusspeed = ((qpibusspeed+50)/100)*100; + qpibusspeed = ((qpibusspeed + 50) / 100) * 100; } DBG("qpibusspeed %d\n", qpibusspeed); value->word = qpibusspeed; @@ -648,11 +645,11 @@ return true; } - // getting smbios addr with fast compare ops, late checksum testing ... #define COMPARE_DWORD(a,b) ( *((uint32_t *) a) == *((uint32_t *) b) ) -static const char * const SMTAG = "_SM_"; -static const char* const DMITAG = "_DMI_"; +static const char *const SMTAG = "_SM_"; +//static const char *const SM3TAG = "_SM3_"; // smbios3_decode +static const char *const DMITAG = "_DMI_"; SMBEntryPoint *getAddressOfSmbiosTable(void) { @@ -677,4 +674,3 @@ pause(); return NULL; } -