Index: branches/azimutz/Chazi/i386/modules/Memory/dram_controllers.c
===================================================================
--- branches/azimutz/Chazi/i386/modules/Memory/dram_controllers.c	(revision 527)
+++ branches/azimutz/Chazi/i386/modules/Memory/dram_controllers.c	(revision 528)
@@ -469,12 +469,12 @@
 	
 	// RAS-To-CAS (tRCD)
 	Platform.RAM.TRC = (mc_channel_bank_timing >> 9) & 0xF; 
-	
+
 	// RAS Precharge (tRP)
-	Platform.RAM.CAS = (mc_channel_bank_timing >> 4) & 0x1F; 
+	Platform.RAM.TRP = mc_channel_bank_timing & 0xF;
 	
 	// RAS Active to precharge (tRAS)
-	Platform.RAM.TRP = mc_channel_bank_timing & 0xF;
+	Platform.RAM.RAS = (mc_channel_bank_timing >> 4) & 0x1F;
 	
 	// Single , Dual or Triple Channels
 	if (mc_control == 1 || mc_control == 2 || mc_control == 4 )
Index: branches/azimutz/CleanCut/i386/libsaio/dram_controllers.c
===================================================================
--- branches/azimutz/CleanCut/i386/libsaio/dram_controllers.c	(revision 527)
+++ branches/azimutz/CleanCut/i386/libsaio/dram_controllers.c	(revision 528)
@@ -471,10 +471,10 @@
 	Platform.RAM.TRC = (mc_channel_bank_timing >> 9) & 0xF; 
 	
 	// RAS Precharge (tRP)
-	Platform.RAM.CAS = (mc_channel_bank_timing >> 4) & 0x1F; 
+	Platform.RAM.TRP = mc_channel_bank_timing & 0xF;
 	
 	// RAS Active to precharge (tRAS)
-	Platform.RAM.RAS = mc_channel_bank_timing & 0xF;
+	Platform.RAM.RAS = (mc_channel_bank_timing >> 4) & 0x1F;
 	
 	// Single , Dual or Triple Channels
 	if (mc_control == 1 || mc_control == 2 || mc_control == 4 )