Index: trunk/i386/libsaio/pci_root.c
===================================================================
--- trunk/i386/libsaio/pci_root.c	(revision 56)
+++ trunk/i386/libsaio/pci_root.c	(revision 57)
@@ -63,7 +63,7 @@
 		}
 		goto out;
 	}
-#if 0
+#if 1
 	/* Chameleon compatibility */
 	if (getValueForKey("PciRoot", &val, &len, &bootInfo->bootConfig)) {
 		if (isdigit(val[0])) {
@@ -107,12 +107,14 @@
 	dsdt_uid = findpciroot(new_dsdt, fsize);
 	free(new_dsdt);
 
-	if (dsdt_uid >= 0 && dsdt_uid <= 9) {
-		rootuid = dsdt_uid;
-	} else {
-		verbose("Could not determine PCI-Root-UID value from DSDT!\n");
+	if(dsdt_uid == 11) dsdt_uid=0; //usually when _UID isnt present, it means uid is zero
+	else if (dsdt_uid < 0 || dsdt_uid > 9) 
+	{
+		printf("PciRoot uid value wasnt found, using 0, if you want it to be 1, use -PciRootUID flag");
+		dsdt_uid = 0;
+		//if(dsdt_uid == 10) //algo failed, PCI0 wasnt found
 	}
 out:
-	verbose("Using PCI-Root-UID value %d\n", rootuid);
+	verbose("Using PCI-Root-UID value: %d\n", rootuid);
 	return rootuid;
 }
Index: trunk/i386/libsaio/nvidia.c
===================================================================
--- trunk/i386/libsaio/nvidia.c	(revision 56)
+++ trunk/i386/libsaio/nvidia.c	(revision 57)
@@ -613,8 +613,10 @@
 		return 0;
 	if(!DP_ADD_TEMP_VAL(device, nvidia_device_type))
 		return 0;
-	len = sprintf(tmp, "Slot-%x", devices_number);
-	devprop_add_value(device, "AAPL,slot-name", (uint8_t *)tmp, len + 1);
+	// Rek : Dont use sprintf return, it does not WORK !! our custom sprintf() always return 0!
+	// len = sprintf(tmp, "Slot-%x", devices_number);
+	sprintf(tmp, "Slot-%x",devices_number);
+	devprop_add_value(device, "AAPL,slot-name", tmp, strlen(tmp));
 	devices_number++;
 
 	return 1;
Index: trunk/i386/libsaio/platform.c
===================================================================
--- trunk/i386/libsaio/platform.c	(revision 56)
+++ trunk/i386/libsaio/platform.c	(revision 57)
@@ -36,9 +36,6 @@
 
 void scan_platform(void)
 {
-	const char	*value;
-	int		len;
-
 	memset(&Platform, 0, sizeof(Platform));
 	build_pci_dt();
 	scan_cpu(&Platform);
Index: trunk/i386/libsaio/pci.c
===================================================================
--- trunk/i386/libsaio/pci.c	(revision 56)
+++ trunk/i386/libsaio/pci.c	(revision 57)
@@ -109,10 +109,29 @@
 	}
 }
 
+void enable_pci_devs(void)
+{
+	uint16_t id;
+	uint32_t rcba, *fd;
+
+	id = pci_config_read16(PCIADDR(0, 0x00, 0), 0x00);
+	/* make sure we're on Intel chipset */
+	if (id != 0x8086)
+		return;
+	rcba = pci_config_read32(PCIADDR(0, 0x1f, 0), 0xf0) & ~1;
+	fd = (uint32_t *)(rcba + 0x3418);
+	/* set SMBus Disable (SD) to 0 */
+	*fd &= ~0x8;
+	/* and all devices? */
+	//*fd = 0x1;
+}
+
+
 void build_pci_dt(void)
 {
 	root_pci_dev = malloc(sizeof(pci_dt_t));
 	bzero(root_pci_dev, sizeof(pci_dt_t));
+	enable_pci_devs();
 	scan_pci_bus(root_pci_dev, 0);
 #if DEBUG_PCI
 	dump_pci_dt(root_pci_dev->children);
@@ -132,13 +151,12 @@
 	end = root_pci_dev;
 	while (end != pci_dt) {
 		current = pci_dt;
-		while (current->parent != end) {
-			current = current->parent;
-		}
+		while (current->parent != end) 	current = current->parent;
 		end = current;
-		sprintf(tmp, "%s/Pci(0x%x,0x%x)",
-			(current->parent == root_pci_dev) ? "PciRoot(0x0)" : "",
-			current->dev.bits.dev, current->dev.bits.func);
+		if (current->parent == root_pci_dev) 
+		  sprintf(tmp, "PciRoot(0x%x)/Pci(0x%x,0x%x)", getPciRootUID(), current->dev.bits.dev, current->dev.bits.func);
+		else 
+		  sprintf(tmp, "/Pci(0x%x,0x%x)",  current->dev.bits.dev, current->dev.bits.func);
 		strcat(dev_path, tmp);
 	}
 	return dev_path;