| 1 | /*␊ |
| 2 | * platform.h␊ |
| 3 | *␊ |
| 4 | */␊ |
| 5 | ␊ |
| 6 | #ifndef __LIBSAIO_PLATFORM_H␊ |
| 7 | #define __LIBSAIO_PLATFORM_H␊ |
| 8 | ␊ |
| 9 | #include "libsaio.h"␊ |
| 10 | ␊ |
| 11 | #define bit(n)␉␉(1ULL << (n))␊ |
| 12 | #define bitmask(h,l)␉((bit(h)|(bit(h)-1)) & ~(bit(l)-1))␊ |
| 13 | #define bitfield(x,h,l)␉(((x) & bitmask(h,l)) >> l)␊ |
| 14 | ␊ |
| 15 | extern void scan_platform();␊ |
| 16 | ␊ |
| 17 | /* SMBIOS Memory Types */ ␊ |
| 18 | #define SMB_MEM_TYPE_UNDEFINED␉0 ␊ |
| 19 | #define SMB_MEM_TYPE_OTHER␉␉1 ␊ |
| 20 | #define SMB_MEM_TYPE_UNKNOWN␉2 ␊ |
| 21 | #define SMB_MEM_TYPE_DRAM␉␉3 ␊ |
| 22 | #define SMB_MEM_TYPE_EDRAM␉␉4 ␊ |
| 23 | #define SMB_MEM_TYPE_VRAM␉␉5 ␊ |
| 24 | #define SMB_MEM_TYPE_SRAM␉␉6 ␊ |
| 25 | #define SMB_MEM_TYPE_RAM␉␉7 ␊ |
| 26 | #define SMB_MEM_TYPE_ROM␉␉8 ␊ |
| 27 | #define SMB_MEM_TYPE_FLASH␉␉9 ␊ |
| 28 | #define SMB_MEM_TYPE_EEPROM␉␉10 ␊ |
| 29 | #define SMB_MEM_TYPE_FEPROM␉␉11 ␊ |
| 30 | #define SMB_MEM_TYPE_EPROM␉␉12 ␊ |
| 31 | #define SMB_MEM_TYPE_CDRAM␉␉13 ␊ |
| 32 | #define SMB_MEM_TYPE_3DRAM␉␉14 ␊ |
| 33 | #define SMB_MEM_TYPE_SDRAM␉␉15 ␊ |
| 34 | #define SMB_MEM_TYPE_SGRAM␉␉16 ␊ |
| 35 | #define SMB_MEM_TYPE_RDRAM␉␉17 ␊ |
| 36 | #define SMB_MEM_TYPE_DDR␉␉18 ␊ |
| 37 | #define SMB_MEM_TYPE_DDR2␉␉19 ␊ |
| 38 | #define SMB_MEM_TYPE_FBDIMM␉␉20 ␊ |
| 39 | #define SMB_MEM_TYPE_DDR3␉␉24␉␉␉// Supported in 10.5.6+ AppleSMBIOS␊ |
| 40 | ␊ |
| 41 | /* Memory Configuration Types */ ␊ |
| 42 | #define SMB_MEM_CHANNEL_UNKNOWN␉0 ␊ |
| 43 | #define SMB_MEM_CHANNEL_SINGLE␉1 ␊ |
| 44 | #define SMB_MEM_CHANNEL_DUAL␉2 ␊ |
| 45 | #define SMB_MEM_CHANNEL_TRIPLE␉3 ␊ |
| 46 | ␊ |
| 47 | /* Maximum number of ram slots */␊ |
| 48 | #define␉␉MAX_RAM_SLOTS␉␉␉16␊ |
| 49 | ␊ |
| 50 | typedef struct _RamSlotInfo_t {␊ |
| 51 | ␉bool␉␉InUse;␉␉␉␉␉␉␉// Module Present␊ |
| 52 | ␉uint32_t␉ModuleSize;␉␉␉␉␉␉// Size of Module in MB␊ |
| 53 | ␉char␉␉*spd;␉␉␉␉␉␉␉// SPD Dump␊ |
| 54 | } RamSlotInfo_t;␊ |
| 55 | ␊ |
| 56 | typedef struct _PlatformInfo_t {␊ |
| 57 | ␉bool␉Mobile;␉␉␉␉␉␉␉␉// Mobile Platform␊ |
| 58 | ␉bool␉x86_64;␉␉␉␉␉␉␉␉// 64 Bit Capable␊ |
| 59 | ␉struct PCI {␊ |
| 60 | ␉␉uint8_t␉␉␉NoDevices;␉␉␉␉// No of PCI devices␊ |
| 61 | ␉} PCI;␊ |
| 62 | ␉struct CPU {␊ |
| 63 | ␉␉uint32_t␉␉Vendor;␉␉␉␉␉// Vendor␊ |
| 64 | ␉␉uint32_t␉␉Model;␉␉␉␉␉// Model␊ |
| 65 | ␉␉uint32_t␉␉ExtModel;␉␉␉␉// Extended Model␊ |
| 66 | ␉␉uint32_t␉␉Family;␉␉␉␉␉// Family␊ |
| 67 | ␉␉uint32_t␉␉ExtFamily;␉␉␉␉// Extended Family␊ |
| 68 | ␉␉uint8_t␉␉␉NoCores;␉␉␉␉// No Cores per Package␊ |
| 69 | ␉␉uint8_t␉␉␉NoThreads;␉␉␉␉// Threads per Package␊ |
| 70 | ␉␉uint8_t␉␉␉MaxCoef;␉␉␉␉// Max Multiplier␊ |
| 71 | ␉␉uint8_t␉␉␉MaxDiv;␊ |
| 72 | ␉␉uint8_t␉␉␉CurrCoef;␉␉␉␉// Current Multiplier␊ |
| 73 | ␉␉uint8_t␉␉␉CurrDiv;␊ |
| 74 | ␉␉float␉␉␉MaxRatio;␉␉␉␉␊ |
| 75 | ␉␉float␉␉␉CurrRatio;␉␉␉␉␊ |
| 76 | ␉␉uint64_t␉␉TSCFrequency;␉␉␉// TSC Frequency Hz␊ |
| 77 | ␉␉uint64_t␉␉FSBFrequency;␉␉␉// FSB Frequency Hz␊ |
| 78 | ␉␉uint64_t␉␉CPUFrequency;␉␉␉// CPU Frequency Hz␊ |
| 79 | ␉␉bool␉␉␉Mobile;␉␉␉␉␉// Mobile CPU␊ |
| 80 | ␉␉uint32_t␉␉BrandString[16];␉␉// 48 Byte Branding String␊ |
| 81 | ␉} CPU;␊ |
| 82 | ␉struct RAM {␊ |
| 83 | ␉␉uint64_t␉␉Frequency;␉␉␉␉// Ram Frequency␊ |
| 84 | ␉␉uint32_t␉␉Divider;␉␉␉␉// Memory divider␊ |
| 85 | ␉␉float␉␉␉CAS;␉␉␉␉␉// CAS 1/2/2.5/3/4/5/6/7␊ |
| 86 | ␉␉uint8_t␉␉␉TRC;␉␉␉␉␉␊ |
| 87 | ␉␉uint8_t␉␉␉TRP;␊ |
| 88 | ␉␉uint8_t␉␉␉RAS;␊ |
| 89 | ␉␉uint8_t␉␉␉Channels;␉␉␉␉// Channel Configuration Single,Dual or Triple␊ |
| 90 | ␉␉uint8_t␉␉␉NoSlots;␉␉␉␉// Maximum no of slots available␊ |
| 91 | ␉␉uint8_t␉␉␉Type;␉␉␉␉␉// Standard SMBIOS v2.5 Memory Type␊ |
| 92 | ␉␉char␉␉␉*BrandString;␉␉␉// Branding String Memory Controller␊ |
| 93 | ␉␉RamSlotInfo_t␉DIMM[MAX_RAM_SLOTS];␉// Information about each slot␊ |
| 94 | ␉} RAM;␊ |
| 95 | } PlatformInfo_t;␊ |
| 96 | ␊ |
| 97 | extern PlatformInfo_t Platform;␊ |
| 98 | ␊ |
| 99 | #endif /* !__LIBSAIO_PLATFORM_H */␊ |
| 100 | ␊ |
| 101 | |
