1 | /*␊ |
2 | * Copyright (c) 1999 Apple Computer, Inc. All rights reserved.␊ |
3 | *␊ |
4 | * @APPLE_LICENSE_HEADER_START@␊ |
5 | * ␊ |
6 | * This file contains Original Code and/or Modifications of Original Code␊ |
7 | * as defined in and that are subject to the Apple Public Source License␊ |
8 | * Version 2.0 (the 'License'). You may not use this file except in␊ |
9 | * compliance with the License. Please obtain a copy of the License at␊ |
10 | * http://www.opensource.apple.com/apsl/ and read it before using this␊ |
11 | * file.␊ |
12 | * ␊ |
13 | * The Original Code and all software distributed under the License are␊ |
14 | * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER␊ |
15 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,␊ |
16 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,␊ |
17 | * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.␊ |
18 | * Please see the License for the specific language governing rights and␊ |
19 | * limitations under the License.␊ |
20 | * ␊ |
21 | * @APPLE_LICENSE_HEADER_END@␊ |
22 | */␊ |
23 | /*␊ |
24 | * Relocation types used in the ppc implementation. Relocation entries for␊ |
25 | * things other than instructions use the same generic relocation as discribed␊ |
26 | * above and their r_type is RELOC_VANILLA. The rest of the relocation types␊ |
27 | * are for instructions. Since they are for instructions the r_address field␊ |
28 | * indicates the 32 bit instruction that the relocation is to be preformed on.␊ |
29 | * The fields r_pcrel and r_length are ignored for non-RELOC_VANILLA r_types␊ |
30 | * except for PPC_RELOC_BR14.␊ |
31 | *␊ |
32 | * For PPC_RELOC_BR14 if the r_length is the unused value 3, then the branch was␊ |
33 | * statically predicted setting or clearing the Y-bit based on the sign of the␊ |
34 | * displacement or the opcode. If this is the case the static linker must flip␊ |
35 | * the value of the Y-bit if the sign of the displacement changes for non-branch␊ |
36 | * always conditions.␊ |
37 | */␊ |
38 | enum reloc_type_ppc␊ |
39 | {␊ |
40 | PPC_RELOC_VANILLA,␉/* generic relocation as discribed above */␊ |
41 | PPC_RELOC_PAIR,␉/* the second relocation entry of a pair */␊ |
42 | PPC_RELOC_BR14,␉/* 14 bit branch displacement (to a word address) */␊ |
43 | PPC_RELOC_BR24,␉/* 24 bit branch displacement (to a word address) */␊ |
44 | PPC_RELOC_HI16,␉/* a PAIR follows with the low half */␊ |
45 | PPC_RELOC_LO16,␉/* a PAIR follows with the high half */␊ |
46 | PPC_RELOC_HA16,␉/* Same as the RELOC_HI16 except the low 16 bits and the␊ |
47 | ␉␉␉ * high 16 bits are added together with the low 16 bits␊ |
48 | ␉␉␉ * sign extened first. This means if bit 15 of the low␊ |
49 | ␉␉␉ * 16 bits is set the high 16 bits stored in the␊ |
50 | ␉␉␉ * instruction will be adjusted.␊ |
51 | ␉␉␉ */␊ |
52 | PPC_RELOC_LO14,␉/* Same as the LO16 except that the low 2 bits are not␊ |
53 | ␉␉␉ * stored in the instruction and are always zero. This␊ |
54 | ␉␉␉ * is used in double word load/store instructions.␊ |
55 | ␉␉␉ */␊ |
56 | PPC_RELOC_SECTDIFF,␉/* a PAIR follows with subtract symbol value */␊ |
57 | PPC_RELOC_PB_LA_PTR,/* prebound lazy pointer */␊ |
58 | PPC_RELOC_HI16_SECTDIFF, /* section difference forms of above. a PAIR */␊ |
59 | PPC_RELOC_LO16_SECTDIFF, /* follows these with subtract symbol value */␊ |
60 | PPC_RELOC_HA16_SECTDIFF,␊ |
61 | PPC_RELOC_JBSR,␊ |
62 | PPC_RELOC_LO14_SECTDIFF,␊ |
63 | PPC_RELOC_LOCAL_SECTDIFF /* like PPC_RELOC_SECTDIFF, but the symbol␊ |
64 | ␉␉␉␉ referenced was local. */␊ |
65 | };␊ |
66 | |