Root/
Source at commit 106 created 14 years 1 month ago. By diebuche, Adding 915patch and edid | |
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1 | /* Copied from 915 resolution created by steve tomljenovic␊ |
2 | * This source code is into the public domain.␊ |
3 | *␊ |
4 | * Included to Chameleon RC3 by meklort␊ |
5 | *␊ |
6 | * Included to RC4 and edited by deviato to match more intel chipsets␊ |
7 | *␊ |
8 | */␊ |
9 | ␊ |
10 | #include "libsaio.h"␊ |
11 | #include "915resolution.h"␊ |
12 | ␊ |
13 | char * chipset_type_names[] = {␊ |
14 | ␉"UNKNOWN", "830", "845G", "855GM", "865G", "915G", "915GM", "945G", "945GM", "945GME",␊ |
15 | ␉"946GZ", "G965", "Q965", "965GM", "G41", "G31", "G45", "GM45", "500"␊ |
16 | };␊ |
17 | ␊ |
18 | char * bios_type_names[] = {"UNKNOWN", "TYPE 1", "TYPE 2", "TYPE 3"};␊ |
19 | ␊ |
20 | int freqs[] = { 60, 75, 85 };␊ |
21 | ␊ |
22 | UInt32 get_chipset_id(void) {␊ |
23 | ␉outl(0xcf8, 0x80000000);␊ |
24 | ␉return inl(0xcfc);␊ |
25 | }␊ |
26 | ␊ |
27 | chipset_type get_chipset(UInt32 id) {␊ |
28 | ␉chipset_type type;␊ |
29 | ␉␊ |
30 | ␉switch (id) {␊ |
31 | ␉␉case 0x35758086:␊ |
32 | ␉␉␉type = CT_830;␊ |
33 | ␉␉␉break;␊ |
34 | ␉␉␊ |
35 | ␉␉case 0x25608086:␊ |
36 | ␉␉␉type = CT_845G;␊ |
37 | ␉␉␉break;␊ |
38 | ␉␉␉␉␊ |
39 | ␉␉case 0x35808086:␊ |
40 | ␉␉␉type = CT_855GM;␊ |
41 | ␉␉␉break;␊ |
42 | ␉␉␉␉␊ |
43 | ␉␉case 0x25708086:␊ |
44 | ␉␉␉type = CT_865G;␊ |
45 | ␉␉␉break;␊ |
46 | ␉␉␊ |
47 | ␉␉case 0x25808086:␊ |
48 | ␉␉␉type = CT_915G;␊ |
49 | ␉␉␉break;␊ |
50 | ␉␉␉␊ |
51 | ␉␉case 0x25908086:␊ |
52 | ␉␉␉type = CT_915GM;␊ |
53 | ␉␉␉break;␊ |
54 | ␉␉␉␊ |
55 | ␉␉case 0x27708086:␊ |
56 | ␉␉␉type = CT_945G;␊ |
57 | ␉␉␉break;␊ |
58 | ␉␉␊ |
59 | ␉␉case 0x27a08086:␊ |
60 | ␉␉␉type = CT_945GM;␊ |
61 | ␉␉␉break;␊ |
62 | ␉␉␉␊ |
63 | ␉␉case 0x27ac8086:␊ |
64 | ␉␉␉type = CT_945GME;␊ |
65 | ␉␉␉break;␊ |
66 | ␉␉␉␊ |
67 | ␉␉case 0x29708086:␊ |
68 | ␉␉␉type = CT_946GZ;␊ |
69 | ␉␉␉break;␊ |
70 | ␉␉␉␊ |
71 | ␉␉case 0x29a08086:␊ |
72 | ␉␉␉type = CT_G965;␊ |
73 | ␉␉␉break;␊ |
74 | ␉␉␉␊ |
75 | ␉␉case 0x29908086:␊ |
76 | ␉␉␉type = CT_Q965;␊ |
77 | ␉␉␉break;␊ |
78 | ␉␉␉␊ |
79 | ␉␉case 0x2a008086:␊ |
80 | ␉␉␉type = CT_965GM;␊ |
81 | ␉␉␉break;␊ |
82 | ␉␉␉␊ |
83 | ␉␉case 0x2a408086:␊ |
84 | ␉␉␉type = CT_GM45;␊ |
85 | ␉␉␉break;␊ |
86 | ␊ |
87 | ␉␉case 0x2e308086:␊ |
88 | ␉␉␉type = CT_G41;␊ |
89 | ␉␉␉break;␊ |
90 | ␊ |
91 | ␉␉case 0x29c08086:␊ |
92 | ␉␉␉type = CT_G31;␊ |
93 | ␉␉␉break;␊ |
94 | ␊ |
95 | ␉␉case 0x2e208086:␊ |
96 | ␉␉␉type = CT_G45;␊ |
97 | ␉␉␉break;␊ |
98 | ␊ |
99 | ␉␉case 0x81008086:␊ |
100 | ␉␉␉type = CT_500;␊ |
101 | ␉␉␉break;␊ |
102 | ␉␉␉␊ |
103 | ␉␉␉␊ |
104 | ␉␉default:␊ |
105 | ␉␉␉type = CT_UNKWN;␊ |
106 | ␉␉␉break;␊ |
107 | ␉}␊ |
108 | ␉return type;␊ |
109 | }␊ |
110 | ␊ |
111 | vbios_resolution_type1 * map_type1_resolution(vbios_map * map, UInt16 res) {␊ |
112 | ␉vbios_resolution_type1 * ptr = ((vbios_resolution_type1*)(map->bios_ptr + res)); ␊ |
113 | ␉return ptr;␊ |
114 | }␊ |
115 | ␊ |
116 | vbios_resolution_type2 * map_type2_resolution(vbios_map * map, UInt16 res) {␊ |
117 | ␉vbios_resolution_type2 * ptr = ((vbios_resolution_type2*)(map->bios_ptr + res)); ␊ |
118 | ␉return ptr;␊ |
119 | }␊ |
120 | ␊ |
121 | vbios_resolution_type3 * map_type3_resolution(vbios_map * map, UInt16 res) {␊ |
122 | ␉vbios_resolution_type3 * ptr = ((vbios_resolution_type3*)(map->bios_ptr + res)); ␊ |
123 | ␉return ptr;␊ |
124 | }␊ |
125 | ␊ |
126 | char detect_bios_type(vbios_map * map, char modeline, int entry_size) {␊ |
127 | ␉UInt32 i;␊ |
128 | ␉UInt16 r1, r2;␊ |
129 | ␉ ␊ |
130 | ␉r1 = r2 = 32000;␊ |
131 | ␉␊ |
132 | ␉for (i=0; i < map->mode_table_size; i++) {␊ |
133 | ␉␉if (map->mode_table[i].resolution <= r1) {␊ |
134 | ␉␉␉r1 = map->mode_table[i].resolution;␊ |
135 | ␉␉}␊ |
136 | ␉␉else {␊ |
137 | ␉␉␉if (map->mode_table[i].resolution <= r2) {␊ |
138 | ␉␉␉␉r2 = map->mode_table[i].resolution;␊ |
139 | ␉␉␉}␊ |
140 | ␉␉}␊ |
141 | ␉␉␊ |
142 | ␉␉/*printf("r1 = %d r2 = %d\n", r1, r2);*/␊ |
143 | ␉}␊ |
144 | ␊ |
145 | ␉return (r2-r1-6) % entry_size == 0;␊ |
146 | }␊ |
147 | ␊ |
148 | void close_vbios(vbios_map * map);␊ |
149 | ␊ |
150 | vbios_map * open_vbios(chipset_type forced_chipset) {␊ |
151 | ␉UInt32 z;␊ |
152 | ␉vbios_map * map = NEW(vbios_map);␊ |
153 | ␉for(z=0; z<sizeof(vbios_map); z++) ((char*)map)[z]=0;␊ |
154 | ␉␊ |
155 | ␉/*␊ |
156 | ␉ * Determine chipset␊ |
157 | ␉ */␊ |
158 | ␉␊ |
159 | ␉if (forced_chipset == CT_UNKWN) {␊ |
160 | ␉␉map->chipset_id = get_chipset_id();␊ |
161 | ␉␉map->chipset = get_chipset(map->chipset_id);␊ |
162 | ␉}␊ |
163 | ␉else if (forced_chipset != CT_UNKWN) {␊ |
164 | ␉␉map->chipset = forced_chipset;␊ |
165 | ␉}␊ |
166 | ␉else {␊ |
167 | ␉␉map->chipset = CT_915GM;␊ |
168 | ␉}␊ |
169 | ␉ ␊ |
170 | ␉/*␊ |
171 | ␉ * Map the video bios to memory␊ |
172 | ␉ */␊ |
173 | ␉␊ |
174 | ␉map->bios_ptr=(char*)VBIOS_START;␊ |
175 | ␉␊ |
176 | ␉/*␊ |
177 | ␉ * check if we have ATI Radeon␊ |
178 | ␉ */␊ |
179 | ␉ ␊ |
180 | ␉/*␊ |
181 | ␉ * check if we have NVIDIA␊ |
182 | ␉ */␊ |
183 | ␉ ␊ |
184 | ␉/*␊ |
185 | ␉ * check if we have Intel␊ |
186 | ␉ */␊ |
187 | ␉ ␊ |
188 | ␉/*␊ |
189 | ␉ * check for others␊ |
190 | ␉ */␊ |
191 | ␉␊ |
192 | ␉if (map->chipset == CT_UNKWN) {␊ |
193 | ␉␉printf("Unknown chipset type and unrecognized bios.\n");␊ |
194 | ␉␉printf("915resolution only works with Intel 800/900 series graphic chipsets.\n");␊ |
195 | ␉␊ |
196 | ␉␉printf("Chipset Id: %x\n", map->chipset_id);␊ |
197 | ␉␉close_vbios(map);␊ |
198 | ␉␉return 0;␊ |
199 | ␉}␊ |
200 | ␊ |
201 | ␉/*␊ |
202 | ␉ * Figure out where the mode table is ␊ |
203 | ␉ */␊ |
204 | ␉␊ |
205 | ␉{␊ |
206 | ␉␉char* p = map->bios_ptr + 16;␊ |
207 | ␉␉char* limit = map->bios_ptr + VBIOS_SIZE - (3 * sizeof(vbios_mode));␊ |
208 | ␉␉␉␊ |
209 | ␉␉while (p < limit && map->mode_table == 0) {␊ |
210 | ␉␉␉vbios_mode * mode_ptr = (vbios_mode *) p;␊ |
211 | ␉␉␉ ␊ |
212 | ␉␉␉if (((mode_ptr[0].mode & 0xf0) == 0x30) && ((mode_ptr[1].mode & 0xf0) == 0x30) &&␊ |
213 | ␉␉␉␉((mode_ptr[2].mode & 0xf0) == 0x30) && ((mode_ptr[3].mode & 0xf0) == 0x30)) {␊ |
214 | ␉␉␉␊ |
215 | ␉␉␉␉map->mode_table = mode_ptr;␊ |
216 | ␉␉␉}␊ |
217 | ␉␉␉ ␊ |
218 | ␉␉␉p++;␊ |
219 | ␉␉}␊ |
220 | ␉␉␊ |
221 | ␉␉if (map->mode_table == 0) {␊ |
222 | ␉␉␉printf("Unable to locate the mode table.\n");␊ |
223 | ␉␉␉printf("Please run the program 'dump_bios' as root and\n");␊ |
224 | ␉␉␉printf("email the file 'vbios.dmp' to stomljen@yahoo.com.\n");␊ |
225 | ␉␉␉printf("Chipset: %s\n", chipset_type_names[map->chipset]);␊ |
226 | ␉␉␉close_vbios(map);␊ |
227 | ␉␉␉return 0;␊ |
228 | ␉␉}␊ |
229 | ␉}␊ |
230 | ␉␊ |
231 | ␉/*␊ |
232 | ␉ * Determine size of mode table␊ |
233 | ␉ */␊ |
234 | ␉ ␊ |
235 | ␉{␊ |
236 | ␉␉vbios_mode * mode_ptr = map->mode_table;␊ |
237 | ␉␉␉␊ |
238 | ␉␉while (mode_ptr->mode != 0xff) {␊ |
239 | ␉␉␉map->mode_table_size++;␊ |
240 | ␉␉␉mode_ptr++;␊ |
241 | ␉␉}␊ |
242 | ␉}␊ |
243 | ␉␊ |
244 | ␉/*␊ |
245 | ␉ * Figure out what type of bios we have␊ |
246 | ␉ * order of detection is important␊ |
247 | ␉ */␊ |
248 | ␉␊ |
249 | ␉if (detect_bios_type(map, TRUE, sizeof(vbios_modeline_type3))) {␊ |
250 | ␉␉map->bios = BT_3;␊ |
251 | ␉}␊ |
252 | ␉else if (detect_bios_type(map, TRUE, sizeof(vbios_modeline_type2))) {␊ |
253 | ␉␉map->bios = BT_2;␊ |
254 | ␉}␊ |
255 | ␉else if (detect_bios_type(map, FALSE, sizeof(vbios_resolution_type1))) {␊ |
256 | ␉␉map->bios = BT_1;␊ |
257 | ␉}␊ |
258 | ␉else {␊ |
259 | ␉␉printf("Unable to determine bios type.\n");␊ |
260 | ␉␉printf("Please run the program 'dump_bios' as root and\n");␊ |
261 | ␉␉printf("email the file 'vbios.dmp' to stomljen@yahoo.com.\n");␊ |
262 | ␉␊ |
263 | ␉␉printf("Chipset: %s\n", chipset_type_names[map->chipset]);␊ |
264 | ␉␉printf("Mode Table Offset: $C0000 + $%x\n", ((UInt32)map->mode_table) - ((UInt32)map->bios_ptr));␊ |
265 | ␉␉printf("Mode Table Entries: %u\n", map->mode_table_size);␊ |
266 | ␉␉return 0;␊ |
267 | ␉}␊ |
268 | ␉␊ |
269 | ␉return map;␊ |
270 | }␊ |
271 | ␊ |
272 | void close_vbios(vbios_map * map) {␊ |
273 | ␉FREE(map);␊ |
274 | }␊ |
275 | ␊ |
276 | void unlock_vbios(vbios_map * map) {␊ |
277 | ␊ |
278 | ␉map->unlocked = TRUE;␊ |
279 | ␉ ␊ |
280 | ␉switch (map->chipset) {␊ |
281 | ␉␉case CT_UNKWN:␊ |
282 | ␉␉␉break;␊ |
283 | ␉␉case CT_830:␊ |
284 | ␉␉case CT_855GM:␊ |
285 | ␉␉␉outl(0xcf8, 0x8000005a);␊ |
286 | ␉␉␉map->b1 = inb(0xcfe);␊ |
287 | ␉␉␉␉␊ |
288 | ␉␉␉outl(0xcf8, 0x8000005a);␊ |
289 | ␉␉␉outb(0xcfe, 0x33);␊ |
290 | ␉␉␉break;␊ |
291 | ␉␉case CT_845G:␊ |
292 | ␉␉case CT_865G:␊ |
293 | ␉␉case CT_915G:␊ |
294 | ␉␉case CT_915GM:␊ |
295 | ␉␉case CT_945G:␊ |
296 | ␉␉case CT_945GM:␊ |
297 | ␉␉case CT_945GME:␊ |
298 | ␉␉case CT_946GZ:␊ |
299 | ␉␉case CT_G965:␊ |
300 | ␉␉case CT_Q965:␊ |
301 | ␉␉case CT_965GM:␊ |
302 | ␉␉case CT_GM45:␊ |
303 | ␉␉case CT_G41:␊ |
304 | ␉␉case CT_G31:␊ |
305 | ␉␉case CT_G45:␊ |
306 | ␉␉case CT_500:␊ |
307 | ␉␉␉outl(0xcf8, 0x80000090);␊ |
308 | ␉␉␉map->b1 = inb(0xcfd);␊ |
309 | ␉␉␉map->b2 = inb(0xcfe);␊ |
310 | ␉␉␉␊ |
311 | ␉␉␉outl(0xcf8, 0x80000090);␊ |
312 | ␉␉␉outb(0xcfd, 0x33);␊ |
313 | ␉␉␉outb(0xcfe, 0x33);␊ |
314 | ␉␉break;␊ |
315 | ␉}␊ |
316 | ␉␊ |
317 | ␉#if DEBUG␊ |
318 | ␉{␊ |
319 | ␉␉UInt32 t = inl(0xcfc);␊ |
320 | ␉␉printf("unlock PAM: (0x%08x)\n", t);␊ |
321 | ␉}␊ |
322 | #endif␊ |
323 | }␊ |
324 | ␊ |
325 | void relock_vbios(vbios_map * map) {␊ |
326 | ␊ |
327 | ␉map->unlocked = FALSE;␊ |
328 | ␉␊ |
329 | ␉switch (map->chipset) {␊ |
330 | ␉␉case CT_UNKWN:␊ |
331 | ␉␉␉break;␊ |
332 | ␉␉case CT_830:␊ |
333 | ␉␉case CT_855GM:␊ |
334 | ␉␉␉outl(0xcf8, 0x8000005a);␊ |
335 | ␉␉␉outb(0xcfe, map->b1);␊ |
336 | ␉␉␉break;␊ |
337 | ␉␉case CT_845G:␊ |
338 | ␉␉case CT_865G:␊ |
339 | ␉␉case CT_915G:␊ |
340 | ␉␉case CT_915GM:␊ |
341 | ␉␉case CT_945G:␊ |
342 | ␉␉case CT_945GM:␊ |
343 | ␉␉case CT_945GME:␊ |
344 | ␉␉case CT_946GZ:␊ |
345 | ␉␉case CT_G965:␊ |
346 | ␉␉case CT_Q965:␊ |
347 | ␉␉case CT_965GM:␊ |
348 | ␉␉case CT_GM45:␊ |
349 | ␉␉case CT_G41:␊ |
350 | ␉␉case CT_G31:␊ |
351 | ␉␉case CT_G45:␊ |
352 | ␉␉case CT_500:␊ |
353 | ␉␉␉outl(0xcf8, 0x8000005a);␊ |
354 | ␉␉␉outb(0xcfd, map->b1);␊ |
355 | ␉␉␉outb(0xcfe, map->b2);␊ |
356 | ␉␉␉break;␊ |
357 | ␉}␊ |
358 | ␉␊ |
359 | ␉#if DEBUG␊ |
360 | ␉{␊ |
361 | UInt32 t = inl(0xcfc);␊ |
362 | ␉␉printf("relock PAM: (0x%08x)\n", t);␊ |
363 | ␉}␊ |
364 | ␉#endif␊ |
365 | }␊ |
366 | ␊ |
367 | ␊ |
368 | void list_modes(vbios_map *map, UInt32 raw) {␊ |
369 | UInt32 i, x, y;␊ |
370 | ␉␊ |
371 | for (i=0; i < map->mode_table_size; i++) {␊ |
372 | switch(map->bios) {␊ |
373 | ␉␉␉case BT_1:␊ |
374 | {␊ |
375 | vbios_resolution_type1 * res = map_type1_resolution(map, map->mode_table[i].resolution);␊ |
376 | ␊ |
377 | x = ((((UInt32) res->x2) & 0xf0) << 4) | res->x1;␊ |
378 | y = ((((UInt32) res->y2) & 0xf0) << 4) | res->y1;␊ |
379 | ␊ |
380 | if (x != 0 && y != 0) {␊ |
381 | printf("Mode %02x : %dx%d, %d bits/pixel\n", map->mode_table[i].mode, x, y, map->mode_table[i].bits_per_pixel);␊ |
382 | }␊ |
383 | ␉␉␉␉␊ |
384 | ␉␉␉␉if (raw)␊ |
385 | ␉␉␉␉{␊ |
386 | printf("Mode %02x (raw) :\n\t%02x %02x\n\t%02x\n\t%02x\n\t%02x\n\t%02x\n\t%02x\n\t%02x\n", map->mode_table[i].mode, res->unknow1[0],res->unknow1[1], res->x1,res->x_total,res->x2,res->y1,res->y_total,res->y2);␊ |
387 | ␉␉␉␉}␊ |
388 | ␉␉␉␉␊ |
389 | }␊ |
390 | ␉␉␉␉break;␊ |
391 | ␉␉␉case BT_2:␊ |
392 | {␊ |
393 | vbios_resolution_type2 * res = map_type2_resolution(map, map->mode_table[i].resolution);␊ |
394 | ␊ |
395 | x = res->modelines[0].x1+1;␊ |
396 | y = res->modelines[0].y1+1;␊ |
397 | ␉␉␉␉␊ |
398 | if (x != 0 && y != 0) {␊ |
399 | printf("Mode %02x : %dx%d, %d bits/pixel\n", map->mode_table[i].mode, x, y, map->mode_table[i].bits_per_pixel);␊ |
400 | }␊ |
401 | }␊ |
402 | ␉␉␉␉break;␊ |
403 | ␉␉␉case BT_3:␊ |
404 | {␊ |
405 | vbios_resolution_type3 * res = map_type3_resolution(map, map->mode_table[i].resolution);␊ |
406 | ␊ |
407 | x = res->modelines[0].x1+1;␊ |
408 | y = res->modelines[0].y1+1;␊ |
409 | ␊ |
410 | if (x != 0 && y != 0) {␊ |
411 | printf("Mode %02x : %dx%d, %d bits/pixel\n", map->mode_table[i].mode, x, y, map->mode_table[i].bits_per_pixel);␊ |
412 | }␊ |
413 | }␊ |
414 | ␉␉␉␉break;␊ |
415 | ␉␉␉case BT_UNKWN:␊ |
416 | ␉␉␉␉break;␊ |
417 | }␊ |
418 | }␊ |
419 | }␊ |
420 | ␊ |
421 | static void gtf_timings(UInt32 x, UInt32 y, UInt32 freq,␊ |
422 | ␉␉␉␉␉␉unsigned long *clock,␊ |
423 | ␉␉␉␉␉␉UInt16 *hsyncstart, UInt16 *hsyncend, UInt16 *hblank,␊ |
424 | ␉␉␉␉␉␉UInt16 *vsyncstart, UInt16 *vsyncend, UInt16 *vblank)␊ |
425 | {␊ |
426 | ␉UInt32 hbl, vbl, vfreq;␊ |
427 | ␊ |
428 | ␉vbl = y + (y+1)/(20000.0/(11*freq) - 1) + 1.5;␊ |
429 | ␉vfreq = vbl * freq;␊ |
430 | ␉hbl = 16 * (int)(x * (30.0 - 300000.0 / vfreq) /␊ |
431 | ␉␉␉␉␉␉ + (70.0 + 300000.0 / vfreq) / 16.0 + 0.5);␊ |
432 | ␊ |
433 | ␉*vsyncstart = y;␊ |
434 | ␉*vsyncend = y + 3;␊ |
435 | ␉*vblank = vbl - 1;␊ |
436 | ␉*hsyncstart = x + hbl / 2 - (x + hbl + 50) / 100 * 8 - 1;␊ |
437 | ␉*hsyncend = x + hbl / 2 - 1;␊ |
438 | ␉*hblank = x + hbl - 1;␊ |
439 | ␉*clock = (x + hbl) * vfreq / 1000;␊ |
440 | }␊ |
441 | ␊ |
442 | void set_mode(vbios_map * map, /*UInt32 mode,*/ UInt32 x, UInt32 y, UInt32 bp, UInt32 htotal, UInt32 vtotal) {␊ |
443 | ␉UInt32 xprev, yprev;␊ |
444 | ␉UInt32 i = 0, j;␉// patch first available mode␊ |
445 | ␊ |
446 | //␉for (i=0; i < map->mode_table_size; i++) {␊ |
447 | //␉␉if (map->mode_table[0].mode == mode) {␊ |
448 | ␉␉␉switch(map->bios) {␊ |
449 | ␉␉␉␉case BT_1:␊ |
450 | ␉␉␉␉␉{␊ |
451 | ␉␉␉␉␉␉vbios_resolution_type1 * res = map_type1_resolution(map, map->mode_table[i].resolution);␊ |
452 | ␉␉␉␉␉␉␊ |
453 | ␉␉␉␉␉␉if (bp) {␊ |
454 | ␉␉␉␉␉␉␉map->mode_table[i].bits_per_pixel = bp;␊ |
455 | ␉␉␉␉␉␉}␊ |
456 | ␉␉␉␉␉␉␊ |
457 | ␉␉␉␉␉␉res->x2 = (htotal?(((htotal-x) >> 8) & 0x0f) : (res->x2 & 0x0f)) | ((x >> 4) & 0xf0);␊ |
458 | ␉␉␉␉␉␉res->x1 = (x & 0xff);␊ |
459 | ␉␉␉␉␉␉␊ |
460 | ␉␉␉␉␉␉res->y2 = (vtotal?(((vtotal-y) >> 8) & 0x0f) : (res->y2 & 0x0f)) | ((y >> 4) & 0xf0);␊ |
461 | ␉␉␉␉␉␉res->y1 = (y & 0xff);␊ |
462 | ␉␉␉␉␉␉if (htotal)␊ |
463 | ␉␉␉␉␉␉␉res->x_total = ((htotal-x) & 0xff);␊ |
464 | ␉␉␉␉␉␉␊ |
465 | ␉␉␉␉␉␉if (vtotal)␊ |
466 | ␉␉␉␉␉␉␉res->y_total = ((vtotal-y) & 0xff);␊ |
467 | ␉␉␉␉␉}␊ |
468 | ␉␉␉␉␉break;␊ |
469 | ␉␉␉␉case BT_2:␊ |
470 | ␉␉␉␉␉{␊ |
471 | ␉␉␉␉␉␉vbios_resolution_type2 * res = map_type2_resolution(map, map->mode_table[i].resolution);␊ |
472 | ␉␉␉␉␉␉␊ |
473 | ␉␉␉␉␉␉res->xchars = x / 8;␊ |
474 | ␉␉␉␉␉␉res->ychars = y / 16 - 1;␊ |
475 | ␉␉␉␉␉␉xprev = res->modelines[0].x1;␊ |
476 | ␉␉␉␉␉␉yprev = res->modelines[0].y1;␊ |
477 | ␉␉␉␉␉␉␊ |
478 | ␉␉␉␉␉␉for(j=0; j < 3; j++) {␊ |
479 | ␉␉␉␉␉␉␉vbios_modeline_type2 * modeline = &res->modelines[j];␊ |
480 | ␉␉␉␉␉␉␉␊ |
481 | ␉␉␉␉␉␉␉if (modeline->x1 == xprev && modeline->y1 == yprev) {␊ |
482 | ␉␉␉␉␉␉␉␉modeline->x1 = modeline->x2 = x-1;␊ |
483 | ␉␉␉␉␉␉␉␉modeline->y1 = modeline->y2 = y-1;␊ |
484 | ␉␉␉␉␊ |
485 | ␉␉␉␉␉␉␉␉gtf_timings(x, y, freqs[j], &modeline->clock,␊ |
486 | ␉␉␉␉␉␉␉␉␉␉␉&modeline->hsyncstart, &modeline->hsyncend,␊ |
487 | ␉␉␉␉␉␉␉␉␉␉␉&modeline->hblank, &modeline->vsyncstart,␊ |
488 | ␉␉␉␉␉␉␉␉␉␉␉&modeline->vsyncend, &modeline->vblank);␊ |
489 | ␉␉␉␉␉␉␉␉␊ |
490 | ␉␉␉␉␉␉␉␉if (htotal)␊ |
491 | ␉␉␉␉␉␉␉␉␉modeline->htotal = htotal;␊ |
492 | ␉␉␉␉␉␉␉␉else␊ |
493 | ␉␉␉␉␉␉␉␉␉modeline->htotal = modeline->hblank;␊ |
494 | ␉␉␉␉␉␉␉␉␊ |
495 | ␉␉␉␉␉␉␉␉if (vtotal)␊ |
496 | ␉␉␉␉␉␉␉␉␉modeline->vtotal = vtotal;␊ |
497 | ␉␉␉␉␉␉␉␉else␊ |
498 | ␉␉␉␉␉␉␉␉␉modeline->vtotal = modeline->vblank;␊ |
499 | ␉␉␉␉␉␉␉}␊ |
500 | ␉␉␉␉␉␉}␊ |
501 | ␉␉␉␉␉}␊ |
502 | ␉␉␉␉␉break;␊ |
503 | ␉␉␉␉case BT_3:␊ |
504 | ␉␉␉␉␉{␊ |
505 | ␉␉␉␉␉␉vbios_resolution_type3 * res = map_type3_resolution(map, map->mode_table[i].resolution);␊ |
506 | ␉␉␉␉␉␉␊ |
507 | ␉␉␉␉␉␉xprev = res->modelines[0].x1;␊ |
508 | ␉␉␉␉␉␉yprev = res->modelines[0].y1;␊ |
509 | ␉␉␉␉␊ |
510 | ␉␉␉␉␉␉for (j=0; j < 3; j++) {␊ |
511 | ␉␉␉␉␉␉␉vbios_modeline_type3 * modeline = &res->modelines[j];␊ |
512 | ␉␉␉␉␉␉␉ ␊ |
513 | ␉␉␉␉␉␉␉if (modeline->x1 == xprev && modeline->y1 == yprev) {␊ |
514 | ␉␉␉␉␉␉␉␉modeline->x1 = modeline->x2 = x-1;␊ |
515 | ␉␉␉␉␉␉␉␉modeline->y1 = modeline->y2 = y-1;␊ |
516 | ␉␉␉␉␉␉␉␉ ␊ |
517 | ␉␉␉␉␉␉␉␉gtf_timings(x, y, freqs[j], &modeline->clock,␊ |
518 | ␉␉␉␉␉␉␉␉␉␉␉&modeline->hsyncstart, &modeline->hsyncend,␊ |
519 | ␉␉␉␉␉␉␉␉␉␉␉&modeline->hblank, &modeline->vsyncstart,␊ |
520 | ␉␉␉␉␉␉␉␉␉␉␉&modeline->vsyncend, &modeline->vblank);␊ |
521 | ␉␉␉␉␉␉␉␉if (htotal)␊ |
522 | ␉␉␉␉␉␉␉␉␉modeline->htotal = htotal;␊ |
523 | ␉␉␉␉␉␉␉␉else␊ |
524 | ␉␉␉␉␉␉␉␉␉modeline->htotal = modeline->hblank;␊ |
525 | ␉␉␉␉␉␉␉␉if (vtotal)␊ |
526 | ␉␉␉␉␉␉␉␉␉modeline->vtotal = vtotal;␊ |
527 | ␉␉␉␉␉␉␉␉else␊ |
528 | ␉␉␉␉␉␉␉␉␉modeline->vtotal = modeline->vblank;␊ |
529 | ␉␉␉␉␉␉␊ |
530 | ␉␉␉␉␉␉␉␉modeline->timing_h = y-1;␊ |
531 | ␉␉␉␉␉␉␉␉modeline->timing_v = x-1;␊ |
532 | ␉␉␉␉␉␉␉}␊ |
533 | ␉␉␉␉␉␉}␊ |
534 | ␉␉␉␉␉}␊ |
535 | ␉␉␉␉␉break;␊ |
536 | ␉␉␉␉case BT_UNKWN:␊ |
537 | ␉␉␉␉␉break;␊ |
538 | ␉␉␉}␊ |
539 | //␉␉}␊ |
540 | //␉}␊ |
541 | } ␊ |
542 | ␊ |
543 | void display_map_info(vbios_map * map) {␊ |
544 | ␉printf("Chipset: %s\n", chipset_type_names[map->chipset]);␊ |
545 | ␉printf("BIOS: %s\n", bios_type_names[map->bios]);␊ |
546 | ␉␊ |
547 | ␉printf("Mode Table Offset: $C0000 + $%x\n", ((UInt32)map->mode_table) - ((UInt32)map->bios_ptr));␊ |
548 | ␉printf("Mode Table Entries: %u\n", map->mode_table_size);␊ |
549 | }␊ |
550 |