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Source at commit 1066 created 12 years 10 months ago.
By meklort, Removing even more code...
1/*␊
2 * spd.c - serial presence detect memory information␊
3 *␊
4 * Originally restored from pcefi10.5␊
5 * Dynamic mem detection original impl. by Rekursor␊
6 * System profiler fix and other fixes by Mozodojo.␊
7 */␊
8␊
9#include "libsaio.h"␊
10#include "pci.h"␊
11#include "platform.h"␊
12#include "spd.h"␊
13#include "cpu.h"␊
14#include "saio_internal.h"␊
15#include "memvendors.h"␊
16␊
17#ifndef DEBUG_SPD␊
18#define DEBUG_SPD 0␊
19#endif␊
20␊
21#if DEBUG_SPD␊
22#define DBG(x...)␉printf(x)␊
23#else␊
24#define DBG(x...)␉msglog(x)␊
25#endif␊
26␊
27static const char *spd_memory_types[] =␊
28{␊
29␉"RAM", /* 00h Undefined */␊
30␉"FPM", /* 01h FPM */␊
31␉"EDO", /* 02h EDO */␊
32␉"",␉␉␉␉/* 03h PIPELINE NIBBLE */␊
33␉"SDRAM", /* 04h SDRAM */␊
34␉"",␉␉␉␉/* 05h MULTIPLEXED ROM */␊
35␉"DDR SGRAM",␉/* 06h SGRAM DDR */␊
36␉"DDR SDRAM",␉/* 07h SDRAM DDR */␊
37␉"DDR2 SDRAM", /* 08h SDRAM DDR 2 */␊
38␉"",␉␉␉␉/* 09h Undefined */␊
39␉"",␉␉␉␉/* 0Ah Undefined */␊
40␉"DDR3 SDRAM"␉/* 0Bh SDRAM DDR 3 */␊
41};␊
42␊
43#define UNKNOWN_MEM_TYPE 2␊
44static uint8_t spd_mem_to_smbios[] =␊
45{␊
46␉UNKNOWN_MEM_TYPE,␉␉/* 00h Undefined */␊
47␉UNKNOWN_MEM_TYPE,␉␉/* 01h FPM */␊
48␉UNKNOWN_MEM_TYPE,␉␉/* 02h EDO */␊
49␉UNKNOWN_MEM_TYPE,␉␉/* 03h PIPELINE NIBBLE */␊
50␉SMB_MEM_TYPE_SDRAM,␉␉/* 04h SDRAM */␊
51␉SMB_MEM_TYPE_ROM,␉␉/* 05h MULTIPLEXED ROM */␊
52␉SMB_MEM_TYPE_SGRAM,␉␉/* 06h SGRAM DDR */␊
53␉SMB_MEM_TYPE_DDR,␉␉/* 07h SDRAM DDR */␊
54␉SMB_MEM_TYPE_DDR2,␉␉/* 08h SDRAM DDR 2 */␊
55␉UNKNOWN_MEM_TYPE,␉␉/* 09h Undefined */␊
56␉UNKNOWN_MEM_TYPE,␉␉/* 0Ah Undefined */␊
57␉SMB_MEM_TYPE_DDR3␉␉/* 0Bh SDRAM DDR 3 */␊
58};␊
59#define SPD_TO_SMBIOS_SIZE (sizeof(spd_mem_to_smbios)/sizeof(uint8_t))␊
60␊
61#define rdtsc(low,high) \␊
62__asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high))␊
63␊
64#define SMBHSTSTS 0␊
65#define SMBHSTCNT 2␊
66#define SMBHSTCMD 3␊
67#define SMBHSTADD 4␊
68#define SMBHSTDAT 5␊
69#define SBMBLKDAT 7␊
70␊
71/** Read one byte from the intel i2c, used for reading SPD on intel chipsets only. */␊
72unsigned char smb_read_byte_intel(uint32_t base, uint8_t adr, uint8_t cmd)␊
73{␊
74 int l1, h1, l2, h2;␊
75 unsigned long long t;␊
76␉␊
77 outb(base + SMBHSTSTS, 0x1f);␉␉␉␉␉// reset SMBus Controller␊
78 outb(base + SMBHSTDAT, 0xff);␊
79␉␊
80 rdtsc(l1, h1);␊
81 while ( inb(base + SMBHSTSTS) & 0x01) // wait until read␊
82 { ␊
83 rdtsc(l2, h2);␊
84 t = ((h2 - h1) * 0xffffffff + (l2 - l1)) / (Platform.CPU.TSCFrequency / 100);␊
85 if (t > 5)␊
86 return 0xFF; // break␊
87 }␊
88␉␊
89 outb(base + SMBHSTCMD, cmd);␊
90 outb(base + SMBHSTADD, (adr << 1) | 0x01 );␊
91 outb(base + SMBHSTCNT, 0x48 );␊
92␉␊
93 rdtsc(l1, h1);␊
94␉␊
95 ␉while (!( inb(base + SMBHSTSTS) & 0x02))␉␉// wait til command finished␊
96␉{␉␊
97␉␉rdtsc(l2, h2);␊
98␉␉t = ((h2 - h1) * 0xffffffff + (l2 - l1)) / (Platform.CPU.TSCFrequency / 100);␊
99␉␉if (t > 5)␊
100␉␉␉break;␉␉␉␉␉␉␉␉␉// break after 5ms␊
101 }␊
102 return inb(base + SMBHSTDAT);␊
103}␊
104␊
105/* SPD i2c read optimization: prefetch only what we need, read non prefetcheable bytes on the fly */␊
106#define READ_SPD(spd, base, slot, x) spd[x] = smb_read_byte_intel(base, 0x50 + slot, x)␊
107␊
108int spd_indexes[] = {␊
109␉SPD_MEMORY_TYPE,␊
110␉SPD_DDR3_MEMORY_BANK,␊
111␉SPD_DDR3_MEMORY_CODE,␊
112␉SPD_NUM_ROWS,␊
113␉SPD_NUM_COLUMNS,␊
114␉SPD_NUM_DIMM_BANKS,␊
115␉SPD_NUM_BANKS_PER_SDRAM,␊
116␉4,7,8,9,12,64, /* TODO: give names to these values */␊
117␉95,96,97,98, 122,123,124,125 /* UIS */␊
118};␊
119#define SPD_INDEXES_SIZE (sizeof(spd_indexes) / sizeof(int))␊
120␊
121/** Read from spd *used* values only*/␊
122static void init_spd(char * spd, uint32_t base, int slot)␊
123{␊
124␉int i;␊
125␉for (i=0; i< SPD_INDEXES_SIZE; i++) {␊
126␉␉READ_SPD(spd, base, slot, spd_indexes[i]);␊
127␉}␊
128}␊
129␊
130/** Get Vendor Name from spd, 2 cases handled DDR3 and DDR2, ␊
131 have different formats, always return a valid ptr.*/␊
132const char * getVendorName(RamSlotInfo_t* slot, uint32_t base, int slot_num)␊
133{␊
134 uint8_t bank = 0;␊
135 uint8_t code = 0;␊
136 int i = 0;␊
137 uint8_t * spd = (uint8_t *) slot->spd;␊
138␊
139 if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR3) { // DDR3␊
140 bank = (spd[SPD_DDR3_MEMORY_BANK] & 0x07f); // constructors like Patriot use b7=1␊
141 code = spd[SPD_DDR3_MEMORY_CODE];␊
142 for (i=0; i < VEN_MAP_SIZE; i++)␊
143 if (bank==vendorMap[i].bank && code==vendorMap[i].code)␊
144 return vendorMap[i].name;␊
145 }␊
146 else if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR2) {␊
147 if(spd[64]==0x7f) {␊
148 for (i=64; i<72 && spd[i]==0x7f;i++) {␊
149␉␉␉ bank++;␊
150␉␉␉ READ_SPD(spd, base, slot_num,i+1); // prefetch next spd byte to read for next loop␊
151␉␉␉}␊
152␉␉␉READ_SPD(spd, base, slot_num,i);␊
153 code = spd[i];␊
154 } else {␊
155 code = spd[64]; ␊
156 bank = 0;␊
157 }␊
158 for (i=0; i < VEN_MAP_SIZE; i++)␊
159 if (bank==vendorMap[i].bank && code==vendorMap[i].code)␊
160 return vendorMap[i].name;␊
161 }␊
162 /* OK there is no vendor id here lets try to match the partnum if it exists */␊
163 if (strstr(slot->PartNo,"GU332") == slot->PartNo) // Unifosa fingerprint␊
164 return "Unifosa";␊
165 return "NoName";␊
166}␊
167␊
168/** Get Default Memory Module Speed (no overclocking handled) */␊
169int getDDRspeedMhz(const char * spd)␊
170{␊
171 if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR3) { ␊
172 switch(spd[12]) {␊
173 case 0x0f:␊
174 return 1066;␊
175 case 0x0c:␊
176 return 1333;␊
177 case 0x0a:␊
178 return 1600;␊
179 case 0x14:␊
180 default:␊
181 return 800;␊
182 }␊
183 } ␊
184 else if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR2) {␊
185 switch(spd[9]) {␊
186 case 0x50:␊
187 return 400;␊
188 case 0x3d:␊
189 return 533;␊
190 case 0x30:␊
191 return 667;␊
192 case 0x25:␊
193 default:␊
194 return 800;␊
195 }␊
196 }␊
197 return 800; // default freq for unknown types␊
198}␊
199␊
200#define SMST(a) ((uint8_t)((spd[a] & 0xf0) >> 4))␊
201#define SLST(a) ((uint8_t)(spd[a] & 0x0f))␊
202␊
203/** Get DDR3 or DDR2 serial number, 0 most of the times, always return a valid ptr */␊
204const char *getDDRSerial(const char* spd)␊
205{␊
206 static char asciiSerial[16];␊
207 ␊
208 if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR3) // DDR3␊
209 {␊
210␉sprintf(asciiSerial, "%X%X%X%X%X%X%X%X", SMST(122) /*& 0x7*/, SLST(122), SMST(123), SLST(123), SMST(124), SLST(124), SMST(125), SLST(125));␊
211 }␊
212 else if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR2) // DDR2 or DDR␊
213 { ␊
214␉sprintf(asciiSerial, "%X%X%X%X%X%X%X%X", SMST(95) /*& 0x7*/, SLST(95), SMST(96), SLST(96), SMST(97), SLST(97), SMST(98), SLST(98));␊
215 }␊
216␊
217 return strdup(asciiSerial);␊
218}␊
219␊
220/** Get DDR3 or DDR2 Part Number, always return a valid ptr */␊
221const char * getDDRPartNum(char* spd, uint32_t base, int slot)␊
222{␊
223␉static char asciiPartNo[32];␊
224␉int i, start=0, index = 0;␊
225␊
226 if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR3) {␊
227␉␉start = 128;␊
228␉}␊
229 else if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR2) {␊
230␉␉start = 73;␊
231␉}␊
232␉␊
233 // Check that the spd part name is zero terminated and that it is ascii:␊
234 bzero(asciiPartNo, sizeof(asciiPartNo));␊
235␉char c;␊
236␉for (i=start; i < start + sizeof(asciiPartNo); i++) {␊
237␉␉READ_SPD(spd, base, slot, i); // only read once the corresponding model part (ddr3 or ddr2)␊
238␉␉c = spd[i];␊
239␉␉if (isalpha(c) || isdigit(c) || ispunct(c)) // It seems that System Profiler likes only letters and digits...␊
240␉␉␉asciiPartNo[index++] = c;␊
241␉␉else if (!isascii(c))␊
242␉␉␉break;␊
243␉}␊
244␉␊
245␉return strdup(asciiPartNo);␊
246}␊
247␊
248int mapping []= {0,2,1,3,4,6,5,7,8,10,9,11};␊
249␊
250␊
251/** Read from smbus the SPD content and interpret it for detecting memory attributes */␊
252static void read_smb_intel(pci_dt_t *smbus_dev)␊
253{ ␊
254 int i, speed;␊
255 uint8_t spd_size, spd_type;␊
256 uint32_t base, mmio, hostc;␊
257// bool dump = false;␊
258 RamSlotInfo_t* slot;␊
259␊
260␉uint16_t cmd = pci_config_read16(smbus_dev->dev.addr, 0x04);␊
261␉DBG("SMBus CmdReg: 0x%x\n", cmd);␊
262␉pci_config_write16(smbus_dev->dev.addr, 0x04, cmd | 1);␊
263␊
264␉mmio = pci_config_read32(smbus_dev->dev.addr, 0x10);// & ~0x0f;␊
265 base = pci_config_read16(smbus_dev->dev.addr, 0x20) & 0xFFFE;␊
266␉hostc = pci_config_read8(smbus_dev->dev.addr, 0x40);␊
267 verbose("Scanning SMBus [%04x:%04x], mmio: 0x%x, ioport: 0x%x, hostc: 0x%x\n", ␊
268␉␉smbus_dev->vendor_id, smbus_dev->device_id, mmio, base, hostc);␊
269␊
270//Azi: no use for this!␊
271// getBoolForKey("DumpSPD", &dump, &bootInfo->bootConfig);␊
272␉// needed at least for laptops␊
273 bool fullBanks = Platform.DMI.MemoryModules == Platform.DMI.CntMemorySlots;␊
274␊
275␉char spdbuf[MAX_SPD_SIZE];␊
276 // Search MAX_RAM_SLOTS slots␊
277 for (i = 0; i < MAX_RAM_SLOTS; i++){␊
278 slot = &Platform.RAM.DIMM[i];␊
279 spd_size = smb_read_byte_intel(base, 0x50 + i, 0);␊
280␉␉DBG("SPD[0] (size): %d @0x%x\n", spd_size, 0x50 + i);␊
281 // Check spd is present␊
282 if (spd_size && (spd_size != 0xff))␊
283 {␊
284␊
285␉␉␉slot->spd = spdbuf;␊
286 slot->InUse = true;␊
287␊
288 bzero(slot->spd, spd_size);␊
289 ␊
290 // Copy spd data into buffer␊
291 ␊
292␉␉␉//for (x = 0; x < spd_size; x++) slot->spd[x] = smb_read_byte_intel(base, 0x50 + i, x);␊
293 init_spd(slot->spd, base, i);␊
294␉␉␊
295 switch (slot->spd[SPD_MEMORY_TYPE]) {␊
296 case SPD_MEMORY_TYPE_SDRAM_DDR2:␊
297 ␊
298 slot->ModuleSize = ((1 << (slot->spd[SPD_NUM_ROWS] & 0x0f) + (slot->spd[SPD_NUM_COLUMNS] & 0x0f) - 17) * ␊
299 ((slot->spd[SPD_NUM_DIMM_BANKS] & 0x7) + 1) * slot->spd[SPD_NUM_BANKS_PER_SDRAM]);␊
300 break;␊
301 ␊
302 case SPD_MEMORY_TYPE_SDRAM_DDR3:␊
303 ␊
304 slot->ModuleSize = ((slot->spd[4] & 0x0f) + 28 ) + ((slot->spd[8] & 0x7) + 3 );␊
305 slot->ModuleSize -= (slot->spd[7] & 0x7) + 25;␊
306 slot->ModuleSize = ((1 << slot->ModuleSize) * (((slot->spd[7] >> 3) & 0x1f) + 1));␊
307 ␊
308 break;␊
309 }␊
310 ␊
311 spd_type = (slot->spd[SPD_MEMORY_TYPE] < ((char) 12) ? slot->spd[SPD_MEMORY_TYPE] : 0);␊
312 slot->Type = spd_mem_to_smbios[spd_type];␊
313 slot->PartNo = getDDRPartNum(slot->spd, base, i);␊
314 slot->Vendor = getVendorName(slot, base, i);␊
315 slot->SerialNo = getDDRSerial(slot->spd);␊
316␊
317 // determine spd speed␊
318 speed = getDDRspeedMhz(slot->spd);␊
319 if (slot->Frequency<speed) slot->Frequency = speed;␊
320␉␉␉␊
321␉␉␉// pci memory controller if available, is more reliable␊
322␉␉␉if (Platform.RAM.Frequency > 0) {␊
323␉␉␉␉uint32_t freq = (uint32_t)Platform.RAM.Frequency / 500000;␊
324␉␉␉␉// now round off special cases␊
325␉␉␉␉uint32_t fmod100 = freq %100;␊
326␉␉␉␉switch(fmod100) {␊
327␉␉␉␉␉case 1:␉freq--;␉break;␊
328␉␉␉␉␉case 32:␉freq++;␉break;␊
329␉␉␉␉␉case 65:␉freq++; break;␊
330␉␉␉␉␉case 98:␉freq+=2;break;␊
331␉␉␉␉␉case 99:␉freq++; break;␊
332␉␉␉␉}␊
333␉␉␉␉slot->Frequency = freq;␊
334␉␉␉}␊
335␊
336␉␉␉verbose("Slot: %d Type %d %dMB (%s) %dMHz Vendor=%s\n PartNo=%s SerialNo=%s\n", ␊
337 i, ␊
338 (int)slot->Type,␊
339 slot->ModuleSize, ␊
340 spd_memory_types[spd_type],␊
341 slot->Frequency,␊
342 slot->Vendor,␊
343 slot->PartNo,␊
344 slot->SerialNo); ␊
345 ␊
346␊
347 }␊
348␊
349 // laptops sometimes show slot 0 and 2 with slot 1 empty when only 2 slots are presents so:␊
350 Platform.DMI.DIMM[i]= ␊
351 i>0 && Platform.RAM.DIMM[1].InUse==false && fullBanks && Platform.DMI.CntMemorySlots == 2 ? ␊
352 mapping[i] : i; // for laptops case, mapping setup would need to be more generic than this␊
353 ␊
354␊
355 ␊
356␉␉slot->spd = NULL;␊
357␊
358 } // for␊
359}␊
360␊
361static struct smbus_controllers_t smbus_controllers[] = {␊
362␊
363␉{0x8086, 0x269B, "ESB2",␉␉read_smb_intel },␊
364␉{0x8086, 0x25A4, "6300ESB",␉␉read_smb_intel },␊
365␉{0x8086, 0x24C3, "ICH4",␉␉read_smb_intel },␊
366␉{0x8086, 0x24D3, "ICH5",␉␉read_smb_intel },␊
367␉{0x8086, 0x266A, "ICH6",␉␉read_smb_intel },␊
368␉{0x8086, 0x27DA, "ICH7",␉␉read_smb_intel },␊
369␉{0x8086, 0x283E, "ICH8",␉␉read_smb_intel },␊
370␉{0x8086, 0x2930, "ICH9",␉␉read_smb_intel },␉␊
371␉{0x8086, 0x3A30, "ICH10R",␉␉read_smb_intel },␊
372␉{0x8086, 0x3A60, "ICH10B",␉␉read_smb_intel },␊
373␉{0x8086, 0x3B30, "5 Series",␉read_smb_intel },␊
374␉{0x8086, 0x1C22, "6 Series",␉read_smb_intel },␊
375␉{0x8086, 0x5032, "EP80579",␉␉read_smb_intel }␊
376␊
377};␊
378␊
379// initial call : pci_dt = root_pci_dev;␊
380// find_and_read_smbus_controller(root_pci_dev);␊
381bool find_and_read_smbus_controller(pci_dt_t* pci_dt)␊
382{␊
383 pci_dt_t␉*current = pci_dt;␊
384 int i;␊
385␊
386 while (current) {␊
387#if 0␊
388 printf("%02x:%02x.%x [%04x] [%04x:%04x] :: %s\n", ␊
389 current->dev.bits.bus, current->dev.bits.dev, current->dev.bits.func, ␊
390 current->class_id, current->vendor_id, current->device_id, ␊
391 get_pci_dev_path(current));␊
392#endif␊
393␉for ( i = 0; i < sizeof(smbus_controllers) / sizeof(smbus_controllers[0]); i++ )␊
394 {␊
395 if (current->vendor_id == smbus_controllers[i].vendor &&␊
396 current->device_id == smbus_controllers[i].device)␊
397 {␊
398 smbus_controllers[i].read_smb(current); // read smb␊
399 return true;␊
400 } ␊
401 }␊
402 find_and_read_smbus_controller(current->children);␊
403 current = current->next;␊
404 }␊
405 return false; // not found␊
406}␊
407␊
408void scan_spd(PlatformInfo_t *p)␊
409{␊
410 find_and_read_smbus_controller(root_pci_dev);␊
411}␊
412␊
413

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