| 1 | /*␊ |
| 2 | Copyright (c) 2010, Intel Corporation␊ |
| 3 | All rights reserved.␊ |
| 4 | ␊ |
| 5 | Redistribution and use in source and binary forms, with or without␊ |
| 6 | modification, are permitted provided that the following conditions are met:␊ |
| 7 | ␊ |
| 8 | * Redistributions of source code must retain the above copyright notice,␊ |
| 9 | this list of conditions and the following disclaimer.␊ |
| 10 | * Redistributions in binary form must reproduce the above copyright notice,␊ |
| 11 | this list of conditions and the following disclaimer in the documentation␊ |
| 12 | and/or other materials provided with the distribution.␊ |
| 13 | * Neither the name of Intel Corporation nor the names of its contributors␊ |
| 14 | may be used to endorse or promote products derived from this software␊ |
| 15 | without specific prior written permission.␊ |
| 16 | ␊ |
| 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND␊ |
| 18 | ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED␊ |
| 19 | WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE␊ |
| 20 | DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR␊ |
| 21 | ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES␊ |
| 22 | (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;␊ |
| 23 | LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON␊ |
| 24 | ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT␊ |
| 25 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS␊ |
| 26 | SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.␊ |
| 27 | */␊ |
| 28 | ␊ |
| 29 | #ifndef ppmsetup_h␊ |
| 30 | #define ppmsetup_h␊ |
| 31 | ␊ |
| 32 | #include "datatype.h"␊ |
| 33 | ␊ |
| 34 | //U32 ppm_init(void);␊ |
| 35 | ␊ |
| 36 | #define CURRENT_PPM_RCM_INTERFACE_SPECIFICATION 11␊ |
| 37 | ␊ |
| 38 | #ifndef nameseg_defined␊ |
| 39 | #define nameseg_defined␊ |
| 40 | #define NAMESEG(s) (((U32)(s[0]) << 0) \␊ |
| 41 | |((U32)(s[1]) << 8) \␊ |
| 42 | |((U32)(s[2]) << 16) \␊ |
| 43 | |((U32)(s[3]) << 24))␊ |
| 44 | #endif␊ |
| 45 | ␊ |
| 46 | typedef enum ssdt_loc_flag {␊ |
| 47 | // Flag indicating the SSDT ACPI structure should be built in a stack-based␊ |
| 48 | // buffer. If the SSDT is successfully created, then the following occurs:␊ |
| 49 | // (1) the RSDT ACPI structure is moved lower in memory and updated to␊ |
| 50 | // include a pointer to the new SSDT.␊ |
| 51 | // (2) the SSDT APCI structure is copied into memory just above the moved␊ |
| 52 | // RSDT structure␊ |
| 53 | // (3) the RSD ACPI structure is updated to included the new location of␊ |
| 54 | // the just moved RSDT ACPI structure␊ |
| 55 | // Note: The XSDT is not updated!␊ |
| 56 | //␊ |
| 57 | // NOTE: THIS OPTION WILL DEPRECATED AND REMOVED␊ |
| 58 | // IN A FUTURE VERSION OF THIS SPECIFICATION.␊ |
| 59 | SSDT_LOC_FLAG_ACPI_RECLAIM = 0,␊ |
| 60 | ␊ |
| 61 | // Flag indicating the SSDT should be built directly in the memory region␊ |
| 62 | // provided by the ssdt_mem_addr option parameter.␊ |
| 63 | // If the SSDT is successfully created, then the following occurs:␊ |
| 64 | // (1) the RSDT ACPI structure is moved lower in memory and updated to␊ |
| 65 | // include a pointer to the new SSDT.␊ |
| 66 | // (2) the RSD ACPI structure is updated to include the new location of the␊ |
| 67 | // RSDT ACPI structure.␊ |
| 68 | // Note: The XSDT is not updated!␊ |
| 69 | //␊ |
| 70 | // NOTE: THIS OPTION WILL DEPRECATED AND REMOVED␊ |
| 71 | // IN A FUTURE VERSION OF THIS SPECIFICATION.␊ |
| 72 | SSDT_LOC_FLAG_ADDR_PROVIDED = 1,␊ |
| 73 | ␊ |
| 74 | // Flag indicating the SSDT should be built directly in the memory region␊ |
| 75 | // provided by the ssdt_mem_addr option parameter.␊ |
| 76 | // After SSDT is successfully created, no further processing occurs.␊ |
| 77 | SSDT_LOC_FLAG_ADDR_PROVIDED_NO_INSERT = 2,␊ |
| 78 | ␊ |
| 79 | // Flag indicating the SSDT should be built directly in the memory region␊ |
| 80 | // provided by the ssdt_mem_addr option parameter.␊ |
| 81 | // After SSDT is successfully created, then the following occurs:␊ |
| 82 | // (1) the RSDT ACPI structure is not moved but is updated to␊ |
| 83 | // include a 32-bit pointer to the new SSDT.␊ |
| 84 | // (2) If the XSDT exists, it is not moved but is updated to␊ |
| 85 | // include a 64-bit pointer to the new SSDT.␊ |
| 86 | SSDT_LOC_FLAG_ADDR_PROVIDED_INSERT = 3,␊ |
| 87 | } SSDT_LOC_FLAG;␊ |
| 88 | ␊ |
| 89 | typedef enum exit_code {␊ |
| 90 | // PPM RCM completed all initialization successfully␊ |
| 91 | EXIT_CODE_PPM_COMPLETED = 1,␊ |
| 92 | ␊ |
| 93 | // Failed building P-state table␊ |
| 94 | EXIT_CODE_FAILED_BUILD_PSTATES = 2,␊ |
| 95 | ␊ |
| 96 | EXIT_CODE_PPM_EIST_DISABLED = 3,␊ |
| 97 | ␊ |
| 98 | // Failed to find ACPI tables␊ |
| 99 | EXIT_CODE_FAILED_FIND_ACPI_TABLES = 4,␊ |
| 100 | ␊ |
| 101 | // Failed to process the ACPI MADT structure␊ |
| 102 | EXIT_CODE_FAILED_PROCESS_MADT = 5,␊ |
| 103 | ␊ |
| 104 | // Failed to resolve ACPI MADT structure against available logical␊ |
| 105 | // processors␊ |
| 106 | EXIT_CODE_FAILED_PROCESS_MADT_INFO = 6,␊ |
| 107 | ␊ |
| 108 | // Failed to build ACPI SSDT structure␊ |
| 109 | EXIT_CODE_FAILED_PROCESS_SSDT = 7,␊ |
| 110 | ␊ |
| 111 | // Failed to build and intialize HOST structure␊ |
| 112 | EXIT_CODE_FAILED_HOST_INIT = 8,␊ |
| 113 | ␊ |
| 114 | // Failed during wake of all NBSP to gather processor information␊ |
| 115 | EXIT_CODE_FAILED_COLLECT_SOCKET_INFO = 9,␊ |
| 116 | ␊ |
| 117 | // Failed to resolve target configuration between desired options and␊ |
| 118 | // processor features␊ |
| 119 | EXIT_CODE_FAILED_DETERMINE_CONFIGURATION = 0x0a,␊ |
| 120 | ␊ |
| 121 | // No SSDT ACPI struture was created␊ |
| 122 | EXIT_CODE_NO_SSDT_CREATED = 0x0b,␊ |
| 123 | ␊ |
| 124 | // Failed to build Cstates correctly␊ |
| 125 | EXIT_CODE_FAILED_BUILD_CSTATES = 0x0c,␊ |
| 126 | ␊ |
| 127 | // Failed to build Tstates correctly␊ |
| 128 | EXIT_CODE_FAILED_BUILD_TSTATES = 0x0d,␊ |
| 129 | ␊ |
| 130 | // Failed to find package index of logical processor listed in MADT ACPI table␊ |
| 131 | EXIT_CODE_FAILED_FIND_PKG_INDEX_FROM_LAPIC = 0x0e,␊ |
| 132 | ␊ |
| 133 | // Failed with invalid input provided for SSDT location flag␊ |
| 134 | EXIT_CODE_FAILED_INVALID_SSDT_LOCATION_FLAG = 0x0f,␊ |
| 135 | ␊ |
| 136 | // Failed with no logical processors found in MADT␊ |
| 137 | EXIT_CODE_FAILED_NO_LAPIC_FOUND_IN_MADT = 0x10,␊ |
| 138 | ␊ |
| 139 | // Failed with SSDT size exceeded during SSDT creation␊ |
| 140 | EXIT_CODE_FAILED_SSDT_SIZE_EXCEEDED = 0x11,␊ |
| 141 | ␊ |
| 142 | // Failed to build ACPI SSDT structure␊ |
| 143 | EXIT_CODE_FAILED_BUILD_SSDT = 0x12,␊ |
| 144 | ␊ |
| 145 | // Failed with core index of logical processor listed in MADT ACPI table exceeding max␊ |
| 146 | EXIT_CODE_MAX_CORES_EXCEEDED = 0x13,␊ |
| 147 | ␊ |
| 148 | // Failed to find CPU Scope from array of ACPI processor number to ACPI CPU NameSeg structures␊ |
| 149 | EXIT_CODE_FAILED_FIND_CPU_SCOPE_NAME_SEG = 0x14,␊ |
| 150 | ␊ |
| 151 | // Failed to update FADT␊ |
| 152 | EXIT_CODE_FAILED_UPDATE_FADT = 0x15,␊ |
| 153 | ␊ |
| 154 | // GPF detected␊ |
| 155 | EXIT_CODE_GPF_DETECTED = 0x16,␊ |
| 156 | ␊ |
| 157 | // Failed with invalid SSDT buffer address␊ |
| 158 | EXIT_CODE_INVALID_SSDT_ADDR = 0x17,␊ |
| 159 | ␊ |
| 160 | // Failed with invalid SSDT buffer length␊ |
| 161 | EXIT_CODE_INVALID_SSDT_LEN = 0x18,␊ |
| 162 | } EXIT_CODE;␊ |
| 163 | ␊ |
| 164 | typedef struct exit_state {␊ |
| 165 | // 1 = success, 0 = failure␊ |
| 166 | U32 return_status;␊ |
| 167 | ␊ |
| 168 | // Number of Failure or Informative codes included in the buffer␊ |
| 169 | U32 error_code_count;␊ |
| 170 | ␊ |
| 171 | // Buffer of Failure or Informative codes␊ |
| 172 | U32 error_codes[10];␊ |
| 173 | ␊ |
| 174 | // This 32-bit physical memory address specifies the final location for the␊ |
| 175 | // SSDT ACPI structure built by the PPM RC.␊ |
| 176 | U32 ssdt_mem_addr;␊ |
| 177 | ␊ |
| 178 | // This value specifies the final size of the SSDT ACPI structure for the␊ |
| 179 | // SSDT ACPI structure built by the PPM RC.␊ |
| 180 | U32 ssdt_mem_size;␊ |
| 181 | ␊ |
| 182 | // The final state for the P-state initialization␊ |
| 183 | // 1=enabled; 0=disabled␊ |
| 184 | U32 pstates_enabled;␊ |
| 185 | ␊ |
| 186 | // The final state for the Turbo feature initialization␊ |
| 187 | // 1=enabled; 0=disabled␊ |
| 188 | U32 turbo_enabled;␊ |
| 189 | ␊ |
| 190 | // The final state for the C-state initialization␊ |
| 191 | // 1=enabled; 0=disabled␊ |
| 192 | U32 cstates_enabled;␊ |
| 193 | ␊ |
| 194 | // The final state for the T-state initialization␊ |
| 195 | // 1=enabled; 0=disabled␊ |
| 196 | U32 tstates_enabled;␊ |
| 197 | } EXIT_STATE;␊ |
| 198 | ␊ |
| 199 | typedef enum cpu_namespace_flag {␊ |
| 200 | // Flag indicating the SSDT ACPI structure should be built␊ |
| 201 | // using ACPI 1.0 compliant processor namespace "_PR"␊ |
| 202 | CPU_NAMESPACE_PR = 0,␊ |
| 203 | ␊ |
| 204 | // Flag indicating the SSDT ACPI structure should be built␊ |
| 205 | // using ACPI 2.0+ compliant processor namespace "_SB"␊ |
| 206 | CPU_NAMESPACE_SB = 1,␊ |
| 207 | } CPU_NAMESPACE_FLAG;␊ |
| 208 | ␊ |
| 209 | // Define the total number of required NameSegs to reach the DSDT processor␊ |
| 210 | // device or object declarations␊ |
| 211 | #define MAX_SUPPORTED_CPU_NAMESEGS 3␊ |
| 212 | ␊ |
| 213 | typedef struct processor_number_to_nameseg {␊ |
| 214 | // Contains one of the ACPI processor ID values used in a␊ |
| 215 | // ACPI Declare Processor statement in the DSDT or XSDT␊ |
| 216 | U32 acpi_processor_number;␊ |
| 217 | ␊ |
| 218 | // Number of NameSpace segments in NamePath to processor devices/objects␊ |
| 219 | U32 seg_count;␊ |
| 220 | ␊ |
| 221 | // Contains the corresponding ACPI Name Scope in the form␊ |
| 222 | // of a series of NameSegs constituting the NamePath to a␊ |
| 223 | // processor device or object declaration␊ |
| 224 | U32 nameseg[MAX_SUPPORTED_CPU_NAMESEGS];␊ |
| 225 | } PROCESSOR_NUMBER_TO_NAMESEG;␊ |
| 226 | ␊ |
| 227 | typedef struct ppm_setup_options {␊ |
| 228 | // This 32-bit physical memory address specifies a read-write memory region␊ |
| 229 | // below 1MB. Minimum size is 8KB. This memory is used by the callback as␊ |
| 230 | // the SIPI target and stack for each AP. This region is not required to be␊ |
| 231 | // cacheable.␊ |
| 232 | U32 mem_region_below_1M;␊ |
| 233 | ␊ |
| 234 | // Number of CPU sockets which exist on the platform␊ |
| 235 | U32 num_sockets;␊ |
| 236 | ␊ |
| 237 | // Desired state for the P-state initialization␊ |
| 238 | // 1=enabled; 0=disabled␊ |
| 239 | U32 pstates_enabled;␊ |
| 240 | ␊ |
| 241 | // Desired state for the P-state hardware coordination␊ |
| 242 | // ACPI_PSD_COORD_TYPE_SW_ALL = 0xFC␊ |
| 243 | // ACPI_PSD_COORD_TYPE_SW_ANY = 0xFD␊ |
| 244 | // ACPI_PSD_COORD_TYPE_HW_ALL = 0xFE␊ |
| 245 | U32 pstate_coordination;␊ |
| 246 | ␊ |
| 247 | // Desired state for the Turbo state initialization␊ |
| 248 | // 1=enabled; 0=disabled␊ |
| 249 | U32 turbo_enabled;␊ |
| 250 | ␊ |
| 251 | // Desired state for the C-state initialization␊ |
| 252 | // 1=enabled; 0=disabled␊ |
| 253 | U32 cstates_enabled;␊ |
| 254 | ␊ |
| 255 | // Desired state for the C1E initialization␊ |
| 256 | // 1=enabled; 0=disabled␊ |
| 257 | U32 c1e_enabled;␊ |
| 258 | ␊ |
| 259 | // Desired state for the processor core C3 state included in the _CST␊ |
| 260 | // 0= processor core C3 cannot be used as an ACPI C state␊ |
| 261 | // 2= processor core C3 can be used as an ACPI C2 state␊ |
| 262 | // 3= processor core C3 can be used as an ACPI C3 state␊ |
| 263 | // 4= processor core C3 can be used as an ACPI C2 state␊ |
| 264 | // if Invariant APIC Timer detected, else not used as ACPI C state␊ |
| 265 | // 5= processor core C3 can be used as an ACPI C2 state␊ |
| 266 | // if Invariant APIC Timer detected, else APIC C3 state␊ |
| 267 | U32 c3_enabled;␊ |
| 268 | ␊ |
| 269 | // Desired state for the processor core C6 state included in the _CST as an␊ |
| 270 | // ACPI C3 state.␊ |
| 271 | // 1= processor core C6 can be used as an ACPI C3 state␊ |
| 272 | // 0= processor core C6 cannot be used as an ACPI C3 state␊ |
| 273 | U32 c6_enabled;␊ |
| 274 | ␊ |
| 275 | // Desired state for the processor core C7 state included in the _CST as an␊ |
| 276 | // ACPI C3 state.␊ |
| 277 | // 1= processor core C7 can be used as an ACPI C7 state␊ |
| 278 | // 0= processor core C7 cannot be used as an ACPI C7 state␊ |
| 279 | U32 c7_enabled;␊ |
| 280 | ␊ |
| 281 | // Desired state for providing alternate ACPI _CST structure using MWAIT␊ |
| 282 | // extensions␊ |
| 283 | // 1= Alternate _CST using MWAIT extension is enabled for OSPM use␊ |
| 284 | // 0= Alternate _CST using MWAIT extension is disabled for OSPM use␊ |
| 285 | U32 mwait_enabled;␊ |
| 286 | ␊ |
| 287 | // Power management base address used for processors␊ |
| 288 | U32 pmbase;␊ |
| 289 | ␊ |
| 290 | // Desired state for the C-state package limit.␊ |
| 291 | // Note: The C-state package limit may be further limited by the␊ |
| 292 | // capabilities of the processor␊ |
| 293 | // 000b = C0 (No package C-state support)␊ |
| 294 | // 001b = C1 (Behavior is the same as 000b)␊ |
| 295 | // 010b = C3␊ |
| 296 | // 011b = C6␊ |
| 297 | // 100b = C7␊ |
| 298 | // 111b = No package C-state limit␊ |
| 299 | U32 package_cstate_limit;␊ |
| 300 | ␊ |
| 301 | // Desired state for the T-state initialization␊ |
| 302 | // 1=enabled; 0=disabled␊ |
| 303 | U32 tstates_enabled;␊ |
| 304 | ␊ |
| 305 | // This 32-bit physical memory address specifies a read-write memory region␊ |
| 306 | // for the SSDT ACPI structure built by the PPM RC. Minimum size is 16KB.␊ |
| 307 | U32 ssdt_mem_addr;␊ |
| 308 | ␊ |
| 309 | // This value specifies the size of the SSDT memory region. Minimum size is␊ |
| 310 | // 16KB.␊ |
| 311 | U32 ssdt_mem_size;␊ |
| 312 | ␊ |
| 313 | // This value specifies the PPM RCM behavior related to creation and␊ |
| 314 | // incorporation of the new SSDT ACPI structure. See definition of the␊ |
| 315 | // SSDT_LOC_FLAG for acceptable values.␊ |
| 316 | U32 ssdt_loc_flag;␊ |
| 317 | ␊ |
| 318 | // This value specifies the PPM RCM behavior related to creation and␊ |
| 319 | // incorporation of the new SSDT ACPI structure. If all power management␊ |
| 320 | // features are disabled by input options, the SSDT can still be created␊ |
| 321 | // for debug review.␊ |
| 322 | // 1 = Create SSDT even if all power management features are disabled␊ |
| 323 | // 0 = Do not create SSDT if all power management features are disabled␊ |
| 324 | U32 ssdt_force_creation;␊ |
| 325 | ␊ |
| 326 | // Exit structure intended to convey state to the caller and/or subsequent␊ |
| 327 | // init code␊ |
| 328 | EXIT_STATE exit_state;␊ |
| 329 | ␊ |
| 330 | // Flag indicating the processor namespace that should be used in the␊ |
| 331 | // SSDT ACPI structure for each CPU.␊ |
| 332 | // See definition of the CPU_NAMESPACE_FLAG for acceptable values.␊ |
| 333 | U32 cpu_namespace_flag;␊ |
| 334 | ␊ |
| 335 | // This version number identifies the PPM RCM specification.␊ |
| 336 | // Specifically denotes the version of this structure definition is compliant␊ |
| 337 | // with with file nehalem-ppm-rcm-vX.txt where X is the version number.␊ |
| 338 | // PPMSETUP.C should always use the version definition from the top of␊ |
| 339 | // this file called CURRENT_PPM_RCM_INTERFACE_SPECIFICATION.␊ |
| 340 | U32 ppm_rcm_interface_specification;␊ |
| 341 | ␊ |
| 342 | // This flag indicates whether or not after all AP Wakes are completed,␊ |
| 343 | // that the AP should be forced to jump to the real mode address specified␊ |
| 344 | // in the realmode_callback_address field below.␊ |
| 345 | // realmode_callback = 0 means leave AP in INIT or Wait For SIPI (WFS) state␊ |
| 346 | // realmode_callback = 1 means AP should jump to real mode address specified below␊ |
| 347 | U32 realmode_callback_flag;␊ |
| 348 | ␊ |
| 349 | // This file contains the real mode callback address which AP must jump to after␊ |
| 350 | // INIT_SIPI_SIPI sequences used to force AP initalization for PPM.␊ |
| 351 | // Upper 16-bits specify target real mode segment for a far 16-bit jump instruction␊ |
| 352 | // Lower 16-bits specify target real mode offset for a far 16-bit jump instruction␊ |
| 353 | U32 realmode_callback_address;␊ |
| 354 | ␊ |
| 355 | // Number of ACPI processor number to ACPI CPU NameSeg structures␊ |
| 356 | U32 cpu_map_count;␊ |
| 357 | ␊ |
| 358 | // Array of ACPI processor number to ACPI CPU NameSeg structures␊ |
| 359 | PROCESSOR_NUMBER_TO_NAMESEG *cpu_map;␊ |
| 360 | ␊ |
| 361 | // This flag indicates whether or not PPM RC should update an existing ACPI FADT.␊ |
| 362 | // modify_fadt_flag = 0 means do not modify existing ACPI FADT structure␊ |
| 363 | // modify_fadt_flag = 1 means do check and if needed, modify existing ACPI FADT structure␊ |
| 364 | U32 modify_fadt_flag;␊ |
| 365 | ␊ |
| 366 | // Desired state for the performance_per_watt optimizations␊ |
| 367 | // performance_per_watt = 2 means "Low Power"␊ |
| 368 | // performance_per_watt = 1 means "Power Optimized or Power Balanced"␊ |
| 369 | // performance_per_watt = 0 means "Traditional or Max Performance"␊ |
| 370 | U32 performance_per_watt;␊ |
| 371 | } PPM_SETUP_OPTIONS;␊ |
| 372 | ␊ |
| 373 | #ifndef RCMSTART_TYPEDEF␊ |
| 374 | #define RCMSTART_TYPEDEF␊ |
| 375 | typedef U32 (*RCMSTART)(struct ppm_setup_options *);␊ |
| 376 | #endif␊ |
| 377 | ␊ |
| 378 | #endif // ppmsetup_h␊ |
| 379 | |
