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1/*␊
2 * Add (c) here␊
3 *␊
4 * Copyright .... All rights reserved.␊
5 *␊
6 */␊
7␊
8#include "smbios_getters.h"␊
9#include "modules.h"␊
10␊
11#ifndef DEBUG_SMBIOS␊
12#define DEBUG_SMBIOS 0␊
13#endif␊
14␊
15#if DEBUG_SMBIOS␊
16#define DBG(x...)␉printf(x)␊
17#else␊
18#define DBG(x...)␊
19#endif␊
20␊
21␊
22bool getProcessorInformationExternalClock(returnType *value)␊
23{␊
24␉value->word = Platform->CPU.FSBFrequency/1000000;␊
25␉return true;␊
26}␊
27␊
28bool getProcessorInformationMaximumClock(returnType *value)␊
29{␊
30␉value->word = Platform->CPU.CPUFrequency/1000000;␊
31␉return true;␊
32}␊
33␊
34bool getSMBOemProcessorBusSpeed(returnType *value)␊
35{␊
36␉if (Platform->CPU.Vendor == 0x756E6547) // Intel␊
37␉{␉␉␊
38␉␉switch (Platform->CPU.Family) ␊
39␉␉{␊
40␉␉␉case 0x06:␊
41␉␉␉{␊
42␉␉␉␉switch (Platform->CPU.Model)␊
43␉␉␉␉{␊
44 case CPUID_MODEL_BANIAS:␉// Banias␉␉0x09␊
45 case CPUID_MODEL_DOTHAN:␉// Dothan␉␉0x0D␊
46␉␉␉␉␉case CPUID_MODEL_YONAH:␉␉// Yonah␉␉0x0E␊
47␉␉␉␉␉case CPUID_MODEL_MEROM:␉␉// Merom␉␉0x0F␊
48␉␉␉␉␉case CPUID_MODEL_PENRYN:␉␉// Penryn␉␉0x17␊
49␉␉␉␉␉case CPUID_MODEL_ATOM:␉␉// Atom 45nm␉0x1C␊
50␉␉␉␉␉␉return false;␊
51␊
52␉␉␉␉␉case 0x19:␉␉␉␉␉// Intel Core i5 650 @3.20 Ghz␊
53␉␉␉␉␉case CPUID_MODEL_NEHALEM:␉␉// Intel Core i7 LGA1366 (45nm)␊
54␉␉␉␉␉case CPUID_MODEL_FIELDS:␉␉// Intel Core i5, i7 LGA1156 (45nm)␊
55␉␉␉␉␉case CPUID_MODEL_DALES:␉␉// Intel Core i5, i7 LGA1156 (45nm) ???␊
56␉␉␉␉␉case CPUID_MODEL_DALES_32NM:␉// Intel Core i3, i5, i7 LGA1156 (32nm)␊
57␉␉␉␉␉case CPUID_MODEL_WESTMERE:␉// Intel Core i7 LGA1366 (32nm) 6 Core␊
58␉␉␉␉␉case CPUID_MODEL_NEHALEM_EX:␉// Intel Core i7 LGA1366 (45nm) 6 Core ???␊
59␉␉␉␉␉case CPUID_MODEL_WESTMERE_EX:␉// Intel Core i7 LGA1366 (45nm) 6 Core ???␊
60␉␉␉␉␉case CPUID_MODEL_SANDYBRIDGE:␊
61␉␉␉␉␉case CPUID_MODEL_JAKETOWN:␊
62␉␉␉␉␉{␊
63␉␉␉␉␉␉// thanks to dgobe for i3/i5/i7 bus speed detection␊
64␉␉␉␉␉␉int nhm_bus = 0x3F;␊
65␉␉␉␉␉␉static long possible_nhm_bus[] = {0xFF, 0x7F, 0x3F};␊
66␉␉␉␉␉␉unsigned long did, vid;␊
67␉␉␉␉␉␉unsigned int i;␊
68␉␉␉␉␉␉␊
69␉␉␉␉␉␉// Nehalem supports Scrubbing␊
70␉␉␉␉␉␉// First, locate the PCI bus where the MCH is located␊
71␉␉␉␉␉␉for(i = 0; i < sizeof(possible_nhm_bus); i++)␊
72␉␉␉␉␉␉{␊
73␉␉␉␉␉␉␉vid = pci_config_read16(PCIADDR(possible_nhm_bus[i], 3, 4), 0x00);␊
74␉␉␉␉␉␉␉did = pci_config_read16(PCIADDR(possible_nhm_bus[i], 3, 4), 0x02);␊
75␉␉␉␉␉␉␉vid &= 0xFFFF;␊
76␉␉␉␉␉␉␉did &= 0xFF00;␊
77␉␉␉␉␉␉␉␊
78␉␉␉␉␉␉␉if(vid == 0x8086 && did >= 0x2C00)␊
79␉␉␉␉␉␉␉␉nhm_bus = possible_nhm_bus[i]; ␊
80␉␉␉␉␉␉}␊
81␉␉␉␉␉␉␊
82␉␉␉␉␉␉unsigned long qpimult, qpibusspeed;␊
83␉␉␉␉␉␉qpimult = pci_config_read32(PCIADDR(nhm_bus, 2, 1), 0x50);␊
84␉␉␉␉␉␉qpimult &= 0x7F;␊
85␉␉␉␉␉␉DBG("qpimult %d\n", qpimult);␊
86␉␉␉␉␉␉qpibusspeed = (qpimult * 2 * (Platform->CPU.FSBFrequency/1000000));␊
87␉␉␉␉␉␉// Rek: rounding decimals to match original mac profile info␊
88␉␉␉␉␉␉if (qpibusspeed%100 != 0)qpibusspeed = ((qpibusspeed+50)/100)*100;␊
89␉␉␉␉␉␉DBG("qpibusspeed %d\n", qpibusspeed);␊
90␉␉␉␉␉␉value->word = qpibusspeed;␊
91␉␉␉␉␉␉return true;␊
92␉␉␉␉␉}␊
93␉␉␉␉␉default:␊
94␉␉␉␉␉␉break; //Unsupported CPU type␊
95␉␉␉␉}␊
96␉␉␉}␊
97␉␉␉default:␊
98␉␉␉␉break; ␊
99␉␉}␊
100␉}␊
101␉return false;␊
102}␊
103␊
104uint16_t simpleGetSMBOemProcessorType(void)␊
105{␊
106␉if (Platform->CPU.NoCores >= 4) ␊
107␉{␊
108␉␉return 0x0501;␉// Quad-Core Xeon␊
109␉}␊
110␉if (((Platform->CPU.NoCores == 1) || (Platform->CPU.NoCores == 2)) && !(platformCPUExtFeature(CPUID_EXTFEATURE_EM64T))) ␊
111␉{␊
112␉␉return 0x0201;␉// Core Solo / Duo␊
113␉};␊
114␉␊
115␉return 0x0301;␉␉// Core 2 Solo / Duo␊
116}␊
117␊
118bool getSMBOemProcessorType(returnType *value)␊
119{␊
120␉static bool done = false;␉␉␊
121␉␉␊
122␉value->word = simpleGetSMBOemProcessorType();␊
123␊
124␉if (Platform->CPU.Vendor == 0x756E6547) // Intel␊
125␉{␊
126␉␉if (!done)␊
127␉␉{␊
128␉␉␉verbose("CPU is %s, family 0x%x, model 0x%x\n", Platform->CPU.BrandString, Platform->CPU.Family, Platform->CPU.Model);␊
129␉␉␉done = true;␊
130␉␉}␊
131␉␉␊
132␉␉switch (Platform->CPU.Family) ␊
133␉␉{␊
134␉␉␉case 0x06:␊
135␉␉␉{␊
136␉␉␉␉switch (Platform->CPU.Model)␊
137␉␉␉␉{␊
138 case CPUID_MODEL_BANIAS:␉// Banias␉␉␊
139 case CPUID_MODEL_DOTHAN:␉// Dothan␉␉␊
140␉␉␉␉␉case CPUID_MODEL_YONAH:␉␉␉␉// Yonah␊
141␉␉␉␉␉case CPUID_MODEL_MEROM:␉␉␉␉// Merom␊
142␉␉␉␉␉case CPUID_MODEL_PENRYN:␉␉␉␉// Penryn␊
143␉␉␉␉␉case CPUID_MODEL_ATOM:␉␉␉␉// Intel Atom (45nm)␊
144␉␉␉␉␉␉return true;␊
145␊
146␉␉␉␉␉case CPUID_MODEL_NEHALEM:␉␉␉␉// Intel Core i7 LGA1366 (45nm)␊
147␉␉␉␉␉␉value->word = 0x0701;␉␉␉// Core i7␊
148␉␉␉␉␉␉return true;␊
149␊
150␉␉␉␉␉case CPUID_MODEL_FIELDS:␉␉␉␉// Lynnfield, Clarksfield, Jasper␊
151␉␉␉␉␉␉if (strstr(Platform->CPU.BrandString, "Core(TM) i5"))␊
152␉␉␉␉␉␉␉value->word = 0x601;␉␉// Core i5␊
153␉␉␉␉␉␉else␊
154␉␉␉␉␉␉␉value->word = 0x701;␉␉// Core i7␊
155␉␉␉␉␉␉return true;␊
156␊
157␉␉␉␉␉case CPUID_MODEL_DALES:␉␉␉␉// Intel Core i5, i7 LGA1156 (45nm) (Havendale, Auburndale)␊
158␉␉␉␉␉␉if (strstr(Platform->CPU.BrandString, "Core(TM) i5"))␊
159␉␉␉␉␉␉␉value->word = 0x601;␉␉// Core i5␊
160␉␉␉␉␉␉else␊
161␉␉␉␉␉␉␉value->word = 0x0701;␉␉// Core i7␊
162␉␉␉␉␉␉return true;␊
163␊
164␉␉␉␉␉case CPUID_MODEL_SANDYBRIDGE:␊
165␉␉␉␉␉case CPUID_MODEL_DALES_32NM:␉␉␉// Intel Core i3, i5, i7 LGA1156 (32nm) (Clarkdale, Arrandale)␊
166␉␉␉␉␉␉if (strstr(Platform->CPU.BrandString, "Core(TM) i3"))␊
167␉␉␉␉␉␉␉␉value->word = 0x901;␉// Core i3␊
168␉␉␉␉␉␉else if (strstr(Platform->CPU.BrandString, "Core(TM) i5"))␊
169␉␉␉␉␉␉␉␉value->word = 0x601;␉// Core i5␊
170␉␉␉␉␉␉else if (strstr(Platform->CPU.BrandString, "Core(TM) i7"))␊
171␉␉␉␉␉␉␉␉value->word = 0x0701;␉// Core i7␊
172␉␉␉␉␉␉/*else ␊
173␉␉␉␉␉␉␉␉value->word = simpleGetSMBOemProcessorType();*/␊
174␉␉␉␉␉␉return true;␊
175␊
176 case CPUID_MODEL_JAKETOWN:␊
177␉␉␉␉␉case CPUID_MODEL_WESTMERE:␉␉␉// Intel Core i7 LGA1366 (32nm) 6 Core (Gulftown, Westmere-EP, Westmere-WS)␊
178␉␉␉␉␉case CPUID_MODEL_WESTMERE_EX:␉␉␉// Intel Core i7 LGA1366 (45nm) 6 Core ???␊
179␉␉␉␉␉␉value->word = 0x0501;␉␉␉// Core i7␊
180␉␉␉␉␉␉return true;␊
181␊
182␉␉␉␉␉case 0x19:␉␉␉␉␉␉␉// Intel Core i5 650 @3.20 Ghz␊
183␉␉␉␉␉␉value->word = 0x601;␉␉␉// Core i5␊
184␉␉␉␉␉␉return true;␊
185␉␉␉␉␉default:␊
186␉␉␉␉␉␉break; //Unsupported CPU type␊
187␉␉␉␉}␊
188␉␉␉}␊
189␉␉␉default:␊
190␉␉␉␉break; ␊
191␉␉}␊
192␉}␊
193␉␊
194␉return false;␊
195}␊
196␊
197bool getSMBMemoryDeviceMemoryType(returnType *value)␊
198{␊
199␉static int idx = -1;␊
200␉if (execute_hook("isMemoryRegistred", NULL, NULL, NULL, NULL, NULL, NULL) == EFI_SUCCESS) {␊
201␉␉int␉map;␊
202␊
203␉␉idx++;␊
204␉␉if (idx < MAX_RAM_SLOTS)␊
205␉␉{␊
206␉␉␉map = Platform->DMI.DIMM[idx];␊
207␉␉␉if (Platform->RAM.DIMM[map].InUse && Platform->RAM.DIMM[map].Type != 0)␊
208␉␉␉{␊
209␉␉␉␉DBG("RAM Detected Type = %d\n", Platform->RAM.DIMM[map].Type);␊
210␉␉␉␉value->byte = Platform->RAM.DIMM[map].Type;␊
211␉␉␉␉return true;␊
212␉␉␉}␊
213␉␉}␊
214␉}␊
215␉value->byte = SMB_MEM_TYPE_DDR2;␊
216␉return true;␊
217}␊
218␊
219bool getSMBMemoryDeviceMemorySpeed(returnType *value)␊
220{␊
221␉static int idx = -1;␊
222␉if (execute_hook("isMemoryRegistred", NULL, NULL, NULL, NULL, NULL, NULL) == EFI_SUCCESS) {␊
223␉␉int␉map;␊
224␊
225␉␉idx++;␊
226␉␉if (idx < MAX_RAM_SLOTS)␊
227␉␉{␊
228␉␉␉map = Platform->DMI.DIMM[idx];␊
229␉␉␉if (Platform->RAM.DIMM[map].InUse && Platform->RAM.DIMM[map].Frequency != 0)␊
230␉␉␉{␊
231␉␉␉␉DBG("RAM Detected Freq = %d Mhz\n", Platform->RAM.DIMM[map].Frequency);␊
232␉␉␉␉value->dword = Platform->RAM.DIMM[map].Frequency;␊
233␉␉␉␉return true;␊
234␉␉␉}␊
235␉␉}␊
236␉}␊
237␉value->dword = 800;␊
238␉return true;␊
239}␊
240␊
241bool getSMBMemoryDeviceManufacturer(returnType *value)␊
242{␊
243␉static int idx = -1;␊
244␉if (execute_hook("isMemoryRegistred", NULL, NULL, NULL, NULL, NULL, NULL) == EFI_SUCCESS) {␊
245␉␉int␉map;␊
246␊
247␉␉idx++;␊
248␉␉if (idx < MAX_RAM_SLOTS)␊
249␉␉{␊
250␉␉␉map = Platform->DMI.DIMM[idx];␊
251␉␉␉if (Platform->RAM.DIMM[map].InUse && strlen(Platform->RAM.DIMM[map].Vendor) > 0)␊
252␉␉␉{␊
253␉␉␉␉DBG("RAM Detected Vendor[%d]='%s'\n", idx, Platform->RAM.DIMM[map].Vendor);␊
254␉␉␉␉value->string = Platform->RAM.DIMM[map].Vendor;␊
255␉␉␉␉return true;␊
256␉␉␉}␊
257␉␉}␊
258␉}␊
259␉value->string = "N/A";␊
260␉return true;␊
261}␊
262␉␊
263bool getSMBMemoryDeviceSerialNumber(returnType *value)␊
264{␊
265␉static int idx = -1;␊
266␉if (execute_hook("isMemoryRegistred", NULL, NULL, NULL, NULL, NULL, NULL) == EFI_SUCCESS) {␊
267␉␉int␉map;␊
268␊
269␉␉idx++;␊
270␉␉if (idx < MAX_RAM_SLOTS)␊
271␉␉{␊
272␉␉␉map = Platform->DMI.DIMM[idx];␊
273␉␉␉if (Platform->RAM.DIMM[map].InUse && strlen(Platform->RAM.DIMM[map].SerialNo) > 0)␊
274␉␉␉{␊
275␉␉␉␉DBG("name = %s, map=%d, RAM Detected SerialNo[%d]='%s'\n", name ? name : "", ␊
276␉␉␉␉map, idx, Platform->RAM.DIMM[map].SerialNo);␊
277␉␉␉␉value->string = Platform->RAM.DIMM[map].SerialNo;␊
278␉␉␉␉return true;␊
279␉␉␉}␊
280␉␉}␊
281␉}␊
282␉value->string = "N/A";␊
283␉return true;␊
284}␊
285␊
286bool getSMBMemoryDevicePartNumber(returnType *value)␊
287{␊
288␉static int idx = -1;␊
289␉if (execute_hook("isMemoryRegistred", NULL, NULL, NULL, NULL, NULL, NULL) == EFI_SUCCESS) {␊
290␉␉int␉map;␊
291␊
292␉␉idx++;␊
293␉␉if (idx < MAX_RAM_SLOTS)␊
294␉␉{␊
295␉␉␉map = Platform->DMI.DIMM[idx];␊
296␉␉␉if (Platform->RAM.DIMM[map].InUse && strlen(Platform->RAM.DIMM[map].PartNo) > 0)␊
297␉␉␉{␊
298␉␉␉␉DBG("Ram Detected PartNo[%d]='%s'\n", idx, Platform->RAM.DIMM[map].PartNo);␊
299␉␉␉␉value->string = Platform->RAM.DIMM[map].PartNo;␊
300␉␉␉␉return true;␊
301␉␉␉}␊
302␉␉}␊
303␉}␊
304␉value->string = "N/A";␊
305␉return true;␊
306}␊
307

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