Root/
Source at commit 113 created 14 years 1 month ago. By diebuche, working on ati res. | |
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1 | /* Copied from 915 resolution created by steve tomljenovic␊ |
2 | * This source code is into the public domain.␊ |
3 | *␊ |
4 | * Included to Chameleon RC3 by meklort␊ |
5 | *␊ |
6 | * Included to RC4 and edited by deviato to match more intel chipsets␊ |
7 | *␊ |
8 | */␊ |
9 | ␊ |
10 | /* Copied from 915 resolution created by steve tomljenovic␊ |
11 | *␊ |
12 | * This code is based on the techniques used in :␊ |
13 | *␊ |
14 | * - 855patch. Many thanks to Christian Zietz (czietz gmx net)␊ |
15 | * for demonstrating how to shadow the VBIOS into system RAM␊ |
16 | * and then modify it.␊ |
17 | *␊ |
18 | * - 1280patch by Andrew Tipton (andrewtipton null li).␊ |
19 | *␊ |
20 | * - 855resolution by Alain Poirier␊ |
21 | *␊ |
22 | * This source code is into the public domain.␊ |
23 | */␊ |
24 | ␊ |
25 | #include "libsaio.h"␊ |
26 | #include "915resolution.h"␊ |
27 | ␊ |
28 | char * chipset_type_names[] = {␊ |
29 | ␉"UNKNOWN", "830", "845G", "855GM", "865G", "915G", "915GM", "945G", "945GM", "945GME",␊ |
30 | ␉"946GZ", "G965", "Q965", "965GM", "G41", "G31", "G45", "GM45", "500"␊ |
31 | };␊ |
32 | ␊ |
33 | char * bios_type_names[] = {"UNKNOWN", "TYPE 1", "TYPE 2", "TYPE 3"};␊ |
34 | ␊ |
35 | int freqs[] = { 60, 75, 85 };␊ |
36 | ␊ |
37 | UInt32 get_chipset_id(void) {␊ |
38 | ␉outl(0xcf8, 0x80000000);␊ |
39 | ␉return inl(0xcfc);␊ |
40 | }␊ |
41 | ␊ |
42 | chipset_type get_chipset(UInt32 id) {␊ |
43 | ␉chipset_type type;␊ |
44 | ␉␊ |
45 | ␉switch (id) {␊ |
46 | ␉␉case 0x35758086:␊ |
47 | ␉␉␉type = CT_830;␊ |
48 | ␉␉␉break;␊ |
49 | ␉␉␊ |
50 | ␉␉case 0x25608086:␊ |
51 | ␉␉␉type = CT_845G;␊ |
52 | ␉␉␉break;␊ |
53 | ␉␉␉␉␊ |
54 | ␉␉case 0x35808086:␊ |
55 | ␉␉␉type = CT_855GM;␊ |
56 | ␉␉␉break;␊ |
57 | ␉␉␉␉␊ |
58 | ␉␉case 0x25708086:␊ |
59 | ␉␉␉type = CT_865G;␊ |
60 | ␉␉␉break;␊ |
61 | ␉␉␊ |
62 | ␉␉case 0x25808086:␊ |
63 | ␉␉␉type = CT_915G;␊ |
64 | ␉␉␉break;␊ |
65 | ␉␉␉␊ |
66 | ␉␉case 0x25908086:␊ |
67 | ␉␉␉type = CT_915GM;␊ |
68 | ␉␉␉break;␊ |
69 | ␉␉␉␊ |
70 | ␉␉case 0x27708086:␊ |
71 | ␉␉␉type = CT_945G;␊ |
72 | ␉␉␉break;␊ |
73 | ␉␉␊ |
74 | ␉␉case 0x27a08086:␊ |
75 | ␉␉␉type = CT_945GM;␊ |
76 | ␉␉␉break;␊ |
77 | ␉␉␉␊ |
78 | ␉␉case 0x27ac8086:␊ |
79 | ␉␉␉type = CT_945GME;␊ |
80 | ␉␉␉break;␊ |
81 | ␉␉␉␊ |
82 | ␉␉case 0x29708086:␊ |
83 | ␉␉␉type = CT_946GZ;␊ |
84 | ␉␉␉break;␊ |
85 | ␉␉␉␊ |
86 | ␉␉case 0x29a08086:␊ |
87 | ␉␉␉type = CT_G965;␊ |
88 | ␉␉␉break;␊ |
89 | ␉␉␉␊ |
90 | ␉␉case 0x29908086:␊ |
91 | ␉␉␉type = CT_Q965;␊ |
92 | ␉␉␉break;␊ |
93 | ␉␉␉␊ |
94 | ␉␉case 0x2a008086:␊ |
95 | ␉␉␉type = CT_965GM;␊ |
96 | ␉␉␉break;␊ |
97 | ␉␉␉␊ |
98 | ␉␉case 0x2a408086:␊ |
99 | ␉␉␉type = CT_GM45;␊ |
100 | ␉␉␉break;␊ |
101 | ␊ |
102 | ␉␉case 0x2e308086:␊ |
103 | ␉␉␉type = CT_G41;␊ |
104 | ␉␉␉break;␊ |
105 | ␊ |
106 | ␉␉case 0x29c08086:␊ |
107 | ␉␉␉type = CT_G31;␊ |
108 | ␉␉␉break;␊ |
109 | ␊ |
110 | ␉␉case 0x2e208086:␊ |
111 | ␉␉␉type = CT_G45;␊ |
112 | ␉␉␉break;␊ |
113 | ␊ |
114 | ␉␉case 0x81008086:␊ |
115 | ␉␉␉type = CT_500;␊ |
116 | ␉␉␉break;␊ |
117 | ␉␉␉␊ |
118 | ␉␉␉␊ |
119 | ␉␉default:␊ |
120 | ␉␉␉type = CT_UNKWN;␊ |
121 | ␉␉␉break;␊ |
122 | ␉}␊ |
123 | ␉return type;␊ |
124 | }␊ |
125 | ␊ |
126 | vbios_resolution_type1 * map_type1_resolution(vbios_map * map, UInt16 res) {␊ |
127 | ␉vbios_resolution_type1 * ptr = ((vbios_resolution_type1*)(map->bios_ptr + res)); ␊ |
128 | ␉return ptr;␊ |
129 | }␊ |
130 | ␊ |
131 | vbios_resolution_type2 * map_type2_resolution(vbios_map * map, UInt16 res) {␊ |
132 | ␉vbios_resolution_type2 * ptr = ((vbios_resolution_type2*)(map->bios_ptr + res)); ␊ |
133 | ␉return ptr;␊ |
134 | }␊ |
135 | ␊ |
136 | vbios_resolution_type3 * map_type3_resolution(vbios_map * map, UInt16 res) {␊ |
137 | ␉vbios_resolution_type3 * ptr = ((vbios_resolution_type3*)(map->bios_ptr + res)); ␊ |
138 | ␉return ptr;␊ |
139 | }␊ |
140 | ␊ |
141 | char detect_bios_type(vbios_map * map, char modeline, int entry_size) {␊ |
142 | ␉UInt32 i;␊ |
143 | ␉UInt16 r1, r2;␊ |
144 | ␉ ␊ |
145 | ␉r1 = r2 = 32000;␊ |
146 | ␉␊ |
147 | ␉for (i=0; i < map->mode_table_size; i++) {␊ |
148 | ␉␉if (map->mode_table[i].resolution <= r1) {␊ |
149 | ␉␉␉r1 = map->mode_table[i].resolution;␊ |
150 | ␉␉}␊ |
151 | ␉␉else {␊ |
152 | ␉␉␉if (map->mode_table[i].resolution <= r2) {␊ |
153 | ␉␉␉␉r2 = map->mode_table[i].resolution;␊ |
154 | ␉␉␉}␊ |
155 | ␉␉}␊ |
156 | ␉␉␊ |
157 | ␉␉/*printf("r1 = %d r2 = %d\n", r1, r2);*/␊ |
158 | ␉}␊ |
159 | ␊ |
160 | ␉return (r2-r1-6) % entry_size == 0;␊ |
161 | }␊ |
162 | ␊ |
163 | void close_vbios(vbios_map * map);␊ |
164 | ␊ |
165 | vbios_map * open_vbios(chipset_type forced_chipset) {␊ |
166 | ␉UInt32 z;␊ |
167 | ␉vbios_map * map = NEW(vbios_map);␊ |
168 | ␉for(z=0; z<sizeof(vbios_map); z++) ((char*)map)[z]=0;␊ |
169 | ␉␊ |
170 | ␉/*␊ |
171 | ␉ * Determine chipset␊ |
172 | ␉ */␊ |
173 | ␉␊ |
174 | ␉if (forced_chipset == CT_UNKWN) {␊ |
175 | ␉␉map->chipset_id = get_chipset_id();␊ |
176 | ␉␉map->chipset = get_chipset(map->chipset_id);␊ |
177 | ␉}␊ |
178 | ␉else if (forced_chipset != CT_UNKWN) {␊ |
179 | ␉␉map->chipset = forced_chipset;␊ |
180 | ␉}␊ |
181 | ␉else {␊ |
182 | ␉␉map->chipset = CT_915GM;␊ |
183 | ␉}␊ |
184 | ␉ ␊ |
185 | ␉/*␊ |
186 | ␉ * Map the video bios to memory␊ |
187 | ␉ */␊ |
188 | ␉␊ |
189 | ␉map->bios_ptr=(char*)VBIOS_START;␊ |
190 | ␉␊ |
191 | ␉/*␊ |
192 | ␉ * check if we have ATI Radeon␊ |
193 | ␉ */␊ |
194 | ␉ ␊ |
195 | ␉/*␊ |
196 | ␉ * check if we have NVIDIA␊ |
197 | ␉ */␊ |
198 | ␉ ␊ |
199 | ␉/*␊ |
200 | ␉ * check if we have Intel␊ |
201 | ␉ */␊ |
202 | ␉ ␊ |
203 | ␉/*␊ |
204 | ␉ * check for others␊ |
205 | ␉ */␊ |
206 | ␉␊ |
207 | ␉if (map->chipset == CT_UNKWN) {␊ |
208 | ␉␉printf("Unknown chipset type and unrecognized bios.\n");␊ |
209 | ␉␉printf("915resolution only works with Intel 800/900 series graphic chipsets.\n");␊ |
210 | ␉␊ |
211 | ␉␉printf("Chipset Id: %x\n", map->chipset_id);␊ |
212 | ␉␉close_vbios(map);␊ |
213 | ␉␉return 0;␊ |
214 | ␉}␊ |
215 | ␊ |
216 | ␉/*␊ |
217 | ␉ * Figure out where the mode table is ␊ |
218 | ␉ */␊ |
219 | ␉␊ |
220 | ␉{␊ |
221 | ␉␉char* p = map->bios_ptr + 16;␊ |
222 | ␉␉char* limit = map->bios_ptr + VBIOS_SIZE - (3 * sizeof(vbios_mode));␊ |
223 | ␉␉␉␊ |
224 | ␉␉while (p < limit && map->mode_table == 0) {␊ |
225 | ␉␉␉vbios_mode * mode_ptr = (vbios_mode *) p;␊ |
226 | ␉␉␉ ␊ |
227 | ␉␉␉if (((mode_ptr[0].mode & 0xf0) == 0x30) && ((mode_ptr[1].mode & 0xf0) == 0x30) &&␊ |
228 | ␉␉␉␉((mode_ptr[2].mode & 0xf0) == 0x30) && ((mode_ptr[3].mode & 0xf0) == 0x30)) {␊ |
229 | ␉␉␉␊ |
230 | ␉␉␉␉map->mode_table = mode_ptr;␊ |
231 | ␉␉␉}␊ |
232 | ␉␉␉ ␊ |
233 | ␉␉␉p++;␊ |
234 | ␉␉}␊ |
235 | ␉␉␊ |
236 | ␉␉if (map->mode_table == 0) {␊ |
237 | ␉␉␉printf("Unable to locate the mode table.\n");␊ |
238 | ␉␉␉printf("Please run the program 'dump_bios' as root and\n");␊ |
239 | ␉␉␉printf("email the file 'vbios.dmp' to stomljen@yahoo.com.\n");␊ |
240 | ␉␉␉printf("Chipset: %s\n", chipset_type_names[map->chipset]);␊ |
241 | ␉␉␉close_vbios(map);␊ |
242 | ␉␉␉return 0;␊ |
243 | ␉␉}␊ |
244 | ␉}␊ |
245 | ␉␊ |
246 | ␉/*␊ |
247 | ␉ * Determine size of mode table␊ |
248 | ␉ */␊ |
249 | ␉ ␊ |
250 | ␉{␊ |
251 | ␉␉vbios_mode * mode_ptr = map->mode_table;␊ |
252 | ␉␉␉␊ |
253 | ␉␉while (mode_ptr->mode != 0xff) {␊ |
254 | ␉␉␉map->mode_table_size++;␊ |
255 | ␉␉␉mode_ptr++;␊ |
256 | ␉␉}␊ |
257 | ␉}␊ |
258 | ␉␊ |
259 | ␉/*␊ |
260 | ␉ * Figure out what type of bios we have␊ |
261 | ␉ * order of detection is important␊ |
262 | ␉ */␊ |
263 | ␉␊ |
264 | ␉if (detect_bios_type(map, TRUE, sizeof(vbios_modeline_type3))) {␊ |
265 | ␉␉map->bios = BT_3;␊ |
266 | ␉}␊ |
267 | ␉else if (detect_bios_type(map, TRUE, sizeof(vbios_modeline_type2))) {␊ |
268 | ␉␉map->bios = BT_2;␊ |
269 | ␉}␊ |
270 | ␉else if (detect_bios_type(map, FALSE, sizeof(vbios_resolution_type1))) {␊ |
271 | ␉␉map->bios = BT_1;␊ |
272 | ␉}␊ |
273 | ␉else {␊ |
274 | ␉␉printf("Unable to determine bios type.\n");␊ |
275 | ␉␉printf("Please run the program 'dump_bios' as root and\n");␊ |
276 | ␉␉printf("email the file 'vbios.dmp' to stomljen@yahoo.com.\n");␊ |
277 | ␉␊ |
278 | ␉␉printf("Chipset: %s\n", chipset_type_names[map->chipset]);␊ |
279 | ␉␉printf("Mode Table Offset: $C0000 + $%x\n", ((UInt32)map->mode_table) - ((UInt32)map->bios_ptr));␊ |
280 | ␉␉printf("Mode Table Entries: %u\n", map->mode_table_size);␊ |
281 | ␉␉␊ |
282 | ␉␉//THis is now␊ |
283 | ␉␉␊ |
284 | ␉␉return 0;␊ |
285 | ␉}␊ |
286 | ␉␊ |
287 | ␉return map;␊ |
288 | }␊ |
289 | ␊ |
290 | void close_vbios(vbios_map * map) {␊ |
291 | ␉FREE(map);␊ |
292 | }␊ |
293 | ␊ |
294 | void unlock_vbios(vbios_map * map) {␊ |
295 | ␊ |
296 | ␉map->unlocked = TRUE;␊ |
297 | ␉ ␊ |
298 | ␉switch (map->chipset) {␊ |
299 | ␉␉case CT_UNKWN:␊ |
300 | ␉␉␉break;␊ |
301 | ␉␉case CT_830:␊ |
302 | ␉␉case CT_855GM:␊ |
303 | ␉␉␉outl(0xcf8, 0x8000005a);␊ |
304 | ␉␉␉map->b1 = inb(0xcfe);␊ |
305 | ␉␉␉␉␊ |
306 | ␉␉␉outl(0xcf8, 0x8000005a);␊ |
307 | ␉␉␉outb(0xcfe, 0x33);␊ |
308 | ␉␉␉break;␊ |
309 | ␉␉case CT_845G:␊ |
310 | ␉␉case CT_865G:␊ |
311 | ␉␉case CT_915G:␊ |
312 | ␉␉case CT_915GM:␊ |
313 | ␉␉case CT_945G:␊ |
314 | ␉␉case CT_945GM:␊ |
315 | ␉␉case CT_945GME:␊ |
316 | ␉␉case CT_946GZ:␊ |
317 | ␉␉case CT_G965:␊ |
318 | ␉␉case CT_Q965:␊ |
319 | ␉␉case CT_965GM:␊ |
320 | ␉␉case CT_GM45:␊ |
321 | ␉␉case CT_G41:␊ |
322 | ␉␉case CT_G31:␊ |
323 | ␉␉case CT_G45:␊ |
324 | ␉␉case CT_500:␊ |
325 | ␉␉␉outl(0xcf8, 0x80000090);␊ |
326 | ␉␉␉map->b1 = inb(0xcfd);␊ |
327 | ␉␉␉map->b2 = inb(0xcfe);␊ |
328 | ␉␉␉␊ |
329 | ␉␉␉outl(0xcf8, 0x80000090);␊ |
330 | ␉␉␉outb(0xcfd, 0x33);␊ |
331 | ␉␉␉outb(0xcfe, 0x33);␊ |
332 | ␉␉break;␊ |
333 | ␉}␊ |
334 | ␉␊ |
335 | ␉#if DEBUG␊ |
336 | ␉{␊ |
337 | ␉␉UInt32 t = inl(0xcfc);␊ |
338 | ␉␉printf("unlock PAM: (0x%08x)\n", t);␊ |
339 | ␉}␊ |
340 | #endif␊ |
341 | }␊ |
342 | ␊ |
343 | void relock_vbios(vbios_map * map) {␊ |
344 | ␊ |
345 | ␉map->unlocked = FALSE;␊ |
346 | ␉␊ |
347 | ␉switch (map->chipset) {␊ |
348 | ␉␉case CT_UNKWN:␊ |
349 | ␉␉␉break;␊ |
350 | ␉␉case CT_830:␊ |
351 | ␉␉case CT_855GM:␊ |
352 | ␉␉␉outl(0xcf8, 0x8000005a);␊ |
353 | ␉␉␉outb(0xcfe, map->b1);␊ |
354 | ␉␉␉break;␊ |
355 | ␉␉case CT_845G:␊ |
356 | ␉␉case CT_865G:␊ |
357 | ␉␉case CT_915G:␊ |
358 | ␉␉case CT_915GM:␊ |
359 | ␉␉case CT_945G:␊ |
360 | ␉␉case CT_945GM:␊ |
361 | ␉␉case CT_945GME:␊ |
362 | ␉␉case CT_946GZ:␊ |
363 | ␉␉case CT_G965:␊ |
364 | ␉␉case CT_Q965:␊ |
365 | ␉␉case CT_965GM:␊ |
366 | ␉␉case CT_GM45:␊ |
367 | ␉␉case CT_G41:␊ |
368 | ␉␉case CT_G31:␊ |
369 | ␉␉case CT_G45:␊ |
370 | ␉␉case CT_500:␊ |
371 | ␉␉␉outl(0xcf8, 0x8000005a);␊ |
372 | ␉␉␉outb(0xcfd, map->b1);␊ |
373 | ␉␉␉outb(0xcfe, map->b2);␊ |
374 | ␉␉␉break;␊ |
375 | ␉}␊ |
376 | ␉␊ |
377 | ␉#if DEBUG␊ |
378 | ␉{␊ |
379 | UInt32 t = inl(0xcfc);␊ |
380 | ␉␉printf("relock PAM: (0x%08x)\n", t);␊ |
381 | ␉}␊ |
382 | ␉#endif␊ |
383 | }␊ |
384 | ␊ |
385 | ␊ |
386 | void list_modes(vbios_map *map, UInt32 raw) {␊ |
387 | UInt32 i, x, y;␊ |
388 | ␉␊ |
389 | for (i=0; i < map->mode_table_size; i++) {␊ |
390 | switch(map->bios) {␊ |
391 | ␉␉␉case BT_1:␊ |
392 | {␊ |
393 | vbios_resolution_type1 * res = map_type1_resolution(map, map->mode_table[i].resolution);␊ |
394 | ␊ |
395 | x = ((((UInt32) res->x2) & 0xf0) << 4) | res->x1;␊ |
396 | y = ((((UInt32) res->y2) & 0xf0) << 4) | res->y1;␊ |
397 | ␊ |
398 | if (x != 0 && y != 0) {␊ |
399 | printf("Mode %02x : %dx%d, %d bits/pixel\n", map->mode_table[i].mode, x, y, map->mode_table[i].bits_per_pixel);␊ |
400 | }␊ |
401 | ␉␉␉␉␊ |
402 | ␉␉␉␉if (raw)␊ |
403 | ␉␉␉␉{␊ |
404 | printf("Mode %02x (raw) :\n\t%02x %02x\n\t%02x\n\t%02x\n\t%02x\n\t%02x\n\t%02x\n\t%02x\n", map->mode_table[i].mode, res->unknow1[0],res->unknow1[1], res->x1,res->x_total,res->x2,res->y1,res->y_total,res->y2);␊ |
405 | ␉␉␉␉}␊ |
406 | ␉␉␉␉␊ |
407 | }␊ |
408 | ␉␉␉␉break;␊ |
409 | ␉␉␉case BT_2:␊ |
410 | {␊ |
411 | vbios_resolution_type2 * res = map_type2_resolution(map, map->mode_table[i].resolution);␊ |
412 | ␊ |
413 | x = res->modelines[0].x1+1;␊ |
414 | y = res->modelines[0].y1+1;␊ |
415 | ␉␉␉␉␊ |
416 | if (x != 0 && y != 0) {␊ |
417 | printf("Mode %02x : %dx%d, %d bits/pixel\n", map->mode_table[i].mode, x, y, map->mode_table[i].bits_per_pixel);␊ |
418 | }␊ |
419 | }␊ |
420 | ␉␉␉␉break;␊ |
421 | ␉␉␉case BT_3:␊ |
422 | {␊ |
423 | vbios_resolution_type3 * res = map_type3_resolution(map, map->mode_table[i].resolution);␊ |
424 | ␊ |
425 | x = res->modelines[0].x1+1;␊ |
426 | y = res->modelines[0].y1+1;␊ |
427 | ␊ |
428 | if (x != 0 && y != 0) {␊ |
429 | printf("Mode %02x : %dx%d, %d bits/pixel\n", map->mode_table[i].mode, x, y, map->mode_table[i].bits_per_pixel);␊ |
430 | }␊ |
431 | }␊ |
432 | ␉␉␉␉break;␊ |
433 | ␉␉␉case BT_UNKWN:␊ |
434 | ␉␉␉␉break;␊ |
435 | }␊ |
436 | }␊ |
437 | }␊ |
438 | ␊ |
439 | static void gtf_timings(UInt32 x, UInt32 y, UInt32 freq,␊ |
440 | ␉␉␉␉␉␉unsigned long *clock,␊ |
441 | ␉␉␉␉␉␉UInt16 *hsyncstart, UInt16 *hsyncend, UInt16 *hblank,␊ |
442 | ␉␉␉␉␉␉UInt16 *vsyncstart, UInt16 *vsyncend, UInt16 *vblank)␊ |
443 | {␊ |
444 | ␉UInt32 hbl, vbl, vfreq;␊ |
445 | ␊ |
446 | ␉vbl = y + (y+1)/(20000.0/(11*freq) - 1) + 1.5;␊ |
447 | ␉vfreq = vbl * freq;␊ |
448 | ␉hbl = 16 * (int)(x * (30.0 - 300000.0 / vfreq) /␊ |
449 | ␉␉␉␉␉␉ + (70.0 + 300000.0 / vfreq) / 16.0 + 0.5);␊ |
450 | ␊ |
451 | ␉*vsyncstart = y;␊ |
452 | ␉*vsyncend = y + 3;␊ |
453 | ␉*vblank = vbl - 1;␊ |
454 | ␉*hsyncstart = x + hbl / 2 - (x + hbl + 50) / 100 * 8 - 1;␊ |
455 | ␉*hsyncend = x + hbl / 2 - 1;␊ |
456 | ␉*hblank = x + hbl - 1;␊ |
457 | ␉*clock = (x + hbl) * vfreq / 1000;␊ |
458 | }␊ |
459 | ␊ |
460 | void set_mode(vbios_map * map, /*UInt32 mode,*/ UInt32 x, UInt32 y, UInt32 bp, UInt32 htotal, UInt32 vtotal) {␊ |
461 | ␉UInt32 xprev, yprev;␊ |
462 | ␉UInt32 i = 0, j;␉// patch first available mode␊ |
463 | ␊ |
464 | //␉for (i=0; i < map->mode_table_size; i++) {␊ |
465 | //␉␉if (map->mode_table[0].mode == mode) {␊ |
466 | ␉␉␉switch(map->bios) {␊ |
467 | ␉␉␉␉case BT_1:␊ |
468 | ␉␉␉␉␉{␊ |
469 | ␉␉␉␉␉␉vbios_resolution_type1 * res = map_type1_resolution(map, map->mode_table[i].resolution);␊ |
470 | ␉␉␉␉␉␉␊ |
471 | ␉␉␉␉␉␉if (bp) {␊ |
472 | ␉␉␉␉␉␉␉map->mode_table[i].bits_per_pixel = bp;␊ |
473 | ␉␉␉␉␉␉}␊ |
474 | ␉␉␉␉␉␉␊ |
475 | ␉␉␉␉␉␉res->x2 = (htotal?(((htotal-x) >> 8) & 0x0f) : (res->x2 & 0x0f)) | ((x >> 4) & 0xf0);␊ |
476 | ␉␉␉␉␉␉res->x1 = (x & 0xff);␊ |
477 | ␉␉␉␉␉␉␊ |
478 | ␉␉␉␉␉␉res->y2 = (vtotal?(((vtotal-y) >> 8) & 0x0f) : (res->y2 & 0x0f)) | ((y >> 4) & 0xf0);␊ |
479 | ␉␉␉␉␉␉res->y1 = (y & 0xff);␊ |
480 | ␉␉␉␉␉␉if (htotal)␊ |
481 | ␉␉␉␉␉␉␉res->x_total = ((htotal-x) & 0xff);␊ |
482 | ␉␉␉␉␉␉␊ |
483 | ␉␉␉␉␉␉if (vtotal)␊ |
484 | ␉␉␉␉␉␉␉res->y_total = ((vtotal-y) & 0xff);␊ |
485 | ␉␉␉␉␉}␊ |
486 | ␉␉␉␉␉break;␊ |
487 | ␉␉␉␉case BT_2:␊ |
488 | ␉␉␉␉␉{␊ |
489 | ␉␉␉␉␉␉vbios_resolution_type2 * res = map_type2_resolution(map, map->mode_table[i].resolution);␊ |
490 | ␉␉␉␉␉␉␊ |
491 | ␉␉␉␉␉␉res->xchars = x / 8;␊ |
492 | ␉␉␉␉␉␉res->ychars = y / 16 - 1;␊ |
493 | ␉␉␉␉␉␉xprev = res->modelines[0].x1;␊ |
494 | ␉␉␉␉␉␉yprev = res->modelines[0].y1;␊ |
495 | ␉␉␉␉␉␉␊ |
496 | ␉␉␉␉␉␉for(j=0; j < 3; j++) {␊ |
497 | ␉␉␉␉␉␉␉vbios_modeline_type2 * modeline = &res->modelines[j];␊ |
498 | ␉␉␉␉␉␉␉␊ |
499 | ␉␉␉␉␉␉␉if (modeline->x1 == xprev && modeline->y1 == yprev) {␊ |
500 | ␉␉␉␉␉␉␉␉modeline->x1 = modeline->x2 = x-1;␊ |
501 | ␉␉␉␉␉␉␉␉modeline->y1 = modeline->y2 = y-1;␊ |
502 | ␉␉␉␉␊ |
503 | ␉␉␉␉␉␉␉␉gtf_timings(x, y, freqs[j], &modeline->clock,␊ |
504 | ␉␉␉␉␉␉␉␉␉␉␉&modeline->hsyncstart, &modeline->hsyncend,␊ |
505 | ␉␉␉␉␉␉␉␉␉␉␉&modeline->hblank, &modeline->vsyncstart,␊ |
506 | ␉␉␉␉␉␉␉␉␉␉␉&modeline->vsyncend, &modeline->vblank);␊ |
507 | ␉␉␉␉␉␉␉␉␊ |
508 | ␉␉␉␉␉␉␉␉if (htotal)␊ |
509 | ␉␉␉␉␉␉␉␉␉modeline->htotal = htotal;␊ |
510 | ␉␉␉␉␉␉␉␉else␊ |
511 | ␉␉␉␉␉␉␉␉␉modeline->htotal = modeline->hblank;␊ |
512 | ␉␉␉␉␉␉␉␉␊ |
513 | ␉␉␉␉␉␉␉␉if (vtotal)␊ |
514 | ␉␉␉␉␉␉␉␉␉modeline->vtotal = vtotal;␊ |
515 | ␉␉␉␉␉␉␉␉else␊ |
516 | ␉␉␉␉␉␉␉␉␉modeline->vtotal = modeline->vblank;␊ |
517 | ␉␉␉␉␉␉␉}␊ |
518 | ␉␉␉␉␉␉}␊ |
519 | ␉␉␉␉␉}␊ |
520 | ␉␉␉␉␉break;␊ |
521 | ␉␉␉␉case BT_3:␊ |
522 | ␉␉␉␉␉{␊ |
523 | ␉␉␉␉␉␉vbios_resolution_type3 * res = map_type3_resolution(map, map->mode_table[i].resolution);␊ |
524 | ␉␉␉␉␉␉␊ |
525 | ␉␉␉␉␉␉xprev = res->modelines[0].x1;␊ |
526 | ␉␉␉␉␉␉yprev = res->modelines[0].y1;␊ |
527 | ␉␉␉␉␊ |
528 | ␉␉␉␉␉␉for (j=0; j < 3; j++) {␊ |
529 | ␉␉␉␉␉␉␉vbios_modeline_type3 * modeline = &res->modelines[j];␊ |
530 | ␉␉␉␉␉␉␉ ␊ |
531 | ␉␉␉␉␉␉␉if (modeline->x1 == xprev && modeline->y1 == yprev) {␊ |
532 | ␉␉␉␉␉␉␉␉modeline->x1 = modeline->x2 = x-1;␊ |
533 | ␉␉␉␉␉␉␉␉modeline->y1 = modeline->y2 = y-1;␊ |
534 | ␉␉␉␉␉␉␉␉ ␊ |
535 | ␉␉␉␉␉␉␉␉gtf_timings(x, y, freqs[j], &modeline->clock,␊ |
536 | ␉␉␉␉␉␉␉␉␉␉␉&modeline->hsyncstart, &modeline->hsyncend,␊ |
537 | ␉␉␉␉␉␉␉␉␉␉␉&modeline->hblank, &modeline->vsyncstart,␊ |
538 | ␉␉␉␉␉␉␉␉␉␉␉&modeline->vsyncend, &modeline->vblank);␊ |
539 | ␉␉␉␉␉␉␉␉if (htotal)␊ |
540 | ␉␉␉␉␉␉␉␉␉modeline->htotal = htotal;␊ |
541 | ␉␉␉␉␉␉␉␉else␊ |
542 | ␉␉␉␉␉␉␉␉␉modeline->htotal = modeline->hblank;␊ |
543 | ␉␉␉␉␉␉␉␉if (vtotal)␊ |
544 | ␉␉␉␉␉␉␉␉␉modeline->vtotal = vtotal;␊ |
545 | ␉␉␉␉␉␉␉␉else␊ |
546 | ␉␉␉␉␉␉␉␉␉modeline->vtotal = modeline->vblank;␊ |
547 | ␉␉␉␉␉␉␊ |
548 | ␉␉␉␉␉␉␉␉modeline->timing_h = y-1;␊ |
549 | ␉␉␉␉␉␉␉␉modeline->timing_v = x-1;␊ |
550 | ␉␉␉␉␉␉␉}␊ |
551 | ␉␉␉␉␉␉}␊ |
552 | ␉␉␉␉␉}␊ |
553 | ␉␉␉␉␉break;␊ |
554 | ␉␉␉␉case BT_UNKWN:␊ |
555 | ␉␉␉␉␉break;␊ |
556 | ␉␉␉}␊ |
557 | //␉␉}␊ |
558 | //␉}␊ |
559 | } ␊ |
560 | ␊ |
561 | void display_map_info(vbios_map * map) {␊ |
562 | ␉printf("Chipset: %s\n", chipset_type_names[map->chipset]);␊ |
563 | ␉printf("BIOS: %s\n", bios_type_names[map->bios]);␊ |
564 | ␉␊ |
565 | ␉printf("Mode Table Offset: $C0000 + $%x\n", ((UInt32)map->mode_table) - ((UInt32)map->bios_ptr));␊ |
566 | ␉printf("Mode Table Entries: %u\n", map->mode_table_size);␊ |
567 | }␊ |
568 |