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Root/branches/diebuche/i386/libsaio/915resolution.h

Source at commit 113 created 14 years 1 month ago.
By diebuche, working on ati res.
1/* Copied from 915 resolution created by steve tomljenovic
2 * This source code is into the public domain.
3 *
4 * Included to Chameleon RC3 by meklort
5 *
6 * Included to RC4 and edited by deviato to match more intel chipsets
7 *
8 */
9
10/* Copied from 915 resolution created by steve tomljenovic
11 *
12 * This code is based on the techniques used in :
13 *
14 * - 855patch. Many thanks to Christian Zietz (czietz gmx net)
15 * for demonstrating how to shadow the VBIOS into system RAM
16 * and then modify it.
17 *
18 * - 1280patch by Andrew Tipton (andrewtipton null li).
19 *
20 * - 855resolution by Alain Poirier
21 *
22 * This source code is into the public domain.
23 */
24
25#ifndef __915_RESOLUTION_H
26#define __915_RESOLUTION_H
27
28#define NEW(a) ((a *)(malloc(sizeof(a))))
29#define FREE(a) (free(a))
30
31#define VBIOS_START 0xc0000
32#define VBIOS_SIZE 0x10000
33
34#define FALSE 0
35#define TRUE 1
36
37#define MODE_TABLE_OFFSET_845G 617
38
39
40#define ATI_SIGNATURE1 "ATI MOBILITY RADEON"
41#define ATI_SIGNATURE2 "ATI Technologies Inc"
42#define NVIDIA_SIGNATURE "NVIDIA Corp"
43#define INTEL_SIGNATURE "Intel Corp"
44
45
46
47
48typedef enum {
49CT_UNKWN, CT_830, CT_845G, CT_855GM, CT_865G, CT_915G, CT_915GM, CT_945G, CT_945GM, CT_945GME,
50CT_946GZ, CT_G965, CT_Q965, CT_965GM, CT_GM45, CT_G41, CT_G31, CT_G45, CT_500
51} chipset_type;
52
53
54typedef enum {
55BT_UNKWN, BT_1, BT_2, BT_3
56} bios_type;
57
58
59typedef struct {
60UInt8 mode;
61UInt8 bits_per_pixel;
62UInt16 resolution;
63UInt8 unknown;
64} __attribute__((packed)) vbios_mode;
65
66typedef struct {
67UInt8 unknow1[2];
68UInt8 x1;
69UInt8 x_total;
70UInt8 x2;
71UInt8 y1;
72UInt8 y_total;
73UInt8 y2;
74} __attribute__((packed)) vbios_resolution_type1;
75
76typedef struct {
77unsigned long clock;
78
79UInt16 x1;
80UInt16 htotal;
81UInt16 x2;
82UInt16 hblank;
83UInt16 hsyncstart;
84UInt16 hsyncend;
85UInt16 y1;
86 UInt16 vtotal;
87 UInt16 y2;
88UInt16 vblank;
89UInt16 vsyncstart;
90UInt16 vsyncend;
91} __attribute__((packed)) vbios_modeline_type2;
92
93typedef struct {
94UInt8 xchars;
95UInt8 ychars;
96UInt8 unknown[4];
97
98vbios_modeline_type2 modelines[];
99} __attribute__((packed)) vbios_resolution_type2;
100
101typedef struct {
102unsigned long clock;
103
104UInt16 x1;
105UInt16 htotal;
106UInt16 x2;
107UInt16 hblank;
108UInt16 hsyncstart;
109UInt16 hsyncend;
110
111UInt16 y1;
112UInt16 vtotal;
113UInt16 y2;
114UInt16 vblank;
115UInt16 vsyncstart;
116UInt16 vsyncend;
117
118UInt16 timing_h;
119UInt16 timing_v;
120
121UInt8 unknown[6];
122} __attribute__((packed)) vbios_modeline_type3;
123
124typedef struct {
125unsigned char unknown[6];
126
127 vbios_modeline_type3 modelines[];
128} __attribute__((packed)) vbios_resolution_type3;
129
130typedef struct {
131UInt32 chipset_id;
132chipset_type chipset;
133bios_type bios;
134
135UInt32 bios_fd;
136char* bios_ptr;
137
138vbios_mode * mode_table;
139UInt32 mode_table_size;
140UInt8 b1, b2;
141
142UInt8 unlocked;
143} vbios_map;
144
145
146
147void display_map_info(vbios_map*);
148vbios_map * open_vbios(chipset_type);
149void close_vbios (vbios_map*);
150void unlock_vbios(vbios_map*);
151void relock_vbios(vbios_map*);
152void set_mode(vbios_map*, UInt32, UInt32, UInt32, UInt32, UInt32);
153void list_modes(vbios_map *map, UInt32 raw);
154
155#endif
156

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Revision: 113