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1/*␊
2 * Copyright (c) 1998-2006 Apple Computer, Inc. All rights reserved.␊
3 *␊
4 * @APPLE_LICENSE_HEADER_START@␊
5 * ␊
6 * The contents of this file constitute Original Code as defined in and␊
7 * are subject to the Apple Public Source License Version 1.1 (the␊
8 * "License"). You may not use this file except in compliance with the␊
9 * License. Please obtain a copy of the License at␊
10 * http://www.apple.com/publicsource and read it before using this file.␊
11 * ␊
12 * This Original Code and all software distributed under the License are␊
13 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER␊
14 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,␊
15 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,␊
16 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the␊
17 * License for the specific language governing rights and limitations␊
18 * under the License.␊
19 * ␊
20 * @APPLE_LICENSE_HEADER_END@␊
21 */␊
22␊
23/* This file is a stripped-down version of the one found in the AppleSMBIOS project.␊
24 * Changes:␊
25 * - Don't use pragma pack but instead use GCC's packed attribute␊
26 */␊
27␊
28#ifndef _LIBSAIO_SMBIOS_H␊
29#define _LIBSAIO_SMBIOS_H␊
30␊
31/*␊
32 * Based on System Management BIOS Reference Specification v2.5, //Slice - 2.7.0␊
33 */␊
34␊
35typedef uint8_t␉␉SMBString;␊
36typedef uint8_t␉␉SMBByte;␊
37typedef uint16_t␉SMBWord;␊
38typedef uint32_t␉SMBDWord;␊
39typedef uint64_t␉SMBQWord;␊
40␊
41// Apple known types␊
42 enum {␊
43 kSMBTypeBIOSInformation = 0,␊
44 kSMBTypeSystemInformation = 1,␊
45 kSMBTypeBaseBoard␉␉␉␉␉ = 2,␊
46 kSMBTypeSystemEnclosure = 3,␊
47 kSMBTypeProcessorInformation = 4,␊
48 kSMBTypeMemoryModule = 6,␊
49 kSMBTypeCacheInformation = 7,␊
50 kSMBTypeSystemSlot = 9,␊
51 kSMBTypePhysicalMemoryArray = 16,␊
52 kSMBTypeMemoryDevice = 17,␊
53 kSMBType32BitMemoryErrorInfo = 18,␊
54 kSMBType64BitMemoryErrorInfo = 33,␊
55 ␊
56 // Apple Specific Structures ␊
57 kSMBTypeFirmwareVolume = 128,␊
58 kSMBTypeMemorySPD = 130,␊
59 kSMBTypeOemProcessorType = 131,␊
60 kSMBTypeOemProcessorBusSpeed = 132␊
61 };␊
62 ␊
63␊
64struct DMIHeader {␊
65␉SMBByte␉␉␉type;␊
66␉SMBByte␉␉␉length;␊
67␉SMBWord␉␉␉handle;␊
68} __attribute__((packed));␊
69typedef struct DMIHeader DMIHeader;␊
70␊
71#define SMB_STRUCT_HEADER struct DMIHeader␉dmiHeader;␊
72␊
73struct DMIEntryPoint {␊
74␉SMBByte␉␉␉anchor[5];␊
75␉SMBByte␉␉␉checksum;␊
76␉SMBWord␉␉␉tableLength;␊
77␉SMBDWord␉␉tableAddress;␊
78␉SMBWord␉␉␉structureCount;␊
79␉SMBByte␉␉␉bcdRevision;␊
80} __attribute__((packed));␊
81typedef struct DMIEntryPoint DMIEntryPoint;␊
82␊
83struct SMBEntryPoint {␊
84␉SMBByte␉␉␉anchor[4];␊
85␉SMBByte␉␉␉checksum;␊
86␉SMBByte␉␉␉entryPointLength;␊
87␉SMBByte␉␉␉majorVersion;␊
88␉SMBByte␉␉␉minorVersion;␊
89␉SMBWord␉␉␉maxStructureSize;␊
90␉SMBByte␉␉␉entryPointRevision;␊
91␉SMBByte␉␉␉formattedArea[5];␊
92␉struct DMIEntryPoint␉dmi;␊
93} __attribute__((packed));␊
94typedef struct SMBEntryPoint SMBEntryPoint;␊
95␊
96␊
97//␊
98// BIOS Information (Type 0) //min len 18+num_of_extChars. Max=18h=24␊
99//␊
100struct SMBBIOSInformation {␊
101 struct DMIHeader␉dmiHeader; // Type 0␊
102 SMBString vendor; // BIOS vendor name␊
103 SMBString version; // BIOS version␊
104 SMBWord startSegment; // BIOS segment start␊
105 SMBString releaseDate; // BIOS release date␊
106 SMBByte romSize; // (n); 64K * (n+1) bytes␊
107 SMBQWord characteristics; // supported BIOS functions␊
108␉SMBByte extChars[2];␉␉␉//BIOS Characteristics Extension Bytes␊
109};␊
110␊
111//BIOS Characteristics Extension Bits␊
112/*␊
113 Characteristics Ext1␉0x87␊
114 Bit0␉ACPI supported - 1 (Yes)␊
115 Bit1␉USB Legacy is supported - 1 (Yes)␊
116 Bit2␉AGP is supported - 1 (Yes)␊
117 Bit3␉I2O boot is supported - 0 (No)␊
118 Bit4␉LS-120 boot is supported - 0 (No)␊
119 Bit5␉ATAPI ZIP Drive boot is supported - 0 (No)␊
120 Bit6␉1394 boot is supported - 0 (No)␊
121 Bit7␉Smart Battery supported - 1 (Yes)␊
122 Characteristics Ext2␉0x07␊
123 Bit0␉BIOS Boot Specification supported - 1 (Yes)␊
124 Bit1␉Function key-initiated Network Service boot supported - 1 (Yes)␊
125 Bit2␉Enable Targeted Content Distribution - 1 (Yes)␊
126 ␊
127 Bit 0 BIOS Boot Specification is supported.␊
128 Bit 1␉ Function key-initiated Network Service boot is supported. When function key-uninitiated Network Service Boot is not supported, a network adapter option ROM may choose to offer this functionality on its own, thus offering this capability to legacy systems. When the function is supported, the network adapter option ROM shall not offer this capability.␊
129 Bit 2 Enable Targeted Content Distribution. The manufacturer has ensured that the SMBIOS data is useful in identifying the computer for targeted delivery of model-specific software and firmware content through third-party content distribution services.␊
130 Bit 3 UEFI Specification is supported.␊
131 Bit 4 The SMBIOS table describes a virtual machine. (If this bit is not set, no inference can be made about the virtuality of the system.)␊
132␊
133 Bits 5:7 Reserved for future assignment by this specification␊
134 */␊
135␊
136//␊
137// System Information (Type 1)␊
138//␊
139␊
140struct DMISystemInformation {␊
141 // 2.0+ spec (8 bytes)␊
142 struct DMIHeader␉dmiHeader; // Type 1␊
143 SMBString manufacturer;␊
144 SMBString productName;␊
145 SMBString version;␊
146 SMBString serialNumber;␊
147 // 2.1+ spec (25 bytes)␊
148 SMBByte uuid[16]; // can be all 0 or all 1's␊
149 SMBByte wakeupReason; // reason for system wakeup␊
150␉// 2.4+ spec␊
151␉SMBString SKUNumber;␉␉␉// purchase order number␊
152};␊
153typedef struct DMISystemInformation DMISystemInformation;␊
154//␊
155// Base Board (Type 2)␊
156//␊
157␊
158struct DMIBaseBoard {␊
159 struct DMIHeader␉dmiHeader; // Type 2␊
160 SMBString␉manufacturer;␊
161 SMBString␉product;␊
162 SMBString␉version;␊
163 SMBString␉serialNumber;␊
164 SMBString␉assetTagNumber;␊
165 SMBByte␉␉featureFlags;␊
166 SMBString␉locationInChassis;␊
167 SMBWord␉␉chassisHandle;␊
168 SMBByte␉␉boardType;␊
169 SMBByte␉␉numberOfContainedHandles;␊
170␉// 0 - 255 contained handles go here but we do not include␊
171␉// them in our structure. Be careful to use numberOfContainedHandles␊
172␉// times sizeof(SMBWord) when computing the actual record size,␊
173␉// if you need it.␊
174};␊
175typedef struct DMIBaseBoard DMIBaseBoard;␊
176// Values for boardType in Type 2 records␊
177enum {␊
178 kSMBBaseBoardUnknown␉␉␉␉= 0x01,␊
179 kSMBBaseBoardOther␉␉␉␉␉= 0x02,␊
180 kSMBBaseBoardServerBlade␉␉␉= 0x03,␊
181 kSMBBaseBoardConnectivitySwitch␉␉= 0x04,␊
182 kSMBBaseBoardSystemMgmtModule␉␉= 0x05,␊
183 kSMBBaseBoardProcessorModule␉␉= 0x06,␊
184 kSMBBaseBoardIOModule␉␉␉␉= 0x07,␊
185 kSMBBaseBoardMemoryModule␉␉␉= 0x08,␊
186 kSMBBaseBoardDaughter␉␉␉␉= 0x09,␊
187 kSMBBaseBoardMotherboard␉␉␉= 0x0A,␊
188 kSMBBaseBoardProcessorMemoryModule␉= 0x0B,␊
189 kSMBBaseBoardProcessorIOModule␉␉= 0x0C,␊
190 kSMBBaseBoardInterconnect␉␉␉= 0x0D,␊
191};␊
192␊
193␊
194//␊
195// System Enclosure (Type 3)␊
196//␊
197␊
198struct DMISystemEnclosure {␊
199 struct DMIHeader␉dmiHeader; // Type 3 len=13␊
200 SMBString manufacturer;␊
201 SMBByte type;␊
202 SMBString version;␊
203 SMBString serialNumber;␊
204 SMBString assetTagNumber;␊
205 SMBByte bootupState;␊
206 SMBByte powerSupplyState;␊
207 SMBByte thermalState;␊
208 SMBByte securityStatus;␊
209 SMBDWord oemDefined;␊
210};␊
211typedef struct DMISystemEnclosure DMISystemEnclosure;␊
212//␊
213// Processor Information (Type 4)␊
214//␊
215␊
216struct DMIProcessorInformation {␊
217 // 2.0+ spec (26 bytes)␊
218 struct DMIHeader␉dmiHeader; // Type 4␊
219 SMBString socketDesignation;␊
220 SMBByte processorType; // CPU = 3␊
221 SMBByte processorFamily; // processor family enum␊
222 SMBString manufacturer;␊
223 SMBQWord processorID; // based on CPUID␊
224 SMBString processorVersion;␊
225 SMBByte voltage; // bit7 cleared indicate legacy mode␊
226 SMBWord externalClock; // external clock in MHz␊
227 SMBWord maximumClock; // max internal clock in MHz␊
228 SMBWord currentClock; // current internal clock in MHz␊
229 SMBByte status;␊
230 SMBByte processorUpgrade; // processor upgrade enum␊
231 // 2.1+ spec (32 bytes)␊
232 SMBWord L1CacheHandle;␊
233 SMBWord L2CacheHandle;␊
234 SMBWord L3CacheHandle;␊
235 // 2.3+ spec (35 bytes)␊
236 SMBString serialNumber;␊
237 SMBString assetTag;␊
238 SMBString partNumber;␊
239␉// 2.5+ spec (38 bytes)␊
240␉SMBByte␉␉coreCount;␊
241␉SMBByte␉␉coreEnabled;␊
242␉SMBByte␉␉Threads;␊
243} __attribute__((packed));␊
244␊
245#define kSMBProcessorInformationMinSize 26␊
246␊
247␊
248␊
249␊
250struct DMIMemoryControllerInfo {/* 3.3.6 Memory Controller Information (Type 5) */␊
251␉struct DMIHeader␉dmiHeader;␊
252␉SMBByte␉␉␉errorDetectingMethod;␊
253␉SMBByte␉␉␉errorCorrectingCapability;␊
254␉SMBByte␉␉␉supportedInterleave;␊
255␉SMBByte␉␉␉currentInterleave;␊
256␉SMBByte␉␉␉maxMemoryModuleSize;␊
257␉SMBWord␉␉␉supportedSpeeds;␊
258␉SMBWord␉␉␉supportedMemoryTypes;␊
259␉SMBByte␉␉␉memoryModuleVoltage;␊
260␉SMBByte␉␉␉numberOfMemorySlots;␊
261} __attribute__((packed));␊
262typedef struct DMIMemoryControllerInfo DMIMemoryControllerInfo;␊
263␊
264struct DMIMemoryModuleInfo {␉/* 3.3.7 Memory Module Information (Type 6) */␊
265␉struct DMIHeader␉dmiHeader;␊
266␉SMBByte␉␉␉socketDesignation;␊
267␉SMBByte␉␉␉bankConnections;␊
268␉SMBByte␉␉␉currentSpeed;␊
269␉SMBWord␉␉␉currentMemoryType;␊
270␉SMBByte␉␉␉installedSize;␊
271␉SMBByte␉␉␉enabledSize;␊
272␉SMBByte␉␉␉errorStatus;␊
273} __attribute__((packed));␊
274typedef struct DMIMemoryModuleInfo DMIMemoryModuleInfo;␊
275␊
276␊
277#define kSMBMemoryModuleSizeNotDeterminable 0x7D␊
278#define kSMBMemoryModuleSizeNotEnabled 0x7E␊
279#define kSMBMemoryModuleSizeNotInstalled 0x7F␊
280␊
281//␊
282// Cache Information (Type 7)␊
283//␊
284␊
285struct DMICacheInformation {␊
286 SMB_STRUCT_HEADER // Type 7␊
287 SMBString socketDesignation;␊
288 SMBWord cacheConfiguration;␊
289 SMBWord maximumCacheSize;␊
290 SMBWord installedSize;␊
291 SMBWord supportedSRAMType;␊
292 SMBWord currentSRAMType;␊
293 SMBByte cacheSpeed;␊
294 SMBByte errorCorrectionType;␊
295 SMBByte systemCacheType;␊
296 SMBByte associativity;␊
297} __attribute__((packed));␊
298␊
299struct DMISystemSlot {␊
300 // 2.0+ spec (12 bytes)␊
301 SMB_STRUCT_HEADER // Type 9␊
302 SMBString slotDesignation;␊
303 SMBByte slotType;␊
304 SMBByte slotDataBusWidth;␊
305 SMBByte currentUsage;␊
306 SMBByte slotLength;␊
307 SMBWord slotID;␊
308 SMBByte slotCharacteristics1;␊
309 // 2.1+ spec (13 bytes)␊
310 SMBByte slotCharacteristics2;␊
311} __attribute__((packed));␊
312␊
313␊
314␊
315struct DMIPhysicalMemoryArray {␉/* 3.3.17 Physical Memory Array (Type 16) */␊
316␉struct DMIHeader␉dmiHeader;␊
317␉SMBByte␉␉␉location;␊
318␉SMBByte␉␉␉use;␊
319␉SMBByte␉␉␉memoryCorrectionError;␊
320␉SMBDWord␉␉maximumCapacity;␊
321␉SMBWord␉␉␉memoryErrorInformationHandle;␊
322␉SMBWord␉␉␉numberOfMemoryDevices;␊
323} __attribute__((packed));␊
324typedef struct DMIPhysicalMemoryArray DMIPhysicalMemoryArray;␊
325␊
326struct DMIMemoryDevice {␉/* 3.3.18 Memory Device (Type 17) */␊
327␉struct DMIHeader␉dmiHeader;␊
328␉SMBWord␉␉␉physicalMemoryArrayHandle;␊
329␉SMBWord␉␉␉memoryErrorInformationHandle;␊
330␉SMBWord␉␉␉totalWidth;␊
331␉SMBWord␉␉␉dataWidth;␊
332␉SMBWord␉␉␉size;␊
333␉SMBByte␉␉␉formFactor;␊
334␉SMBByte␉␉␉deviceSet;␊
335␉SMBByte␉␉␉deviceLocator;␊
336␉SMBByte␉␉␉bankLocator;␊
337␉SMBByte␉␉␉memoryType;␊
338␉SMBWord␉␉␉typeDetail;␊
339 // 2.3+ spec (27 bytes)␊
340 SMBWord memorySpeed; // speed of device in MHz (0 for unknown)␊
341 SMBString manufacturer;␊
342 SMBString serialNumber;␊
343 SMBString assetTag;␊
344 SMBString partNumber;␊
345} __attribute__((packed));␊
346typedef struct DMIMemoryDevice DMIMemoryDevice;␊
347␊
348//Apple specific fields␊
349//␊
350// Firmware Volume Description (Apple Specific - Type 128)␊
351//␊
352␊
353enum {␊
354 FW_REGION_RESERVED = 0,␊
355 FW_REGION_RECOVERY = 1,␊
356 FW_REGION_MAIN = 2,␊
357 FW_REGION_NVRAM = 3,␊
358 FW_REGION_CONFIG = 4,␊
359 FW_REGION_DIAGVAULT = 5,␊
360 NUM_FLASHMAP_ENTRIES = 8␊
361};␊
362␊
363␊
364struct SMBStructHeader {␊
365 SMBByte type;␊
366 SMBByte length;␊
367 SMBWord handle;␊
368};␊
369␊
370typedef struct SMBStructHeader SMBStructHeader;␊
371␊
372struct FW_REGION_INFO␊
373{␊
374 SMBDWord StartAddress;␊
375 SMBDWord EndAddress;␊
376};␊
377␊
378␊
379struct DMIFirmwareVolume {␊
380 struct DMIHeader␉dmiHeader; // Type 128␊
381 SMBByte RegionCount;␊
382 SMBByte Reserved[3];␊
383 SMBDWord FirmwareFeatures;␊
384 SMBDWord FirmwareFeaturesMask;␊
385 SMBByte RegionType[ NUM_FLASHMAP_ENTRIES ];␊
386 struct FW_REGION_INFO FlashMap[ NUM_FLASHMAP_ENTRIES ];␊
387} __attribute__((packed));␊
388␊
389//␊
390// Memory SPD Data (Apple Specific - Type 130)␊
391//␊
392␊
393struct DMIMemorySPD {␊
394␉struct DMIHeader␉dmiHeader; // Type 130␊
395␉SMBWord Type17Handle;␊
396␉SMBWord Offset;␊
397␉SMBWord Size;␊
398␉SMBWord Data[];␊
399} __attribute__((packed));␊
400␊
401//␊
402// OEM Processor Type (Apple Specific - Type 131)␊
403//␊
404␊
405struct DMIOemProcessorType {␊
406␉SMB_STRUCT_HEADER␊
407␉SMBWord ProcessorType;␊
408} __attribute__((packed));␊
409␊
410//␊
411// OEM Processor Bus Speed (Apple Specific - Type 132)␊
412//␊
413struct DMIOemProcessorBusSpeed {␊
414␉SMB_STRUCT_HEADER␊
415␉SMBWord ProcessorBusSpeed; // MT/s unit␊
416} __attribute__((packed));␊
417␊
418␊
419#if UNUSED␊
420static const char *␊
421SMBMemoryDeviceTypes[] =␊
422{␊
423 "RAM", /* 00h Undefined */␊
424 "RAM", /* 01h Other */␊
425 "RAM", /* 02h Unknown */␊
426 "DRAM", /* 03h DRAM */␊
427 "EDRAM", /* 04h EDRAM */␊
428 "VRAM", /* 05h VRAM */␊
429 "SRAM", /* 06h SRAM */␊
430 "RAM", /* 07h RAM */␊
431 "ROM", /* 08h ROM */␊
432 "FLASH", /* 09h FLASH */␊
433 "EEPROM", /* 0Ah EEPROM */␊
434 "FEPROM", /* 0Bh FEPROM */␊
435 "EPROM", /* 0Ch EPROM */␊
436 "CDRAM", /* 0Dh CDRAM */␊
437 "3DRAM", /* 0Eh 3DRAM */␊
438 "SDRAM", /* 0Fh SDRAM */␊
439 "SGRAM", /* 10h SGRAM */␊
440 "RDRAM", /* 11h RDRAM */␊
441 "DDR SDRAM", /* 12h DDR */␊
442 "DDR2 SDRAM", /* 13h DDR2 */␊
443 "DDR2 FB-DIMM", /* 14h DDR2 FB-DIMM */␊
444 "RAM",␉␉␉/* 15h unused */␊
445 "RAM",␉␉␉/* 16h unused */␊
446 "RAM",␉␉␉/* 17h unused */␊
447 "DDR3",␉␉␉/* 18h DDR3, chosen in [5776134] */␊
448};␊
449#endif␊
450␊
451#endif /* !_LIBSAIO_SMBIOS_H */␊
452

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