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Root/branches/ErmaC/i386/libsaio/acpi_patcher.c

1/*
2 * Copyright 2008 mackerintel
3 */
4
5#include "libsaio.h"
6#include "boot.h"
7#include "bootstruct.h"
8#include "acpi.h"
9#include "efi_tables.h"
10#include "fake_efi.h"
11#include "acpi_patcher.h"
12#include "platform.h"
13#include "cpu.h"
14#include "aml_generator.h"
15
16#ifndef DEBUG_ACPI
17#define DEBUG_ACPI 0
18#endif
19
20#if DEBUG_ACPI==2
21#define DBG(x...) {printf(x); sleep(1);}
22#elif DEBUG_ACPI==1
23#define DBG(x...) printf(x)
24#else
25#define DBG(x...)
26#endif
27
28// Slice: New signature compare function
29boolean_t tableSign(char *table, const char *sgn)
30{
31int i;
32for (i=0; i<4; i++) {
33if ((table[i] &~0x20) != (sgn[i] &~0x20)) {
34return false;
35}
36}
37return true;
38}
39
40/* Gets the ACPI 1.0 RSDP address */
41static struct acpi_2_rsdp* getAddressOfAcpiTable()
42{
43 /* TODO: Before searching the BIOS space we are supposed to search the first 1K of the EBDA */
44
45 void *acpi_addr = (void*)ACPI_RANGE_START;
46 for(; acpi_addr <= (void*)ACPI_RANGE_END; acpi_addr += 16)
47 {
48 if(*(uint64_t *)acpi_addr == ACPI_SIGNATURE_UINT64_LE)
49 {
50 uint8_t csum = checksum8(acpi_addr, 20);
51 if(csum == 0)
52 {
53 // Only return the table if it is a true version 1.0 table (Revision 0)
54 if(((struct acpi_2_rsdp*)acpi_addr)->Revision == 0)
55 return acpi_addr;
56 }
57 }
58 }
59 return NULL;
60}
61
62/* Gets the ACPI 2.0 RSDP address */
63static struct acpi_2_rsdp* getAddressOfAcpi20Table()
64{
65 /* TODO: Before searching the BIOS space we are supposed to search the first 1K of the EBDA */
66
67 void *acpi_addr = (void*)ACPI_RANGE_START;
68 for(; acpi_addr <= (void*)ACPI_RANGE_END; acpi_addr += 16)
69 {
70 if(*(uint64_t *)acpi_addr == ACPI_SIGNATURE_UINT64_LE)
71 {
72 uint8_t csum = checksum8(acpi_addr, 20);
73
74 /* Only assume this is a 2.0 or better table if the revision is greater than 0
75 * NOTE: ACPI 3.0 spec only seems to say that 1.0 tables have revision 1
76 * and that the current revision is 2.. I am going to assume that rev > 0 is 2.0.
77 */
78
79 if(csum == 0 && (((struct acpi_2_rsdp*)acpi_addr)->Revision > 0))
80 {
81 uint8_t csum2 = checksum8(acpi_addr, sizeof(struct acpi_2_rsdp));
82 if(csum2 == 0)
83 return acpi_addr;
84 }
85 }
86 }
87 return NULL;
88}
89/* The folowing ACPI Table search algo. should be reused anywhere needed:*/
90int search_and_get_acpi_fd(const char * filename, const char ** outDirspec)
91{
92int fd = 0;
93char dirSpec[512] = "";
94
95// Try finding 'filename' in the usual places
96// Start searching any potential location for ACPI Table
97sprintf(dirSpec, "%s", filename);
98fd = open(dirSpec, 0);
99if (fd < 0)
100{
101sprintf(dirSpec, "/Extra/%s", filename);
102fd = open(dirSpec, 0);
103if (fd < 0)
104{
105sprintf(dirSpec, "bt(0,0)/Extra/%s", filename);
106fd = open(dirSpec, 0);
107}
108}
109
110if (fd < 0)
111{
112// NOT FOUND:
113verbose("ACPI table not found: %s\n", filename);
114*dirSpec = '\0';
115}
116
117if (outDirspec) *outDirspec = dirSpec;
118return fd;
119}
120
121
122void *loadACPITable (const char * filename)
123{
124void *tableAddr;
125const char * dirspec=NULL;
126
127int fd = search_and_get_acpi_fd(filename, &dirspec);
128
129if (fd>=0)
130{
131tableAddr=(void*)AllocateKernelMemory(file_size (fd));
132if (tableAddr)
133{
134if (read (fd, tableAddr, file_size (fd))!=file_size (fd))
135{
136printf("Couldn't read table %s\n",dirspec);
137free (tableAddr);
138close (fd);
139return NULL;
140}
141
142DBG("Table %s read and stored at: %x\n", dirspec, tableAddr);
143close (fd);
144return tableAddr;
145}
146close (fd);
147printf("Couldn't allocate memory for table \n", dirspec);
148}
149//printf("Couldn't find table %s\n", filename);
150return NULL;
151}
152
153uint8_tacpi_cpu_count = 0;
154char* acpi_cpu_name[32];
155uint32_t acpi_cpu_p_blk = 0;
156
157void get_acpi_cpu_names(unsigned char* dsdt, uint32_t length)
158{
159uint32_t i;
160
161for (i=0; i<length-7; i++)
162{
163if (dsdt[i] == 0x5B && dsdt[i+1] == 0x83) // ProcessorOP
164{
165uint32_t offset = i + 3 + (dsdt[i+2] >> 6);
166
167bool add_name = true;
168
169uint8_t j;
170
171for (j=0; j<4; j++)
172{
173char c = dsdt[offset+j];
174
175if (!aml_isvalidchar(c))
176{
177add_name = false;
178verbose("Invalid character found in ProcessorOP 0x%x!\n", c);
179break;
180}
181}
182
183if (add_name)
184{
185acpi_cpu_name[acpi_cpu_count] = malloc(4);
186memcpy(acpi_cpu_name[acpi_cpu_count], dsdt+offset, 4);
187i = offset + 5;
188
189 if (acpi_cpu_count == 0)
190 acpi_cpu_p_blk = dsdt[i] | (dsdt[i+1] << 8);
191
192verbose("Found ACPI CPU: %c%c%c%c\n", acpi_cpu_name[acpi_cpu_count][0], acpi_cpu_name[acpi_cpu_count][1], acpi_cpu_name[acpi_cpu_count][2], acpi_cpu_name[acpi_cpu_count][3]);
193
194if (++acpi_cpu_count == 32) return;
195}
196}
197}
198}
199
200struct acpi_2_ssdt *generate_cst_ssdt(struct acpi_2_fadt* fadt)
201{
202char ssdt_header[] =
203{
2040x53, 0x53, 0x44, 0x54, 0xE7, 0x00, 0x00, 0x00, /* SSDT.... */
2050x01, 0x17, 0x50, 0x6D, 0x52, 0x65, 0x66, 0x41, /* ..PmRefA */
2060x43, 0x70, 0x75, 0x43, 0x73, 0x74, 0x00, 0x00, /* CpuCst.. */
2070x00, 0x10, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* ....INTL */
2080x31, 0x03, 0x10, 0x20 /* 1.._*/
209};
210
211char resource_template_register_fixedhw[] =
212{
2130x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x7F,
2140x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2150x00, 0x00, 0x01, 0x79, 0x00
216};
217
218 char resource_template_register_systemio[] =
219{
2200x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x01,
221 0x08, 0x00, 0x00, 0x15, 0x04, 0x00, 0x00, 0x00,
222 0x00, 0x00, 0x00, 0x79, 0x00,
223 };
224
225if (Platform.CPU.Vendor != 0x756E6547) {
226verbose ("Not an Intel platform: C-States will not be generated !!!\n");
227return NULL;
228}
229
230if (fadt == NULL) {
231verbose ("FACP not exists: C-States will not be generated !!!\n");
232return NULL;
233}
234
235struct acpi_2_dsdt* dsdt = (void*)fadt->DSDT;
236
237if (dsdt == NULL) {
238verbose ("DSDT not found: C-States will not be generated !!!\n");
239return NULL;
240}
241
242if (acpi_cpu_count == 0)
243get_acpi_cpu_names((void*)dsdt, dsdt->Length);
244
245if (acpi_cpu_count > 0)
246{
247bool c2_enabled = false;
248bool c3_enabled = false;
249bool c4_enabled = false;
250bool cst_using_sustemio = false;
251
252getBoolForKey(kEnableC2State, &c2_enabled, &bootInfo->chameleonConfig);
253getBoolForKey(kEnableC3State, &c3_enabled, &bootInfo->chameleonConfig);
254getBoolForKey(kEnableC4State, &c4_enabled, &bootInfo->chameleonConfig);
255getBoolForKey(kCSTUsingSystemIO, &cst_using_sustemio, &bootInfo->chameleonConfig);
256
257c2_enabled = c2_enabled | (fadt->C2_Latency < 100);
258c3_enabled = c3_enabled | (fadt->C3_Latency < 1000);
259
260unsigned char cstates_count = 1 + (c2_enabled ? 1 : 0) + (c3_enabled ? 1 : 0);
261
262struct aml_chunk* root = aml_create_node(NULL);
263aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
264struct aml_chunk* scop = aml_add_scope(root, "\\_PR_");
265struct aml_chunk* name = aml_add_name(scop, "CST_");
266struct aml_chunk* pack = aml_add_package(name);
267aml_add_byte(pack, cstates_count);
268
269struct aml_chunk* tmpl = aml_add_package(pack);
270 if (cst_using_sustemio)
271 {
272 // C1
273 resource_template_register_fixedhw[8] = 0x00;
274 resource_template_register_fixedhw[9] = 0x00;
275 resource_template_register_fixedhw[18] = 0x00;
276 aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
277 aml_add_byte(tmpl, 0x01); // C1
278 aml_add_word(tmpl, 0x0001); // Latency
279 aml_add_dword(tmpl, 0x000003e8); // Power
280
281 uint8_t p_blk_lo, p_blk_hi;
282
283 if (c2_enabled) // C2
284 {
285 p_blk_lo = acpi_cpu_p_blk + 4;
286 p_blk_hi = (acpi_cpu_p_blk + 4) >> 8;
287
288 tmpl = aml_add_package(pack);
289 resource_template_register_systemio[11] = p_blk_lo; // C2
290 resource_template_register_systemio[12] = p_blk_hi; // C2
291 aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
292 aml_add_byte(tmpl, 0x02); // C2
293 aml_add_word(tmpl, 0x0040); // Latency
294 aml_add_dword(tmpl, 0x000001f4); // Power
295 }
296
297 if (c4_enabled) // C4
298 {
299 p_blk_lo = acpi_cpu_p_blk + 5;
300 p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
301
302 tmpl = aml_add_package(pack);
303 resource_template_register_systemio[11] = p_blk_lo; // C4
304 resource_template_register_systemio[12] = p_blk_hi; // C4
305 aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
306 aml_add_byte(tmpl, 0x04); // C4
307 aml_add_word(tmpl, 0x0080); // Latency
308 aml_add_dword(tmpl, 0x000000C8); // Power
309 }
310 else if (c3_enabled) // C3
311 {
312 p_blk_lo = acpi_cpu_p_blk + 5;
313 p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
314
315 tmpl = aml_add_package(pack);
316 resource_template_register_systemio[11] = p_blk_lo; // C3
317 resource_template_register_systemio[12] = p_blk_hi; // C3
318 aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
319 aml_add_byte(tmpl, 0x03); // C3
320 aml_add_word(tmpl, 0x0060); // Latency
321 aml_add_dword(tmpl, 0x0000015e); // Power
322 }
323
324 }
325 else
326 {
327 // C1
328 resource_template_register_fixedhw[11] = 0x00; // C1
329 aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
330 aml_add_byte(tmpl, 0x01); // C1
331 aml_add_word(tmpl, 0x0001); // Latency
332 aml_add_dword(tmpl, 0x000003e8); // Power
333
334 resource_template_register_fixedhw[18] = 0x03;
335
336 if (c2_enabled) // C2
337 {
338 tmpl = aml_add_package(pack);
339 resource_template_register_fixedhw[11] = 0x10; // C2
340 aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
341 aml_add_byte(tmpl, 0x02); // C2
342 aml_add_word(tmpl, 0x0040); // Latency
343 aml_add_dword(tmpl, 0x000001f4); // Power
344 }
345
346 if (c4_enabled) // C4
347 {
348 tmpl = aml_add_package(pack);
349 resource_template_register_fixedhw[11] = 0x30; // C4
350 aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
351 aml_add_byte(tmpl, 0x04); // C4
352 aml_add_word(tmpl, 0x0080); // Latency
353 aml_add_dword(tmpl, 0x000000C8); // Power
354 }
355 else if (c3_enabled)
356 {
357 tmpl = aml_add_package(pack);
358 resource_template_register_fixedhw[11] = 0x20; // C3
359 aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
360 aml_add_byte(tmpl, 0x03); // C3
361 aml_add_word(tmpl, 0x0060); // Latency
362 aml_add_dword(tmpl, 0x0000015e); // Power
363 }
364 }
365
366
367// Aliaces
368int i;
369for (i = 0; i < acpi_cpu_count; i++)
370{
371char name[9];
372sprintf(name, "_PR_%c%c%c%c", acpi_cpu_name[i][0], acpi_cpu_name[i][1], acpi_cpu_name[i][2], acpi_cpu_name[i][3]);
373
374scop = aml_add_scope(root, name);
375aml_add_alias(scop, "CST_", "_CST");
376}
377
378aml_calculate_size(root);
379
380struct acpi_2_ssdt *ssdt = (struct acpi_2_ssdt *)AllocateKernelMemory(root->Size);
381
382aml_write_node(root, (void*)ssdt, 0);
383
384ssdt->Length = root->Size;
385ssdt->Checksum = 0;
386ssdt->Checksum = 256 - checksum8(ssdt, ssdt->Length);
387
388aml_destroy_node(root);
389
390//dumpPhysAddr("C-States SSDT content: ", ssdt, ssdt->Length);
391
392verbose ("SSDT with CPU C-States generated successfully\n");
393
394return ssdt;
395}
396else
397{
398verbose ("ACPI CPUs not found: C-States not generated !!!\n");
399}
400
401return NULL;
402}
403
404struct acpi_2_ssdt *generate_pss_ssdt(struct acpi_2_dsdt* dsdt)
405{
406char ssdt_header[] =
407{
4080x53, 0x53, 0x44, 0x54, 0x7E, 0x00, 0x00, 0x00, /* SSDT.... */
4090x01, 0x6A, 0x50, 0x6D, 0x52, 0x65, 0x66, 0x00, /* ..PmRef. */
4100x43, 0x70, 0x75, 0x50, 0x6D, 0x00, 0x00, 0x00, /* CpuPm... */
4110x00, 0x30, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* .0..INTL */
4120x31, 0x03, 0x10, 0x20,/* 1.._*/
413};
414
415if (Platform.CPU.Vendor != 0x756E6547) {
416verbose ("Not an Intel platform: P-States will not be generated !!!\n");
417return NULL;
418}
419
420if (!(Platform.CPU.Features & CPU_FEATURE_MSR)) {
421verbose ("Unsupported CPU: P-States will not be generated !!!\n");
422return NULL;
423}
424
425if (acpi_cpu_count == 0)
426get_acpi_cpu_names((void*)dsdt, dsdt->Length);
427
428if (acpi_cpu_count > 0)
429{
430struct p_state initial, maximum, minimum, p_states[32];
431uint8_t p_states_count = 0;
432
433// Retrieving P-States, ported from code by superhai (c)
434switch (Platform.CPU.Family) {
435case 0x06:
436{
437switch (Platform.CPU.Model)
438{
439case 0x0D:// ???
440case CPU_MODEL_YONAH:// Intel Mobile Core Solo, Duo
441case CPU_MODEL_MEROM:// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
442case CPU_MODEL_PENRYN:// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
443case CPU_MODEL_ATOM:// Intel Atom (45nm)
444{
445bool cpu_dynamic_fsb = false;
446
447if (rdmsr64(MSR_IA32_EXT_CONFIG) & (1 << 27))
448{
449wrmsr64(MSR_IA32_EXT_CONFIG, (rdmsr64(MSR_IA32_EXT_CONFIG) | (1 << 28)));
450delay(1);
451cpu_dynamic_fsb = rdmsr64(MSR_IA32_EXT_CONFIG) & (1 << 28);
452}
453
454bool cpu_noninteger_bus_ratio = (rdmsr64(MSR_IA32_PERF_STATUS) & (1ULL << 46));
455
456initial.Control = rdmsr64(MSR_IA32_PERF_STATUS);
457
458maximum.Control = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 32) & 0x1F3F) | (0x4000 * cpu_noninteger_bus_ratio);
459maximum.CID = ((maximum.FID & 0x1F) << 1) | cpu_noninteger_bus_ratio;
460
461minimum.FID = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 24) & 0x1F) | (0x80 * cpu_dynamic_fsb);
462minimum.VID = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 48) & 0x3F);
463
464if (minimum.FID == 0)
465{
466uint64_t msr;
467uint8_t i;
468// Probe for lowest fid
469for (i = maximum.FID; i >= 0x6; i--)
470{
471msr = rdmsr64(MSR_IA32_PERF_CONTROL);
472wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (i << 8) | minimum.VID);
473intel_waitforsts();
474minimum.FID = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0x1F;
475delay(1);
476}
477
478msr = rdmsr64(MSR_IA32_PERF_CONTROL);
479wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (maximum.FID << 8) | maximum.VID);
480intel_waitforsts();
481}
482
483if (minimum.VID == maximum.VID)
484{
485uint64_t msr;
486uint8_t i;
487// Probe for lowest vid
488for (i = maximum.VID; i > 0xA; i--)
489{
490msr = rdmsr64(MSR_IA32_PERF_CONTROL);
491wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (minimum.FID << 8) | i);
492intel_waitforsts();
493minimum.VID = rdmsr64(MSR_IA32_PERF_STATUS) & 0x3F;
494delay(1);
495}
496
497msr = rdmsr64(MSR_IA32_PERF_CONTROL);
498wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (maximum.FID << 8) | maximum.VID);
499intel_waitforsts();
500}
501
502minimum.CID = ((minimum.FID & 0x1F) << 1) >> cpu_dynamic_fsb;
503
504// Sanity check
505if (maximum.CID < minimum.CID)
506{
507DBG("Insane FID values!");
508p_states_count = 0;
509}
510else
511{
512// Finalize P-States
513// Find how many P-States machine supports
514p_states_count = maximum.CID - minimum.CID + 1;
515
516if (p_states_count > 32)
517p_states_count = 32;
518
519uint8_t vidstep;
520uint8_t i = 0, u, invalid = 0;
521
522vidstep = ((maximum.VID << 2) - (minimum.VID << 2)) / (p_states_count - 1);
523
524for (u = 0; u < p_states_count; u++)
525{
526i = u - invalid;
527
528p_states[i].CID = maximum.CID - u;
529p_states[i].FID = (p_states[i].CID >> 1);
530
531if (p_states[i].FID < 0x6)
532{
533if (cpu_dynamic_fsb)
534p_states[i].FID = (p_states[i].FID << 1) | 0x80;
535}
536else if (cpu_noninteger_bus_ratio)
537{
538p_states[i].FID = p_states[i].FID | (0x40 * (p_states[i].CID & 0x1));
539}
540
541if (i && p_states[i].FID == p_states[i-1].FID)
542invalid++;
543
544p_states[i].VID = ((maximum.VID << 2) - (vidstep * u)) >> 2;
545
546uint32_t multiplier = p_states[i].FID & 0x1f;// = 0x08
547bool half = p_states[i].FID & 0x40;// = 0x01
548bool dfsb = p_states[i].FID & 0x80;// = 0x00
549uint32_t fsb = Platform.CPU.FSBFrequency / 1000000; // = 400
550uint32_t halffsb = (fsb + 1) >> 1;// = 200
551uint32_t frequency = (multiplier * fsb);// = 3200
552
553p_states[i].Frequency = (frequency + (half * halffsb)) >> dfsb;// = 3200 + 200 = 3400
554}
555
556p_states_count -= invalid;
557}
558
559break;
560}
561case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
562case CPU_MODEL_DALES:
563case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
564case CPU_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
565case CPU_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x
566case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
567case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
568case CPU_MODEL_SANDY:// Intel Core i3, i5, i7 LGA1155 (32nm)
569case CPU_MODEL_SANDY_XEON:// Intel Xeon E3
570{
571maximum.Control = rdmsr64(MSR_IA32_PERF_STATUS) & 0xff; // Seems it always contains maximum multiplier value (with turbo, that's we need)...
572minimum.Control = (rdmsr64(MSR_PLATFORM_INFO) >> 40) & 0xff;
573
574verbose("P-States: min 0x%x, max 0x%x\n", minimum.Control, maximum.Control);
575
576// Sanity check
577if (maximum.Control < minimum.Control)
578{
579DBG("Insane control values!");
580p_states_count = 0;
581}
582else
583{
584uint8_t i;
585p_states_count = 0;
586
587for (i = maximum.Control; i >= minimum.Control; i--)
588{
589p_states[p_states_count].Control = i;
590p_states[p_states_count].CID = p_states[p_states_count].Control << 1;
591p_states[p_states_count].Frequency = (Platform.CPU.FSBFrequency / 1000000) * i;
592p_states_count++;
593}
594}
595
596break;
597}
598default:
599verbose ("Unsupported CPU: P-States not generated !!!\n");
600break;
601}
602}
603}
604
605// Generating SSDT
606if (p_states_count > 0)
607{
608int i;
609
610struct aml_chunk* root = aml_create_node(NULL);
611aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
612struct aml_chunk* scop = aml_add_scope(root, "\\_PR_");
613struct aml_chunk* name = aml_add_name(scop, "PSS_");
614struct aml_chunk* pack = aml_add_package(name);
615
616for (i = 0; i < p_states_count; i++)
617{
618struct aml_chunk* pstt = aml_add_package(pack);
619
620aml_add_dword(pstt, p_states[i].Frequency);
621aml_add_dword(pstt, 0x00000000); // Power
622aml_add_dword(pstt, 0x0000000A); // Latency
623aml_add_dword(pstt, 0x0000000A); // Latency
624aml_add_dword(pstt, p_states[i].Control);
625aml_add_dword(pstt, i+1); // Status
626}
627
628// Add aliaces
629for (i = 0; i < acpi_cpu_count; i++)
630{
631char name[9];
632sprintf(name, "_PR_%c%c%c%c", acpi_cpu_name[i][0], acpi_cpu_name[i][1], acpi_cpu_name[i][2], acpi_cpu_name[i][3]);
633
634scop = aml_add_scope(root, name);
635aml_add_alias(scop, "PSS_", "_PSS");
636}
637
638aml_calculate_size(root);
639
640struct acpi_2_ssdt *ssdt = (struct acpi_2_ssdt *)AllocateKernelMemory(root->Size);
641
642aml_write_node(root, (void*)ssdt, 0);
643
644ssdt->Length = root->Size;
645ssdt->Checksum = 0;
646ssdt->Checksum = 256 - checksum8(ssdt, ssdt->Length);
647
648aml_destroy_node(root);
649
650//dumpPhysAddr("P-States SSDT content: ", ssdt, ssdt->Length);
651
652verbose ("SSDT with CPU P-States generated successfully\n");
653
654return ssdt;
655}
656}
657else
658{
659verbose ("ACPI CPUs not found: P-States not generated !!!\n");
660}
661
662return NULL;
663}
664
665struct acpi_2_fadt *patch_fadt(struct acpi_2_fadt *fadt, struct acpi_2_dsdt *new_dsdt)
666{
667extern void setupSystemType();
668
669struct acpi_2_fadt *fadt_mod;
670bool fadt_rev2_needed = false;
671bool fix_restart;
672const char * value;
673
674// Restart Fix
675if (Platform.CPU.Vendor == 0x756E6547) {/* Intel */
676fix_restart = true;
677getBoolForKey(kRestartFix, &fix_restart, &bootInfo->chameleonConfig);
678} else {
679verbose ("Not an Intel platform: Restart Fix not applied !!!\n");
680fix_restart = false;
681}
682
683if (fix_restart) fadt_rev2_needed = true;
684
685// Allocate new fadt table
686if (fadt->Length < 0x84 && fadt_rev2_needed)
687{
688fadt_mod=(struct acpi_2_fadt *)AllocateKernelMemory(0x84);
689memcpy(fadt_mod, fadt, fadt->Length);
690fadt_mod->Length = 0x84;
691fadt_mod->Revision = 0x02; // FADT rev 2 (ACPI 1.0B MS extensions)
692}
693else
694{
695fadt_mod=(struct acpi_2_fadt *)AllocateKernelMemory(fadt->Length);
696memcpy(fadt_mod, fadt, fadt->Length);
697}
698// Determine system type / PM_Model
699if ( (value=getStringForKey(kSystemType, &bootInfo->chameleonConfig))!=NULL)
700{
701if (Platform.Type > 6)
702{
703if(fadt_mod->PM_Profile<=6)
704Platform.Type = fadt_mod->PM_Profile; // get the fadt if correct
705else
706Platform.Type = 1;/* Set a fixed value (Desktop) */
707verbose("Error: system-type must be 0..6. Defaulting to %d !\n", Platform.Type);
708}
709else
710Platform.Type = (unsigned char) strtoul(value, NULL, 10);
711}
712// Set PM_Profile from System-type if only user wanted this value to be forced
713if (fadt_mod->PM_Profile != Platform.Type)
714{
715 if (value)
716{ // user has overriden the SystemType so take care of it in FACP
717verbose("FADT: changing PM_Profile from 0x%02x to 0x%02x\n", fadt_mod->PM_Profile, Platform.Type);
718fadt_mod->PM_Profile = Platform.Type;
719 }
720 else
721 { // PM_Profile has a different value and no override has been set, so reflect the user value to ioregs
722Platform.Type = fadt_mod->PM_Profile <= 6 ? fadt_mod->PM_Profile : 1;
723 }
724}
725// We now have to write the systemm-type in ioregs: we cannot do it before in setupDeviceTree()
726// because we need to take care of facp original content, if it is correct.
727setupSystemType();
728
729// Patch FADT to fix restart
730if (fix_restart)
731{
732fadt_mod->Flags|= 0x400;
733fadt_mod->Reset_SpaceID= 0x01; // System I/O
734fadt_mod->Reset_BitWidth= 0x08; // 1 byte
735fadt_mod->Reset_BitOffset= 0x00; // Offset 0
736fadt_mod->Reset_AccessWidth= 0x01; // Byte access
737fadt_mod->Reset_Address= 0x0cf9; // Address of the register
738fadt_mod->Reset_Value= 0x06; // Value to write to reset the system
739verbose("FADT: Restart Fix applied!\n");
740}
741
742// Patch DSDT Address if we have loaded DSDT.aml
743if(new_dsdt)
744{
745DBG("DSDT: Old @%x,%x, ",fadt_mod->DSDT,fadt_mod->X_DSDT);
746
747fadt_mod->DSDT=(uint32_t)new_dsdt;
748if ((uint32_t)(&(fadt_mod->X_DSDT))-(uint32_t)fadt_mod+8<=fadt_mod->Length)
749fadt_mod->X_DSDT=(uint32_t)new_dsdt;
750
751DBG("New @%x,%x\n",fadt_mod->DSDT,fadt_mod->X_DSDT);
752
753verbose("FADT: Using custom DSDT!\n");
754}
755
756// Correct the checksum
757fadt_mod->Checksum=0;
758fadt_mod->Checksum=256-checksum8(fadt_mod,fadt_mod->Length);
759
760return fadt_mod;
761}
762
763/* Setup ACPI without replacing DSDT. */
764int setupAcpiNoMod()
765{
766//addConfigurationTable(&gEfiAcpiTableGuid, getAddressOfAcpiTable(), "ACPI");
767//addConfigurationTable(&gEfiAcpi20TableGuid, getAddressOfAcpi20Table(), "ACPI_20");
768/* XXX aserebln why uint32 cast if pointer is uint64 ? */
769acpi10_p = (uint32_t)getAddressOfAcpiTable();
770acpi20_p = (uint32_t)getAddressOfAcpi20Table();
771addConfigurationTable(&gEfiAcpiTableGuid, &acpi10_p, "ACPI");
772if(acpi20_p) addConfigurationTable(&gEfiAcpi20TableGuid, &acpi20_p, "ACPI_20");
773return 1;
774}
775
776/* Setup ACPI. Replace DSDT if DSDT.aml is found */
777int setupAcpi(void)
778{
779int version;
780void *new_dsdt;
781
782const char *filename;
783char dirSpec[128];
784int len = 0;
785
786// Try using the file specified with the DSDT option
787if (getValueForKey(kDSDT, &filename, &len, &bootInfo->chameleonConfig))
788{
789sprintf(dirSpec, filename);
790}
791else
792{
793sprintf(dirSpec, "DSDT.aml");
794}
795
796// Load replacement DSDT
797new_dsdt = loadACPITable(dirSpec);
798// Mozodojo: going to patch FACP and load SSDT's even if DSDT.aml is not present
799/*if (!new_dsdt)
800 {
801 return setupAcpiNoMod();
802 }*/
803
804// Mozodojo: Load additional SSDTs
805struct acpi_2_ssdt *new_ssdt[32]; // 30 + 2 additional tables for pss & cst
806int ssdt_count=0;
807
808// SSDT Options
809bool drop_ssdt=false, generate_pstates=false, generate_cstates=false;
810
811getBoolForKey(kDropSSDT, &drop_ssdt, &bootInfo->chameleonConfig);
812getBoolForKey(kGeneratePStates, &generate_pstates, &bootInfo->chameleonConfig);
813getBoolForKey(kGenerateCStates, &generate_cstates, &bootInfo->chameleonConfig);
814
815{
816int i;
817
818for (i=0; i<30; i++)
819{
820char filename[512];
821
822sprintf(filename, i>0?"SSDT-%d.aml":"SSDT.aml", i);
823
824if(new_ssdt[ssdt_count] = loadACPITable(filename))
825{
826ssdt_count++;
827}
828else
829{
830break;
831}
832}
833}
834
835// Do the same procedure for both versions of ACPI
836for (version=0; version<2; version++) {
837struct acpi_2_rsdp *rsdp, *rsdp_mod;
838struct acpi_2_rsdt *rsdt, *rsdt_mod;
839int rsdplength;
840
841// Find original rsdp
842rsdp=(struct acpi_2_rsdp *)(version?getAddressOfAcpi20Table():getAddressOfAcpiTable());
843if (!rsdp)
844{
845DBG("No ACPI version %d found. Ignoring\n", version+1);
846if (version)
847addConfigurationTable(&gEfiAcpi20TableGuid, NULL, "ACPI_20");
848else
849addConfigurationTable(&gEfiAcpiTableGuid, NULL, "ACPI");
850continue;
851}
852rsdplength=version?rsdp->Length:20;
853
854DBG("RSDP version %d found @%x. Length=%d\n",version+1,rsdp,rsdplength);
855
856/* FIXME: no check that memory allocation succeeded
857 * Copy and patch RSDP,RSDT, XSDT and FADT
858 * For more info see ACPI Specification pages 110 and following
859 */
860
861rsdp_mod=(struct acpi_2_rsdp *) AllocateKernelMemory(rsdplength);
862memcpy(rsdp_mod, rsdp, rsdplength);
863rsdt=(struct acpi_2_rsdt *)(rsdp->RsdtAddress);
864
865DBG("RSDT @%x, Length %d\n",rsdt, rsdt->Length);
866
867if (rsdt && (uint32_t)rsdt !=0xffffffff && rsdt->Length<0x10000)
868{
869uint32_t *rsdt_entries;
870int rsdt_entries_num;
871int dropoffset=0, i;
872
873// mozo: using malloc cos I didn't found how to free already allocated kernel memory
874rsdt_mod=(struct acpi_2_rsdt *)malloc(rsdt->Length);
875memcpy (rsdt_mod, rsdt, rsdt->Length);
876rsdp_mod->RsdtAddress=(uint32_t)rsdt_mod;
877rsdt_entries_num=(rsdt_mod->Length-sizeof(struct acpi_2_rsdt))/4;
878rsdt_entries=(uint32_t *)(rsdt_mod+1);
879for (i=0;i<rsdt_entries_num;i++)
880{
881char *table=(char *)(rsdt_entries[i]);
882if (!table)
883continue;
884
885DBG("TABLE %c%c%c%c,",table[0],table[1],table[2],table[3]);
886
887rsdt_entries[i-dropoffset]=rsdt_entries[i];
888
889if (drop_ssdt && tableSign(table, "SSDT"))
890{
891dropoffset++;
892continue;
893}
894if (tableSign(table, "DSDT"))
895{
896DBG("DSDT found\n");
897
898if(new_dsdt)
899rsdt_entries[i-dropoffset]=(uint32_t)new_dsdt;
900
901continue;
902}
903if (tableSign(table, "FACP"))
904{
905struct acpi_2_fadt *fadt, *fadt_mod;
906fadt=(struct acpi_2_fadt *)rsdt_entries[i];
907
908DBG("FADT found @%x, Length %d\n",fadt, fadt->Length);
909
910if (!fadt || (uint32_t)fadt == 0xffffffff || fadt->Length>0x10000)
911{
912printf("FADT incorrect. Not modified\n");
913continue;
914}
915
916fadt_mod = patch_fadt(fadt, new_dsdt);
917rsdt_entries[i-dropoffset]=(uint32_t)fadt_mod;
918
919// Generate _CST SSDT
920if (generate_cstates && (new_ssdt[ssdt_count] = generate_cst_ssdt(fadt_mod)))
921{
922generate_cstates = false; // Generate SSDT only once!
923ssdt_count++;
924}
925
926// Generating _PSS SSDT
927if (generate_pstates && (new_ssdt[ssdt_count] = generate_pss_ssdt((void*)fadt_mod->DSDT)))
928{
929generate_pstates = false; // Generate SSDT only once!
930ssdt_count++;
931}
932
933continue;
934}
935}
936DBG("\n");
937
938// Allocate rsdt in Kernel memory area
939rsdt_mod->Length += 4*ssdt_count - 4*dropoffset;
940struct acpi_2_rsdt *rsdt_copy = (struct acpi_2_rsdt *)AllocateKernelMemory(rsdt_mod->Length);
941memcpy (rsdt_copy, rsdt_mod, rsdt_mod->Length);
942free(rsdt_mod); rsdt_mod = rsdt_copy;
943rsdp_mod->RsdtAddress=(uint32_t)rsdt_mod;
944rsdt_entries_num=(rsdt_mod->Length-sizeof(struct acpi_2_rsdt))/4;
945rsdt_entries=(uint32_t *)(rsdt_mod+1);
946
947// Mozodojo: Insert additional SSDTs into RSDT
948if(ssdt_count>0)
949{
950int j;
951
952for (j=0; j<ssdt_count; j++)
953rsdt_entries[i-dropoffset+j]=(uint32_t)new_ssdt[j];
954
955verbose("RSDT: Added %d SSDT table(s)\n", ssdt_count);
956}
957
958// Correct the checksum of RSDT
959DBG("RSDT: Original checksum %d, ", rsdt_mod->Checksum);
960
961rsdt_mod->Checksum=0;
962rsdt_mod->Checksum=256-checksum8(rsdt_mod,rsdt_mod->Length);
963
964DBG("New checksum %d at %x\n", rsdt_mod->Checksum,rsdt_mod);
965}
966else
967{
968rsdp_mod->RsdtAddress=0;
969printf("RSDT not found or RSDT incorrect\n");
970}
971
972if (version)
973{
974struct acpi_2_xsdt *xsdt, *xsdt_mod;
975
976// FIXME: handle 64-bit address correctly
977
978xsdt=(struct acpi_2_xsdt*) ((uint32_t)rsdp->XsdtAddress);
979DBG("XSDT @%x;%x, Length=%d\n", (uint32_t)(rsdp->XsdtAddress>>32),(uint32_t)rsdp->XsdtAddress,
980xsdt->Length);
981if (xsdt && (uint64_t)rsdp->XsdtAddress<0xffffffff && xsdt->Length<0x10000)
982{
983uint64_t *xsdt_entries;
984int xsdt_entries_num, i;
985int dropoffset=0;
986
987// mozo: using malloc cos I didn't found how to free already allocated kernel memory
988xsdt_mod=(struct acpi_2_xsdt*)malloc(xsdt->Length);
989memcpy(xsdt_mod, xsdt, xsdt->Length);
990rsdp_mod->XsdtAddress=(uint32_t)xsdt_mod;
991xsdt_entries_num=(xsdt_mod->Length-sizeof(struct acpi_2_xsdt))/8;
992xsdt_entries=(uint64_t *)(xsdt_mod+1);
993for (i=0;i<xsdt_entries_num;i++)
994{
995char *table=(char *)((uint32_t)(xsdt_entries[i]));
996if (!table)
997continue;
998
999xsdt_entries[i-dropoffset]=xsdt_entries[i];
1000
1001if (drop_ssdt && tableSign(table, "SSDT"))
1002{
1003dropoffset++;
1004continue;
1005}
1006if (tableSign(table, "DSDT"))
1007{
1008DBG("DSDT found\n");
1009
1010if (new_dsdt)
1011xsdt_entries[i-dropoffset]=(uint32_t)new_dsdt;
1012
1013DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
1014
1015continue;
1016}
1017if (tableSign(table, "FACP"))
1018{
1019struct acpi_2_fadt *fadt, *fadt_mod;
1020fadt=(struct acpi_2_fadt *)(uint32_t)xsdt_entries[i];
1021
1022DBG("FADT found @%x,%x, Length %d\n",(uint32_t)(xsdt_entries[i]>>32),fadt,
1023fadt->Length);
1024
1025if (!fadt || (uint64_t)xsdt_entries[i] >= 0xffffffff || fadt->Length>0x10000)
1026{
1027verbose("FADT incorrect or after 4GB. Dropping XSDT\n");
1028goto drop_xsdt;
1029}
1030
1031fadt_mod = patch_fadt(fadt, new_dsdt);
1032xsdt_entries[i-dropoffset]=(uint32_t)fadt_mod;
1033
1034DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
1035
1036// Generate _CST SSDT
1037if (generate_cstates && (new_ssdt[ssdt_count] = generate_cst_ssdt(fadt_mod)))
1038{
1039generate_cstates = false; // Generate SSDT only once!
1040ssdt_count++;
1041}
1042
1043// Generating _PSS SSDT
1044if (generate_pstates && (new_ssdt[ssdt_count] = generate_pss_ssdt((void*)fadt_mod->DSDT)))
1045{
1046generate_pstates = false; // Generate SSDT only once!
1047ssdt_count++;
1048}
1049
1050continue;
1051}
1052
1053DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
1054
1055}
1056
1057// Allocate xsdt in Kernel memory area
1058xsdt_mod->Length += 8*ssdt_count - 8*dropoffset;
1059struct acpi_2_xsdt *xsdt_copy = (struct acpi_2_xsdt *)AllocateKernelMemory(xsdt_mod->Length);
1060memcpy(xsdt_copy, xsdt_mod, xsdt_mod->Length);
1061free(xsdt_mod); xsdt_mod = xsdt_copy;
1062rsdp_mod->XsdtAddress=(uint32_t)xsdt_mod;
1063xsdt_entries_num=(xsdt_mod->Length-sizeof(struct acpi_2_xsdt))/8;
1064xsdt_entries=(uint64_t *)(xsdt_mod+1);
1065
1066// Mozodojo: Insert additional SSDTs into XSDT
1067if(ssdt_count>0)
1068{
1069int j;
1070
1071for (j=0; j<ssdt_count; j++)
1072xsdt_entries[i-dropoffset+j]=(uint32_t)new_ssdt[j];
1073
1074verbose("Added %d SSDT table(s) into XSDT\n", ssdt_count);
1075}
1076
1077// Correct the checksum of XSDT
1078xsdt_mod->Checksum=0;
1079xsdt_mod->Checksum=256-checksum8(xsdt_mod,xsdt_mod->Length);
1080}
1081else
1082{
1083drop_xsdt:
1084
1085DBG("About to drop XSDT\n");
1086
1087/*FIXME: Now we just hope that if MacOS doesn't find XSDT it reverts to RSDT.
1088 * A Better strategy would be to generate
1089 */
1090
1091rsdp_mod->XsdtAddress=0xffffffffffffffffLL;
1092verbose("XSDT not found or XSDT incorrect\n");
1093}
1094}
1095
1096// Correct the checksum of RSDP
1097
1098DBG("RSDP: Original checksum %d, ", rsdp_mod->Checksum);
1099
1100rsdp_mod->Checksum=0;
1101rsdp_mod->Checksum=256-checksum8(rsdp_mod,20);
1102
1103DBG("New checksum %d\n", rsdp_mod->Checksum);
1104
1105if (version)
1106{
1107DBG("RSDP: Original extended checksum %d", rsdp_mod->ExtendedChecksum);
1108
1109rsdp_mod->ExtendedChecksum=0;
1110rsdp_mod->ExtendedChecksum=256-checksum8(rsdp_mod,rsdp_mod->Length);
1111
1112DBG("New extended checksum %d\n", rsdp_mod->ExtendedChecksum);
1113
1114}
1115
1116//verbose("Patched ACPI version %d DSDT\n", version+1);
1117if (version)
1118{
1119/* XXX aserebln why uint32 cast if pointer is uint64 ? */
1120acpi20_p = (uint32_t)rsdp_mod;
1121addConfigurationTable(&gEfiAcpi20TableGuid, &acpi20_p, "ACPI_20");
1122}
1123else
1124{
1125/* XXX aserebln why uint32 cast if pointer is uint64 ? */
1126acpi10_p = (uint32_t)rsdp_mod;
1127addConfigurationTable(&gEfiAcpiTableGuid, &acpi10_p, "ACPI");
1128}
1129}
1130#if DEBUG_ACPI
1131printf("Press a key to continue... (DEBUG_ACPI)\n");
1132getchar();
1133#endif
1134return 1;
1135}
1136

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