| 1 | /*␊ |
| 2 | * Copyright 2008 mackerintel␊ |
| 3 | */␊ |
| 4 | ␊ |
| 5 | /* ␊ |
| 6 | Copyright (c) 2010, Intel Corporation␊ |
| 7 | All rights reserved.␊ |
| 8 | ␊ |
| 9 | Redistribution and use in source and binary forms, with or without␊ |
| 10 | modification, are permitted provided that the following conditions are met:␊ |
| 11 | ␊ |
| 12 | * Redistributions of source code must retain the above copyright notice,␊ |
| 13 | this list of conditions and the following disclaimer.␊ |
| 14 | * Redistributions in binary form must reproduce the above copyright notice,␊ |
| 15 | this list of conditions and the following disclaimer in the documentation␊ |
| 16 | and/or other materials provided with the distribution.␊ |
| 17 | * Neither the name of Intel Corporation nor the names of its contributors␊ |
| 18 | may be used to endorse or promote products derived from this software␊ |
| 19 | without specific prior written permission.␊ |
| 20 | ␊ |
| 21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND␊ |
| 22 | ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED␊ |
| 23 | WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE␊ |
| 24 | DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR␊ |
| 25 | ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES␊ |
| 26 | (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;␊ |
| 27 | LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON␊ |
| 28 | ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT␊ |
| 29 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS␊ |
| 30 | SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.␊ |
| 31 | */␊ |
| 32 | ␊ |
| 33 | /*␊ |
| 34 | * Copyright (c) 2011 cparm <armelcadetpetit@gmail.com>. All rights reserved.␊ |
| 35 | *␊ |
| 36 | */␊ |
| 37 | ␊ |
| 38 | #include "libsaio.h"␊ |
| 39 | #include "boot.h"␊ |
| 40 | #include "bootstruct.h"␊ |
| 41 | #include "acpi.h"␊ |
| 42 | #include "acpidecode.h"␊ |
| 43 | #include "acpicode.h"␊ |
| 44 | #include "efi_tables.h"␊ |
| 45 | #include "fake_efi.h"␊ |
| 46 | #include "acpi_codec.h"␊ |
| 47 | #include "platform.h"␊ |
| 48 | #include "cpu.h"␊ |
| 49 | #include "xml.h"␊ |
| 50 | #include "pci_root.h"␊ |
| 51 | #include "sl.h"␊ |
| 52 | ␊ |
| 53 | U64 rsd_p;␊ |
| 54 | ACPI_TABLES acpi_tables;␊ |
| 55 | ␊ |
| 56 | #ifndef DEBUG_ACPI␊ |
| 57 | #define DEBUG_ACPI 0␊ |
| 58 | #endif␊ |
| 59 | ␊ |
| 60 | #if DEBUG_ACPI==2␊ |
| 61 | #define DBG(x...) {printf(x); sleep(1);}␊ |
| 62 | #elif DEBUG_ACPI==1␊ |
| 63 | #define DBG(x...) printf(x)␊ |
| 64 | #else␊ |
| 65 | #define DBG(x...)␊ |
| 66 | #endif␊ |
| 67 | ␊ |
| 68 | #define OLD_SSDT 0␊ |
| 69 | #define BETA 0␊ |
| 70 | #define BUILD_ACPI_TSS 0␊ |
| 71 | #define pstate_power_support 1␊ |
| 72 | ␊ |
| 73 | #if BETA␊ |
| 74 | #ifdef pstate_power_support␊ |
| 75 | #undef pstate_power_support␊ |
| 76 | #endif␊ |
| 77 | #define pstate_power_support 1␊ |
| 78 | #endif␊ |
| 79 | ␊ |
| 80 | extern EFI_STATUS addConfigurationTable();␊ |
| 81 | ␊ |
| 82 | extern EFI_GUID gEfiAcpiTableGuid;␊ |
| 83 | extern EFI_GUID gEfiAcpi20TableGuid;␊ |
| 84 | ␊ |
| 85 | #if DEBUG_ACPI␊ |
| 86 | static void print_nameseg(U32 i);␊ |
| 87 | #endif␊ |
| 88 | ␊ |
| 89 | static ACPI_TABLE_HEADER * get_new_table_in_list(U32 *new_table_list, U32 Signature, U8 *retIndex );␊ |
| 90 | static U8 get_0ul_index_in_list(U32 *new_table_list, bool reserved );␊ |
| 91 | static void sanitize_new_table_list(U32 *new_table_list );␊ |
| 92 | static void move_table_list_to_kmem(U32 *new_table_list );␊ |
| 93 | static ACPI_TABLE_RSDP * gen_alloc_rsdp_v2_from_v1(ACPI_TABLE_RSDP *rsdp );␊ |
| 94 | static ACPI_TABLE_RSDT * gen_alloc_rsdt_from_xsdt(ACPI_TABLE_XSDT *xsdt);␊ |
| 95 | static ACPI_TABLE_XSDT * gen_alloc_xsdt_from_rsdt(ACPI_TABLE_RSDT *rsdt);␊ |
| 96 | static void *loadACPITable(char *dirspec, char *filename );␊ |
| 97 | static int generate_cpu_map_from_acpi(ACPI_TABLE_DSDT * DsdtPointer);␊ |
| 98 | static ACPI_GENERIC_ADDRESS FillGASStruct(U32 Address, U8 Length);␊ |
| 99 | static void process_xsdt (ACPI_TABLE_RSDP *rsdp_mod , U32 *new_table_list);␊ |
| 100 | static void process_rsdt(ACPI_TABLE_RSDP *rsdp_mod , bool gen_xsdt, U32 *new_table_list);␊ |
| 101 | static ACPI_TABLE_FADT * patch_fadt(ACPI_TABLE_FADT *fadt, ACPI_TABLE_DSDT *new_dsdt, bool UpdateFADT);␊ |
| 102 | ␊ |
| 103 | #if OLD_SSDT␊ |
| 104 | #include "modules.h"␊ |
| 105 | struct aml_chunk ␊ |
| 106 | {␊ |
| 107 | ␉unsigned char␉␉Type;␊ |
| 108 | ␉unsigned int␉␉Length;␊ |
| 109 | ␉char*␉␉␉␉Buffer;␊ |
| 110 | ␉␊ |
| 111 | ␉unsigned int␉␉Size;␊ |
| 112 | ␉␊ |
| 113 | ␉struct aml_chunk*␉Next;␊ |
| 114 | ␉struct aml_chunk*␉First;␊ |
| 115 | ␉struct aml_chunk*␉Last;␊ |
| 116 | };␊ |
| 117 | static U32 get_needed_symbols (void);␊ |
| 118 | static ACPI_TABLE_SSDT *generate_cst_ssdt(ACPI_TABLE_FADT* fadt);␊ |
| 119 | static ACPI_TABLE_SSDT *generate_pss_ssdt(ACPI_TABLE_DSDT* dsdt);␊ |
| 120 | struct aml_chunk* (*aml_create_node)(struct aml_chunk*) = NULL;␉␉␉␊ |
| 121 | struct aml_chunk* (*aml_add_buffer)(struct aml_chunk*,const char*, unsigned int) = NULL;␉␉␉␊ |
| 122 | struct aml_chunk* (*aml_add_byte)(struct aml_chunk*, unsigned char) = NULL;␉␉␉␊ |
| 123 | struct aml_chunk* (*aml_add_word)(struct aml_chunk*, unsigned int) = NULL;␊ |
| 124 | struct aml_chunk* (*aml_add_dword)(struct aml_chunk*, unsigned long) = NULL;␉␉␉␊ |
| 125 | struct aml_chunk* (*aml_add_qword)(struct aml_chunk*, unsigned long long) = NULL;␉␉␉␊ |
| 126 | struct aml_chunk* (*aml_add_scope)(struct aml_chunk*, const char*) = NULL;␊ |
| 127 | struct aml_chunk* (*aml_add_name)(struct aml_chunk*, const char*) = NULL;␉␉␉␊ |
| 128 | struct aml_chunk* (*aml_add_package)(struct aml_chunk*) = NULL;␉␉␉␊ |
| 129 | struct aml_chunk* (*aml_add_alias)(struct aml_chunk*, const char*, const char*) = NULL;␉␉␉␊ |
| 130 | void (*aml_destroy_node)(struct aml_chunk*) = NULL;␊ |
| 131 | unsigned int (*aml_calculate_size)(struct aml_chunk*) = NULL;␊ |
| 132 | unsigned int (*aml_write_node)(struct aml_chunk*, char*, unsigned int) = NULL;␊ |
| 133 | bool (*aml_add_to_parent)(struct aml_chunk*, struct aml_chunk*) = NULL;␊ |
| 134 | ␊ |
| 135 | #else␊ |
| 136 | ␊ |
| 137 | #define IA32_MISC_ENABLES 0x01A0␊ |
| 138 | #define MSR_TURBO_POWER_CURRENT_LIMIT 0x1AC␊ |
| 139 | #define MSR_PKG_CST_CONFIG_CONTROL 0x00E2␊ |
| 140 | #define MSR_RAPL_POWER_UNIT 0x606␊ |
| 141 | #define MSR_PKG_RAPL_POWER_LIMIT 0x610␊ |
| 142 | static U32 turbo_enabled = 0;␊ |
| 143 | static U32 BuildSsdt(ACPI_TABLE_MADT * madt, ACPI_TABLE_DSDT *dsdt, void * buffer, U32 bufferSize, bool enable_cstates, bool enable_pstates, bool enable_tstates);␊ |
| 144 | static bool is_sandybridge(void);␊ |
| 145 | static bool is_jaketown(void);␊ |
| 146 | static U32 encode_pstate(U32 ratio);␊ |
| 147 | static void collect_cpu_info(CPU_DETAILS * cpu);␊ |
| 148 | static U32 BuildCstateInfo(CPU_DETAILS * cpu, U32 pmbase);␊ |
| 149 | static U32 BuildPstateInfo(CPU_DETAILS * cpu);␊ |
| 150 | static U32 ProcessSsdt(U32 * new_table_list, ACPI_TABLE_DSDT *dsdt, bool enable_cstates, bool enable_pstates, bool enable_tstates );␊ |
| 151 | static void * buildCpuScope (void * current, U32 cpu_namespace, PROCESSOR_NUMBER_TO_NAMESEG * aslCpuNamePath);␊ |
| 152 | static void * buildPDC(void * current);␊ |
| 153 | static void * buildOSC(void * current);␊ |
| 154 | static void * buildPSS(void * current, PKG_PSTATES * pkg_pstates);␊ |
| 155 | static void * buildPSD(void * current, U32 domain, U32 cpusInDomain, U32 pstate_coordination);␊ |
| 156 | static void * buildPPC(void * current);␊ |
| 157 | static void * buildPCT(void * current);␊ |
| 158 | static void * buildCstate(void * current, ACPI_GENERIC_ADDRESS * gas, CSTATE * cstate);␊ |
| 159 | static void * buildReturnPackageCST(void * current, PKG_CSTATES * pkg_cstates);␊ |
| 160 | static void * buildCST(void * current, PKG_CSTATES * mwait_pkg_cstates, PKG_CSTATES * io_pkg_cstates);␊ |
| 161 | #if BUILD_ACPI_CSD␊ |
| 162 | static void * buildCSD(void * current, U32 domain, U32 cpusInDomain, PKG_CSTATES * pkg_cstates);␊ |
| 163 | #endif␊ |
| 164 | #if BUILD_ACPI_TSS␊ |
| 165 | static U32 BuildTstateInfo(CPU_DETAILS * cpu);␊ |
| 166 | static void * buildTPC(void * current);␊ |
| 167 | static void * buildPTC(void * current);␊ |
| 168 | static void * buildTSS(void * current, PKG_TSTATES * pkg_tstates);␊ |
| 169 | static void * buildTSD(void * current, U32 domain, U32 cpusInDomain);␊ |
| 170 | #endif␊ |
| 171 | #if pstate_power_support␊ |
| 172 | static U64 mulU64byU64(U64 a, U64 b, U64 * high);␊ |
| 173 | static U32 compute_pstate_power(CPU_DETAILS * cpu, U32 ratio, U32 TDP);␊ |
| 174 | #endif␊ |
| 175 | #if BUILD_ACPI_TSS || pstate_power_support␊ |
| 176 | static U64 divU64byU64(U64 n, U64 d, U64 * rem);␊ |
| 177 | static U32 compute_tdp(CPU_DETAILS * cpu);␊ |
| 178 | #endif␊ |
| 179 | ␊ |
| 180 | #endif // OLD_SSDT␊ |
| 181 | ␊ |
| 182 | #if UNUSED␊ |
| 183 | static ACPI_TABLE_FACS* generate_facs(bool updatefacs );␊ |
| 184 | #endif␊ |
| 185 | ␊ |
| 186 | #define MAX_NON_SSDT_TABLE 15␊ |
| 187 | #define MAX_SSDT_TABLE 15 // 15 additional SSDT tables ␊ |
| 188 | #define MAX_ACPI_TABLE MAX_NON_SSDT_TABLE + MAX_SSDT_TABLE␊ |
| 189 | ␊ |
| 190 | // Security space for SSDT & FACP generation,␊ |
| 191 | // the size can be increased ␊ |
| 192 | // note: the table will not placed in the reserved space if the 'normal' space is not full␊ |
| 193 | #if OLD_SSDT␊ |
| 194 | #define RESERVED_AERA 3␊ |
| 195 | #else␊ |
| 196 | #define RESERVED_AERA 2␊ |
| 197 | #endif␊ |
| 198 | ␊ |
| 199 | #define ACPI_TABLE_LIST_FULL MAX_ACPI_TABLE + RESERVED_AERA + 1␊ |
| 200 | ␊ |
| 201 | #define ACPI_TABLE_LIST_FULL_NON_RESERVED MAX_ACPI_TABLE + 1␊ |
| 202 | ␊ |
| 203 | #define ULONG_MAX_32 4294967295UL␊ |
| 204 | ␊ |
| 205 | #define __RES(s, u)␉␉␉␉␉␉␉␉␉␉␉␉\␊ |
| 206 | inline unsigned u␉␉␉␉␉␉␉␉␉␉\␊ |
| 207 | resolve_##s(unsigned u defaultentry, char *str, int base) \␊ |
| 208 | {␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉\␊ |
| 209 | unsigned u entry = defaultentry;␉␉␉␉␉␉␉\␊ |
| 210 | if (str && (strcmp(str,"Default") != 0)) {␉␉␉␉␉\␊ |
| 211 | entry = strtoul((const char *)str, NULL,base);␉␉␉␉\␊ |
| 212 | }␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉\␊ |
| 213 | return entry;␉␉␉␉␉␉␉␉␉␉␉␉\␊ |
| 214 | }␊ |
| 215 | ␊ |
| 216 | __RES(pss, long) ␊ |
| 217 | __RES(cst, int) ␊ |
| 218 | ␊ |
| 219 | ␊ |
| 220 | static ACPI_TABLE_HEADER * get_new_table_in_list(U32 *new_table_list, U32 Signature, U8 *retIndex )␊ |
| 221 | {␊ |
| 222 | ␉ACPI_TABLE_HEADER **table_array = (ACPI_TABLE_HEADER **) new_table_list;␊ |
| 223 | ␉U8 index ;␊ |
| 224 | ␉*retIndex = 0;␊ |
| 225 | ␉␊ |
| 226 | ␉for (index = 0; index < (MAX_ACPI_TABLE + RESERVED_AERA); index++)␊ |
| 227 | ␉{␊ |
| 228 | ␉␉if (*(U32 *) (table_array[index]->Signature) == Signature)␊ |
| 229 | ␉␉{␊ |
| 230 | ␉␉␉*retIndex = index;␊ |
| 231 | ␉␉␉return table_array[index] ;␊ |
| 232 | ␉␉}␊ |
| 233 | ␉}␊ |
| 234 | ␉return (void*)0ul;␊ |
| 235 | }␊ |
| 236 | ␊ |
| 237 | static U8 get_0ul_index_in_list(U32 *new_table_list, bool reserved )␊ |
| 238 | {␊ |
| 239 | ␉U8 index ;␊ |
| 240 | ␉␊ |
| 241 | ␉U8 maximum = (reserved == true) ? MAX_ACPI_TABLE + RESERVED_AERA : MAX_ACPI_TABLE;␊ |
| 242 | ␉␊ |
| 243 | ␉for (index = 0; index < maximum; index++)␊ |
| 244 | ␉{␊ |
| 245 | ␉␉if (new_table_list[index] == 0ul)␊ |
| 246 | ␉␉{␊ |
| 247 | ␉␉␉return index ;␊ |
| 248 | ␉␉}␊ |
| 249 | ␉}␊ |
| 250 | ␉return (reserved == true)? ACPI_TABLE_LIST_FULL : ACPI_TABLE_LIST_FULL_NON_RESERVED;␊ |
| 251 | }␊ |
| 252 | ␊ |
| 253 | /* cparm : This time we check it by the acpi signature */␊ |
| 254 | static void sanitize_new_table_list(U32 *new_table_list )␊ |
| 255 | {␊ |
| 256 | ␉ACPI_TABLE_HEADER **table_array = (ACPI_TABLE_HEADER **) new_table_list;␊ |
| 257 | ␉U8 index ;␊ |
| 258 | ␉␊ |
| 259 | ␉for (index = 0; index < MAX_ACPI_TABLE; index++)␊ |
| 260 | ␉{␊ |
| 261 | ␉␉U32 current_sig = *(U32 *) (table_array[index]->Signature);␊ |
| 262 | ␉␉␊ |
| 263 | ␉␉if ((current_sig == NAMESEG(ACPI_SIG_FACS) /* not supported */ ) ␊ |
| 264 | ␉␉␉|| (current_sig == NAMESEG(ACPI_SIG_XSDT)) ␊ |
| 265 | ␉␉␉|| (current_sig == NAMESEG(ACPI_SIG_RSDT)) || (*(volatile U64 *)table_array[index] == NAMESEG64(ACPI_SIG_RSDP)) )␊ |
| 266 | ␉␉{␊ |
| 267 | ␉␉␉␊ |
| 268 | ␉␉␉void *buf = (void*)new_table_list[index];␊ |
| 269 | ␉␉␉free(buf);␊ |
| 270 | ␉␉␉new_table_list[index] = 0ul ;␊ |
| 271 | ␉␉}␊ |
| 272 | ␉}␊ |
| 273 | }␊ |
| 274 | ␊ |
| 275 | /* cparm : move all tables to kernel memory */␊ |
| 276 | static void move_table_list_to_kmem(U32 *new_table_list )␊ |
| 277 | {␊ |
| 278 | ␉ACPI_TABLE_HEADER **table_array = (ACPI_TABLE_HEADER **) new_table_list;␊ |
| 279 | ␉U8 index ;␊ |
| 280 | ␉␊ |
| 281 | ␉for (index = 0; index < MAX_ACPI_TABLE; index++)␊ |
| 282 | ␉{␊ |
| 283 | ␉␉if (new_table_list[index] != 0ul)␊ |
| 284 | ␉␉{␊ |
| 285 | ␊ |
| 286 | ␉␉␉U32 current_sig = *(U32 *) (table_array[index]->Signature);␊ |
| 287 | ␉␉␉if ((current_sig != NAMESEG(ACPI_SIG_FACS) /* not supported */ ) ␊ |
| 288 | ␉␉␉␉&& (current_sig != NAMESEG(ACPI_SIG_XSDT)) ␊ |
| 289 | ␉␉␉␉&& (current_sig != NAMESEG(ACPI_SIG_RSDT)) && (*(volatile U64 *)table_array[index] != NAMESEG64(ACPI_SIG_RSDP))␊ |
| 290 | ␉␉␉␉&& (GetChecksum(table_array[index], table_array[index]->Length) == 0))␊ |
| 291 | ␉␉␉{␊ |
| 292 | ␉␉␉␉␊ |
| 293 | ␉␉␉␉void *tableAddr=(void*)AllocateKernelMemory(table_array[index]->Length);␊ |
| 294 | ␉␉␉␉bcopy(table_array[index], tableAddr, table_array[index]->Length);␊ |
| 295 | ␉␉␉␉new_table_list[index] = 0ul ;␊ |
| 296 | ␉␉␉␉new_table_list[index] = (U32)tableAddr ;␊ |
| 297 | ␉␉␉␉␊ |
| 298 | ␉␉␉} ␊ |
| 299 | ␉␉␉else␊ |
| 300 | ␉␉␉{␊ |
| 301 | ␉␉␉␉␊ |
| 302 | ␉␉␉␉void *buf = (void*)new_table_list[index];␊ |
| 303 | ␉␉␉␉free(buf);␊ |
| 304 | ␉␉␉␉new_table_list[index] = 0ul ;␊ |
| 305 | ␉␉␉}␉␉␉␊ |
| 306 | ␉␉}␊ |
| 307 | ␉}␊ |
| 308 | }␊ |
| 309 | ␊ |
| 310 | static ACPI_TABLE_RSDP * gen_alloc_rsdp_v2_from_v1(ACPI_TABLE_RSDP *rsdp )␊ |
| 311 | {␊ |
| 312 | ␉␊ |
| 313 | ␉ACPI_TABLE_RSDP * rsdp_conv = (ACPI_TABLE_RSDP *)AllocateKernelMemory(sizeof(ACPI_TABLE_RSDP));␊ |
| 314 | ␉bzero(rsdp_conv, sizeof(ACPI_TABLE_RSDP));␊ |
| 315 | memcpy(rsdp_conv, rsdp, ACPI_RSDP_REV0_SIZE);␊ |
| 316 | ␊ |
| 317 | /* Add/change fields */␊ |
| 318 | rsdp_conv->Revision = 2; /* ACPI version 3 */␊ |
| 319 | rsdp_conv->Length = sizeof(ACPI_TABLE_RSDP);␊ |
| 320 | ␊ |
| 321 | /* Correct checksums */ ␊ |
| 322 | setRsdpchecksum(rsdp_conv);␊ |
| 323 | setRsdpXchecksum(rsdp_conv); ␊ |
| 324 | ␊ |
| 325 | return rsdp_conv;␊ |
| 326 | }␊ |
| 327 | ␊ |
| 328 | static ACPI_TABLE_RSDT * gen_alloc_rsdt_from_xsdt(ACPI_TABLE_XSDT *xsdt)␊ |
| 329 | {␊ |
| 330 | U32 index;␊ |
| 331 | U32 num_tables;␊ |
| 332 | ␉␉␉␊ |
| 333 | ␉DBG("Attempting to generate RSDT from XSDT \n");␊ |
| 334 | ␉␊ |
| 335 | num_tables= get_num_tables64(xsdt);␊ |
| 336 | ␊ |
| 337 | ACPI_TABLE_RSDT * rsdt_conv=(ACPI_TABLE_RSDT *)AllocateKernelMemory(sizeof(ACPI_TABLE_HEADER)+(num_tables * 4));␊ |
| 338 | ␉bzero(rsdt_conv, sizeof(ACPI_TABLE_HEADER)+(num_tables * 4));␊ |
| 339 | memcpy(&rsdt_conv->Header, &xsdt->Header, sizeof(ACPI_TABLE_HEADER));␊ |
| 340 | ␊ |
| 341 | rsdt_conv->Header.Signature[0] = 'R';␊ |
| 342 | rsdt_conv->Header.Signature[1] = 'S';␊ |
| 343 | rsdt_conv->Header.Signature[2] = 'D';␊ |
| 344 | rsdt_conv->Header.Signature[3] = 'T';␊ |
| 345 | rsdt_conv->Header.Length = sizeof(ACPI_TABLE_HEADER)+(num_tables * 4);␊ |
| 346 | ␊ |
| 347 | ␉for (index=0;index<num_tables;index++)␊ |
| 348 | {␊ |
| 349 | ␉␉U64 ptr = xsdt->TableOffsetEntry[index];␊ |
| 350 | ␉␉␊ |
| 351 | ␉␉{␉␉␉␉␊ |
| 352 | ␉␉␉if (ptr > ULONG_MAX_32)␊ |
| 353 | ␉␉␉{␊ |
| 354 | #if DEBUG_ACPI␉␉␉␉␉␉␊ |
| 355 | ␉␉␉␉printf("Warning xsdt->TableOffsetEntry[%d]: Beyond addressable memory in this CPU mode, ignored !!!\n",index);␊ |
| 356 | #endif␊ |
| 357 | ␉␉␉␉continue;␉␊ |
| 358 | ␉␉␉}␊ |
| 359 | #if DEBUG_ACPI␉␊ |
| 360 | ␉␉␉printf("* Processing : ");␊ |
| 361 | ␉␉␉print_nameseg(*(U32 *) ((ACPI_TABLE_HEADER *) (unsigned long)ptr)->Signature);␊ |
| 362 | ␉␉␉printf("\n");␉␉␉␊ |
| 363 | #endif␉␉␉␉␉␊ |
| 364 | ␉␉␉bool unsafe = false;␊ |
| 365 | ␉␉␉getBoolForKey(kUnsafeACPI, &unsafe, &bootInfo->bootConfig);␊ |
| 366 | ␉␉␉␊ |
| 367 | ␉␉␉if (!unsafe)␊ |
| 368 | ␉␉␉{␊ |
| 369 | ␉␉␉␉if (GetChecksum(((ACPI_TABLE_HEADER *) (unsigned long)ptr), ␊ |
| 370 | ␉␉␉␉␉␉␉␉((ACPI_TABLE_HEADER *) (unsigned long)ptr)->Length) != 0)␊ |
| 371 | ␉␉␉␉{␊ |
| 372 | #if DEBUG_ACPI␉␉␉␉␉␉␊ |
| 373 | ␉␉␉␉␉printf("Warning : Invalide checksum, ignored !!!\n",index);␊ |
| 374 | #endif␊ |
| 375 | ␉␉␉␉␉continue;␊ |
| 376 | ␉␉␉␉}␊ |
| 377 | ␉␉␉}␉␉␉␊ |
| 378 | ␉␉␉␊ |
| 379 | ␉␉}␉␉␉␊ |
| 380 | ␊ |
| 381 | ␉␉{␊ |
| 382 | ␉␉␉if ((*(U32 *) ((ACPI_TABLE_HEADER *) (unsigned long)ptr)->Signature == NAMESEG(ACPI_SIG_FADT)))␊ |
| 383 | ␉␉␉{␊ |
| 384 | ␉␉␉␉ACPI_TABLE_FADT *fadt=(ACPI_TABLE_FADT *)((U32)ptr);␊ |
| 385 | ␉␉␉␉␊ |
| 386 | ␉␉␉␉ACPI_TABLE_FADT *fadt_conv = (void*)0ul;␊ |
| 387 | ␉␉␉␉␊ |
| 388 | ␉␉␉␉if (fadt->Header.Revision > 1)␊ |
| 389 | ␉␉␉␉{␊ |
| 390 | ␉␉␉␉␉U8 buffer[0x74];␊ |
| 391 | ␉␉␉␉␉DBG("Downgrading ACPI V%d FADT to ACPI V1 FADT \n", fadt->Header.Revision);␊ |
| 392 | ␉␉␉␉␉fadt_conv=(ACPI_TABLE_FADT *)buffer;␊ |
| 393 | ␉␉␉␉␉memcpy(fadt_conv, fadt, 0x74);␊ |
| 394 | ␉␉␉␉␉fadt_conv->Header.Length = 0x74;␊ |
| 395 | ␉␉␉␉␉fadt_conv->Header.Revision = 0x01;␉␉␉␉␉␊ |
| 396 | ␉␉␉␉␉SetChecksum(&fadt_conv->Header);␊ |
| 397 | ␉␉␉␉} ␊ |
| 398 | ␉␉␉␉else␊ |
| 399 | ␉␉␉␉{␊ |
| 400 | ␉␉␉␉␉fadt_conv = fadt;␊ |
| 401 | ␉␉␉␉}␊ |
| 402 | ␉␉␉␉␊ |
| 403 | ␉␉␉␉ACPI_TABLE_FADT *fadt_mod = patch_fadt(fadt_conv, ((ACPI_TABLE_DSDT*)((U32)fadt->XDsdt)), false); ␊ |
| 404 | ␉␉␉␉if (fadt_mod == (void*)0ul)␊ |
| 405 | ␉␉␉␉{␊ |
| 406 | ␉␉␉␉␉printf("Error: Failed to patch FADT Table, fallback to fadt original pointer\n");␊ |
| 407 | ␉␉␉␉␉fadt_mod = fadt;␊ |
| 408 | ␉␉␉␉}␊ |
| 409 | ␉␉␉␉␊ |
| 410 | ␉␉␉␉rsdt_conv->TableOffsetEntry[index] = ((U32)fadt_mod);␊ |
| 411 | #if DEBUG_ACPI␉␉␉␊ |
| 412 | ␉␉␉␉print_nameseg(*(U32 *) ((ACPI_TABLE_HEADER *) (unsigned long)ptr)->Signature);␊ |
| 413 | ␉␉␉␉printf(" table converted and added succesfully\n");␉␉␉␊ |
| 414 | #endif␊ |
| 415 | ␉␉␉␉continue;␊ |
| 416 | ␉␉␉}␊ |
| 417 | ␉␉}␊ |
| 418 | ␉␉␉␊ |
| 419 | ␉␉{␊ |
| 420 | ␉␉␉rsdt_conv->TableOffsetEntry[index] = (U32)ptr;␊ |
| 421 | #if DEBUG_ACPI␉␉␉␊ |
| 422 | ␉␉␉print_nameseg(*(U32 *) ((ACPI_TABLE_HEADER *) (unsigned long)ptr)->Signature);␊ |
| 423 | ␉␉␉printf(" table converted and added succesfully\n");␉␊ |
| 424 | #endif␉␉␉␉␉␊ |
| 425 | ␉␉}␊ |
| 426 | ␉␉␊ |
| 427 | }␊ |
| 428 | DBG("RSDT_CONV : Original checksum %d\n", rsdt_conv->Header.Checksum);␊ |
| 429 | SetChecksum(&rsdt_conv->Header);␊ |
| 430 | DBG("New checksum %d\n", rsdt_conv->Header.Checksum);␊ |
| 431 | ␉␊ |
| 432 | return rsdt_conv;␊ |
| 433 | }␊ |
| 434 | ␊ |
| 435 | static ACPI_TABLE_XSDT * gen_alloc_xsdt_from_rsdt(ACPI_TABLE_RSDT *rsdt)␊ |
| 436 | {␉␊ |
| 437 | ␉U32 index;␊ |
| 438 | U32 num_tables;␉␊ |
| 439 | ␉␉␉␊ |
| 440 | ␉DBG("Attempting to generate XSDT from RSDT \n");␊ |
| 441 | ␉␊ |
| 442 | num_tables= get_num_tables(rsdt);␊ |
| 443 | ␊ |
| 444 | ACPI_TABLE_XSDT * xsdt_conv=(ACPI_TABLE_XSDT *)AllocateKernelMemory(sizeof(ACPI_TABLE_HEADER)+(num_tables * 8));␊ |
| 445 | ␉bzero(xsdt_conv, sizeof(ACPI_TABLE_HEADER)+(num_tables * 8));␊ |
| 446 | memcpy(&xsdt_conv->Header, &rsdt->Header, sizeof(ACPI_TABLE_HEADER));␊ |
| 447 | ␊ |
| 448 | xsdt_conv->Header.Signature[0] = 'X';␊ |
| 449 | xsdt_conv->Header.Signature[1] = 'S';␊ |
| 450 | xsdt_conv->Header.Signature[2] = 'D';␊ |
| 451 | xsdt_conv->Header.Signature[3] = 'T';␊ |
| 452 | xsdt_conv->Header.Length = sizeof(ACPI_TABLE_HEADER)+(num_tables * 8);␊ |
| 453 | ␊ |
| 454 | ␉ACPI_TABLE_HEADER **table_array = (ACPI_TABLE_HEADER **) rsdt->TableOffsetEntry;␊ |
| 455 | ␉␊ |
| 456 | for (index=0;index<num_tables;index++)␊ |
| 457 | {␊ |
| 458 | ␉␉␉{␉␉␉␉␊ |
| 459 | #if DEBUG_ACPI␉␊ |
| 460 | ␉␉␉␉printf("* Processing : ");␊ |
| 461 | ␉␉␉␉print_nameseg(*(U32*) (table_array[index]->Signature));␊ |
| 462 | ␉␉␉␉printf("\n");␉␉␉␊ |
| 463 | #endif␉␉␉␊ |
| 464 | ␉␉␉␉bool unsafe = false;␊ |
| 465 | ␉␉␉␉getBoolForKey(kUnsafeACPI, &unsafe, &bootInfo->bootConfig);␊ |
| 466 | ␉␉␉␉␊ |
| 467 | ␉␉␉␉if (!unsafe) ␊ |
| 468 | ␉␉␉␉{␊ |
| 469 | ␉␉␉␉␉if (GetChecksum(table_array[index], table_array[index]->Length) != 0)␊ |
| 470 | ␉␉␉␉␉{␊ |
| 471 | #if DEBUG_ACPI␉␉␉␉␉␉␊ |
| 472 | ␉␉␉␉␉␉printf("Warning : Invalide checksum, ignored !!!\n",index);␊ |
| 473 | #endif␊ |
| 474 | ␉␉␉␉␉␉continue;␊ |
| 475 | ␉␉␉␉␉}␊ |
| 476 | ␉␉␉␉}␊ |
| 477 | ␉␉␉␉␊ |
| 478 | ␉␉␉}␊ |
| 479 | ␉␉␉␉␉␊ |
| 480 | ␉␉␉{␊ |
| 481 | ␉␉␉␉if ((*(U32 *) (table_array[index]->Signature) == NAMESEG(ACPI_SIG_FADT)))␊ |
| 482 | ␉␉␉␉{␊ |
| 483 | ␉␉␉␉␉ACPI_TABLE_FADT *FacpPointer = ((ACPI_TABLE_FADT*)table_array[index]);␊ |
| 484 | ␉␉␉␉␉ACPI_TABLE_FADT *fadt_mod = (ACPI_TABLE_FADT *)patch_fadt(FacpPointer,((ACPI_TABLE_DSDT*)FacpPointer->Dsdt),true);␊ |
| 485 | ␉␉␉␉␉if (fadt_mod == (void*)0ul) ␊ |
| 486 | ␉␉␉␉␉{␊ |
| 487 | ␉␉␉␉␉␉printf("Error: Failed to patch (& update) FADT Table, fallback to original fadt pointer\n");␊ |
| 488 | ␉␉␉␉␉␉fadt_mod = FacpPointer;␊ |
| 489 | ␉␉␉␉␉}␊ |
| 490 | ␉␉␉␉␉xsdt_conv->TableOffsetEntry[index] = ((U64)((U32)fadt_mod));␊ |
| 491 | ␉␉␉␉␉␊ |
| 492 | ␉␉␉␉␉continue;␊ |
| 493 | ␉␉␉␉}␊ |
| 494 | ␉␉␉}␊ |
| 495 | ␉␉␉␊ |
| 496 | ␉␉␉xsdt_conv->TableOffsetEntry[index] = ((U64)((U32)table_array[index])); ␊ |
| 497 | }␊ |
| 498 | DBG("XSDT_CONV : Original checksum %d\n", xsdt_conv->Header.Checksum);␊ |
| 499 | SetChecksum(&xsdt_conv->Header);␊ |
| 500 | DBG("New checksum %d\n", xsdt_conv->Header.Checksum);␊ |
| 501 | ␉␊ |
| 502 | return xsdt_conv;␊ |
| 503 | }␊ |
| 504 | ␊ |
| 505 | static void *loadACPITable(char *dirspec, char *filename )␊ |
| 506 | {␉␊ |
| 507 | ␉int fd = -1;␊ |
| 508 | ␉char acpi_file[512];␊ |
| 509 | ␊ |
| 510 | ␉DBG("Searching for %s file ...\n", filename);␊ |
| 511 | ␉// Check booting partition␉␊ |
| 512 | ␉␊ |
| 513 | ␉sprintf(acpi_file, "%s%s",dirspec, filename); ␊ |
| 514 | ␉␊ |
| 515 | ␉fd=open(acpi_file);␊ |
| 516 | ␉␊ |
| 517 | ␉if (fd<0)␊ |
| 518 | ␉{␉␉␉␉␉␉␉␊ |
| 519 | ␉␉DBG("Couldn't open ACPI Table: %s\n", acpi_file);␊ |
| 520 | ␉␉return (void *)0ul ;␉␉␉␉␊ |
| 521 | ␉}␉␉␊ |
| 522 | ␉␊ |
| 523 | ␉void *tableAddr=(void*)malloc(file_size (fd));␊ |
| 524 | ␊ |
| 525 | ␉if (tableAddr)␊ |
| 526 | ␉{␊ |
| 527 | ␉␉if (read (fd, tableAddr, file_size (fd))!=file_size (fd))␊ |
| 528 | ␉␉{␊ |
| 529 | ␉␉␉printf("Couldn't read table %s\n",acpi_file);␊ |
| 530 | ␉␉␉free (tableAddr);␊ |
| 531 | ␉␉␉close (fd);␊ |
| 532 | ␉␉␉return (void *)0ul ;␊ |
| 533 | ␉␉}␊ |
| 534 | ␉␉␊ |
| 535 | ␉␉close (fd);␊ |
| 536 | ␉␉␊ |
| 537 | ␉␉ACPI_TABLE_HEADER * header = (ACPI_TABLE_HEADER *)tableAddr;␊ |
| 538 | ␉␉␊ |
| 539 | ␉␉if (GetChecksum(header, header->Length) == 0)␊ |
| 540 | ␉␉{␊ |
| 541 | ␉␉␉DBG("Found valid AML file : %s", filename);␊ |
| 542 | ␉␉␉DBG(" ( %s ) read and stored at: %x", acpi_file, tableAddr);␊ |
| 543 | ␉␉␉DBG("\n");␊ |
| 544 | ␉␉␉return tableAddr;␊ |
| 545 | ␉␉} ␊ |
| 546 | ␉␉else␊ |
| 547 | ␉␉{␊ |
| 548 | ␉␉␉printf("Warning : Incorrect cheksum for the file : %s,", acpi_file);␊ |
| 549 | ␉␉␉printf("␉␉ this file will be dropped.\n");␊ |
| 550 | ␉␉␉free(tableAddr);␊ |
| 551 | ␉␉␉return (void*)0ul;␊ |
| 552 | ␉␉}␉␉␊ |
| 553 | ␉}␊ |
| 554 | ␉␊ |
| 555 | ␉printf("Couldn't allocate memory for table %s\n", acpi_file);␊ |
| 556 | ␉close (fd);␊ |
| 557 | ␉␊ |
| 558 | ␉return (void *)0ul ;␊ |
| 559 | }␊ |
| 560 | ␊ |
| 561 | static U32 pmbase;␊ |
| 562 | static short cpuNamespace;␊ |
| 563 | PROCESSOR_NUMBER_TO_NAMESEG cpu_map[CPU_MAP_LIMIT];␊ |
| 564 | unsigned int cpu_map_count;␊ |
| 565 | int cpu_map_error;␊ |
| 566 | ␊ |
| 567 | #if DEBUG_ACPI␊ |
| 568 | static void print_nameseg(U32 i)␊ |
| 569 | {␊ |
| 570 | printf("%c%c%c%c",␊ |
| 571 | (int)(i & 0x000000ff),␊ |
| 572 | (int)((i & 0x0000ff00) >> 8),␊ |
| 573 | (int)((i & 0x00ff0000) >> 16),␊ |
| 574 | (int)(i >> 24));␊ |
| 575 | }␊ |
| 576 | #endif␊ |
| 577 | ␊ |
| 578 | static int generate_cpu_map_from_acpi(ACPI_TABLE_DSDT * DsdtPointer)␊ |
| 579 | {␊ |
| 580 | PROCESSOR_NUMBER_TO_NAMESEG *map = cpu_map;␊ |
| 581 | U32 processor_namespace = 0;␊ |
| 582 | U32 cpu;␊ |
| 583 | U8 *current, *end;␊ |
| 584 | ACPI_TABLE_HEADER *header;␊ |
| 585 | struct acpi_namespace ns;␊ |
| 586 | ␉␉␊ |
| 587 | ␉if ((cpu_map_error == 1) || (DsdtPointer == (void*)0ul)) ␊ |
| 588 | ␉␉return 1;␊ |
| 589 | ␉else if (cpu_map_count > 0) ␊ |
| 590 | ␉␉return 0;␊ |
| 591 | ␉␊ |
| 592 | DBG("Attempting to autodetect CPU map from ACPI DSDT; wish me luck\n");␉␊ |
| 593 | ␊ |
| 594 | current = (U8 *) DsdtPointer;␊ |
| 595 | current = decodeTableHeader(current, &header);␊ |
| 596 | end = current - sizeof(*header) + header->Length;␊ |
| 597 | ns.depth = 0;␊ |
| 598 | acpi_processor_count = 0;␊ |
| 599 | ␉//DBG("* DSDT debug start\n");␊ |
| 600 | parse_acpi_termlist(&ns, current, end);␊ |
| 601 | ␉//DBG("* DSDT debug end\n");␊ |
| 602 | ␉␊ |
| 603 | if (acpi_processor_count > CPU_MAP_LIMIT)␊ |
| 604 | ␉{␊ |
| 605 | ␉␉verbose("Too many processors: found %u processors\n", acpi_processor_count);␊ |
| 606 | return (cpu_map_error = 1);␊ |
| 607 | ␉}␊ |
| 608 | if (acpi_processor_count == 0)␊ |
| 609 | ␉{␊ |
| 610 | ␉␉verbose( "Found no processors in ACPI\n");␊ |
| 611 | return (cpu_map_error = 1);␊ |
| 612 | ␉}␊ |
| 613 | for (cpu = 0; cpu < acpi_processor_count; cpu++)␊ |
| 614 | ␉{␊ |
| 615 | U32 nameseg;␊ |
| 616 | if (acpi_processors[cpu].pmbase)␊ |
| 617 | ␉␉{␊ |
| 618 | U32 cpu_pmbase = acpi_processors[cpu].pmbase - 0x10;␊ |
| 619 | if (pmbase && cpu_pmbase != pmbase)␊ |
| 620 | ␉␉␉{␊ |
| 621 | ␉␉␉␉verbose("Found inconsistent pmbase addresses in ACPI: 0x%x and 0x%x\n", pmbase, cpu_pmbase);␊ |
| 622 | ␉␉␉␉return (cpu_map_error = 1);␊ |
| 623 | ␉␉␉}␊ |
| 624 | pmbase = cpu_pmbase;␊ |
| 625 | }␊ |
| 626 | if (acpi_processors[cpu].ns.depth > MAX_SUPPORTED_CPU_NAMESEGS + 1)␊ |
| 627 | ␉␉{␊ |
| 628 | ␉␉␉verbose("Processor path too deep: depth %u\n", acpi_processors[cpu].ns.depth);␊ |
| 629 | ␉␉␉return (cpu_map_error = 1);␊ |
| 630 | ␉␉}␊ |
| 631 | if (processor_namespace && acpi_processors[cpu].ns.nameseg[0] != processor_namespace)␊ |
| 632 | ␉␉{␊ |
| 633 | ␉␉␉verbose("Processor namespaces inconsistent\n");␊ |
| 634 | ␉␉␉return (cpu_map_error = 1);␊ |
| 635 | ␉␉}␊ |
| 636 | processor_namespace = acpi_processors[cpu].ns.nameseg[0];␊ |
| 637 | map->acpi_processor_number = acpi_processors[cpu].id;␊ |
| 638 | map->seg_count = acpi_processors[cpu].ns.depth - 1;␊ |
| 639 | for (nameseg = 0; nameseg < map->seg_count; nameseg++)␊ |
| 640 | map->nameseg[nameseg] = acpi_processors[cpu].ns.nameseg[nameseg + 1];␊ |
| 641 | map++;␊ |
| 642 | }␊ |
| 643 | if (!pmbase)␊ |
| 644 | ␉{␊ |
| 645 | ␉␉verbose("No pmbase found in ACPI\n");␊ |
| 646 | ␉␉return (cpu_map_error = 1);␊ |
| 647 | ␉}␊ |
| 648 | if (processor_namespace == NAMESEG("_PR_"))␊ |
| 649 | cpuNamespace = CPU_NAMESPACE_PR;␊ |
| 650 | else if (processor_namespace == NAMESEG("_SB_"))␊ |
| 651 | cpuNamespace = CPU_NAMESPACE_SB;␊ |
| 652 | else␊ |
| 653 | ␉{␊ |
| 654 | verbose("Found processors in invalid namespace; not _PR_ or _SB_\n");␊ |
| 655 | ␉␉return (cpu_map_error = 1);␊ |
| 656 | ␉}␊ |
| 657 | cpu_map_count = map - cpu_map;␊ |
| 658 | ␉␊ |
| 659 | #if DEBUG_ACPI␊ |
| 660 | ␉verbose("Found %d processors in ACPI, pmbase : 0x%x, cpu_map_count : %d, namespace : ",acpi_processor_count, pmbase, cpu_map_count );␊ |
| 661 | ␉print_nameseg(processor_namespace); ␊ |
| 662 | ␉verbose("\n");␊ |
| 663 | U32 i;␊ |
| 664 | verbose("Found processors name : \n" );␊ |
| 665 | for ( i = 0; i<cpu_map_count; i++)␊ |
| 666 | ␉{␉␉␉␊ |
| 667 | ␉␉U32 nseg = *(U32*)cpu_map[i].nameseg;␊ |
| 668 | print_nameseg(nseg); ␊ |
| 669 | ␉␉verbose(" ");␊ |
| 670 | }␊ |
| 671 | verbose("\n");␊ |
| 672 | #endif␊ |
| 673 | ␉␊ |
| 674 | ␉// TODO: Save the cpu map into the device tree␊ |
| 675 | return (cpu_map_error = 0);␊ |
| 676 | }␊ |
| 677 | ␊ |
| 678 | #if OLD_SSDT␊ |
| 679 | ␊ |
| 680 | static U32 get_needed_symbols (void)␊ |
| 681 | {␉␊ |
| 682 | ␉/* aml_generator symbols */␊ |
| 683 | ␉aml_create_node = (void*)lookup_all_symbols("_aml_create_node");␊ |
| 684 | ␉if (aml_create_node == NULL) goto Failed;␊ |
| 685 | ␉␊ |
| 686 | ␉aml_add_buffer = (void*)lookup_all_symbols("_aml_add_buffer");␊ |
| 687 | ␉if (aml_add_buffer == NULL) goto Failed;␊ |
| 688 | ␉␊ |
| 689 | ␉aml_add_byte = (void*)lookup_all_symbols("_aml_add_byte");␊ |
| 690 | ␉if (aml_add_byte == NULL) goto Failed;␊ |
| 691 | ␉␊ |
| 692 | ␉aml_add_word = (void*)lookup_all_symbols("_aml_add_word");␊ |
| 693 | ␉if (aml_add_word == NULL) goto Failed;␊ |
| 694 | ␉␊ |
| 695 | ␉aml_add_dword = (void*)lookup_all_symbols("_aml_add_dword");␊ |
| 696 | ␉if (aml_add_dword == NULL) goto Failed;␊ |
| 697 | ␉␊ |
| 698 | ␉aml_add_qword = (void*)lookup_all_symbols("_aml_add_qword");␊ |
| 699 | ␉if (aml_add_qword == NULL) goto Failed;␊ |
| 700 | ␉␊ |
| 701 | ␉aml_add_scope = (void*)lookup_all_symbols("_aml_add_scope");␊ |
| 702 | ␉if (aml_add_scope == NULL) goto Failed;␊ |
| 703 | ␉␊ |
| 704 | ␉aml_add_name = (void*)lookup_all_symbols("_aml_add_name");␊ |
| 705 | ␉if (aml_add_name == NULL) goto Failed;␊ |
| 706 | ␉␊ |
| 707 | ␉aml_add_package = (void*)lookup_all_symbols("_aml_add_package");␊ |
| 708 | ␉if (aml_add_package == NULL) goto Failed;␊ |
| 709 | ␉␊ |
| 710 | ␉aml_add_alias = (void*)lookup_all_symbols("_aml_add_alias");␊ |
| 711 | ␉if (aml_add_alias == NULL) goto Failed;␊ |
| 712 | ␉␊ |
| 713 | ␉aml_destroy_node = (void*)lookup_all_symbols("_aml_destroy_node");␊ |
| 714 | ␉if (aml_destroy_node == NULL) goto Failed;␊ |
| 715 | ␉␊ |
| 716 | ␉aml_calculate_size = (void*)lookup_all_symbols("_aml_calculate_size");␉␊ |
| 717 | ␉if (aml_calculate_size == NULL) goto Failed;␊ |
| 718 | ␉␊ |
| 719 | ␉aml_write_node = (void*)lookup_all_symbols("_aml_write_node");␊ |
| 720 | ␉if (aml_write_node == NULL) goto Failed;␊ |
| 721 | ␉␊ |
| 722 | ␉aml_add_to_parent = (void*)lookup_all_symbols("_aml_add_to_parent");␊ |
| 723 | ␉if (aml_add_to_parent == NULL) goto Failed;␊ |
| 724 | ␉␊ |
| 725 | ␉DBG("struct aml_chunk* _aml_create_node: 0x%x\n",(UInt32)aml_create_node);␊ |
| 726 | ␉DBG("struct aml_chunk* _aml_add_buffer: 0x%x\n",(UInt32)aml_add_buffer);␊ |
| 727 | ␉DBG("struct aml_chunk* _aml_add_byte: 0x%x\n",(UInt32)aml_add_byte);␊ |
| 728 | ␉DBG("struct aml_chunk* _aml_add_word: 0x%x\n",(UInt32)aml_add_word);␊ |
| 729 | ␉DBG("struct aml_chunk* _aml_add_dword: 0x%x\n",(UInt32)aml_add_dword);␊ |
| 730 | ␉DBG("struct aml_chunk* _aml_add_qword: 0x%x\n",(UInt32)aml_add_qword);␊ |
| 731 | ␉DBG("struct aml_chunk* _aml_add_scope: 0x%x\n",(UInt32)aml_add_scope);␊ |
| 732 | ␉DBG("struct aml_chunk* _aml_add_name: 0x%x\n",(UInt32)aml_add_name);␊ |
| 733 | ␉DBG("struct aml_chunk* _aml_add_package: 0x%x\n",(UInt32)aml_add_package);␊ |
| 734 | ␉DBG("struct aml_chunk* _aml_add_alias: 0x%x\n",(UInt32)aml_add_alias);␊ |
| 735 | ␉DBG("void _aml_destroy_node: 0x%x\n",(UInt32)aml_destroy_node);␊ |
| 736 | ␉DBG("unsigned int _aml_calculate_size: 0x%x\n",(UInt32)aml_calculate_size);␊ |
| 737 | ␉DBG("unsigned int _aml_write_node: 0x%x\n",(UInt32)aml_write_node);␊ |
| 738 | ␉DBG("bool _aml_add_to_parent: 0x%x\n",(UInt32)aml_add_to_parent);␉␊ |
| 739 | ␉return (1);␊ |
| 740 | Failed:␊ |
| 741 | ␉printf("Failed to find aml_generator symbols, SSDT will not be generated !!!");␊ |
| 742 | ␉return (0);␊ |
| 743 | }␊ |
| 744 | ␊ |
| 745 | static ACPI_TABLE_SSDT *generate_cst_ssdt(ACPI_TABLE_FADT* fadt)␊ |
| 746 | {␉␊ |
| 747 | ␉char ssdt_header[] =␊ |
| 748 | ␉{␊ |
| 749 | ␉␉0x53, 0x53, 0x44, 0x54, 0xE7, 0x00, 0x00, 0x00, /* SSDT.... */␊ |
| 750 | ␉␉0x01, 0x17, 0x50, 0x6D, 0x52, 0x65, 0x66, 0x41, /* ..PmRefA */␊ |
| 751 | ␉␉0x43, 0x70, 0x75, 0x43, 0x73, 0x74, 0x00, 0x00, /* CpuCst.. */␊ |
| 752 | ␉␉0x00, 0x10, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* ....INTL */␊ |
| 753 | ␉␉0x31, 0x03, 0x10, 0x20 ␉␉␉␉␉␉␉/* 1.._␉␉*/␊ |
| 754 | ␉};␊ |
| 755 | ␉␊ |
| 756 | ␉char cstate_resource_template[] = ␊ |
| 757 | ␉{␊ |
| 758 | ␉␉0x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x7F, ␊ |
| 759 | ␉␉0x01, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, ␊ |
| 760 | ␉␉0x00, 0x00, 0x00, 0x79, 0x00␊ |
| 761 | ␉};␊ |
| 762 | ␉␊ |
| 763 | ␉if (Platform->CPU.Vendor != 0x756E6547) {␊ |
| 764 | ␉␉verbose ("Not an Intel platform: C-States will not be generated !!!\n");␊ |
| 765 | ␉␉return (void *)0ul;␊ |
| 766 | ␉}␊ |
| 767 | ␉␊ |
| 768 | ␉if (fadt == (void *)0ul) {␊ |
| 769 | ␉␉verbose ("FACP not exists: C-States will not be generated !!!\n");␊ |
| 770 | ␉␉return (void *)0ul;␊ |
| 771 | ␉}␊ |
| 772 | ␊ |
| 773 | ␉ACPI_TABLE_DSDT* dsdt = ((fadt->Header.Revision >= 3) && (fadt->XDsdt != 0)) ? (ACPI_TABLE_DSDT*)((U32)fadt->XDsdt):(ACPI_TABLE_DSDT*)fadt->Dsdt;␊ |
| 774 | ␉if (dsdt == (void *)0ul) {␊ |
| 775 | ␉␉verbose ("DSDT not found: C-States will not be generated !!!\n");␊ |
| 776 | ␉␉return (void *)0ul;␊ |
| 777 | ␉}␊ |
| 778 | ␉␉␊ |
| 779 | ␉if (generate_cpu_map_from_acpi(dsdt) == 0) ␊ |
| 780 | ␉{␊ |
| 781 | ␉␉bool c2_enabled = fadt->C2Latency < 100;␊ |
| 782 | ␉␉bool c3_enabled = fadt->C3Latency < 1000;␊ |
| 783 | ␉␉bool c4_enabled = false;␊ |
| 784 | ␉␉␊ |
| 785 | ␉␉getBoolForKey(kEnableC4State, &c4_enabled, &bootInfo->bootConfig);␊ |
| 786 | ␊ |
| 787 | ␉␉unsigned char cstates_count = 1 + (c2_enabled ? 1 : 0) + ((c3_enabled || c4_enabled) ? 1 : 0);␊ |
| 788 | ␉␉char *Lat = NULL, *Pw = NULL, *tmpstr =NULL;␊ |
| 789 | ␉␉int base = 16;␊ |
| 790 | ␉␉TagPtr personality = XMLCastDict(XMLGetProperty(bootInfo->bootConfig.dictionary, (const char*)"C-States"));␊ |
| 791 | ␉␉␊ |
| 792 | ␉␉if ((tmpstr = XMLCastString(XMLGetProperty(personality, (const char*)"Base")))) {␊ |
| 793 | ␉␉␉␊ |
| 794 | ␉␉␉int mybase = strtol(tmpstr, NULL, 10);␉␊ |
| 795 | ␉␉␉␊ |
| 796 | ␉␉␉if (mybase == 8 || mybase == 10 || mybase == 16 ) ␊ |
| 797 | ␉␉␉␉base = mybase;␉␉␉␉␉␉␉␉␉␊ |
| 798 | ␉␉}␊ |
| 799 | ␉␉␊ |
| 800 | ␉␉struct aml_chunk* root = aml_create_node(NULL);␊ |
| 801 | aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header␊ |
| 802 | struct aml_chunk* scop;␊ |
| 803 | ␉␉if (cpuNamespace == CPU_NAMESPACE_PR) ␊ |
| 804 | ␉␉␉scop = aml_add_scope(root, "\\_PR_");␊ |
| 805 | ␉␉else if (cpuNamespace == CPU_NAMESPACE_SB) ␊ |
| 806 | ␉␉␉scop = aml_add_scope(root, "\\_SB_");␊ |
| 807 | ␉␉else ␊ |
| 808 | ␉␉{␊ |
| 809 | ␉␉␉aml_destroy_node(root);␉␊ |
| 810 | ␉␉␉goto out;␊ |
| 811 | ␉␉}␊ |
| 812 | struct aml_chunk* name = aml_add_name(scop, "CST_");␊ |
| 813 | struct aml_chunk* pack = aml_add_package(name);␊ |
| 814 | aml_add_byte(pack, cstates_count);␊ |
| 815 | ␉␉␊ |
| 816 | struct aml_chunk* tmpl = aml_add_package(pack);␊ |
| 817 | TagPtr match_Status = XMLGetProperty(personality, (const char*)"C1");␊ |
| 818 | if (match_Status) {␉␊ |
| 819 | Pw = XMLCastString(XMLGetProperty(match_Status, (const char*)"Power"));␊ |
| 820 | Lat = XMLCastString(XMLGetProperty(match_Status, (const char*)"Latency"));␊ |
| 821 | }␊ |
| 822 | cstate_resource_template[11] = 0x00; // C1␊ |
| 823 | aml_add_buffer(tmpl, cstate_resource_template, sizeof(cstate_resource_template));␊ |
| 824 | aml_add_byte(tmpl, 0x01); // C1␊ |
| 825 | aml_add_byte(tmpl, (unsigned char)resolve_cst(0x01, Lat, base)); // Latency␊ |
| 826 | aml_add_word(tmpl, resolve_cst(0x03e8, Pw, base)); // Power␊ |
| 827 | ␉␉// C2␊ |
| 828 | ␉␉if (c2_enabled) ␊ |
| 829 | ␉␉{␊ |
| 830 | ␉␉␉tmpl = aml_add_package(pack);␊ |
| 831 | ␉␉␉Lat = NULL; ␊ |
| 832 | ␉␉␉Pw = NULL;␊ |
| 833 | ␉␉␉match_Status = XMLGetProperty(personality, (const char*)"C2");␊ |
| 834 | ␉␉␉if (match_Status) {␉␊ |
| 835 | ␉␉␉␉Pw = XMLCastString(XMLGetProperty(match_Status, (const char*)"Power"));␊ |
| 836 | ␉␉␉␉Lat = XMLCastString(XMLGetProperty(match_Status, (const char*)"Latency"));␊ |
| 837 | ␉␉␉}␊ |
| 838 | ␉␉␉␊ |
| 839 | ␉␉␉cstate_resource_template[11] = 0x10; // C2␊ |
| 840 | ␉␉␉aml_add_buffer(tmpl, cstate_resource_template, sizeof(cstate_resource_template));␊ |
| 841 | ␉␉␉aml_add_byte(tmpl, 0x02); // C2␉␉␉␉␊ |
| 842 | ␉␉␉aml_add_word(tmpl, resolve_cst(fadt->C2Latency, Lat, base)); // Latency␊ |
| 843 | ␉␉␉aml_add_word(tmpl, resolve_cst(0x01f4, Pw, base)); // Power␊ |
| 844 | ␉␉}␊ |
| 845 | ␉␉␊ |
| 846 | ␉␉// C4␊ |
| 847 | ␉␉if (c4_enabled) ␊ |
| 848 | ␉␉{␊ |
| 849 | ␉␉␉tmpl = aml_add_package(pack);␊ |
| 850 | ␉␉␉Lat = NULL; ␊ |
| 851 | ␉␉␉Pw = NULL;␊ |
| 852 | ␉␉␉match_Status = XMLGetProperty(personality, (const char*)"C4"); ␊ |
| 853 | ␉␉␉if (match_Status) {␉␊ |
| 854 | ␉␉␉␉Pw = XMLCastString(XMLGetProperty(match_Status, (const char*)"Power"));␊ |
| 855 | ␉␉␉␉Lat = XMLCastString(XMLGetProperty(match_Status, (const char*)"Latency"));␊ |
| 856 | ␉␉␉}␊ |
| 857 | ␉␉␉cstate_resource_template[11] = 0x30; // C4␊ |
| 858 | ␉␉␉aml_add_buffer(tmpl, cstate_resource_template, sizeof(cstate_resource_template));␊ |
| 859 | ␉␉␉aml_add_byte(tmpl, 0x04); // C4␉␊ |
| 860 | ␉␉␉aml_add_word(tmpl, resolve_cst(fadt->C3Latency / 2, Lat, base)); // TODO: right latency for C4␊ |
| 861 | ␉␉␉aml_add_word(tmpl, resolve_cst(0xfa, Pw, base)); // Power␊ |
| 862 | ␉␉␉␊ |
| 863 | ␉␉␉// you can check if the C4 state is correctly activated or not with the following command Lines (you will need the 'lspci for mac' package): ␊ |
| 864 | ␉␉␉␊ |
| 865 | ␉␉␉// according to the intel ich10 dataheet ( Power Management PCI Configuration Registers (PM—D31:F0) ):␊ |
| 866 | ␉␉␉// setpci -s 0:1f.0 0xa0.w (must return an hex where bit 12 is 0 and bit 7 is 1, usually 06a0h )␊ |
| 867 | ␉␉␉// setpci -s 0:1f.0 0xa6.b (must return an hex where bit 7 is 1, usually 80h )␊ |
| 868 | ␉␉␉␊ |
| 869 | ␉␉␉␊ |
| 870 | ␉␉}␉␉␊ |
| 871 | ␉␉// C3␊ |
| 872 | ␉␉else if (c3_enabled) ␊ |
| 873 | ␉␉{␊ |
| 874 | ␉␉␉tmpl = aml_add_package(pack);␊ |
| 875 | ␉␉␉Lat = NULL; ␊ |
| 876 | ␉␉␉Pw = NULL;␊ |
| 877 | ␉␉␉match_Status = XMLGetProperty(personality, (const char*)"C3"); ␊ |
| 878 | ␉␉␉if (match_Status) {␉␊ |
| 879 | ␉␉␉␉Pw = XMLCastString(XMLGetProperty(match_Status, (const char*)"Power"));␊ |
| 880 | ␉␉␉␉Lat = XMLCastString(XMLGetProperty(match_Status, (const char*)"Latency"));␊ |
| 881 | ␉␉␉}␊ |
| 882 | ␉␉␉cstate_resource_template[11] = 0x20; // C3␊ |
| 883 | ␉␉␉aml_add_buffer(tmpl, cstate_resource_template, sizeof(cstate_resource_template));␊ |
| 884 | ␉␉␉aml_add_byte(tmpl, 0x03); // C3␉␉␉␉␊ |
| 885 | ␉␉␉aml_add_word(tmpl, resolve_cst(fadt->C3Latency , Lat, base)); ␊ |
| 886 | ␉␉␉aml_add_word(tmpl, resolve_cst(0x015e, Pw, base)); // Power␊ |
| 887 | ␉␉␉␊ |
| 888 | ␉␉}␊ |
| 889 | ␉␉ ␊ |
| 890 | // Aliaces␊ |
| 891 | unsigned int i;␊ |
| 892 | for (i = 0; i < cpu_map_count; i++) ␊ |
| 893 | {␊ |
| 894 | char name[9];␊ |
| 895 | U32 nseg = *(U32*)cpu_map[i].nameseg;␊ |
| 896 | if (cpuNamespace == CPU_NAMESPACE_PR) {␊ |
| 897 | sprintf(name, "_PR_%c%c%c%c",␊ |
| 898 | (int)(nseg & 0x000000ff),␊ |
| 899 | (int)((nseg & 0x0000ff00) >> 8),␊ |
| 900 | (int)((nseg & 0x00ff0000) >> 16),␊ |
| 901 | (int)(nseg >> 24));␊ |
| 902 | } else if (cpuNamespace == CPU_NAMESPACE_SB) {␊ |
| 903 | sprintf(name, "_SB_%c%c%c%c",␊ |
| 904 | (int)(nseg & 0x000000ff),␊ |
| 905 | (int)((nseg & 0x0000ff00) >> 8),␊ |
| 906 | (int)((nseg & 0x00ff0000) >> 16),␊ |
| 907 | (int)(nseg >> 24));␊ |
| 908 | } else {␊ |
| 909 | aml_destroy_node(root);␉␊ |
| 910 | goto out;␊ |
| 911 | }␊ |
| 912 | ␊ |
| 913 | scop = aml_add_scope(root, name);␊ |
| 914 | aml_add_alias(scop, "CST_", "_CST");␊ |
| 915 | }␊ |
| 916 | ␉␉␊ |
| 917 | ␉␉aml_calculate_size(root);␊ |
| 918 | ␉␉␊ |
| 919 | ␉␉ACPI_TABLE_SSDT *ssdt = (ACPI_TABLE_SSDT *)AllocateKernelMemory(root->Size);␊ |
| 920 | ␊ |
| 921 | ␉␉aml_write_node(root, (void*)ssdt, 0);␊ |
| 922 | ␉␉␊ |
| 923 | ␉␉ssdt->Header.Length = root->Size; ␊ |
| 924 | ␉␉␊ |
| 925 | ␉␉SetChecksum(&ssdt->Header);␊ |
| 926 | ␊ |
| 927 | ␉␉aml_destroy_node(root);␉␉␊ |
| 928 | ␊ |
| 929 | ␉␉verbose ("SSDT with CPU C-States generated successfully\n");␊ |
| 930 | ␉␉␊ |
| 931 | ␉␉return ssdt;␊ |
| 932 | ␉}␊ |
| 933 | ␉else ␊ |
| 934 | ␉{␊ |
| 935 | out:␊ |
| 936 | ␉␉verbose ("ACPI CPUs not found: C-States will not be generated !!!\n");␊ |
| 937 | ␉}␊ |
| 938 | ␊ |
| 939 | ␉return (void *)0ul;␊ |
| 940 | }␊ |
| 941 | ␊ |
| 942 | static ACPI_TABLE_SSDT *generate_pss_ssdt(ACPI_TABLE_DSDT* dsdt)␊ |
| 943 | {␉␉␊ |
| 944 | ␉␊ |
| 945 | ␉char ssdt_header[] =␊ |
| 946 | ␉{␊ |
| 947 | ␉␉0x53, 0x53, 0x44, 0x54, 0x7E, 0x00, 0x00, 0x00, /* SSDT.... */␊ |
| 948 | ␉␉0x01, 0x6A, 0x50, 0x6D, 0x52, 0x65, 0x66, 0x00, /* ..PmRef. */␊ |
| 949 | ␉␉0x43, 0x70, 0x75, 0x50, 0x6D, 0x00, 0x00, 0x00, /* CpuPm... */␊ |
| 950 | ␉␉0x00, 0x30, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* .0..INTL */␊ |
| 951 | ␉␉0x31, 0x03, 0x10, 0x20,␉␉␉␉␉␉␉/* 1.._␉␉*/␊ |
| 952 | ␉};␊ |
| 953 | ␊ |
| 954 | ␉if (Platform->CPU.Vendor != 0x756E6547) {␊ |
| 955 | ␉␉verbose ("Not an Intel platform: P-States will not be generated !!!\n");␊ |
| 956 | ␉␉return (void *)0ul;␊ |
| 957 | ␉}␊ |
| 958 | ␉␊ |
| 959 | ␉if (!(Platform->CPU.Features & CPUID_FEATURE_MSR)) {␊ |
| 960 | ␉␉verbose ("Unsupported CPU: P-States will not be generated !!!\n");␊ |
| 961 | ␉␉return (void *)0ul;␊ |
| 962 | ␉}␊ |
| 963 | ␉␊ |
| 964 | ␉if (dsdt == (void *)0ul) {␊ |
| 965 | ␉␉verbose ("DSDT not found: P-States will not be generated !!!\n");␊ |
| 966 | ␉␉return (void *)0ul;␊ |
| 967 | ␉}␊ |
| 968 | ␉␉ ␊ |
| 969 | ␉if (generate_cpu_map_from_acpi(dsdt) == 0 ) ␊ |
| 970 | ␉{␊ |
| 971 | ␉␉struct p_state /*initial,*/ maximum, minimum, p_states[32];␊ |
| 972 | ␉␉U8 p_states_count = 0;␉␉␊ |
| 973 | ␉␉␊ |
| 974 | ␉␉// Retrieving P-States, ported from code by superhai (c)␊ |
| 975 | ␉␉switch (Platform->CPU.Family) {␊ |
| 976 | ␉␉␉case 0x06: ␊ |
| 977 | ␉␉␉{␊ |
| 978 | ␉␉␉␉switch (Platform->CPU.Model) ␊ |
| 979 | ␉␉␉␉{␊ |
| 980 | ␉␉␉␉␉case CPUID_MODEL_DOTHAN: ␊ |
| 981 | ␉␉␉␉␉case CPUID_MODEL_YONAH: // Yonah␊ |
| 982 | ␉␉␉␉␉case CPUID_MODEL_MEROM: // Merom␊ |
| 983 | ␉␉␉␉␉case CPUID_MODEL_PENRYN: // Penryn␊ |
| 984 | ␉␉␉␉␉case CPUID_MODEL_ATOM: // Intel Atom (45nm)␊ |
| 985 | ␉␉␉␉␉{␊ |
| 986 | ␉␉␉␉␉␉bool cpu_dynamic_fsb = false;␊ |
| 987 | ␉␉␉␉␉␉␊ |
| 988 | ␉␉␉␉␉␉if (rdmsr64(MSR_IA32_EXT_CONFIG) & (1 << 27)) ␊ |
| 989 | ␉␉␉␉␉␉{␊ |
| 990 | ␉␉␉␉␉␉␉wrmsr64(MSR_IA32_EXT_CONFIG, (rdmsr64(MSR_IA32_EXT_CONFIG) | (1 << 28))); ␊ |
| 991 | ␉␉␉␉␉␉␉delay(1);␊ |
| 992 | ␉␉␉␉␉␉␉cpu_dynamic_fsb = rdmsr64(MSR_IA32_EXT_CONFIG) & (1 << 28);␊ |
| 993 | ␉␉␉␉␉␉}␊ |
| 994 | ␉␉␉␉␉␉␊ |
| 995 | ␉␉␉␉␉␉bool cpu_noninteger_bus_ratio = (rdmsr64(MSR_IA32_PERF_STATUS) & (1ULL << 46));␊ |
| 996 | ␉␉␉␉␉␉␊ |
| 997 | ␉␉␉␉␉␉//initial.Control = rdmsr64(MSR_IA32_PERF_STATUS);␊ |
| 998 | ␉␉␉␉␉␉␊ |
| 999 | ␉␉␉␉␉␉maximum.Control = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 32) & 0x1F3F) | (0x4000 * cpu_noninteger_bus_ratio);␊ |
| 1000 | ␉␉␉␉␉␉maximum.CID = ((maximum.FID & 0x1F) << 1) | cpu_noninteger_bus_ratio;␊ |
| 1001 | ␉␉␉␉␉␉␊ |
| 1002 | ␉␉␉␉␉␉minimum.FID = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 24) & 0x1F) | (0x80 * cpu_dynamic_fsb);␊ |
| 1003 | ␉␉␉␉␉␉minimum.VID = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 48) & 0x3F);␊ |
| 1004 | ␉␉␉␉␉␉␊ |
| 1005 | ␉␉␉␉␉␉if (minimum.FID == 0) ␊ |
| 1006 | ␉␉␉␉␉␉{␊ |
| 1007 | ␉␉␉␉␉␉␉U64 msr;␊ |
| 1008 | ␉␉␉␉␉␉␉U8 i;␊ |
| 1009 | ␉␉␉␉␉␉␉// Probe for lowest fid␊ |
| 1010 | ␉␉␉␉␉␉␉for (i = maximum.FID; i >= 0x6; i--) ␊ |
| 1011 | ␉␉␉␉␉␉␉{␊ |
| 1012 | ␉␉␉␉␉␉␉␉msr = rdmsr64(MSR_IA32_PERF_CONTROL);␊ |
| 1013 | ␉␉␉␉␉␉␉␉wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (i << 8) | minimum.VID);␊ |
| 1014 | ␉␉␉␉␉␉␉␉intel_waitforsts();␊ |
| 1015 | ␉␉␉␉␉␉␉␉minimum.FID = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0x1F; ␊ |
| 1016 | ␉␉␉␉␉␉␉␉delay(1);␊ |
| 1017 | ␉␉␉␉␉␉␉}␊ |
| 1018 | ␉␉␉␉␉␉␉␊ |
| 1019 | ␉␉␉␉␉␉␉msr = rdmsr64(MSR_IA32_PERF_CONTROL);␊ |
| 1020 | ␉␉␉␉␉␉␉wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (maximum.FID << 8) | maximum.VID);␊ |
| 1021 | ␉␉␉␉␉␉␉intel_waitforsts();␊ |
| 1022 | ␉␉␉␉␉␉}␊ |
| 1023 | ␉␉␉␉␉␉␊ |
| 1024 | ␉␉␉␉␉␉if (minimum.VID == maximum.VID) ␊ |
| 1025 | ␉␉␉␉␉␉{␉␊ |
| 1026 | ␉␉␉␉␉␉␉U64 msr;␊ |
| 1027 | ␉␉␉␉␉␉␉U8 i;␊ |
| 1028 | ␉␉␉␉␉␉␉// Probe for lowest vid␊ |
| 1029 | ␉␉␉␉␉␉␉for (i = maximum.VID; i > 0xA; i--) ␊ |
| 1030 | ␉␉␉␉␉␉␉{␊ |
| 1031 | ␉␉␉␉␉␉␉␉msr = rdmsr64(MSR_IA32_PERF_CONTROL);␊ |
| 1032 | ␉␉␉␉␉␉␉␉wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (minimum.FID << 8) | i);␊ |
| 1033 | ␉␉␉␉␉␉␉␉intel_waitforsts();␊ |
| 1034 | ␉␉␉␉␉␉␉␉minimum.VID = rdmsr64(MSR_IA32_PERF_STATUS) & 0x3F; ␊ |
| 1035 | ␉␉␉␉␉␉␉␉delay(1);␊ |
| 1036 | ␉␉␉␉␉␉␉}␊ |
| 1037 | ␉␉␉␉␉␉␉␊ |
| 1038 | ␉␉␉␉␉␉␉msr = rdmsr64(MSR_IA32_PERF_CONTROL);␊ |
| 1039 | ␉␉␉␉␉␉␉wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (maximum.FID << 8) | maximum.VID);␊ |
| 1040 | ␉␉␉␉␉␉␉intel_waitforsts();␊ |
| 1041 | ␉␉␉␉␉␉}␊ |
| 1042 | ␉␉␉␉␉␉␊ |
| 1043 | ␉␉␉␉␉␉minimum.CID = ((minimum.FID & 0x1F) << 1) >> cpu_dynamic_fsb;␊ |
| 1044 | ␉␉␉␉␉␉␊ |
| 1045 | ␉␉␉␉␉␉// Sanity check␊ |
| 1046 | ␉␉␉␉␉␉if (maximum.CID < minimum.CID) ␊ |
| 1047 | ␉␉␉␉␉␉{␊ |
| 1048 | ␉␉␉␉␉␉␉DBG("Insane FID values!");␊ |
| 1049 | ␉␉␉␉␉␉␉p_states_count = 0;␊ |
| 1050 | ␉␉␉␉␉␉}␊ |
| 1051 | ␉␉␉␉␉␉else␊ |
| 1052 | ␉␉␉␉␉␉{␊ |
| 1053 | ␉␉␉␉␉␉␉// Finalize P-States␊ |
| 1054 | ␉␉␉␉␉␉␉// Find how many P-States machine supports␊ |
| 1055 | ␉␉␉␉␉␉␉p_states_count = maximum.CID - minimum.CID + 1;␊ |
| 1056 | ␉␉␉␉␉␉␉␊ |
| 1057 | ␉␉␉␉␉␉␉if (p_states_count > 32) // MAX_PSTATES ??␊ |
| 1058 | ␉␉␉␉␉␉␉␉p_states_count = 32; // MAX_PSTATES ??␊ |
| 1059 | ␉␉␉␉␉␉␉␊ |
| 1060 | ␉␉␉␉␉␉␉U8 vidstep;␊ |
| 1061 | ␉␉␉␉␉␉␉U8 i = 0, u, invalid = 0;␊ |
| 1062 | ␉␉␉␉␉␉␉␊ |
| 1063 | ␉␉␉␉␉␉␉vidstep = ((maximum.VID << 2) - (minimum.VID << 2)) / (p_states_count - 1);␊ |
| 1064 | ␉␉␉␉␉␉␉␊ |
| 1065 | ␉␉␉␉␉␉␉for (u = 0; u < p_states_count; u++) ␊ |
| 1066 | ␉␉␉␉␉␉␉{␊ |
| 1067 | ␉␉␉␉␉␉␉␉i = u - invalid;␊ |
| 1068 | ␉␉␉␉␉␉␉␉␊ |
| 1069 | ␉␉␉␉␉␉␉␉p_states[i].CID = maximum.CID - u;␊ |
| 1070 | ␉␉␉␉␉␉␉␉p_states[i].FID = (p_states[i].CID >> 1);␊ |
| 1071 | ␉␉␉␉␉␉␉␉␊ |
| 1072 | ␉␉␉␉␉␉␉␉if (p_states[i].FID < 0x6) ␊ |
| 1073 | ␉␉␉␉␉␉␉␉{␊ |
| 1074 | ␉␉␉␉␉␉␉␉␉if (cpu_dynamic_fsb) ␊ |
| 1075 | ␉␉␉␉␉␉␉␉␉␉p_states[i].FID = (p_states[i].FID << 1) | 0x80;␊ |
| 1076 | ␉␉␉␉␉␉␉␉} ␊ |
| 1077 | ␉␉␉␉␉␉␉␉else if (cpu_noninteger_bus_ratio) ␊ |
| 1078 | ␉␉␉␉␉␉␉␉{␊ |
| 1079 | ␉␉␉␉␉␉␉␉␉p_states[i].FID = p_states[i].FID | (0x40 * (p_states[i].CID & 0x1));␊ |
| 1080 | ␉␉␉␉␉␉␉␉}␊ |
| 1081 | ␉␉␉␉␉␉␉␉␊ |
| 1082 | ␉␉␉␉␉␉␉␉if (i && p_states[i].FID == p_states[i-1].FID)␊ |
| 1083 | ␉␉␉␉␉␉␉␉␉invalid++;␊ |
| 1084 | ␉␉␉␉␉␉␉␉␊ |
| 1085 | ␉␉␉␉␉␉␉␉p_states[i].VID = ((maximum.VID << 2) - (vidstep * u)) >> 2;␊ |
| 1086 | ␉␉␉␉␉␉␉␉␊ |
| 1087 | ␉␉␉␉␉␉␉␉U32 multiplier = p_states[i].FID & 0x1f;␉␉// = 0x08␊ |
| 1088 | ␉␉␉␉␉␉␉␉bool half = p_states[i].FID & 0x40;␉␉␉␉␉// = 0x01␊ |
| 1089 | ␉␉␉␉␉␉␉␉bool dfsb = p_states[i].FID & 0x80;␉␉␉␉␉// = 0x00␊ |
| 1090 | ␉␉␉␉␉␉␉␉U32 fsb = Platform->CPU.FSBFrequency / 1000000; // = 400␊ |
| 1091 | ␉␉␉␉␉␉␉␉U32 halffsb = (fsb + 1) >> 1;␉␉␉␉␉// = 200␊ |
| 1092 | ␉␉␉␉␉␉␉␉U32 frequency = (multiplier * fsb);␉␉␉// = 3200␊ |
| 1093 | ␉␉␉␉␉␉␉␉␊ |
| 1094 | ␉␉␉␉␉␉␉␉p_states[i].Frequency = (frequency + (half * halffsb)) >> dfsb;␉// = 3200 + 200 = 3400␊ |
| 1095 | ␉␉␉␉␉␉␉}␊ |
| 1096 | ␉␉␉␉␉␉␉␊ |
| 1097 | ␉␉␉␉␉␉␉p_states_count -= invalid;␊ |
| 1098 | ␉␉␉␉␉␉}␊ |
| 1099 | ␉␉␉␉␉␉break;␊ |
| 1100 | ␉␉␉␉␉} ␊ |
| 1101 | ␉␉␉␉␉case CPUID_MODEL_FIELDS:␊ |
| 1102 | ␉␉␉␉␉case CPUID_MODEL_DALES:␊ |
| 1103 | ␉␉␉␉␉case CPUID_MODEL_DALES_32NM:␊ |
| 1104 | ␉␉␉␉␉case CPUID_MODEL_NEHALEM: ␊ |
| 1105 | ␉␉␉␉␉case CPUID_MODEL_NEHALEM_EX:␊ |
| 1106 | ␉␉␉␉␉case CPUID_MODEL_WESTMERE:␊ |
| 1107 | ␉␉␉␉␉case CPUID_MODEL_WESTMERE_EX:␊ |
| 1108 | ␉␉␉␉␉case CPUID_MODEL_SANDYBRIDGE:␊ |
| 1109 | case CPUID_MODEL_JAKETOWN:␊ |
| 1110 | ␉␉␉␉␉{␉␉␊ |
| 1111 | ␉␉␉␉␉␉maximum.Control = rdmsr64(MSR_IA32_PERF_STATUS) & 0xff; // Seems it always contains maximum multiplier value (with turbo, that's we need)...␊ |
| 1112 | ␉␉␉␉␉␉minimum.Control = (rdmsr64(MSR_PLATFORM_INFO) >> 40) & 0xff;␊ |
| 1113 | ␉␉␉␉␉␉␊ |
| 1114 | ␉␉␉␉␉␉verbose("P-States: min 0x%x, max 0x%x\n", minimum.Control, maximum.Control);␊ |
| 1115 | ␉␉␉␉␉␉␊ |
| 1116 | ␉␉␉␉␉␉// Sanity check␊ |
| 1117 | ␉␉␉␉␉␉if (maximum.Control < minimum.Control) ␊ |
| 1118 | ␉␉␉␉␉␉{␊ |
| 1119 | ␉␉␉␉␉␉␉DBG("Insane control values!");␊ |
| 1120 | ␉␉␉␉␉␉␉p_states_count = 0;␊ |
| 1121 | ␉␉␉␉␉␉}␊ |
| 1122 | ␉␉␉␉␉␉else␊ |
| 1123 | ␉␉␉␉␉␉{␊ |
| 1124 | ␉␉␉␉␉␉␉U8 i;␊ |
| 1125 | ␉␉␉␉␉␉␉p_states_count = 0;␊ |
| 1126 | ␉␉␉␉␉␉␉␊ |
| 1127 | ␉␉␉␉␉␉␉for (i = maximum.Control; i >= minimum.Control; i--) ␊ |
| 1128 | ␉␉␉␉␉␉␉{␊ |
| 1129 | ␉␉␉␉␉␉␉␉p_states[p_states_count].Control = i;␊ |
| 1130 | ␉␉␉␉␉␉␉␉p_states[p_states_count].CID = p_states[p_states_count].Control << 1;␊ |
| 1131 | ␉␉␉␉␉␉␉␉p_states[p_states_count].Frequency = (Platform->CPU.FSBFrequency / 1000000) * i;␊ |
| 1132 | ␉␉␉␉␉␉␉␉p_states_count++;␊ |
| 1133 | ␉␉␉␉␉␉␉␉if (p_states_count >= 32) {␊ |
| 1134 | ␉␉␉␉␉␉␉␉␉␊ |
| 1135 | ␉␉␉␉␉␉␉␉␉if (p_states_count > 32) // MAX_PSTATES ??␊ |
| 1136 | ␉␉␉␉␉␉␉␉␉␉p_states_count = 32; // MAX_PSTATES ??␊ |
| 1137 | ␉␉␉␉␉␉␉␉␉␊ |
| 1138 | ␉␉␉␉␉␉␉␉␉break;␊ |
| 1139 | ␉␉␉␉␉␉␉␉}␊ |
| 1140 | ␉␉␉␉␉␉␉}␊ |
| 1141 | ␉␉␉␉␉␉}␊ |
| 1142 | ␉␉␉␉␉␉␊ |
| 1143 | ␉␉␉␉␉␉break;␊ |
| 1144 | ␉␉␉␉␉}␊ |
| 1145 | ␉␉␉␉␉default:␊ |
| 1146 | ␉␉␉␉␉␉verbose ("Unsupported CPU: P-States will not be generated !!!\n");␊ |
| 1147 | ␉␉␉␉␉␉break;␊ |
| 1148 | ␉␉␉␉}␊ |
| 1149 | ␉␉␉}␊ |
| 1150 | ␉␉␉default:␊ |
| 1151 | ␉␉␉␉break;␊ |
| 1152 | ␉␉}␊ |
| 1153 | ␉␉␊ |
| 1154 | ␉␉// Generating SSDT␊ |
| 1155 | ␉␉if (p_states_count) ␊ |
| 1156 | ␉␉{␉␊ |
| 1157 | ␉␉␉unsigned int i;␊ |
| 1158 | ␉␉␉␊ |
| 1159 | ␉␉␉struct aml_chunk* root = aml_create_node(NULL);␊ |
| 1160 | aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header␊ |
| 1161 | ␉␉␉struct aml_chunk* scop;␊ |
| 1162 | ␉␉␉if (cpuNamespace == CPU_NAMESPACE_PR) ␊ |
| 1163 | ␉␉␉␉␉scop = aml_add_scope(root, "\\_PR_");␊ |
| 1164 | ␉␉␉else if (cpuNamespace == CPU_NAMESPACE_SB) ␊ |
| 1165 | ␉␉␉␉␉scop = aml_add_scope(root, "\\_SB_");␊ |
| 1166 | else ␊ |
| 1167 | ␉␉␉{␊ |
| 1168 | aml_destroy_node(root);␉␊ |
| 1169 | goto out;␊ |
| 1170 | }␉␉␉␉␊ |
| 1171 | struct aml_chunk* name = aml_add_name(scop, "PSS_");␊ |
| 1172 | struct aml_chunk* pack = aml_add_package(name);␊ |
| 1173 | ␉␉␉␊ |
| 1174 | U8 minPSratio = (p_states[p_states_count-1].Frequency / (Platform->CPU.FSBFrequency / 10000000 ));␊ |
| 1175 | U8 maxPSratio = (p_states[0].Frequency / (Platform->CPU.FSBFrequency / 10000000 ));␊ |
| 1176 | ␊ |
| 1177 | U8 cpu_div = Platform->CPU.CurrDiv;␊ |
| 1178 | U8 cpu_ratio = 0;␊ |
| 1179 | ␉␉␉␊ |
| 1180 | if (cpu_div) ␉␉␉␉␉␉␉␉␊ |
| 1181 | cpu_ratio = (Platform->CPU.CurrCoef * 10) + 5;␉␉␉␉␉␉␉␉␊ |
| 1182 | else ␉␉␉␉␉␉␉␉␊ |
| 1183 | cpu_ratio = Platform->CPU.CurrCoef * 10;␊ |
| 1184 | ␊ |
| 1185 | ␉␉␉␊ |
| 1186 | int user_max_ratio = 0;␊ |
| 1187 | getIntForKey(kMaxRatio, &user_max_ratio, &bootInfo->bootConfig);␊ |
| 1188 | if (user_max_ratio >= minPSratio && maxPSratio >= user_max_ratio) {␉␉␉␉␉␉␉␉␉␊ |
| 1189 | ␉␉␉␉␊ |
| 1190 | U8 maxcurrdiv = 0, maxcurrcoef = (int)(user_max_ratio / 10);␉␉␉␉␉␉␉␉␉␊ |
| 1191 | ␉␉␉␉␊ |
| 1192 | U8 maxdiv = user_max_ratio - (maxcurrcoef * 10);␊ |
| 1193 | if (maxdiv > 0)␊ |
| 1194 | maxcurrdiv = 1;␊ |
| 1195 | ␉␉␉␉␊ |
| 1196 | if (maxcurrdiv) ␉␉␉␉␉␉␉␉␉␊ |
| 1197 | cpu_ratio = (maxcurrcoef * 10) + 5;␉␉␉␉␉␉␉␉␉␊ |
| 1198 | else ␉␉␉␉␉␉␉␉␉␊ |
| 1199 | cpu_ratio = maxcurrcoef * 10;␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␊ |
| 1200 | }␊ |
| 1201 | ␉␉␉␊ |
| 1202 | int user_min_ratio = 0;␊ |
| 1203 | getIntForKey(kMinRatio, &user_min_ratio, &bootInfo->bootConfig);␊ |
| 1204 | if (user_min_ratio >= minPSratio && cpu_ratio >= user_min_ratio) {␊ |
| 1205 | ␉␉␉␉␊ |
| 1206 | U8 mincurrdiv = 0, mincurrcoef = (int)(user_min_ratio / 10);␉␉␉␉␉␉␉␉␉␊ |
| 1207 | ␉␉␉␉␊ |
| 1208 | U8 mindiv = user_min_ratio - (mincurrcoef * 10);␊ |
| 1209 | ␉␉␉␉␊ |
| 1210 | if (mindiv > 0)␊ |
| 1211 | mincurrdiv = 1;␉␉␉␉␉␉␉␉␉␊ |
| 1212 | ␉␉␉␉␊ |
| 1213 | if (mincurrdiv) ␉␉␉␉␉␉␉␉␉␊ |
| 1214 | minPSratio = (mincurrcoef * 10) + 5;␉␉␉␉␉␉␉␉␉␊ |
| 1215 | else ␉␉␉␉␉␉␉␉␉␊ |
| 1216 | minPSratio = mincurrcoef * 10;␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␊ |
| 1217 | ␉␉␉␉␊ |
| 1218 | }␊ |
| 1219 | ␉␉␉␊ |
| 1220 | if (maxPSratio >= cpu_ratio && cpu_ratio >= minPSratio)␉maxPSratio = cpu_ratio;␉␉␉␉␉␉␉␉␉␉␉␉␉␊ |
| 1221 | ␉␉␉␊ |
| 1222 | TagPtr personality = XMLCastDict(XMLGetProperty(bootInfo->bootConfig.dictionary, (const char*)"P-States"));␊ |
| 1223 | char* MatchStat = 0;␊ |
| 1224 | int dropPSS = 0, Pstatus = 0, base = 16;␉␉␉␉␉␉␉␉␊ |
| 1225 | int expert = 0;/* Default: 0 , mean mixed mode | expert mode : 1 , mean add only p-states found in boot.plist*/␊ |
| 1226 | char *tmpstr = XMLCastString(XMLGetProperty(personality, (const char*)"Mode"));␊ |
| 1227 | ␊ |
| 1228 | if (strcmp(tmpstr,"Expert") == 0) {␊ |
| 1229 | p_states_count = XMLTagCount(personality) - 1 ; // - 1 = - ("Mode" tag) ␉␉␉␉␉␉␉␉␉␉␊ |
| 1230 | expert = 1;␊ |
| 1231 | }␊ |
| 1232 | ␉␉␉␊ |
| 1233 | ␊ |
| 1234 | if ((tmpstr = XMLCastString(XMLGetProperty(personality, (const char*)"Base")))) {␊ |
| 1235 | ␊ |
| 1236 | if (expert) p_states_count--; // -= ("Base" tag) ␊ |
| 1237 | ␊ |
| 1238 | int mybase = strtol(tmpstr, NULL, 10);␉␊ |
| 1239 | ␊ |
| 1240 | if (mybase == 8 || mybase == 10 || mybase == 16 )␊ |
| 1241 | base = mybase;␉␉␉␉␉␉␉␉␉␊ |
| 1242 | }␊ |
| 1243 | ␉␉␉␊ |
| 1244 | for (i = 0; i < p_states_count; i++) ␊ |
| 1245 | {␉␉␉␉␉␉␉␉␉␊ |
| 1246 | sprintf(MatchStat, "%d",i);␊ |
| 1247 | TagPtr match_Status = XMLGetProperty(personality, (const char*)MatchStat); ␉␉␉␉␉␉␉␉ ␊ |
| 1248 | ␊ |
| 1249 | char *Lat1 = NULL, *clk = NULL, *Pw = NULL, *Lat2 = NULL, *Ctrl = NULL ;␊ |
| 1250 | ␊ |
| 1251 | if (match_Status) {␉␉␉␉␉␉␉␉␉␉␉␉␊ |
| 1252 | ␊ |
| 1253 | clk = XMLCastString(XMLGetProperty(match_Status, (const char*)"CoreFreq"));␊ |
| 1254 | Pw = XMLCastString(XMLGetProperty(match_Status, (const char*)"Power"));␊ |
| 1255 | Lat1 = XMLCastString(XMLGetProperty(match_Status, (const char*)"Transition Latency"));␊ |
| 1256 | Lat2 = XMLCastString(XMLGetProperty(match_Status, (const char*)"Bus Master Latency"));␊ |
| 1257 | Ctrl = XMLCastString(XMLGetProperty(match_Status, (const char*)"Control"));␊ |
| 1258 | ␊ |
| 1259 | ␊ |
| 1260 | } else if (expert) ␊ |
| 1261 | continue;␊ |
| 1262 | ␊ |
| 1263 | ␊ |
| 1264 | unsigned long Frequency = 0x00000000;␊ |
| 1265 | ␊ |
| 1266 | if (!expert) Frequency = p_states[i].Frequency;␊ |
| 1267 | ␊ |
| 1268 | if (clk) ␊ |
| 1269 | Frequency = strtoul((const char *)clk, NULL,base);␊ |
| 1270 | ␊ |
| 1271 | if (!Frequency || Frequency > p_states[0].Frequency ) continue;␊ |
| 1272 | ␊ |
| 1273 | U8 curr_ratio = (Frequency / (Platform->CPU.FSBFrequency / 10000000 ));␊ |
| 1274 | ␊ |
| 1275 | if (curr_ratio > maxPSratio || minPSratio > curr_ratio)␊ |
| 1276 | goto dropPstate;␊ |
| 1277 | ␊ |
| 1278 | struct aml_chunk* pstt = aml_add_package(pack);␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␊ |
| 1279 | aml_add_dword(pstt, Frequency); // CoreFreq (in MHz).␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␊ |
| 1280 | aml_add_dword(pstt, resolve_pss(0x00000000, Pw, base)); // Power (in milliWatts)␉␉␉␉␉␉␉␉␉␊ |
| 1281 | aml_add_dword(pstt, resolve_pss(0x0000000A, Lat1, base)); // Transition Latency (in microseconds).␉␉␉␉␉␉␉␉␉␊ |
| 1282 | aml_add_dword(pstt, resolve_pss(0x0000000A, Lat2, base)); // Bus Master Latency (in microseconds).␉␉␉␉␉␉␉␉␉␊ |
| 1283 | unsigned long Control = 0x00000000;␊ |
| 1284 | if (!expert) Control = p_states[i].Control;␉␉␉␉␉␉␉␉␉␊ |
| 1285 | aml_add_dword(pstt, resolve_pss(Control, Ctrl, base)); // Control␉␉␉␉␉␉␉␉␉␊ |
| 1286 | Pstatus++;␊ |
| 1287 | aml_add_dword(pstt, Pstatus); // Status␉␉␉␉␉␉␉␉␉␊ |
| 1288 | continue;␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␊ |
| 1289 | dropPstate:␊ |
| 1290 | ␊ |
| 1291 | DBG("state with cpu frequency :%d and ratio :%d will be dropped\n",p_states[i].Frequency,curr_ratio);␉␉␊ |
| 1292 | ␊ |
| 1293 | dropPSS++;␊ |
| 1294 | ␊ |
| 1295 | ␊ |
| 1296 | }␉␉␉␊ |
| 1297 | ␉␉␉␊ |
| 1298 | ␊ |
| 1299 | ␉␉␉// Add aliaces␊ |
| 1300 | ␉␉␉for (i = 0; i < cpu_map_count; i++) ␊ |
| 1301 | ␉␉␉{␊ |
| 1302 | ␉␉␉␉char name[9];␊ |
| 1303 | U32 nseg = *(U32*)cpu_map[i].nameseg;␊ |
| 1304 | if (cpuNamespace == CPU_NAMESPACE_PR) {␊ |
| 1305 | sprintf(name, "_PR_%c%c%c%c",␊ |
| 1306 | (int)(nseg & 0x000000ff),␊ |
| 1307 | (int)((nseg & 0x0000ff00) >> 8),␊ |
| 1308 | (int)((nseg & 0x00ff0000) >> 16),␊ |
| 1309 | (int)(nseg >> 24));␊ |
| 1310 | } else if (cpuNamespace == CPU_NAMESPACE_SB) {␊ |
| 1311 | sprintf(name, "_SB_%c%c%c%c",␊ |
| 1312 | (int)(nseg & 0x000000ff),␊ |
| 1313 | (int)((nseg & 0x0000ff00) >> 8),␊ |
| 1314 | (int)((nseg & 0x00ff0000) >> 16),␊ |
| 1315 | (int)(nseg >> 24));␊ |
| 1316 | } else {␊ |
| 1317 | aml_destroy_node(root);␉␊ |
| 1318 | goto out;␊ |
| 1319 | }␊ |
| 1320 | ␊ |
| 1321 | ␉␉␉␉scop = aml_add_scope(root, name);␊ |
| 1322 | ␉␉␉␉aml_add_alias(scop, "PSS_", "_PSS");␊ |
| 1323 | ␉␉␉}␊ |
| 1324 | ␉␉␉␊ |
| 1325 | ␉␉␉aml_calculate_size(root);␊ |
| 1326 | ␉␉␉␊ |
| 1327 | ␉␉␉ACPI_TABLE_SSDT *ssdt = (ACPI_TABLE_SSDT *)AllocateKernelMemory(root->Size);␊ |
| 1328 | ␉␉␉␊ |
| 1329 | ␉␉␉aml_write_node(root, (void*)ssdt, 0);␊ |
| 1330 | ␉␉␉␊ |
| 1331 | ␉␉␉ssdt->Header.Length = root->Size;␊ |
| 1332 | ␉␉␉␊ |
| 1333 | SetChecksum(&ssdt->Header);␊ |
| 1334 | ␉␉␉␊ |
| 1335 | ␉␉␉aml_destroy_node(root);␉␉␉␊ |
| 1336 | ␉␉␉␊ |
| 1337 | ␉␉␉verbose ("SSDT with CPU P-States generated successfully");␊ |
| 1338 | ␉␉␉␊ |
| 1339 | ␉␉␉if (dropPSS)␊ |
| 1340 | verbose(", %d P-state(s) dropped",dropPSS);␊ |
| 1341 | ␉␉␉␊ |
| 1342 | ␉␉␉verbose("\n");␊ |
| 1343 | ␉␉␉␊ |
| 1344 | ␉␉␉return ssdt;␊ |
| 1345 | ␉␉}␊ |
| 1346 | ␉}␊ |
| 1347 | ␉else ␊ |
| 1348 | ␉{␊ |
| 1349 | out:␊ |
| 1350 | ␉␉verbose("ACPI CPUs not found: P-States will not be generated !!!\n");␊ |
| 1351 | ␉}␊ |
| 1352 | ␉␊ |
| 1353 | ␉return (void *)0ul;␊ |
| 1354 | }␊ |
| 1355 | #else␊ |
| 1356 | ␊ |
| 1357 | static bool is_sandybridge(void)␊ |
| 1358 | {␊ |
| 1359 | return Platform->CPU.Model == CPUID_MODEL_SANDYBRIDGE;␊ |
| 1360 | }␊ |
| 1361 | ␊ |
| 1362 | static bool is_jaketown(void)␊ |
| 1363 | {␊ |
| 1364 | return Platform->CPU.Model == CPUID_MODEL_JAKETOWN;␊ |
| 1365 | }␊ |
| 1366 | ␊ |
| 1367 | #if BUILD_ACPI_TSS || pstate_power_support␊ |
| 1368 | static U64 divU64byU64(U64 n, U64 d, U64 * rem)␊ |
| 1369 | {␊ |
| 1370 | U32 i;␊ |
| 1371 | U64 q = n;␊ |
| 1372 | U64 r = 0;␊ |
| 1373 | ␉␊ |
| 1374 | for (i = 0; i < 64; i++) {␊ |
| 1375 | r <<= 1;␊ |
| 1376 | r |= (q & (1ULL << 63)) >> 63;␊ |
| 1377 | q <<= 1;␊ |
| 1378 | if (r >= d) {␊ |
| 1379 | r -= d;␊ |
| 1380 | q |= 1;␊ |
| 1381 | }␊ |
| 1382 | }␊ |
| 1383 | if (rem)␊ |
| 1384 | *rem = r;␊ |
| 1385 | return q;␊ |
| 1386 | }␊ |
| 1387 | ␊ |
| 1388 | static U32 compute_tdp(CPU_DETAILS * cpu)␊ |
| 1389 | {␊ |
| 1390 | {␊ |
| 1391 | int tdp;␊ |
| 1392 | if (getIntForKey("TDP", &tdp, &bootInfo->bootConfig)) {␊ |
| 1393 | return (U32)tdp;␊ |
| 1394 | }␊ |
| 1395 | }␊ |
| 1396 | ␊ |
| 1397 | {␊ |
| 1398 | if (is_jaketown() || is_sandybridge())␊ |
| 1399 | {␊ |
| 1400 | U64 power_limit_1 = cpu->package_power_limit & ((1ULL << 15) - 1);␊ |
| 1401 | U64 power_unit = cpu->package_power_sku_unit & ((1ULL << 4) - 1);␊ |
| 1402 | U64 tdp = divU64byU64(power_limit_1, 1 << power_unit, NULL);␊ |
| 1403 | return (U32)tdp;␊ |
| 1404 | }␊ |
| 1405 | else␊ |
| 1406 | {␊ |
| 1407 | // tdp = (TURBO_POWER_CURRENT_LIMIT MSR 1ACh bit [14:0] / 8) Watts␊ |
| 1408 | return cpu->tdp_limit / 8;␊ |
| 1409 | }␊ |
| 1410 | }␊ |
| 1411 | ␉␊ |
| 1412 | }␊ |
| 1413 | #endif␊ |
| 1414 | ␊ |
| 1415 | #if pstate_power_support␊ |
| 1416 | static U64 mulU64byU64(U64 a, U64 b, U64 * high)␊ |
| 1417 | {␊ |
| 1418 | U64 b_high = 0;␊ |
| 1419 | U64 r_high = 0, r_low = 0;␊ |
| 1420 | U64 bit;␊ |
| 1421 | ␉␊ |
| 1422 | for (bit = 1; bit; bit <<= 1) {␊ |
| 1423 | if (a & bit) {␊ |
| 1424 | if (r_low + b < r_low)␊ |
| 1425 | r_high++;␊ |
| 1426 | r_low += b;␊ |
| 1427 | r_high += b_high;␊ |
| 1428 | }␊ |
| 1429 | b_high <<= 1;␊ |
| 1430 | b_high |= (b & (1ULL << 63)) >> 63;␊ |
| 1431 | b <<= 1;␊ |
| 1432 | }␊ |
| 1433 | ␉␊ |
| 1434 | if (high)␊ |
| 1435 | *high = r_high;␊ |
| 1436 | return r_low;␊ |
| 1437 | }␊ |
| 1438 | ␊ |
| 1439 | static U32 compute_pstate_power(CPU_DETAILS * cpu, U32 ratio, U32 TDP)␊ |
| 1440 | {␊ |
| 1441 | ␉if (is_jaketown() || is_sandybridge())␊ |
| 1442 | ␉{␊ |
| 1443 | ␉␉U32 P1_Ratio = cpu->max_ratio_as_mfg;␊ |
| 1444 | ␉␉U64 M, pstate_power;␊ |
| 1445 | ␉␉␊ |
| 1446 | ␉␉// M = ((1.1 - ((P1_ratio - ratio) * 0.00625)) / 1.1) ^2␊ |
| 1447 | ␉␉// To prevent loss of precision compute M * 10^5 (preserves 5 decimal places)␊ |
| 1448 | ␉␉M = (P1_Ratio - ratio) * 625;␊ |
| 1449 | ␉␉M = (110000 - M);␊ |
| 1450 | ␉␉M = divU64byU64(M, 11, NULL);␊ |
| 1451 | ␉␉M = divU64byU64(mulU64byU64(M, M, NULL), 1000, NULL);␊ |
| 1452 | ␉␉␊ |
| 1453 | ␉␉// pstate_power = ((ratio/p1_ratio) * M * TDP)␊ |
| 1454 | ␉␉// Divide the final answer by 10^5 to remove the precision factor␊ |
| 1455 | ␉␉pstate_power = mulU64byU64(ratio, M, NULL);␊ |
| 1456 | ␉␉pstate_power = mulU64byU64(pstate_power, TDP, NULL);␊ |
| 1457 | ␉␉pstate_power = divU64byU64(pstate_power, P1_Ratio, NULL);␊ |
| 1458 | ␉␉pstate_power = divU64byU64(pstate_power, 100000, NULL);␊ |
| 1459 | ␉␉return (U32)pstate_power; // in Watts␊ |
| 1460 | ␉}␊ |
| 1461 | ␉else␊ |
| 1462 | ␉{␊ |
| 1463 | ␉␉// pstate_power[ratio] = (ratio/P1_ratio)^3 * Core_TDP + Uncore_TDP␊ |
| 1464 | ␉␉␊ |
| 1465 | ␉␉// Core_TDP = (TURBO_POWER_CURRENT_LIMIT MSR 1ACh bit [30:16] / 8) Watts␊ |
| 1466 | ␉␉//U32 Core_TDP = cpu->tdc_limit / 8;␊ |
| 1467 | U32 Core_TDP = compute_tdp(cpu);␊ |
| 1468 | ␉␉␊ |
| 1469 | ␉␉// Uncore_TDP = TDP - Core_TDP␊ |
| 1470 | ␉␉U32 Uncore_TDP = TDP - Core_TDP;␊ |
| 1471 | ␉␉␊ |
| 1472 | ␉␉// max_ratio_as_mfg = P1_Ratio derived from Brand String returned by CPUID instruction␊ |
| 1473 | ␉␉U32 P1_Ratio = cpu->max_ratio_as_mfg;␊ |
| 1474 | ␉␉␊ |
| 1475 | #define PRECISION_FACTOR (U32) 30␊ |
| 1476 | #define PRECISION_FACTOR_CUBED (U32) (PRECISION_FACTOR * PRECISION_FACTOR * PRECISION_FACTOR)␊ |
| 1477 | ␉␉␊ |
| 1478 | ␉␉U32 ratio_factor = (ratio * PRECISION_FACTOR)/P1_Ratio;␊ |
| 1479 | ␉␉return ((ratio_factor * ratio_factor * ratio_factor * Core_TDP) / PRECISION_FACTOR_CUBED) + Uncore_TDP;␊ |
| 1480 | ␉}␊ |
| 1481 | }␊ |
| 1482 | #endif␊ |
| 1483 | ␊ |
| 1484 | static U32 encode_pstate(U32 ratio)␊ |
| 1485 | {␊ |
| 1486 | ␉if (is_jaketown() || is_sandybridge())␊ |
| 1487 | ␉␉return ratio << 8;␊ |
| 1488 | ␉return ratio;␊ |
| 1489 | }␊ |
| 1490 | ␊ |
| 1491 | //-----------------------------------------------------------------------------␊ |
| 1492 | static void collect_cpu_info(CPU_DETAILS * cpu)␊ |
| 1493 | { ␊ |
| 1494 | U32 temp32;␊ |
| 1495 | ␉U64 temp64;␊ |
| 1496 | ␊ |
| 1497 | if (Platform->CPU.MaxCoef) ␊ |
| 1498 | {␊ |
| 1499 | if (Platform->CPU.MaxDiv) ␊ |
| 1500 | {␊ |
| 1501 | cpu->max_ratio_as_cfg = cpu->max_ratio_as_mfg = (U32) (Platform->CPU.MaxCoef * 10) + 5;␊ |
| 1502 | }␊ |
| 1503 | else ␊ |
| 1504 | {␊ |
| 1505 | cpu->max_ratio_as_cfg = cpu->max_ratio_as_mfg = (U32) Platform->CPU.MaxCoef * 10;␊ |
| 1506 | }␊ |
| 1507 | }␊ |
| 1508 | #if BUILD_ACPI_TSS || pstate_power_support␊ |
| 1509 | cpu->turbo_available = Platform->CPU.dynamic_acceleration;␊ |
| 1510 | ␊ |
| 1511 | if (!is_sandybridge() && !is_jaketown())␊ |
| 1512 | ␉{␊ |
| 1513 | ␉␉if (turbo_enabled && cpu->turbo_available)␊ |
| 1514 | ␉␉{␊ |
| 1515 | ␉␉␉temp64 = rdmsr64(MSR_TURBO_POWER_CURRENT_LIMIT);␊ |
| 1516 | ␉␉␉temp32 = (U32)temp64;␊ |
| 1517 | ␉␉} ␊ |
| 1518 | ␉␉else ␊ |
| 1519 | ␉␉{␊ |
| 1520 | // Unfortunately, Intel don't provide a better method for non turbo processors␊ |
| 1521 | // and it will give a TDP of 95w (for ex. mine is 65w) , to fix this issue,␊ |
| 1522 | // you can set this value by simply adding the option TDP = XX (XX is an integer)␊ |
| 1523 | // in your boot.plist (see compute_tdp)␊ |
| 1524 | ␉␉␉temp32 = (U32)0x02a802f8;␊ |
| 1525 | ␉␉}␊ |
| 1526 | ␉␉cpu->tdp_limit = ( temp32 & 0x7fff );␊ |
| 1527 | ␉␉cpu->tdc_limit = ( (temp32 >> 16) & 0x7fff );␊ |
| 1528 | ␉}␊ |
| 1529 | if (is_sandybridge() || is_jaketown())␊ |
| 1530 | ␉{␊ |
| 1531 | ␉␉cpu->package_power_limit = rdmsr64(MSR_PKG_RAPL_POWER_LIMIT);␊ |
| 1532 | ␉␉cpu->package_power_sku_unit = rdmsr64(MSR_RAPL_POWER_UNIT);␊ |
| 1533 | ␉}␊ |
| 1534 | #endif␊ |
| 1535 | ␊ |
| 1536 | #if BETA␊ |
| 1537 | U64 msr = rdmsr64(MSR_IA32_PERF_STATUS);␊ |
| 1538 | U16 idlo = (msr >> 48) & 0xffff;␊ |
| 1539 | cpu->min_ratio = (U32)(idlo >> 8) & 0xff; ␊ |
| 1540 | ␊ |
| 1541 | //U64 platform_info = rdmsr64(MSR_PLATFORM_INFO); ␊ |
| 1542 | ␉//cpu->min_ratio = (U32) ((platform_info >> 40) & 0xff); // This method don't work for me␊ |
| 1543 | #endif␊ |
| 1544 | // note: on c2d c6 & c7 cstates are not supported but it give me 1 with my e8500, i guess this mean that it can enter to c4 ␊ |
| 1545 | cpu->core_c1_supported = ((Platform->CPU.sub_Cstates >> 4) & 0xf) ? 1 : 0;␊ |
| 1546 | ␉cpu->core_c3_supported = ((Platform->CPU.sub_Cstates >> 8) & 0xf) ? 1 : 0;␊ |
| 1547 | ␉cpu->core_c6_supported = ((Platform->CPU.sub_Cstates >> 12) & 0xf) ? 1 : 0;␊ |
| 1548 | ␉cpu->core_c7_supported = ((Platform->CPU.sub_Cstates >> 16) & 0xf) ? 1 : 0; ␊ |
| 1549 | ␊ |
| 1550 | ␊ |
| 1551 | ␉cpu->mwait_supported = (Platform->CPU.extensions & (1UL << 0)) ? 1 : 0;␉␊ |
| 1552 | ␊ |
| 1553 | cpu->invariant_apic_timer_flag = Platform->CPU.invariant_APIC_timer;␊ |
| 1554 | ␊ |
| 1555 | #if DEBUG_ACPI␊ |
| 1556 | ␉printf("CPU INFO : \n");␊ |
| 1557 | #if BETA ␊ |
| 1558 | ␉printf("min_ratio : %d\n", cpu->min_ratio);␊ |
| 1559 | #endif␊ |
| 1560 | ␉printf("turbo_available : %d\n",cpu->turbo_available);␊ |
| 1561 | ␉␉␊ |
| 1562 | ␉printf("core_c1_supported : %d\n",cpu->core_c1_supported);␊ |
| 1563 | ␉printf("core_c3_supported : %d\n",cpu->core_c3_supported);␊ |
| 1564 | ␉printf("core_c6_supported : %d\n",cpu->core_c6_supported);␊ |
| 1565 | ␉printf("core_c7_supported : %d\n",cpu->core_c7_supported);␊ |
| 1566 | ␉printf("mwait_supported : %d\n",cpu->mwait_supported);␊ |
| 1567 | ␊ |
| 1568 | printf("turbo_available : %d\n",cpu->turbo_available);␊ |
| 1569 | ␊ |
| 1570 | ␉printf("core_c1_supported : %d\n",cpu->core_c1_supported);␊ |
| 1571 | ␊ |
| 1572 | #if BUILD_ACPI_TSS || pstate_power_support␊ |
| 1573 | ␉if (is_sandybridge() || is_jaketown())␊ |
| 1574 | ␉{␊ |
| 1575 | ␊ |
| 1576 | ␉␉printf("package_power_limit : %d\n",cpu->package_power_limit);␊ |
| 1577 | ␉␉printf("package_power_sku_unit : %d\n",cpu->package_power_sku_unit); ␊ |
| 1578 | ␊ |
| 1579 | ␉}␊ |
| 1580 | #endif␊ |
| 1581 | ␉␊ |
| 1582 | ␉DBG("invariant_apic_timer_flag : %d\n",cpu->invariant_apic_timer_flag);␊ |
| 1583 | ␉␊ |
| 1584 | ␉ ␊ |
| 1585 | #endif␊ |
| 1586 | }␊ |
| 1587 | ␊ |
| 1588 | #if BETA␊ |
| 1589 | ␊ |
| 1590 | static U32 get_bclk(void)␊ |
| 1591 | {␊ |
| 1592 | ␉return (is_jaketown() || is_sandybridge()) ? 100 : 133;␊ |
| 1593 | }␊ |
| 1594 | ␊ |
| 1595 | //-----------------------------------------------------------------------------␊ |
| 1596 | static U32 computePstateRatio(const U32 max, const U32 min, const U32 turboEnabled, const U32 numStates, const U32 pstate)␊ |
| 1597 | {␊ |
| 1598 | ␉U32 ratiorange = max-min;␊ |
| 1599 | ␉U32 numGaps = numStates-1-turboEnabled;␊ |
| 1600 | ␉U32 adjPstate = pstate-turboEnabled;␊ |
| 1601 | ␉return (pstate == 0) ? (max + turboEnabled) :␊ |
| 1602 | ␉(ratiorange == 0) ? max :␊ |
| 1603 | ␉max-(((adjPstate*ratiorange)+(numGaps/2))/numGaps);␊ |
| 1604 | }␊ |
| 1605 | //-----------------------------------------------------------------------------␊ |
| 1606 | static U32 computeNumPstates(const U32 max, const U32 min, const U32 turboEnabled, const U32 pssLimit)␊ |
| 1607 | {␊ |
| 1608 | ␉U32 ratiorange, maxStates, numStates;␊ |
| 1609 | ␉␊ |
| 1610 | ␉ratiorange = max - min + 1;␊ |
| 1611 | ␉maxStates = ratiorange + (turboEnabled ? 1 : 0);␊ |
| 1612 | ␉numStates = (pssLimit < maxStates) ? pssLimit : maxStates;␊ |
| 1613 | ␉return (numStates < 2) ? 0 : numStates;␊ |
| 1614 | }␊ |
| 1615 | ␊ |
| 1616 | //-----------------------------------------------------------------------------␊ |
| 1617 | static U32 BuildPstateInfo(CPU_DETAILS * cpu)␊ |
| 1618 | {␊ |
| 1619 | ␉// Build P-state table info based on verified options␊ |
| 1620 | ␊ |
| 1621 | ␉// Compute the number of p-states based on the ratio range␊ |
| 1622 | ␉cpu->pkg_pstates.num_pstates = computeNumPstates(cpu->max_ratio_as_cfg, cpu->min_ratio, cpu->turbo_available, MAX_PSTATES);␊ |
| 1623 | ␉␊ |
| 1624 | ␉if (!cpu->pkg_pstates.num_pstates)␊ |
| 1625 | ␉{␊ |
| 1626 | ␉␉return (0);␊ |
| 1627 | ␉}␊ |
| 1628 | ␉␊ |
| 1629 | ␉// Compute pstate data␊ |
| 1630 | ␉{␊ |
| 1631 | ␉␉U32 TDP = compute_tdp(cpu);␊ |
| 1632 | ␉␉␊ |
| 1633 | ␉␉U32 index;␊ |
| 1634 | ␉␉for (index=0; index < cpu->pkg_pstates.num_pstates; index ++)␊ |
| 1635 | ␉␉{␊ |
| 1636 | ␉␉␉PSTATE * pstate = &cpu->pkg_pstates.pstate[index];␊ |
| 1637 | ␉␉␉␊ |
| 1638 | ␉␉␉// Set ratio␊ |
| 1639 | ␉␉␉pstate->ratio = computePstateRatio(cpu->max_ratio_as_cfg, cpu->min_ratio, cpu->turbo_available, cpu->pkg_pstates.num_pstates, index);␊ |
| 1640 | ␉␉␉␊ |
| 1641 | ␉␉␉// Compute frequency based on ratio␊ |
| 1642 | ␉␉␉if ((index != 0) || (cpu->turbo_available == 0))␊ |
| 1643 | ␉␉␉␉pstate->frequency = pstate->ratio * get_bclk();␊ |
| 1644 | ␉␉␉else␊ |
| 1645 | ␉␉␉␉pstate->frequency = ((pstate->ratio - 1) * get_bclk()) + 1;␊ |
| 1646 | ␉␉␉␊ |
| 1647 | ␉␉␉// Compute power based on ratio and other data␊ |
| 1648 | ␉␉␉if (pstate->ratio >= cpu->max_ratio_as_mfg)␊ |
| 1649 | ␉␉␉␉// Use max power in mW␊ |
| 1650 | ␉␉␉␉pstate->power = TDP * 1000;␊ |
| 1651 | ␉␉␉else␊ |
| 1652 | ␉␉␉{␊ |
| 1653 | ␉␉␉␉pstate->power = compute_pstate_power(cpu, pstate->ratio, TDP);␊ |
| 1654 | ␉␉␉␉␊ |
| 1655 | ␉␉␉␉// Convert to mW␊ |
| 1656 | ␉␉␉␉pstate->power*= 1000;␊ |
| 1657 | ␉␉␉}␊ |
| 1658 | ␉␉}␊ |
| 1659 | ␉}␉␉␊ |
| 1660 | ␊ |
| 1661 | ␉return (1);␊ |
| 1662 | }␊ |
| 1663 | #else␊ |
| 1664 | //-----------------------------------------------------------------------------␊ |
| 1665 | static U32 BuildPstateInfo(CPU_DETAILS * cpu)␊ |
| 1666 | {␉␊ |
| 1667 | ␊ |
| 1668 | ␉struct p_state p_states[32];␊ |
| 1669 | ␉U8 p_states_count = 0;␉␉␊ |
| 1670 | ␉{␊ |
| 1671 | #if UNUSED␊ |
| 1672 | ␉␉struct p_state initial;␊ |
| 1673 | #endif␉␊ |
| 1674 | ␉␉struct p_state maximum, minimum;␊ |
| 1675 | ␉␉// Retrieving P-States, ported from code by superhai (c)␊ |
| 1676 | ␉␉switch (Platform->CPU.Family)␊ |
| 1677 | ␉␉{␊ |
| 1678 | ␉␉␉case 0x06: ␊ |
| 1679 | ␉␉␉{␊ |
| 1680 | ␉␉␉␉switch (Platform->CPU.Model) ␊ |
| 1681 | ␉␉␉␉{␊ |
| 1682 | ␉␉␉␉␉case CPUID_MODEL_DOTHAN: ␊ |
| 1683 | ␉␉␉␉␉case CPUID_MODEL_YONAH: // Yonah␊ |
| 1684 | ␉␉␉␉␉case CPUID_MODEL_MEROM: // Merom␊ |
| 1685 | ␉␉␉␉␉case CPUID_MODEL_PENRYN: // Penryn␊ |
| 1686 | ␉␉␉␉␉case CPUID_MODEL_ATOM: // Intel Atom (45nm)␊ |
| 1687 | ␉␉␉␉␉{␊ |
| 1688 | ␉␉␉␉␉␉bool cpu_dynamic_fsb = false;␊ |
| 1689 | ␉␉␉␉␉␉␊ |
| 1690 | ␉␉␉␉␉␉if (rdmsr64(MSR_IA32_EXT_CONFIG) & (1 << 27)) ␊ |
| 1691 | ␉␉␉␉␉␉{␊ |
| 1692 | ␉␉␉␉␉␉␉wrmsr64(MSR_IA32_EXT_CONFIG, (rdmsr64(MSR_IA32_EXT_CONFIG) | (1 << 28))); ␊ |
| 1693 | ␉␉␉␉␉␉␉delay(1);␊ |
| 1694 | ␉␉␉␉␉␉␉cpu_dynamic_fsb = rdmsr64(MSR_IA32_EXT_CONFIG) & (1 << 28);␊ |
| 1695 | ␉␉␉␉␉␉}␊ |
| 1696 | ␉␉␉␉␉␉␊ |
| 1697 | ␉␉␉␉␉␉bool cpu_noninteger_bus_ratio = (rdmsr64(MSR_IA32_PERF_STATUS) & (1ULL << 46));␊ |
| 1698 | #if UNUSED␊ |
| 1699 | ␉␉␉␉␉␉initial.Control = rdmsr64(MSR_IA32_PERF_STATUS);␊ |
| 1700 | #endif␉␉␉␊ |
| 1701 | ␉␉␉␉␉␉maximum.Control = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 32) & 0x1F3F) | (0x4000 * cpu_noninteger_bus_ratio);␊ |
| 1702 | ␉␉␉␉␉␉maximum.CID = ((maximum.FID & 0x1F) << 1) | cpu_noninteger_bus_ratio;␊ |
| 1703 | ␉␉␉␉␉␉␊ |
| 1704 | ␉␉␉␉␉␉minimum.FID = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 24) & 0x1F) | (0x80 * cpu_dynamic_fsb);␊ |
| 1705 | ␉␉␉␉␉␉minimum.VID = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 48) & 0x3F);␊ |
| 1706 | ␉␉␉␉␉␉␊ |
| 1707 | ␉␉␉␉␉␉if (minimum.FID == 0) ␊ |
| 1708 | ␉␉␉␉␉␉{␊ |
| 1709 | ␉␉␉␉␉␉␉U64 msr;␊ |
| 1710 | ␉␉␉␉␉␉␉U8 i;␊ |
| 1711 | ␉␉␉␉␉␉␉// Probe for lowest fid␊ |
| 1712 | ␉␉␉␉␉␉␉for (i = maximum.FID; i >= 0x6; i--) ␊ |
| 1713 | ␉␉␉␉␉␉␉{␊ |
| 1714 | ␉␉␉␉␉␉␉␉msr = rdmsr64(MSR_IA32_PERF_CONTROL);␊ |
| 1715 | ␉␉␉␉␉␉␉␉wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (i << 8) | minimum.VID);␊ |
| 1716 | ␉␉␉␉␉␉␉␉intel_waitforsts();␊ |
| 1717 | ␉␉␉␉␉␉␉␉minimum.FID = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0x1F; ␊ |
| 1718 | ␉␉␉␉␉␉␉␉delay(1);␊ |
| 1719 | ␉␉␉␉␉␉␉}␊ |
| 1720 | ␉␉␉␉␉␉␉␊ |
| 1721 | ␉␉␉␉␉␉␉msr = rdmsr64(MSR_IA32_PERF_CONTROL);␊ |
| 1722 | ␉␉␉␉␉␉␉wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (maximum.FID << 8) | maximum.VID);␊ |
| 1723 | ␉␉␉␉␉␉␉intel_waitforsts();␊ |
| 1724 | ␉␉␉␉␉␉}␊ |
| 1725 | ␉␉␉␉␉␉␊ |
| 1726 | ␉␉␉␉␉␉if (minimum.VID == maximum.VID) ␊ |
| 1727 | ␉␉␉␉␉␉{␉␊ |
| 1728 | ␉␉␉␉␉␉␉U64 msr;␊ |
| 1729 | ␉␉␉␉␉␉␉U8 i;␊ |
| 1730 | ␉␉␉␉␉␉␉// Probe for lowest vid␊ |
| 1731 | ␉␉␉␉␉␉␉for (i = maximum.VID; i > 0xA; i--) ␊ |
| 1732 | ␉␉␉␉␉␉␉{␊ |
| 1733 | ␉␉␉␉␉␉␉␉msr = rdmsr64(MSR_IA32_PERF_CONTROL);␊ |
| 1734 | ␉␉␉␉␉␉␉␉wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (minimum.FID << 8) | i);␊ |
| 1735 | ␉␉␉␉␉␉␉␉intel_waitforsts();␊ |
| 1736 | ␉␉␉␉␉␉␉␉minimum.VID = rdmsr64(MSR_IA32_PERF_STATUS) & 0x3F; ␊ |
| 1737 | ␉␉␉␉␉␉␉␉delay(1);␊ |
| 1738 | ␉␉␉␉␉␉␉}␊ |
| 1739 | ␉␉␉␉␉␉␉␊ |
| 1740 | ␉␉␉␉␉␉␉msr = rdmsr64(MSR_IA32_PERF_CONTROL);␊ |
| 1741 | ␉␉␉␉␉␉␉wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (maximum.FID << 8) | maximum.VID);␊ |
| 1742 | ␉␉␉␉␉␉␉intel_waitforsts();␊ |
| 1743 | ␉␉␉␉␉␉}␊ |
| 1744 | ␉␉␉␉␉␉␊ |
| 1745 | ␉␉␉␉␉␉minimum.CID = ((minimum.FID & 0x1F) << 1) >> cpu_dynamic_fsb;␊ |
| 1746 | ␉␉␉␉␉␉␊ |
| 1747 | ␉␉␉␉␉␉// Sanity check␊ |
| 1748 | ␉␉␉␉␉␉if (maximum.CID < minimum.CID) ␊ |
| 1749 | ␉␉␉␉␉␉{␊ |
| 1750 | ␉␉␉␉␉␉␉DBG("Insane FID values!");␊ |
| 1751 | ␉␉␉␉␉␉␉p_states_count = 0;␊ |
| 1752 | ␉␉␉␉␉␉}␊ |
| 1753 | ␉␉␉␉␉␉else␊ |
| 1754 | ␉␉␉␉␉␉{␊ |
| 1755 | ␉␉␉␉␉␉␉// Finalize P-States␊ |
| 1756 | ␉␉␉␉␉␉␉// Find how many P-States machine supports␊ |
| 1757 | ␉␉␉␉␉␉␉p_states_count = maximum.CID - minimum.CID + 1;␊ |
| 1758 | ␉␉␉␉␉␉␉␊ |
| 1759 | ␉␉␉␉␉␉␉if (p_states_count > MAX_PSTATES) // was 32␊ |
| 1760 | ␉␉␉␉␉␉␉␉p_states_count = MAX_PSTATES; // was 32␊ |
| 1761 | ␉␉␉␉␉␉␉␊ |
| 1762 | ␉␉␉␉␉␉␉U8 vidstep;␊ |
| 1763 | ␉␉␉␉␉␉␉U8 i = 0, u, invalid = 0;␊ |
| 1764 | ␉␉␉␉␉␉␉␊ |
| 1765 | ␉␉␉␉␉␉␉vidstep = ((maximum.VID << 2) - (minimum.VID << 2)) / (p_states_count - 1);␊ |
| 1766 | ␉␉␉␉␉␉␉␊ |
| 1767 | ␉␉␉␉␉␉␉for (u = 0; u < p_states_count; u++) ␊ |
| 1768 | ␉␉␉␉␉␉␉{␊ |
| 1769 | ␉␉␉␉␉␉␉␉i = u - invalid;␊ |
| 1770 | ␉␉␉␉␉␉␉␉␊ |
| 1771 | ␉␉␉␉␉␉␉␉p_states[i].CID = maximum.CID - u;␊ |
| 1772 | ␉␉␉␉␉␉␉␉p_states[i].FID = (p_states[i].CID >> 1);␊ |
| 1773 | ␉␉␉␉␉␉␉␉␊ |
| 1774 | ␉␉␉␉␉␉␉␉if (p_states[i].FID < 0x6) ␊ |
| 1775 | ␉␉␉␉␉␉␉␉{␊ |
| 1776 | ␉␉␉␉␉␉␉␉␉if (cpu_dynamic_fsb) ␊ |
| 1777 | ␉␉␉␉␉␉␉␉␉␉p_states[i].FID = (p_states[i].FID << 1) | 0x80;␊ |
| 1778 | ␉␉␉␉␉␉␉␉} ␊ |
| 1779 | ␉␉␉␉␉␉␉␉else if (cpu_noninteger_bus_ratio) ␊ |
| 1780 | ␉␉␉␉␉␉␉␉{␊ |
| 1781 | ␉␉␉␉␉␉␉␉␉p_states[i].FID = p_states[i].FID | (0x40 * (p_states[i].CID & 0x1));␊ |
| 1782 | ␉␉␉␉␉␉␉␉}␊ |
| 1783 | ␉␉␉␉␉␉␉␉␊ |
| 1784 | ␉␉␉␉␉␉␉␉if (i && p_states[i].FID == p_states[i-1].FID)␊ |
| 1785 | ␉␉␉␉␉␉␉␉␉invalid++;␊ |
| 1786 | ␉␉␉␉␉␉␉␉␊ |
| 1787 | ␉␉␉␉␉␉␉␉p_states[i].VID = ((maximum.VID << 2) - (vidstep * u)) >> 2;␊ |
| 1788 | ␉␉␉␉␉␉␉␉␊ |
| 1789 | ␉␉␉␉␉␉␉␉U32 multiplier = p_states[i].FID & 0x1f;␉␉// = 0x08␊ |
| 1790 | ␉␉␉␉␉␉␉␉bool half = p_states[i].FID & 0x40;␉␉␉␉␉// = 0x01␊ |
| 1791 | ␉␉␉␉␉␉␉␉bool dfsb = p_states[i].FID & 0x80;␉␉␉␉␉// = 0x00␊ |
| 1792 | ␉␉␉␉␉␉␉␉U32 fsb = Platform->CPU.FSBFrequency / 1000000; // = 400␊ |
| 1793 | ␉␉␉␉␉␉␉␉U32 halffsb = (fsb + 1) >> 1;␉␉␉␉␉// = 200␊ |
| 1794 | ␉␉␉␉␉␉␉␉U32 frequency = (multiplier * fsb);␉␉␉// = 3200␊ |
| 1795 | ␉␉␉␉␉␉␉␉␊ |
| 1796 | ␉␉␉␉␉␉␉␉p_states[i].Frequency = (frequency + (half * halffsb)) >> dfsb;␉// = 3200 + 200 = 3400␊ |
| 1797 | ␉␉␉␉␉␉␉}␊ |
| 1798 | ␉␉␉␉␉␉␉␊ |
| 1799 | ␉␉␉␉␉␉␉p_states_count -= invalid;␊ |
| 1800 | ␉␉␉␉␉␉}␊ |
| 1801 | ␉␉␉␉␉␉break;␊ |
| 1802 | ␉␉␉␉␉} ␊ |
| 1803 | ␉␉␉␉␉case CPUID_MODEL_FIELDS:␊ |
| 1804 | ␉␉␉␉␉case CPUID_MODEL_DALES:␊ |
| 1805 | ␉␉␉␉␉case CPUID_MODEL_DALES_32NM:␊ |
| 1806 | ␉␉␉␉␉case CPUID_MODEL_NEHALEM: ␊ |
| 1807 | ␉␉␉␉␉case CPUID_MODEL_NEHALEM_EX:␊ |
| 1808 | ␉␉␉␉␉case CPUID_MODEL_WESTMERE:␊ |
| 1809 | ␉␉␉␉␉case CPUID_MODEL_WESTMERE_EX:␊ |
| 1810 | ␉␉␉␉␉case CPUID_MODEL_SANDYBRIDGE:␊ |
| 1811 | ␉␉␉␉␉case CPUID_MODEL_JAKETOWN:␊ |
| 1812 | ␉␉␉␉␉{␉␉␊ |
| 1813 | ␉␉␉␉␉␉maximum.Control = rdmsr64(MSR_IA32_PERF_STATUS) & 0xff; // Seems it always contains maximum multiplier value (with turbo, that's we need)...␊ |
| 1814 | ␉␉␉␉␉␉minimum.Control = (rdmsr64(MSR_PLATFORM_INFO) >> 40) & 0xff;␊ |
| 1815 | ␉␉␉␉␉␉␊ |
| 1816 | ␉␉␉␉␉␉verbose("P-States: min 0x%x, max 0x%x\n", minimum.Control, maximum.Control);␊ |
| 1817 | ␉␉␉␉␉␉␊ |
| 1818 | ␉␉␉␉␉␉// Sanity check␊ |
| 1819 | ␉␉␉␉␉␉if (maximum.Control < minimum.Control) ␊ |
| 1820 | ␉␉␉␉␉␉{␊ |
| 1821 | ␉␉␉␉␉␉␉DBG("Insane control values!");␊ |
| 1822 | ␉␉␉␉␉␉␉p_states_count = 0;␊ |
| 1823 | ␉␉␉␉␉␉}␊ |
| 1824 | ␉␉␉␉␉␉else␊ |
| 1825 | ␉␉␉␉␉␉{␊ |
| 1826 | ␉␉␉␉␉␉␉U8 i;␊ |
| 1827 | ␉␉␉␉␉␉␉p_states_count = 0;␊ |
| 1828 | ␉␉␉␉␉␉␉␊ |
| 1829 | ␉␉␉␉␉␉␉for (i = maximum.Control; i >= minimum.Control; i--) ␊ |
| 1830 | ␉␉␉␉␉␉␉{␊ |
| 1831 | ␉␉␉␉␉␉␉␉p_states[p_states_count].Control = i;␊ |
| 1832 | ␉␉␉␉␉␉␉␉p_states[p_states_count].CID = p_states[p_states_count].Control << 1;␊ |
| 1833 | ␉␉␉␉␉␉␉␉p_states[p_states_count].Frequency = (Platform->CPU.FSBFrequency / 1000000) * i;␊ |
| 1834 | ␉␉␉␉␉␉␉␉p_states_count++;␊ |
| 1835 | ␉␉␉␉␉␉␉␉if (p_states_count >= MAX_PSTATES) { // was 32␊ |
| 1836 | ␉␉␉␉␉␉␉␉␉␊ |
| 1837 | ␉␉␉␉␉␉␉␉␉if (p_states_count > MAX_PSTATES) // was 32␊ |
| 1838 | ␉␉␉␉␉␉␉␉␉␉p_states_count = MAX_PSTATES; // was 32␊ |
| 1839 | ␉␉␉␉␉␉␉␉␉␊ |
| 1840 | ␉␉␉␉␉␉␉␉␉break;␊ |
| 1841 | ␉␉␉␉␉␉␉␉}␊ |
| 1842 | ␉␉␉␉␉␉␉}␊ |
| 1843 | ␉␉␉␉␉␉}␊ |
| 1844 | ␉␉␉␉␉␉␊ |
| 1845 | ␉␉␉␉␉␉break;␊ |
| 1846 | ␉␉␉␉␉}␊ |
| 1847 | ␉␉␉␉␉default:␊ |
| 1848 | ␉␉␉␉␉␉verbose ("Unsupported CPU: P-States will not be generated !!!\n");␊ |
| 1849 | ␉␉␉␉␉␉return (0);␊ |
| 1850 | ␉␉␉␉␉␉break;␊ |
| 1851 | ␉␉␉␉}␊ |
| 1852 | ␉␉␉}␊ |
| 1853 | ␉␉␉default:␊ |
| 1854 | ␉␉␉␉break;␊ |
| 1855 | ␉␉}␊ |
| 1856 | ␉}␊ |
| 1857 | ␉␊ |
| 1858 | ␉// Generating Pstate PKG␊ |
| 1859 | ␉if (p_states_count) ␊ |
| 1860 | ␉{␉␉␉␉␉␉␉␉␉␊ |
| 1861 | ␉␉U8 minPSratio = (p_states[p_states_count-1].Frequency / (Platform->CPU.FSBFrequency / 10000000 ));␊ |
| 1862 | ␉␉U8 maxPSratio = (p_states[0].Frequency / (Platform->CPU.FSBFrequency / 10000000 ));␊ |
| 1863 | ␉␉U8 cpu_ratio = 0;␊ |
| 1864 | ␉␉␊ |
| 1865 | ␉␉{␊ |
| 1866 | ␉␉␉U8 cpu_div = Platform->CPU.CurrDiv;␊ |
| 1867 | ␉␉␉␊ |
| 1868 | ␉␉␉if (cpu_div) ␉␉␉␉␉␉␉␉␊ |
| 1869 | ␉␉␉␉cpu_ratio = (Platform->CPU.CurrCoef * 10) + 5;␉␉␉␉␉␉␉␉␊ |
| 1870 | ␉␉␉else ␉␉␉␉␉␉␉␉␊ |
| 1871 | ␉␉␉␉cpu_ratio = Platform->CPU.CurrCoef * 10;␊ |
| 1872 | ␉␉}␊ |
| 1873 | ␉␉␊ |
| 1874 | ␉␉␊ |
| 1875 | ␉␉{␊ |
| 1876 | ␉␉␉int user_max_ratio = 0;␊ |
| 1877 | ␉␉␉getIntForKey(kMaxRatio, &user_max_ratio, &bootInfo->bootConfig);␊ |
| 1878 | ␉␉␉if (user_max_ratio >= minPSratio && maxPSratio >= user_max_ratio)␊ |
| 1879 | ␉␉␉{␉␉␉␉␉␉␉␉␉␊ |
| 1880 | ␉␉␉␉␊ |
| 1881 | ␉␉␉␉U8 maxcurrdiv = 0, maxcurrcoef = (int)(user_max_ratio / 10);␉␉␉␉␉␉␉␉␉␊ |
| 1882 | ␉␉␉␉␊ |
| 1883 | ␉␉␉␉U8 maxdiv = user_max_ratio - (maxcurrcoef * 10);␊ |
| 1884 | ␉␉␉␉if (maxdiv > 0)␊ |
| 1885 | ␉␉␉␉␉maxcurrdiv = 1;␊ |
| 1886 | ␉␉␉␉␊ |
| 1887 | ␉␉␉␉if (maxcurrdiv) ␉␉␉␉␉␉␉␉␉␊ |
| 1888 | ␉␉␉␉␉cpu_ratio = (maxcurrcoef * 10) + 5;␉␉␉␉␉␉␉␉␉␊ |
| 1889 | ␉␉␉␉else ␉␉␉␉␉␉␉␉␉␊ |
| 1890 | ␉␉␉␉␉cpu_ratio = maxcurrcoef * 10;␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␊ |
| 1891 | ␉␉␉}␊ |
| 1892 | ␉␉}␊ |
| 1893 | ␉␉␊ |
| 1894 | ␉␉{␊ |
| 1895 | ␉␉␉int user_min_ratio = 0;␊ |
| 1896 | ␉␉␉getIntForKey(kMinRatio, &user_min_ratio, &bootInfo->bootConfig);␊ |
| 1897 | ␉␉␉if (user_min_ratio >= minPSratio && cpu_ratio >= user_min_ratio)␊ |
| 1898 | ␉␉␉{␊ |
| 1899 | ␉␉␉␉␊ |
| 1900 | ␉␉␉␉U8 mincurrdiv = 0, mincurrcoef = (int)(user_min_ratio / 10);␉␉␉␉␉␉␉␉␉␊ |
| 1901 | ␉␉␉␉␊ |
| 1902 | ␉␉␉␉U8 mindiv = user_min_ratio - (mincurrcoef * 10);␊ |
| 1903 | ␉␉␉␉␊ |
| 1904 | ␉␉␉␉if (mindiv > 0)␊ |
| 1905 | ␉␉␉␉␉mincurrdiv = 1;␉␉␉␉␉␉␉␉␉␊ |
| 1906 | ␉␉␉␉␊ |
| 1907 | ␉␉␉␉if (mincurrdiv) ␉␉␉␉␉␉␉␉␉␊ |
| 1908 | ␉␉␉␉␉minPSratio = (mincurrcoef * 10) + 5;␉␉␉␉␉␉␉␉␉␊ |
| 1909 | ␉␉␉␉else ␉␉␉␉␉␉␉␉␉␊ |
| 1910 | ␉␉␉␉␉minPSratio = mincurrcoef * 10;␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␊ |
| 1911 | ␉␉␉␉␊ |
| 1912 | ␉␉␉}␊ |
| 1913 | ␉␉}␊ |
| 1914 | ␉␉␊ |
| 1915 | ␉␉␊ |
| 1916 | ␉␉if (maxPSratio >= cpu_ratio && cpu_ratio >= minPSratio)␉maxPSratio = cpu_ratio;␉␉␉␉␉␉␉␉␉␉␉␉␉␊ |
| 1917 | ␉␉␊ |
| 1918 | ␉␉{␊ |
| 1919 | ␉␉␉TagPtr personality = XMLCastDict(XMLGetProperty(bootInfo->bootConfig.dictionary, (const char*)"P-States"));␊ |
| 1920 | ␉␉␉int base = 16;␉␉␉␉␉␉␉␉␊ |
| 1921 | ␉␉␉U8 expert = 0; /* Default: 0 , mean mixed mode ␊ |
| 1922 | ␉␉␉␉␉␉ * expert mode : 1 , mean add only p-states found in boot.plist␊ |
| 1923 | ␉␉␉␉␉␉ */␊ |
| 1924 | ␉␉␉␊ |
| 1925 | ␉␉␉␊ |
| 1926 | ␉␉␉{␊ |
| 1927 | ␉␉␉␉if (personality)␊ |
| 1928 | ␉␉␉␉{␊ |
| 1929 | ␉␉␉␉␉char *tmpstr = XMLCastString(XMLGetProperty(personality, (const char*)"Mode"));␊ |
| 1930 | ␉␉␉␉␉␊ |
| 1931 | ␉␉␉␉␉if (strcmp(tmpstr,"Expert") == 0)␊ |
| 1932 | ␉␉␉␉␉{␊ |
| 1933 | ␉␉␉␉␉␉p_states_count = XMLTagCount(personality) - 1 ; // - 1 = - ("Mode" tag) ␉␉␉␉␉␉␉␉␉␉␊ |
| 1934 | ␉␉␉␉␉␉expert = 1;␊ |
| 1935 | ␉␉␉␉␉}␊ |
| 1936 | ␉␉␉␉␉␊ |
| 1937 | ␉␉␉␉␉␊ |
| 1938 | ␉␉␉␉␉if ((tmpstr = XMLCastString(XMLGetProperty(personality, (const char*)"Base"))))␊ |
| 1939 | ␉␉␉␉␉{␊ |
| 1940 | ␉␉␉␉␉␉␊ |
| 1941 | ␉␉␉␉␉␉if (expert) p_states_count--; // -= ("Base" tag) ␊ |
| 1942 | ␉␉␉␉␉␉␊ |
| 1943 | ␉␉␉␉␉␉int mybase = strtol(tmpstr, NULL, 10);␉␊ |
| 1944 | ␉␉␉␉␉␉␊ |
| 1945 | ␉␉␉␉␉␉if (mybase == 8 || mybase == 10 || mybase == 16 )␊ |
| 1946 | ␉␉␉␉␉␉␉base = mybase;␉␉␉␉␉␉␉␉␉␊ |
| 1947 | ␉␉␉␉␉}␊ |
| 1948 | ␉␉␉␉}␊ |
| 1949 | ␉␉␉␉␊ |
| 1950 | ␉␉␉}␊ |
| 1951 | ␉␉␉␊ |
| 1952 | ␉␉␉{␊ |
| 1953 | ␉␉␉␉U32 dropPSS = 0, Pstatus = 0;␊ |
| 1954 | ␉␉␉␉char MatchStat[5];␊ |
| 1955 | #ifdef pstate_power_support␊ |
| 1956 | ␉␉␉␉U32 TDP = compute_tdp(cpu);␉␉␉␉␉␉␉␉␊ |
| 1957 | #endif␊ |
| 1958 | ␉␉␉␉U32 i;␉␉␉␉␊ |
| 1959 | ␉␉␉␉for (i = 0; i < p_states_count; i++) ␊ |
| 1960 | ␉␉␉␉{␉␉␉␊ |
| 1961 | ␉␉␉␉␉char *Lat1 = NULL, *clk = NULL, *Pw = NULL, *Lat2 = NULL, *Ctrl = NULL ;␊ |
| 1962 | ␉␉␉␉␉␊ |
| 1963 | ␉␉␉␉␉if (personality)␊ |
| 1964 | ␉␉␉␉␉{␊ |
| 1965 | ␉␉␉␉␉␉sprintf(MatchStat, "%d",i);␊ |
| 1966 | ␉␉␉␉␉␉TagPtr match_Status = XMLGetProperty(personality, (const char*)MatchStat); ␉␉␉␉␉␉␉␉ ␊ |
| 1967 | ␉␉␉␉␉␉␊ |
| 1968 | ␉␉␉␉␉␉if (match_Status)␊ |
| 1969 | ␉␉␉␉␉␉{␉␉␉␉␉␉␉␉␉␉␉␉␊ |
| 1970 | ␉␉␉␉␉␉␉␊ |
| 1971 | ␉␉␉␉␉␉␉clk = XMLCastString(XMLGetProperty(match_Status, (const char*)"CoreFreq"));␊ |
| 1972 | ␉␉␉␉␉␉␉Pw = XMLCastString(XMLGetProperty(match_Status, (const char*)"Power"));␊ |
| 1973 | ␉␉␉␉␉␉␉Lat1 = XMLCastString(XMLGetProperty(match_Status, (const char*)"Transition Latency"));␊ |
| 1974 | ␉␉␉␉␉␉␉Lat2 = XMLCastString(XMLGetProperty(match_Status, (const char*)"Bus Master Latency"));␊ |
| 1975 | ␉␉␉␉␉␉␉Ctrl = XMLCastString(XMLGetProperty(match_Status, (const char*)"Control"));␊ |
| 1976 | ␉␉␉␉␉␉␉␊ |
| 1977 | ␉␉␉␉␉␉␉␊ |
| 1978 | ␉␉␉␉␉␉} else if (expert) ␊ |
| 1979 | ␉␉␉␉␉␉␉continue;␊ |
| 1980 | ␉␉␉␉␉}␊ |
| 1981 | ␉␉␉␉␉␉␉␉␉␉␊ |
| 1982 | ␉␉␉␉␉unsigned long Frequency = 0x00000000;␊ |
| 1983 | ␉␉␉␉␉␊ |
| 1984 | ␉␉␉␉␉if (!expert || !personality) Frequency = p_states[i].Frequency;␊ |
| 1985 | ␉␉␉␉␉␊ |
| 1986 | ␉␉␉␉␉if (clk) ␊ |
| 1987 | ␉␉␉␉␉␉Frequency = strtoul((const char *)clk, NULL,base);␊ |
| 1988 | ␉␉␉␉␉␊ |
| 1989 | ␉␉␉␉␉if (!Frequency || Frequency > p_states[0].Frequency ) continue;␊ |
| 1990 | ␉␉␉␉␉␊ |
| 1991 | ␉␉␉␉␉U8 curr_ratio = (Frequency / (Platform->CPU.FSBFrequency / 10000000 ));␊ |
| 1992 | ␉␉␉␉␉␊ |
| 1993 | ␉␉␉␉␉if (curr_ratio > maxPSratio || minPSratio > curr_ratio)␊ |
| 1994 | ␉␉␉␉␉␉goto dropPstate;␊ |
| 1995 | ␉␉␉␉␉␉␊ |
| 1996 | ␉␉␉␉␉{␊ |
| 1997 | ␉␉␉␉␉␉PSTATE * pstate = &cpu->pkg_pstates.pstate[Pstatus];␊ |
| 1998 | ␉␉␉␉␉␉␊ |
| 1999 | ␉␉␉␉␉␉pstate->ratio = curr_ratio; ␊ |
| 2000 | ␉␉␉␉␉␉␊ |
| 2001 | ␉␉␉␉␉␉pstate->frequency = Frequency; // CoreFreq (in MHz).␉␊ |
| 2002 | ␉␉␉␉␉␉␊ |
| 2003 | ␉␉␉␉␉␉U32 power = 0x00000000;␊ |
| 2004 | #ifdef pstate_power_support␊ |
| 2005 | ␉␉␉␉␉␉// Compute power based on ratio and other data␊ |
| 2006 | ␉␉␉␉␉␉if (pstate->ratio >= cpu->max_ratio_as_mfg)␊ |
| 2007 | ␉␉␉␉␉␉␉// Use max power in mW␊ |
| 2008 | ␉␉␉␉␉␉␉power = TDP * 1000;␊ |
| 2009 | ␉␉␉␉␉␉else␊ |
| 2010 | ␉␉␉␉␉␉{␊ |
| 2011 | ␉␉␉␉␉␉␉power = compute_pstate_power(cpu, pstate->ratio, TDP);␊ |
| 2012 | ␉␉␉␉␉␉␉␊ |
| 2013 | ␉␉␉␉␉␉␉// Convert to mW␊ |
| 2014 | ␉␉␉␉␉␉␉power*= 1000;␊ |
| 2015 | ␉␉␉␉␉␉}␊ |
| 2016 | #endif␉␉␉␉␉␉␊ |
| 2017 | ␉␉␉␉␉␉pstate->power = resolve_pss(power, Pw, base); // Power (in milliWatts)␉␉␉␉␉␉␉␉␉␊ |
| 2018 | ␉␉␉␉␉␉pstate->translatency = resolve_pss(0x0000000A, Lat1, base); // Transition Latency (in microseconds).␉␉␉␉␉␉␉␉␉␊ |
| 2019 | ␉␉␉␉␉␉pstate->bmlatency = resolve_pss(0x0000000A, Lat2, base); // Bus Master Latency (in microseconds).␉␉␉␉␉␉␉␉␉␊ |
| 2020 | ␉␉␉␉␉␉␊ |
| 2021 | ␉␉␉␉␉␉{␊ |
| 2022 | ␉␉␉␉␉␉␉U32 Control = 0 /*encode_pstate(curr_ratio)*/ ;␊ |
| 2023 | ␉␉␉␉␉␉␉if (!expert || !personality) Control = p_states[i].Control;␉␉␉␉␉␉␉␉␉␊ |
| 2024 | ␉␉␉␉␉␉␉pstate->control = resolve_pss(Control, Ctrl, base); // Control␊ |
| 2025 | ␉␉␉␉␉␉}␉␉␉␉␉␉␉␉␉␉␉␉␉␉␊ |
| 2026 | ␉␉␉␉␉␉␊ |
| 2027 | ␉␉␉␉␉␉pstate->status = Pstatus+1; // Status␊ |
| 2028 | ␉␉␉␉␉␉␊ |
| 2029 | ␉␉␉␉␉␉DBG("state :: frequency :%d power: %d translatency: %d bmlatency: %d control: %d status: %d ratio :%d :: registred !! \n",pstate->frequency,pstate->power,␊ |
| 2030 | ␉␉␉␉␉␉␉␉␉␉␉pstate->translatency,pstate->bmlatency,pstate->control,pstate->status,pstate->ratio );␊ |
| 2031 | ␉␉␉␉␉}␊ |
| 2032 | ␉␉␉␉␉␊ |
| 2033 | ␉␉␉␉␉␊ |
| 2034 | ␉␉␉␉␉Pstatus++;␊ |
| 2035 | ␉␉␉␉␉continue;␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␊ |
| 2036 | ␊ |
| 2037 | ␉␉␉␉dropPstate:␉␉␉␉␉␊ |
| 2038 | ␉␉␉␉␉DBG("state with cpu frequency :%d and ratio :%d will be dropped\n",p_states[i].Frequency,curr_ratio);␉␉␉␉␉␊ |
| 2039 | ␉␉␉␉␉dropPSS++;␊ |
| 2040 | ␉␉␉␉␉␊ |
| 2041 | ␉␉␉␉␉␊ |
| 2042 | ␉␉␉␉}␊ |
| 2043 | ␉␉␉␉␊ |
| 2044 | ␉␉␉␉if (Pstatus == 0)␊ |
| 2045 | ␉␉␉␉{␊ |
| 2046 | ␉␉␉␉␉verbose("No suitable P-states found, P-States will not be generated !!!\n");␊ |
| 2047 | ␉␉␉␉␉return (0);␊ |
| 2048 | ␉␉␉␉}␊ |
| 2049 | ␉␉␉␉cpu->pkg_pstates.num_pstates = Pstatus;␊ |
| 2050 | ␉␉␉}␊ |
| 2051 | ␉␉}␉␉␉␊ |
| 2052 | ␉}␉␊ |
| 2053 | ␉else ␊ |
| 2054 | ␉{␊ |
| 2055 | ␉␉verbose("ACPI CPUs not found: P-States will not be generated !!!\n");␊ |
| 2056 | ␉␉return (0);␊ |
| 2057 | ␉}␊ |
| 2058 | ␉␊ |
| 2059 | ␉DBG("_PSS PGK generated successfully\n");␊ |
| 2060 | ␉return (1);␊ |
| 2061 | }␊ |
| 2062 | #endif␊ |
| 2063 | ␊ |
| 2064 | //-----------------------------------------------------------------------------␊ |
| 2065 | static U32 BuildCstateInfo(CPU_DETAILS * cpu, U32 pmbase)␊ |
| 2066 | {␊ |
| 2067 | ␉{␊ |
| 2068 | ␉␉TagPtr personality = XMLCastDict(XMLGetProperty(bootInfo->bootConfig.dictionary, (const char*)"C-States"));␊ |
| 2069 | ␉␉␊ |
| 2070 | ␉␉if (personality)␊ |
| 2071 | ␉␉{␊ |
| 2072 | ␉␉␉int base = 16;␉␊ |
| 2073 | ␉␉␉␊ |
| 2074 | ␉␉␉U32 entry_count = XMLTagCount(personality);␊ |
| 2075 | ␉␉␉char *tmpstr =NULL;␊ |
| 2076 | ␉␉␉␊ |
| 2077 | ␉␉␉if ((tmpstr = XMLCastString(XMLGetProperty(personality, (const char*)"Base"))))␊ |
| 2078 | ␉␉␉{␊ |
| 2079 | ␉␉␉␉␊ |
| 2080 | ␉␉␉␉entry_count--; // -= ("Base" tag) ␊ |
| 2081 | ␉␉␉␉␊ |
| 2082 | ␉␉␉␉int mybase = strtol(tmpstr, NULL, 10);␉␊ |
| 2083 | ␉␉␉␉␊ |
| 2084 | ␉␉␉␉if (mybase == 8 || mybase == 10 || mybase == 16 )␊ |
| 2085 | ␉␉␉␉␉base = mybase;␉␉␉␉␉␉␉␉␉␊ |
| 2086 | ␉␉␉}␊ |
| 2087 | ␉␉␉␊ |
| 2088 | ␉␉␉if (entry_count)␊ |
| 2089 | ␉␉␉{␉␉␉␉␊ |
| 2090 | ␉␉␉␉␊ |
| 2091 | ␉␉␉␉cpu->pkg_io_cstates.num_cstates = 0;␊ |
| 2092 | ␉␉␉␉cpu->pkg_mwait_cstates.num_cstates = 0;␊ |
| 2093 | ␉␉␉␉U32 num_cstates = 0;␊ |
| 2094 | ␉␉␉␉␊ |
| 2095 | ␉␉␉␉{␊ |
| 2096 | ␉␉␉␉␉U32 i;␊ |
| 2097 | ␉␉␉␉␉char MatchStat[5];␉␉␉␉␉␊ |
| 2098 | ␉␉␉␉␉␊ |
| 2099 | ␉␉␉␉␉for (i = 0; i < 32 ; i++)␊ |
| 2100 | ␉␉␉␉␉{␊ |
| 2101 | ␉␉␉␉␉␉char *Lat = NULL, *Pw = NULL, *BWidth= NULL, *BOffset= NULL, *Address= NULL, *AccessSize= NULL, *index= NULL;␊ |
| 2102 | ␉␉␉␉␉␉␊ |
| 2103 | ␉␉␉␉␉␉sprintf(MatchStat, "C%d",i);␊ |
| 2104 | ␉␉␉␉␉␉TagPtr match_Status = XMLGetProperty(personality, (const char*)MatchStat);␊ |
| 2105 | ␉␉␉␉␉␉if (match_Status)␊ |
| 2106 | ␉␉␉␉␉␉{␉␊ |
| 2107 | ␉␉␉␉␉␉␉Pw = XMLCastString(XMLGetProperty(match_Status, (const char*)"Power"));␊ |
| 2108 | ␉␉␉␉␉␉␉Lat = XMLCastString(XMLGetProperty(match_Status, (const char*)"Latency"));␊ |
| 2109 | ␉␉␉␉␉␉␉BWidth= XMLCastString(XMLGetProperty(match_Status, (const char*)"BitWidth"));␊ |
| 2110 | ␉␉␉␉␉␉␉␊ |
| 2111 | ␉␉␉␉␉␉␉BOffset = XMLCastString(XMLGetProperty(match_Status, (const char*)"BitOffset"));␊ |
| 2112 | ␉␉␉␉␉␉␉Address = XMLCastString(XMLGetProperty(match_Status, (const char*)"Latency"));␊ |
| 2113 | ␉␉␉␉␉␉␉AccessSize = XMLCastString(XMLGetProperty(match_Status, (const char*)"AccessSize"));␊ |
| 2114 | ␉␉␉␉␉␉␉index = XMLCastString(XMLGetProperty(match_Status, (const char*)"index"));␊ |
| 2115 | ␉␉␉␉␉␉␉␊ |
| 2116 | ␉␉␉␉␉␉␉if (Pw && Lat && BWidth && BOffset && Address && AccessSize && index)␊ |
| 2117 | ␉␉␉␉␉␉␉{␊ |
| 2118 | ␉␉␉␉␉␉␉␉U32 bw␉␉= strtoul((const char *)BWidth, NULL,base);␊ |
| 2119 | ␉␉␉␉␉␉␉␉U32 boff␉= strtoul((const char *)BOffset, NULL,base);␊ |
| 2120 | ␉␉␉␉␉␉␉␉U32 acs␉␉= strtoul((const char *)AccessSize, NULL,base);␊ |
| 2121 | ␉␉␉␉␉␉␉␉U32 addr␉= strtoul((const char *)Address, NULL,base);␊ |
| 2122 | ␉␉␉␉␉␉␉␉U32 idx␉␉= strtoul((const char *)index, NULL,base);␊ |
| 2123 | ␉␉␉␉␉␉␉␉U32 lat␉␉= strtoul((const char *)Lat, NULL,base);␊ |
| 2124 | ␉␉␉␉␉␉␉␉U32 pw␉␉= strtoul((const char *)Pw, NULL,base);␊ |
| 2125 | ␉␉␉␉␉␉␉␉␊ |
| 2126 | ␉␉␉␉␉␉␉␉ACPI_GENERIC_ADDRESS mwait_gas = {GAS_TYPE_FFH,bw,boff,acs,addr}; ␊ |
| 2127 | ␉␉␉␉␉␉␉␉ACPI_GENERIC_ADDRESS io_gas = {(i == 1) ? GAS_TYPE_FFH : GAS_TYPE_SYSTEM_IO,bw,boff,acs,addr}; ␊ |
| 2128 | ␉␉␉␉␉␉␉␉␊ |
| 2129 | ␉␉␉␉␉␉␉␉CSTATE mwait_cstate = {idx,lat,pw};␊ |
| 2130 | ␉␉␉␉␉␉␉␉CSTATE io_cstate = {idx,lat,pw};␊ |
| 2131 | ␉␉␉␉␉␉␉␉␊ |
| 2132 | ␉␉␉␉␉␉␉␉{␊ |
| 2133 | ␉␉␉␉␉␉␉␉␉cpu->pkg_mwait_cstates.cstate[cpu->pkg_mwait_cstates.num_cstates] = mwait_cstate;␊ |
| 2134 | ␉␉␉␉␉␉␉␉␉cpu->pkg_mwait_cstates.gas[cpu->pkg_mwait_cstates.num_cstates] = mwait_gas;␊ |
| 2135 | ␉␉␉␉␉␉␉␉␉cpu->pkg_mwait_cstates.num_cstates++;␊ |
| 2136 | ␉␉␉␉␉␉␉␉}␊ |
| 2137 | ␉␉␉␉␉␉␉␉␊ |
| 2138 | ␉␉␉␉␉␉␉␉{␊ |
| 2139 | ␉␉␉␉␉␉␉␉␉cpu->pkg_io_cstates.cstate[cpu->pkg_io_cstates.num_cstates] = io_cstate;␊ |
| 2140 | ␉␉␉␉␉␉␉␉␉cpu->pkg_io_cstates.gas[cpu->pkg_io_cstates.num_cstates] = io_gas;␊ |
| 2141 | ␉␉␉␉␉␉␉␉␉cpu->pkg_io_cstates.num_cstates++;␊ |
| 2142 | ␉␉␉␉␉␉␉␉}␊ |
| 2143 | ␉␉␉␉␉␉␉␉num_cstates++;␉␉␉␉␉␉␉␉␊ |
| 2144 | ␉␉␉␉␉␉␉␉␊ |
| 2145 | ␉␉␉␉␉␉␉␉if (num_cstates >= MAX_CSTATES)␊ |
| 2146 | ␉␉␉␉␉␉␉␉{␊ |
| 2147 | ␉␉␉␉␉␉␉␉␉break;␊ |
| 2148 | ␉␉␉␉␉␉␉␉}␊ |
| 2149 | ␉␉␉␉␉␉␉}␊ |
| 2150 | ␉␉␉␉␉␉} ␊ |
| 2151 | ␉␉␉␉␉}␊ |
| 2152 | ␉␉␉␉}␊ |
| 2153 | ␉␉␉␉␊ |
| 2154 | ␉␉␉␉if (num_cstates)␊ |
| 2155 | ␉␉␉␉{␊ |
| 2156 | ␉␉␉␉␉return (1);␊ |
| 2157 | ␉␉␉␉}␉␉␉␉␊ |
| 2158 | ␉␉␉}␊ |
| 2159 | ␉␉}␉␊ |
| 2160 | ␉}␊ |
| 2161 | ␊ |
| 2162 | ␉{␊ |
| 2163 | ␉␉static const ACPI_GENERIC_ADDRESS mwait_gas[] = {␊ |
| 2164 | ␉␉␉{GAS_TYPE_FFH,1,2,1,0x00}, // processor C1␊ |
| 2165 | ␉␉␉{GAS_TYPE_FFH,1,2,1,0x10}, // processor C3 as ACPI C2␊ |
| 2166 | ␉␉␉{GAS_TYPE_FFH,1,2,1,0x10}, // processor C3 as ACPI C3␊ |
| 2167 | ␉␉␉{GAS_TYPE_FFH,1,2,1,0x10}, // processor C3 as ACPI C4␊ |
| 2168 | ␉␉␉{GAS_TYPE_FFH,1,2,1,0x20}, // processor C6␊ |
| 2169 | ␉␉␉{GAS_TYPE_FFH,1,2,1,0x30}, // processor C7␊ |
| 2170 | ␉␉};␊ |
| 2171 | ␉␉␊ |
| 2172 | ␉␉static const ACPI_GENERIC_ADDRESS io_gas[] = {␊ |
| 2173 | ␉␉␉{GAS_TYPE_FFH, 0,0,0,0x00}, // processor C1␊ |
| 2174 | ␉␉␉{GAS_TYPE_SYSTEM_IO,8,0,0,0x14}, // processor C3 as ACPI C2␊ |
| 2175 | ␉␉␉{GAS_TYPE_SYSTEM_IO,8,0,0,0x14}, // processor C3 as ACPI C3␊ |
| 2176 | ␉␉␉{GAS_TYPE_SYSTEM_IO,8,0,0,0x15}, // processor C3 as ACPI C4␊ |
| 2177 | ␉␉␉{GAS_TYPE_SYSTEM_IO,8,0,0,0x15}, // processor C6␊ |
| 2178 | ␉␉␉{GAS_TYPE_SYSTEM_IO,8,0,0,0x16}, // processor C7␊ |
| 2179 | ␉␉};␊ |
| 2180 | ␉␉␊ |
| 2181 | ␉␉static const CSTATE mwait_cstate [] = {␊ |
| 2182 | ␉␉␉{1,0x01,0x3e8}, // processor C1␊ |
| 2183 | ␉␉␉{2,0x40,0x1f4}, // processor C3 as ACPI C2␊ |
| 2184 | ␉␉␉{3,0x40,0x1f4}, // processor C3 as ACPI C3␊ |
| 2185 | ␉␉␉{4,0x40,0x1f4}, // processor C3 as ACPI C4␊ |
| 2186 | ␉␉␉{6/*was 3*/,0x60,0x15e}, // processor C6␊ |
| 2187 | ␉␉␉{7/*was 3*/,0x60,0x0c8}, // processor C7␊ |
| 2188 | ␉␉};␊ |
| 2189 | ␉␉␊ |
| 2190 | ␉␉static const CSTATE io_cstate [] = {␊ |
| 2191 | ␉␉␉{1,0x01,0x3e8}, // processor C1␊ |
| 2192 | ␉␉␉{2,0x40,0x1f4}, // processor C3 as ACPI C2␊ |
| 2193 | ␉␉␉{3,0x40,0x1f4}, // processor C3 as ACPI C3␊ |
| 2194 | ␉␉␉{4,0x40,0x1f4}, // processor C3 as ACPI C4␊ |
| 2195 | ␉␉␉{6/*was 3*/,0x60,0x15e}, // processor C6␊ |
| 2196 | ␉␉␉{7/*was 3*/,0x60,0x0c8}, // processor C7␊ |
| 2197 | ␉␉};␊ |
| 2198 | ␉␉␊ |
| 2199 | ␉␉static const U32 cstate_2_index [] = {0,0,0,1,2,3,4,5};␊ |
| 2200 | ␉␉␊ |
| 2201 | ␉␉// Build C-state table info based on verified options␊ |
| 2202 | ␉␉␊ |
| 2203 | ␉␉// Desired state for the processor core C3 state included in the _CST as an␊ |
| 2204 | ␉␉// ACPI C2 state.␊ |
| 2205 | ␉␉// 1= processor core C3 can be used as an ACPI C2 state␊ |
| 2206 | ␉␉// 0= processor core C3 cannot be used as an ACPI C2 state␊ |
| 2207 | ␉␉int c2_enabled = 1;␊ |
| 2208 | ␉␉␊ |
| 2209 | ␉␉// Desired state for the processor core C3 state included in the _CST␊ |
| 2210 | ␉␉// 0= processor core C3 cannot be used as an ACPI C state␊ |
| 2211 | ␉␉// 2= processor core C3 can be used as an ACPI C2 state␊ |
| 2212 | ␉␉// 3= processor core C3 can be used as an ACPI C3 state␊ |
| 2213 | ␉␉// 4= processor core C3 can be used as an ACPI C2 state␊ |
| 2214 | ␉␉// if Invariant APIC Timer detected, else not used as ACPI C state␊ |
| 2215 | ␉␉// 5= processor core C3 can be used as an ACPI C2 state␊ |
| 2216 | ␉␉// if Invariant APIC Timer detected, else APIC C3 state␊ |
| 2217 | ␉␉// 6= processor core C3 can be used as an ACPI C4 state␊ |
| 2218 | ␉␉int c3_enabled = 2;␊ |
| 2219 | ␉␉␊ |
| 2220 | ␉␉// Desired state for the processor core C3 state included in the _CST as an␊ |
| 2221 | ␉␉// ACPI C4 state.␊ |
| 2222 | ␉␉// 1= processor core C3 can be used as an ACPI C4 state␊ |
| 2223 | ␉␉// 0= processor core C3 cannot be used as an ACPI C4 state␊ |
| 2224 | ␉␉int c4_enabled = 0;␊ |
| 2225 | ␉␉␊ |
| 2226 | ␉␉// Desired state for the processor core C6 state included in the _CST as an␊ |
| 2227 | ␉␉// ACPI C3 state.␊ |
| 2228 | ␉␉// 1= processor core C6 can be used as an ACPI C3 state␊ |
| 2229 | ␉␉// 0= processor core C6 cannot be used as an ACPI C3 state␊ |
| 2230 | ␉␉int c6_enabled = 0;␊ |
| 2231 | ␉␉␊ |
| 2232 | ␉␉// Desired state for the processor core C7 state included in the _CST as an␊ |
| 2233 | ␉␉// ACPI C3 state.␊ |
| 2234 | ␉␉// 1= processor core C7 can be used as an ACPI C7 state␊ |
| 2235 | ␉␉// 0= processor core C7 cannot be used as an ACPI C7 state␊ |
| 2236 | ␉␉int c7_enabled = 0;␊ |
| 2237 | ␉␉␊ |
| 2238 | ␉␉{␉␉␊ |
| 2239 | ␉␉␉bool tmpval;␊ |
| 2240 | ␉␉␉␊ |
| 2241 | ␉␉␉␊ |
| 2242 | ␉␉␉if (getBoolForKey(kEnableC2State, &tmpval, &bootInfo->bootConfig))␊ |
| 2243 | ␉␉␉{␊ |
| 2244 | ␉␉␉␉c2_enabled = tmpval;␊ |
| 2245 | ␉␉␉}␊ |
| 2246 | ␉␉␉␉␊ |
| 2247 | ␉␉␉if (!getIntForKey("C3StateOption", &c3_enabled, &bootInfo->bootConfig))␊ |
| 2248 | ␉␉␉{␊ |
| 2249 | ␉␉␉␉c3_enabled = (getBoolForKey(kEnableC3State, &tmpval, &bootInfo->bootConfig)&&tmpval) ? 3 : 0;␊ |
| 2250 | ␉␉␉}␉␉␊ |
| 2251 | ␉␉␉if (c3_enabled == 6)␊ |
| 2252 | ␉␉␉{␊ |
| 2253 | ␉␉␉␉c4_enabled = 1;␊ |
| 2254 | ␉␉␉}␊ |
| 2255 | ␉␉␉else ␊ |
| 2256 | ␉␉␉{␊ |
| 2257 | ␉␉␉␉c4_enabled = (getBoolForKey(kEnableC4State, &tmpval, &bootInfo->bootConfig)&&tmpval) ? 1 : 0;␊ |
| 2258 | ␉␉␉}␊ |
| 2259 | ␉␉␉c6_enabled = (getBoolForKey(kEnableC6State, &tmpval, &bootInfo->bootConfig)&&tmpval) ? 1 : 0;␊ |
| 2260 | ␉␉␉c7_enabled = (getBoolForKey(kEnableC7State, &tmpval, &bootInfo->bootConfig)&&tmpval) ? 1 : 0;␉␉␊ |
| 2261 | ␉␉}␊ |
| 2262 | ␉␉␊ |
| 2263 | ␉␉cpu->pkg_mwait_cstates.num_cstates = 0;␊ |
| 2264 | ␉␉{␊ |
| 2265 | ␉␉␉{␊ |
| 2266 | ␉␉␉␉cpu->pkg_mwait_cstates.cstate[cpu->pkg_mwait_cstates.num_cstates] = mwait_cstate[cstate_2_index[CPU_C1]];␊ |
| 2267 | ␉␉␉␉cpu->pkg_mwait_cstates.gas[cpu->pkg_mwait_cstates.num_cstates] = mwait_gas[cstate_2_index[CPU_C1]];␊ |
| 2268 | ␉␉␉␉cpu->pkg_mwait_cstates.num_cstates++;␊ |
| 2269 | ␉␉␉}␊ |
| 2270 | ␉␉␉if (cpu->core_c3_supported && c2_enabled && (c2_enabled || (c3_enabled == 2) ||␊ |
| 2271 | ␉␉␉␉␉␉␉␉␉␉ ((c3_enabled == 4) && cpu->invariant_apic_timer_flag)))␊ |
| 2272 | ␉␉␉{␊ |
| 2273 | ␉␉␉␉cpu->pkg_mwait_cstates.cstate[cpu->pkg_mwait_cstates.num_cstates] = mwait_cstate[cstate_2_index[CPU_C3_ACPI_C2]];␊ |
| 2274 | ␉␉␉␉cpu->pkg_mwait_cstates.gas[cpu->pkg_mwait_cstates.num_cstates] = mwait_gas[cstate_2_index[CPU_C3_ACPI_C2]];␊ |
| 2275 | ␉␉␉␉cpu->pkg_mwait_cstates.num_cstates++;␊ |
| 2276 | ␉␉␉}␊ |
| 2277 | ␉␉␉if (c4_enabled)␊ |
| 2278 | ␉␉␉{␊ |
| 2279 | ␉␉␉␉if (cpu->core_c3_supported)␊ |
| 2280 | ␉␉␉␉{␊ |
| 2281 | ␉␉␉␉␉cpu->pkg_mwait_cstates.cstate[cpu->pkg_mwait_cstates.num_cstates] = mwait_cstate[cstate_2_index[CPU_C3_ACPI_C4]];␊ |
| 2282 | ␉␉␉␉␉cpu->pkg_mwait_cstates.gas[cpu->pkg_mwait_cstates.num_cstates] = mwait_gas[cstate_2_index[CPU_C3_ACPI_C4]];␊ |
| 2283 | ␉␉␉␉␉cpu->pkg_mwait_cstates.num_cstates++;␊ |
| 2284 | ␉␉␉␉}␊ |
| 2285 | ␉␉␉}␊ |
| 2286 | ␉␉␉else␊ |
| 2287 | ␉␉␉{␊ |
| 2288 | ␉␉␉␉␊ |
| 2289 | ␉␉␉␉if (cpu->core_c3_supported && ((c3_enabled == 3) ||␊ |
| 2290 | ␉␉␉␉␉␉␉␉␉␉␉ ((c3_enabled == 4) && !cpu->invariant_apic_timer_flag)))␊ |
| 2291 | ␉␉␉␉{␊ |
| 2292 | ␉␉␉␉␉cpu->pkg_mwait_cstates.cstate[cpu->pkg_mwait_cstates.num_cstates] = mwait_cstate[cstate_2_index[CPU_C3_ACPI_C3]];␊ |
| 2293 | ␉␉␉␉␉cpu->pkg_mwait_cstates.gas[cpu->pkg_mwait_cstates.num_cstates] = mwait_gas[cstate_2_index[CPU_C3_ACPI_C3]];␊ |
| 2294 | ␉␉␉␉␉cpu->pkg_mwait_cstates.num_cstates++;␊ |
| 2295 | ␉␉␉␉}␊ |
| 2296 | ␉␉␉}␊ |
| 2297 | ␉␉␉␊ |
| 2298 | ␉␉␉␊ |
| 2299 | ␉␉␉if (cpu->core_c6_supported && c6_enabled)␊ |
| 2300 | ␉␉␉{␊ |
| 2301 | ␉␉␉␉cpu->pkg_mwait_cstates.cstate[cpu->pkg_mwait_cstates.num_cstates] = mwait_cstate[cstate_2_index[CPU_C6]];␊ |
| 2302 | ␉␉␉␉cpu->pkg_mwait_cstates.gas[cpu->pkg_mwait_cstates.num_cstates] = mwait_gas[cstate_2_index[CPU_C6]];␊ |
| 2303 | ␉␉␉␉cpu->pkg_mwait_cstates.num_cstates++;␊ |
| 2304 | ␉␉␉}␊ |
| 2305 | ␉␉␉if (cpu->core_c7_supported && c7_enabled)␊ |
| 2306 | ␉␉␉{␊ |
| 2307 | ␉␉␉␉cpu->pkg_mwait_cstates.cstate[cpu->pkg_mwait_cstates.num_cstates] = mwait_cstate[cstate_2_index[CPU_C7]];␊ |
| 2308 | ␉␉␉␉cpu->pkg_mwait_cstates.gas[cpu->pkg_mwait_cstates.num_cstates] = mwait_gas[cstate_2_index[CPU_C7]];␊ |
| 2309 | ␉␉␉␉cpu->pkg_mwait_cstates.num_cstates++;␊ |
| 2310 | ␉␉␉}␊ |
| 2311 | ␉␉}␊ |
| 2312 | ␉␉␊ |
| 2313 | ␉␉cpu->pkg_io_cstates.num_cstates = 0;␊ |
| 2314 | ␉␉{␊ |
| 2315 | ␉␉␉{␊ |
| 2316 | ␉␉␉␉cpu->pkg_io_cstates.cstate[cpu->pkg_io_cstates.num_cstates] = io_cstate[cstate_2_index[CPU_C1]];␊ |
| 2317 | ␉␉␉␉cpu->pkg_io_cstates.gas[cpu->pkg_io_cstates.num_cstates] = io_gas[cstate_2_index[CPU_C1]];␊ |
| 2318 | ␉␉␉␉cpu->pkg_io_cstates.num_cstates++;␊ |
| 2319 | ␉␉␉}␊ |
| 2320 | ␉␉␉if (cpu->core_c3_supported && c2_enabled && (c2_enabled || (c3_enabled == 2) ||␊ |
| 2321 | ␉␉␉␉␉␉␉␉␉␉ ((c3_enabled == 4) && cpu->invariant_apic_timer_flag)))␊ |
| 2322 | ␉␉␉{␊ |
| 2323 | ␉␉␉␉cpu->pkg_io_cstates.cstate[cpu->pkg_io_cstates.num_cstates] = io_cstate[cstate_2_index[CPU_C3_ACPI_C2]];␊ |
| 2324 | ␉␉␉␉cpu->pkg_io_cstates.gas[cpu->pkg_io_cstates.num_cstates] = io_gas[cstate_2_index[CPU_C3_ACPI_C2]];␊ |
| 2325 | ␉␉␉␉cpu->pkg_io_cstates.gas[cpu->pkg_io_cstates.num_cstates].Address += pmbase;␊ |
| 2326 | ␉␉␉␉cpu->pkg_io_cstates.num_cstates++;␊ |
| 2327 | ␉␉␉}␊ |
| 2328 | ␉␉␉if (c4_enabled)␊ |
| 2329 | ␉␉␉{␊ |
| 2330 | ␉␉␉␉if (cpu->core_c3_supported)␊ |
| 2331 | ␉␉␉␉{␊ |
| 2332 | ␉␉␉␉␉cpu->pkg_io_cstates.cstate[cpu->pkg_io_cstates.num_cstates] = io_cstate[cstate_2_index[CPU_C3_ACPI_C4]];␊ |
| 2333 | ␉␉␉␉␉cpu->pkg_io_cstates.gas[cpu->pkg_io_cstates.num_cstates] = io_gas[cstate_2_index[CPU_C3_ACPI_C4]];␊ |
| 2334 | ␉␉␉␉␉cpu->pkg_io_cstates.gas[cpu->pkg_io_cstates.num_cstates].Address += pmbase;␊ |
| 2335 | ␉␉␉␉␉cpu->pkg_io_cstates.num_cstates++;␊ |
| 2336 | ␉␉␉␉}␊ |
| 2337 | ␉␉␉}␊ |
| 2338 | ␉␉␉else ␊ |
| 2339 | ␉␉␉{␊ |
| 2340 | ␉␉␉␉␊ |
| 2341 | ␉␉␉␉if (cpu->core_c3_supported && ((c3_enabled == 3) ||␊ |
| 2342 | ␉␉␉␉␉␉␉␉␉␉␉ ((c3_enabled == 4) && !cpu->invariant_apic_timer_flag)))␊ |
| 2343 | ␉␉␉␉{␊ |
| 2344 | ␉␉␉␉␉cpu->pkg_io_cstates.cstate[cpu->pkg_io_cstates.num_cstates] = io_cstate[cstate_2_index[CPU_C3_ACPI_C3]];␊ |
| 2345 | ␉␉␉␉␉cpu->pkg_io_cstates.gas[cpu->pkg_io_cstates.num_cstates] = io_gas[cstate_2_index[CPU_C3_ACPI_C3]];␊ |
| 2346 | ␉␉␉␉␉cpu->pkg_io_cstates.gas[cpu->pkg_io_cstates.num_cstates].Address += pmbase;␊ |
| 2347 | ␉␉␉␉␉cpu->pkg_io_cstates.num_cstates++;␊ |
| 2348 | ␉␉␉␉}␊ |
| 2349 | ␉␉␉}␊ |
| 2350 | ␉␉␉␊ |
| 2351 | ␉␉␉if (cpu->core_c6_supported && c6_enabled)␊ |
| 2352 | ␉␉␉{␊ |
| 2353 | ␉␉␉␉cpu->pkg_io_cstates.cstate[cpu->pkg_io_cstates.num_cstates] = io_cstate[cstate_2_index[CPU_C6]];␊ |
| 2354 | ␉␉␉␉cpu->pkg_io_cstates.gas[cpu->pkg_io_cstates.num_cstates] = io_gas[cstate_2_index[CPU_C6]];␊ |
| 2355 | ␉␉␉␉cpu->pkg_io_cstates.gas[cpu->pkg_io_cstates.num_cstates].Address += pmbase;␊ |
| 2356 | ␉␉␉␉cpu->pkg_io_cstates.num_cstates++;␊ |
| 2357 | ␉␉␉}␊ |
| 2358 | ␉␉␉if (cpu->core_c7_supported && c7_enabled)␊ |
| 2359 | ␉␉␉{␊ |
| 2360 | ␉␉␉␉cpu->pkg_io_cstates.cstate[cpu->pkg_io_cstates.num_cstates] = io_cstate[cstate_2_index[CPU_C7]];␊ |
| 2361 | ␉␉␉␉cpu->pkg_io_cstates.gas[cpu->pkg_io_cstates.num_cstates] = io_gas[cstate_2_index[CPU_C7]];␊ |
| 2362 | ␉␉␉␉cpu->pkg_io_cstates.gas[cpu->pkg_io_cstates.num_cstates].Address += pmbase;␊ |
| 2363 | ␉␉␉␉cpu->pkg_io_cstates.num_cstates++;␊ |
| 2364 | ␉␉␉}␊ |
| 2365 | ␉␉}␊ |
| 2366 | ␉}␊ |
| 2367 | ␉␊ |
| 2368 | ␉return (1);␊ |
| 2369 | }␊ |
| 2370 | ␊ |
| 2371 | #if BUILD_ACPI_TSS␊ |
| 2372 | //-----------------------------------------------------------------------------␊ |
| 2373 | static U32 BuildTstateInfo(CPU_DETAILS * cpu)␊ |
| 2374 | {␊ |
| 2375 | // Coarse grained clock modulation is available if cpuid.6.eax[5] = 0␊ |
| 2376 | // Max of 8 T-states using 12.5% increments␊ |
| 2377 | static const TSTATE tstate_coarse_grain [] = {␊ |
| 2378 | {100,0,0,0x00,0},␊ |
| 2379 | { 88,0,0,0x1e,0},␊ |
| 2380 | { 75,0,0,0x1c,0},␊ |
| 2381 | { 63,0,0,0x1a,0},␊ |
| 2382 | { 50,0,0,0x18,0},␊ |
| 2383 | { 38,0,0,0x16,0},␊ |
| 2384 | { 25,0,0,0x14,0},␊ |
| 2385 | { 13,0,0,0x12,0},␊ |
| 2386 | };␊ |
| 2387 | ␊ |
| 2388 | // Fine grained clock modulation is available if cpuid.6.eax[5] = 1␊ |
| 2389 | // Max of 15 T-states using 6.25% increments␊ |
| 2390 | static const TSTATE tstate_fine_grain [] = {␊ |
| 2391 | {100,0,0,0x00,0},␊ |
| 2392 | { 94,0,0,0x1f,0},␊ |
| 2393 | { 88,0,0,0x1e,0},␊ |
| 2394 | { 81,0,0,0x1d,0},␊ |
| 2395 | { 75,0,0,0x1c,0},␊ |
| 2396 | { 69,0,0,0x1b,0},␊ |
| 2397 | { 63,0,0,0x1a,0},␊ |
| 2398 | { 56,0,0,0x19,0},␊ |
| 2399 | { 50,0,0,0x18,0},␊ |
| 2400 | { 44,0,0,0x17,0},␊ |
| 2401 | { 38,0,0,0x16,0},␊ |
| 2402 | { 31,0,0,0x15,0},␊ |
| 2403 | { 25,0,0,0x14,0},␊ |
| 2404 | { 19,0,0,0x13,0},␊ |
| 2405 | { 13,0,0,0x12,0},␊ |
| 2406 | };␊ |
| 2407 | ␊ |
| 2408 | // Build T-state table info based on verified options␊ |
| 2409 | U32 num_cpu;␊ |
| 2410 | const TSTATE * tstate;␊ |
| 2411 | U32 num_tstates;␊ |
| 2412 | ␊ |
| 2413 | for (num_cpu = 0; num_cpu < cpu_map_count; num_cpu ++)␊ |
| 2414 | { ␊ |
| 2415 | // Check if fine or coarse grained clock modulation is available␊ |
| 2416 | if (Platform->CPU.fine_grain_clock_mod)␊ |
| 2417 | {␊ |
| 2418 | // Fine grain thermal throttling is available␊ |
| 2419 | num_tstates = 15;␊ |
| 2420 | tstate = tstate_fine_grain;␊ |
| 2421 | }␊ |
| 2422 | else␊ |
| 2423 | {␊ |
| 2424 | // Coarse grain thermal throttling is available␊ |
| 2425 | num_tstates = 8;␊ |
| 2426 | tstate = tstate_coarse_grain;␊ |
| 2427 | }␊ |
| 2428 | ␊ |
| 2429 | cpu->pkg_tstates.num_tstates = num_tstates;␊ |
| 2430 | {␊ |
| 2431 | U32 index;␊ |
| 2432 | for (index = 0; index < num_tstates; index++)␊ |
| 2433 | {␊ |
| 2434 | cpu->pkg_tstates.tstate[index] = tstate[index];␊ |
| 2435 | cpu->pkg_tstates.tstate[index].power = 1000 * (compute_tdp(cpu) * (num_tstates - index)) / num_tstates;␊ |
| 2436 | }␊ |
| 2437 | } ␊ |
| 2438 | ␊ |
| 2439 | ␊ |
| 2440 | }␊ |
| 2441 | return (1);␊ |
| 2442 | }␊ |
| 2443 | #endif␊ |
| 2444 | ␊ |
| 2445 | static U32 ProcessSsdt(U32 * new_table_list, ACPI_TABLE_DSDT *dsdt, bool enable_cstates, bool enable_pstates, bool enable_tstates )␊ |
| 2446 | {␊ |
| 2447 | ␉DBG("Processing SSDT\n");␊ |
| 2448 | ␉␊ |
| 2449 | ␉ACPI_TABLE_MADT * madt_file = (void*)0ul;␊ |
| 2450 | ␉ACPI_TABLE_MADT * MadtPointer = (void*)0ul;␊ |
| 2451 | ␉U8 new_table_index = 0;␊ |
| 2452 | ␉bool oem_apic=false;␊ |
| 2453 | ␉␊ |
| 2454 | ␉if (Platform->CPU.Vendor != 0x756E6547) {␊ |
| 2455 | ␉␉verbose ("Not an Intel platform: SSDT will not be generated !!!\n");␊ |
| 2456 | ␉␉return(1);␊ |
| 2457 | ␉}␊ |
| 2458 | ␉␊ |
| 2459 | ␉if (!(Platform->CPU.Features & CPUID_FEATURE_MSR)) {␊ |
| 2460 | ␉␉verbose ("Unsupported CPU: SSDT will not be generated !!!\n");␊ |
| 2461 | ␉␉return(1);␊ |
| 2462 | ␉}␊ |
| 2463 | ␉␉␉␊ |
| 2464 | ␉{␉␉␊ |
| 2465 | ␉␉bool tmpval;␉␉␊ |
| 2466 | ␉␉oem_apic=getBoolForKey(kOEMAPIC, &tmpval, &bootInfo->bootConfig)&&tmpval;␉␉␊ |
| 2467 | ␉} ␊ |
| 2468 | ␉␊ |
| 2469 | ␉// Get an empty space in the new_talbe_list (true = allow reserved space)␊ |
| 2470 | ␉U8 empty = get_0ul_index_in_list(new_table_list, true);␊ |
| 2471 | ␉␊ |
| 2472 | ␉// Check to confirm space is available␊ |
| 2473 | ␉if (empty == ACPI_TABLE_LIST_FULL)␊ |
| 2474 | ␉{␉␉␊ |
| 2475 | ␉␉printf("Error: not enought reserved space in the new acpi list for the SSDT table,\n ");␊ |
| 2476 | ␉␉printf(" please increase the RESERVED_AERA\n");␊ |
| 2477 | ␉␉return(1);␊ |
| 2478 | ␉}␊ |
| 2479 | ␉␊ |
| 2480 | ␉if ((madt_file = (ACPI_TABLE_MADT *)get_new_table_in_list(new_table_list, NAMESEG("APIC"), &new_table_index)) != (void *)0ul)␊ |
| 2481 | ␉{␉␉␊ |
| 2482 | ␉␉if (oem_apic == false) ␊ |
| 2483 | ␉␉{␊ |
| 2484 | ␉␉␉MadtPointer = (ACPI_TABLE_MADT *)madt_file;␉␉␊ |
| 2485 | ␉␉␉new_table_list[new_table_index] = 0ul; // This way, the non-patched table will not be added in our new rsdt/xsdt table list // note: for now we don't patch this table␊ |
| 2486 | ␉␉}␊ |
| 2487 | ␉␉␊ |
| 2488 | ␉} else␊ |
| 2489 | ␉␉MadtPointer = (acpi_tables.MadtPointer64 != (void*)0ul) ? (ACPI_TABLE_MADT *)acpi_tables.MadtPointer64 : (ACPI_TABLE_MADT *)acpi_tables.MadtPointer;␊ |
| 2490 | ␉␊ |
| 2491 | ␉// Create buffer for SSDT␊ |
| 2492 | ␉U8 memory_for_ssdt[20 * 1024];␉␉␊ |
| 2493 | ␉␊ |
| 2494 | ␉// Build the SSDT␊ |
| 2495 | ␉if ( (BuildSsdt(MadtPointer, dsdt, memory_for_ssdt, sizeof(memory_for_ssdt), enable_cstates, enable_pstates, enable_tstates)) == 0)␊ |
| 2496 | ␉{␊ |
| 2497 | ␉␉printf("Error: Failed to build SSDT table\n");␊ |
| 2498 | ␉␉return (0);␊ |
| 2499 | ␉}␊ |
| 2500 | ␉␊ |
| 2501 | ␉// insert SSDT in the new_table_list␊ |
| 2502 | ␉{␊ |
| 2503 | ␉␉// Create pointer to SSDT just built in the stack buffer␊ |
| 2504 | ␉␉ACPI_TABLE_SSDT * old_ssdt = (ACPI_TABLE_SSDT *)memory_for_ssdt;␉␉␊ |
| 2505 | ␉␉␊ |
| 2506 | ␉␉// Reserved kernel memory for the ssdt table␊ |
| 2507 | ␉␉ACPI_TABLE_SSDT *new_ssdt = (ACPI_TABLE_SSDT *)AllocateKernelMemory(old_ssdt->Header.Length);␊ |
| 2508 | ␉␉␊ |
| 2509 | ␉␉// Move the old stack buffer to kernel memory␊ |
| 2510 | ␉␉memcpy(new_ssdt, old_ssdt, old_ssdt->Header.Length);␊ |
| 2511 | ␉␉␊ |
| 2512 | ␉␉// Add the new ssdt into an empty space of the new_table_list␊ |
| 2513 | ␉␉new_table_list[empty] = (U32)new_ssdt;␉␉␉␉␊ |
| 2514 | ␉}␊ |
| 2515 | ␉␊ |
| 2516 | ␉verbose ("SSDT table generated successfully\n");␊ |
| 2517 | ␉return(1);␊ |
| 2518 | }␊ |
| 2519 | ␊ |
| 2520 | //-----------------------------------------------------------------------------␊ |
| 2521 | static void * buildCpuScope (void * current, U32 cpu_namespace, PROCESSOR_NUMBER_TO_NAMESEG * aslCpuNamePath)␊ |
| 2522 | {␊ |
| 2523 | ␉ACPI_SCOPE * scope = current;␊ |
| 2524 | ␉current = scope + 1;␊ |
| 2525 | ␉␊ |
| 2526 | ␉scope->scopeOpcode = AML_SCOPE_OP;␊ |
| 2527 | ␉scope->rootChar = AML_ROOT_PREFIX;␊ |
| 2528 | ␉␊ |
| 2529 | ␉if (aslCpuNamePath->seg_count == 1)␊ |
| 2530 | ␉{␊ |
| 2531 | ␉␉DUAL_NAME_PATH * dualNamePath = current;␊ |
| 2532 | ␉␉current = dualNamePath + 1;␊ |
| 2533 | ␉␉dualNamePath->prefix = AML_DUAL_NAME_PREFIX;␊ |
| 2534 | ␉␉dualNamePath->nameseg[0] = cpu_namespace;␊ |
| 2535 | ␉␉dualNamePath->nameseg[1] = aslCpuNamePath->nameseg[0];␊ |
| 2536 | ␉}␊ |
| 2537 | ␉else␊ |
| 2538 | ␉{␊ |
| 2539 | ␉␉MULTI_NAME_PATH * multiNamePath = current;␊ |
| 2540 | ␉␉current = multiNamePath + 1;␊ |
| 2541 | ␉␉multiNamePath->prefix = AML_MULTI_NAME_PREFIX;␊ |
| 2542 | ␉␉// the nameseg count includes the root prefix and all other namesegs␊ |
| 2543 | ␉␉multiNamePath->segCount = (U8) aslCpuNamePath->seg_count+1;␊ |
| 2544 | ␉␉multiNamePath->nameseg[0] = cpu_namespace;␊ |
| 2545 | ␉␉{␊ |
| 2546 | ␉␉␉U32 i;␊ |
| 2547 | ␉␉␉for (i=0; i<aslCpuNamePath->seg_count; i++)␊ |
| 2548 | ␉␉␉␉multiNamePath->nameseg[i+1] = aslCpuNamePath->nameseg[i];␊ |
| 2549 | ␉␉}␊ |
| 2550 | ␉}␊ |
| 2551 | ␉return (current);␊ |
| 2552 | }␊ |
| 2553 | //-----------------------------------------------------------------------------␊ |
| 2554 | static void * buildPDC(void * current)␊ |
| 2555 | {␊ |
| 2556 | ␉ACPI_METHOD * pdc = current;␊ |
| 2557 | ␉current = buildMethod(current, NAMESEG("_PDC"), 1);␊ |
| 2558 | ␉␊ |
| 2559 | ␉// CreateDWordField (Arg0, 0x08, CAPA)␊ |
| 2560 | ␉current = buildOpCode(current, AML_CREATE_DWORD_FIELD_OP);␊ |
| 2561 | ␉current = buildOpCode(current, AML_ARG0_OP);␊ |
| 2562 | ␉current = buildByteConst(current, 0x08);␊ |
| 2563 | ␉current = buildNameSeg(current, NAMESEG("CAPA"));␊ |
| 2564 | ␉␊ |
| 2565 | ␉// Store (CAPA, TYPE)␊ |
| 2566 | ␉current = buildOpCode(current, AML_STORE_OP);␊ |
| 2567 | ␉current = buildNameSeg(current, NAMESEG("CAPA"));␊ |
| 2568 | ␉current = buildNameSeg(current, NAMESEG("TYPE"));␊ |
| 2569 | ␉␊ |
| 2570 | ␉// CreateDWordField (Arg0, 0x00, REVS)␊ |
| 2571 | ␉current = buildOpCode(current, AML_CREATE_DWORD_FIELD_OP);␊ |
| 2572 | ␉current = buildOpCode(current, AML_ARG0_OP);␊ |
| 2573 | ␉current = buildByteConst(current, 0x00);␊ |
| 2574 | ␉current = buildNameSeg(current, NAMESEG("REVS"));␊ |
| 2575 | ␉␊ |
| 2576 | ␉// CreateDWordField (Arg0, 0x04, SIZE)␊ |
| 2577 | ␉current = buildOpCode(current, AML_CREATE_DWORD_FIELD_OP);␊ |
| 2578 | ␉current = buildOpCode(current, AML_ARG0_OP);␊ |
| 2579 | ␉current = buildByteConst(current, 0x04);␊ |
| 2580 | ␉current = buildNameSeg(current, NAMESEG("SIZE"));␊ |
| 2581 | ␉␊ |
| 2582 | ␉// Store(SizeOf(Arg0), Local0)␊ |
| 2583 | ␉current = buildOpCode(current, AML_STORE_OP);␊ |
| 2584 | ␉current = buildOpCode(current, AML_SIZEOF_OP);␊ |
| 2585 | ␉current = buildOpCode(current, AML_ARG0_OP);␊ |
| 2586 | ␉current = buildOpCode(current, AML_LOCAL0_OP);␊ |
| 2587 | ␉␊ |
| 2588 | ␉// Store(Subtract(Local0, 0x08),Local1)␊ |
| 2589 | ␉current = buildOpCode(current, AML_STORE_OP);␊ |
| 2590 | ␉current = buildOpCode(current, AML_SUBTRACT_OP);␊ |
| 2591 | ␉current = buildOpCode(current, AML_LOCAL0_OP);␊ |
| 2592 | ␉current = buildByteConst(current, 0x08);␊ |
| 2593 | ␉current = buildOpCode(current, AML_ZERO_OP);␊ |
| 2594 | ␉current = buildOpCode(current, AML_LOCAL1_OP);␊ |
| 2595 | ␉␊ |
| 2596 | ␉// CreateField (Arg0, 0x40, Multiply (Local1, 0x08), TEMP)␊ |
| 2597 | ␉current = buildOpCode(current, AML_EXT_OP_PREFIX);␊ |
| 2598 | ␉current = buildOpCode(current, AML_CREATE_FIELD_OP);␊ |
| 2599 | ␉current = buildOpCode(current, AML_ARG0_OP);␊ |
| 2600 | ␉current = buildByteConst(current, 0x40);␊ |
| 2601 | ␉current = buildOpCode(current, AML_MULTIPLY_OP);␊ |
| 2602 | ␉current = buildOpCode(current, AML_LOCAL1_OP);␊ |
| 2603 | ␉current = buildByteConst(current, 0x08);␊ |
| 2604 | ␉current = buildOpCode(current, AML_ZERO_OP);␊ |
| 2605 | ␉current = buildNameSeg(current, NAMESEG("TEMP"));␊ |
| 2606 | ␉␊ |
| 2607 | ␉// Name (STS0, Buffer (0x04) {0x00, 0x00, 0x00, 0x00})␊ |
| 2608 | ␉// Create STS0 as named buffer␊ |
| 2609 | ␉current = buildNamePath(current, NAMESEG("STS0"));␊ |
| 2610 | ␉{␊ |
| 2611 | ␉␉ACPI_SMALL_BUFFER * buff = current;␊ |
| 2612 | ␉␉current = buildSmallBuffer(current);␊ |
| 2613 | ␉␉␊ |
| 2614 | ␉␉// count of buffer elements␊ |
| 2615 | ␉␉current = buildByteConst(current, 4);␊ |
| 2616 | ␉␉␊ |
| 2617 | ␉␉current = buildOpCode(current, AML_ZERO_OP);␊ |
| 2618 | ␉␉current = buildOpCode(current, AML_ZERO_OP);␊ |
| 2619 | ␉␉current = buildOpCode(current, AML_ZERO_OP);␊ |
| 2620 | ␉␉current = buildOpCode(current, AML_ZERO_OP);␊ |
| 2621 | ␉␉{␊ |
| 2622 | ␉␉␉U32 length = (U8 *)current - (U8 *)buff;␊ |
| 2623 | ␉␉␉buff->packageLength = (U8)length - 1;␊ |
| 2624 | ␉␉}␊ |
| 2625 | ␉}␊ |
| 2626 | ␉␊ |
| 2627 | ␉//Concatenate (STS0, TEMP, Local2)␊ |
| 2628 | ␉current = buildOpCode(current, AML_CONCAT_OP);␊ |
| 2629 | ␉current = buildNameSeg(current, NAMESEG("STS0"));␊ |
| 2630 | ␉current = buildNameSeg(current, NAMESEG("TEMP"));␊ |
| 2631 | ␉current = buildOpCode(current, AML_LOCAL2_OP);␊ |
| 2632 | ␉␊ |
| 2633 | ␉//_OSC (Buffer (0x10)␊ |
| 2634 | ␉// {␊ |
| 2635 | ␉// /* 0000 */ 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 0xBE, 0x47,␊ |
| 2636 | ␉// /* 0008 */ 0x9E, 0xBD, 0xD8, 0x70, 0x58, 0x71, 0x39, 0x53␊ |
| 2637 | ␉// }, REVS, SIZE, Local2)␊ |
| 2638 | ␉current = buildNameSeg(current, NAMESEG("_OSC"));␊ |
| 2639 | ␉{␊ |
| 2640 | ␉␉ACPI_SMALL_BUFFER * buff = current;␊ |
| 2641 | ␉␉current = buildSmallBuffer(current);␊ |
| 2642 | ␉␉␊ |
| 2643 | ␉␉// count of buffer elements␊ |
| 2644 | ␉␉current = buildByteConst(current, 0x10);␊ |
| 2645 | ␉␉␊ |
| 2646 | ␉␉current = buildOpCode(current, 0x16);␊ |
| 2647 | ␉␉current = buildOpCode(current, 0xa6);␊ |
| 2648 | ␉␉current = buildOpCode(current, 0x77);␊ |
| 2649 | ␉␉current = buildOpCode(current, 0x40);␊ |
| 2650 | ␉␉current = buildOpCode(current, 0x0c);␊ |
| 2651 | ␉␉current = buildOpCode(current, 0x29);␊ |
| 2652 | ␉␉current = buildOpCode(current, 0xbe);␊ |
| 2653 | ␉␉current = buildOpCode(current, 0x47);␊ |
| 2654 | ␉␉current = buildOpCode(current, 0x9e);␊ |
| 2655 | ␉␉current = buildOpCode(current, 0xbd);␊ |
| 2656 | ␉␉current = buildOpCode(current, 0xd8);␊ |
| 2657 | ␉␉current = buildOpCode(current, 0x70);␊ |
| 2658 | ␉␉current = buildOpCode(current, 0x58);␊ |
| 2659 | ␉␉current = buildOpCode(current, 0x71);␊ |
| 2660 | ␉␉current = buildOpCode(current, 0x39);␊ |
| 2661 | ␉␉current = buildOpCode(current, 0x53);␊ |
| 2662 | ␉␉{␊ |
| 2663 | ␉␉␉U32 length = (U8 *)current - (U8 *)buff;␊ |
| 2664 | ␉␉␉buff->packageLength = (U8)length - 1;␊ |
| 2665 | ␉␉}␊ |
| 2666 | ␉}␊ |
| 2667 | ␉current = buildNameSeg(current, NAMESEG("REVS"));␊ |
| 2668 | ␉current = buildNameSeg(current, NAMESEG("SIZE"));␊ |
| 2669 | ␉current = buildOpCode(current, AML_LOCAL2_OP);␊ |
| 2670 | ␉␊ |
| 2671 | ␉// Update package length in PDC object␊ |
| 2672 | ␉//pdc->packageLength = (U8)((U8 *)current - (U8 *)&pdc->packageLength);␊ |
| 2673 | ␉setPackageLength(&pdc->pkgLength, (U8 *)current - (U8 *)&pdc->pkgLength);␊ |
| 2674 | ␉␊ |
| 2675 | ␉return(current);␊ |
| 2676 | }␊ |
| 2677 | ␊ |
| 2678 | //-----------------------------------------------------------------------------␊ |
| 2679 | static void * buildOSC(void * current)␊ |
| 2680 | {␊ |
| 2681 | ␉//␊ |
| 2682 | ␉//␊ |
| 2683 | ␉ACPI_METHOD * osc = current;␊ |
| 2684 | ␉current = buildMethod(current, NAMESEG("_OSC"), 4);␊ |
| 2685 | ␉␊ |
| 2686 | ␉// CreateDWordField (Arg3, 0x04, CAPA)␊ |
| 2687 | ␉current = buildOpCode(current, AML_CREATE_DWORD_FIELD_OP);␊ |
| 2688 | ␉current = buildOpCode(current, AML_ARG3_OP);␊ |
| 2689 | ␉current = buildByteConst(current, 0x04);␊ |
| 2690 | ␉current = buildNameSeg(current, NAMESEG("CAPA"));␊ |
| 2691 | ␉␊ |
| 2692 | ␉// Store (CAPA, TYPE)␊ |
| 2693 | ␉current = buildOpCode(current, AML_STORE_OP);␊ |
| 2694 | ␉current = buildNameSeg(current, NAMESEG("CAPA"));␊ |
| 2695 | ␉current = buildNameSeg(current, NAMESEG("TYPE"));␊ |
| 2696 | ␉␊ |
| 2697 | ␉// CreateDWordField (Arg3, 0x00, STS0)␊ |
| 2698 | ␉current = buildOpCode(current, AML_CREATE_DWORD_FIELD_OP);␊ |
| 2699 | ␉current = buildOpCode(current, AML_ARG3_OP);␊ |
| 2700 | ␉current = buildByteConst(current, 0x00);␊ |
| 2701 | ␉current = buildNameSeg(current, NAMESEG("STS0"));␊ |
| 2702 | ␉␊ |
| 2703 | ␉// CreateDWordField (Arg3, 0x04, CAP0)␊ |
| 2704 | ␉current = buildOpCode(current, AML_CREATE_DWORD_FIELD_OP);␊ |
| 2705 | ␉current = buildOpCode(current, AML_ARG3_OP);␊ |
| 2706 | ␉current = buildByteConst(current, 0x04);␊ |
| 2707 | ␉current = buildNameSeg(current, NAMESEG("CAP0"));␊ |
| 2708 | ␉␊ |
| 2709 | ␉// CreateDWordField (Arg0, 0x00, IID0)␊ |
| 2710 | ␉current = buildOpCode(current, AML_CREATE_DWORD_FIELD_OP);␊ |
| 2711 | ␉current = buildOpCode(current, AML_ARG0_OP);␊ |
| 2712 | ␉current = buildByteConst(current, 0x00);␊ |
| 2713 | ␉current = buildNameSeg(current, NAMESEG("IID0"));␊ |
| 2714 | ␉␊ |
| 2715 | ␉// CreateDWordField (Arg0, 0x04, IID1)␊ |
| 2716 | ␉current = buildOpCode(current, AML_CREATE_DWORD_FIELD_OP);␊ |
| 2717 | ␉current = buildOpCode(current, AML_ARG0_OP);␊ |
| 2718 | ␉current = buildByteConst(current, 0x04);␊ |
| 2719 | ␉current = buildNameSeg(current, NAMESEG("IID1"));␊ |
| 2720 | ␉␊ |
| 2721 | ␉// CreateDWordField (Arg0, 0x08, IID2)␊ |
| 2722 | ␉current = buildOpCode(current, AML_CREATE_DWORD_FIELD_OP);␊ |
| 2723 | ␉current = buildOpCode(current, AML_ARG0_OP);␊ |
| 2724 | ␉current = buildByteConst(current, 0x08);␊ |
| 2725 | ␉current = buildNameSeg(current, NAMESEG("IID2"));␊ |
| 2726 | ␉␊ |
| 2727 | ␉// CreateDWordField (Arg0, 0x0C, IID3)␊ |
| 2728 | ␉current = buildOpCode(current, AML_CREATE_DWORD_FIELD_OP);␊ |
| 2729 | ␉current = buildOpCode(current, AML_ARG0_OP);␊ |
| 2730 | ␉current = buildByteConst(current, 0x0C);␊ |
| 2731 | ␉current = buildNameSeg(current, NAMESEG("IID3"));␊ |
| 2732 | ␉␊ |
| 2733 | ␉// Name (UID0, Buffer (0x10)␊ |
| 2734 | ␉// {␊ |
| 2735 | ␉// 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 0xBE, 0x47,␊ |
| 2736 | ␉// 0x9E, 0xBD, 0xD8, 0x70, 0x58, 0x71, 0x39, 0x53␊ |
| 2737 | ␉// })␊ |
| 2738 | ␉current = buildNamePath(current, NAMESEG("UID0"));␊ |
| 2739 | ␉{␊ |
| 2740 | ␉␉ACPI_SMALL_BUFFER * buff = current;␊ |
| 2741 | ␉␉current = buildSmallBuffer(current);␊ |
| 2742 | ␉␉␊ |
| 2743 | ␉␉// count of buffer elements␊ |
| 2744 | ␉␉current = buildByteConst(current, 0x10);␊ |
| 2745 | ␉␉␊ |
| 2746 | ␉␉current = buildOpCode(current, 0x16);␊ |
| 2747 | ␉␉current = buildOpCode(current, 0xa6);␊ |
| 2748 | ␉␉current = buildOpCode(current, 0x77);␊ |
| 2749 | ␉␉current = buildOpCode(current, 0x40);␊ |
| 2750 | ␉␉current = buildOpCode(current, 0x0c);␊ |
| 2751 | ␉␉current = buildOpCode(current, 0x29);␊ |
| 2752 | ␉␉current = buildOpCode(current, 0xbe);␊ |
| 2753 | ␉␉current = buildOpCode(current, 0x47);␊ |
| 2754 | ␉␉current = buildOpCode(current, 0x9e);␊ |
| 2755 | ␉␉current = buildOpCode(current, 0xbd);␊ |
| 2756 | ␉␉current = buildOpCode(current, 0xd8);␊ |
| 2757 | ␉␉current = buildOpCode(current, 0x70);␊ |
| 2758 | ␉␉current = buildOpCode(current, 0x58);␊ |
| 2759 | ␉␉current = buildOpCode(current, 0x71);␊ |
| 2760 | ␉␉current = buildOpCode(current, 0x39);␊ |
| 2761 | ␉␉current = buildOpCode(current, 0x53);␊ |
| 2762 | ␉␉␊ |
| 2763 | ␉␉{␊ |
| 2764 | ␉␉␉U32 length = (U8 *)current - (U8 *)buff;␊ |
| 2765 | ␉␉␉buff->packageLength = (U8)length - 1;␊ |
| 2766 | ␉␉}␊ |
| 2767 | ␉}␊ |
| 2768 | ␉␊ |
| 2769 | ␉// CreateDWordField (UID0, 0x00, EID0)␊ |
| 2770 | ␉current = buildOpCode(current, AML_CREATE_DWORD_FIELD_OP);␊ |
| 2771 | ␉current = buildOpCode(current, AML_ARG0_OP);␊ |
| 2772 | ␉current = buildByteConst(current, 0x00);␊ |
| 2773 | ␉current = buildNameSeg(current, NAMESEG("EID0"));␊ |
| 2774 | ␉␊ |
| 2775 | ␉// CreateDWordField (UID0, 0x04, EID1)␊ |
| 2776 | ␉current = buildOpCode(current, AML_CREATE_DWORD_FIELD_OP);␊ |
| 2777 | ␉current = buildOpCode(current, AML_ARG0_OP);␊ |
| 2778 | ␉current = buildByteConst(current, 0x04);␊ |
| 2779 | ␉current = buildNameSeg(current, NAMESEG("EID1"));␊ |
| 2780 | ␉␊ |
| 2781 | ␉// CreateDWordField (UID0, 0x08, EID2)␊ |
| 2782 | ␉current = buildOpCode(current, AML_CREATE_DWORD_FIELD_OP);␊ |
| 2783 | ␉current = buildOpCode(current, AML_ARG0_OP);␊ |
| 2784 | ␉current = buildByteConst(current, 0x08);␊ |
| 2785 | ␉current = buildNameSeg(current, NAMESEG("EID2"));␊ |
| 2786 | ␉␊ |
| 2787 | ␉// CreateDWordField (UID0, 0x0C, EID3)␊ |
| 2788 | ␉current = buildOpCode(current, AML_CREATE_DWORD_FIELD_OP);␊ |
| 2789 | ␉current = buildOpCode(current, AML_ARG0_OP);␊ |
| 2790 | ␉current = buildByteConst(current, 0x0C);␊ |
| 2791 | ␉current = buildNameSeg(current, NAMESEG("EID3"));␊ |
| 2792 | ␉␊ |
| 2793 | ␉// If (LNot (LAnd (LAnd (LEqual (IID0, EID0), LEqual (IID1, EID1)),␊ |
| 2794 | ␉// LAnd (LEqual (IID2, EID2), LEqual (IID3, EID3)))))␊ |
| 2795 | ␉// {␊ |
| 2796 | ␉// Store (0x06, Index (STS0, 0x00))␊ |
| 2797 | ␉// Return (Arg3)␊ |
| 2798 | ␉// }␊ |
| 2799 | ␉{␊ |
| 2800 | ␉␉current = buildOpCode(current, AML_IF_OP);␊ |
| 2801 | ␉␉{␊ |
| 2802 | ␉␉␉ACPI_PACKAGE_LENGTH * packageLength = current;␊ |
| 2803 | ␉␉␉current = buildPackageLength(current, 0);␊ |
| 2804 | ␉␉␉␊ |
| 2805 | ␉␉␉current = buildOpCode(current, AML_LNOT_OP);␊ |
| 2806 | ␉␉␉current = buildOpCode(current, AML_LAND_OP);␊ |
| 2807 | ␉␉␉current = buildOpCode(current, AML_LAND_OP);␊ |
| 2808 | ␉␉␉current = buildOpCode(current, AML_LEQUAL_OP);␊ |
| 2809 | ␉␉␉current = buildNameSeg(current, NAMESEG("IID0"));␊ |
| 2810 | ␉␉␉current = buildNameSeg(current, NAMESEG("EID0"));␊ |
| 2811 | ␉␉␉␊ |
| 2812 | ␉␉␉current = buildOpCode(current, AML_LEQUAL_OP);␊ |
| 2813 | ␉␉␉current = buildNameSeg(current, NAMESEG("IID1"));␊ |
| 2814 | ␉␉␉current = buildNameSeg(current, NAMESEG("EID1"));␊ |
| 2815 | ␉␉␉␊ |
| 2816 | ␉␉␉current = buildOpCode(current, AML_LAND_OP);␊ |
| 2817 | ␉␉␉current = buildOpCode(current, AML_LEQUAL_OP);␊ |
| 2818 | ␉␉␉current = buildNameSeg(current, NAMESEG("IID2"));␊ |
| 2819 | ␉␉␉current = buildNameSeg(current, NAMESEG("EID2"));␊ |
| 2820 | ␉␉␉␊ |
| 2821 | ␉␉␉current = buildOpCode(current, AML_LEQUAL_OP);␊ |
| 2822 | ␉␉␉current = buildNameSeg(current, NAMESEG("IID3"));␊ |
| 2823 | ␉␉␉current = buildNameSeg(current, NAMESEG("EID3"));␊ |
| 2824 | ␉␉␉␊ |
| 2825 | ␉␉␉// Store (0x06, Index (STS0, 0x00))␊ |
| 2826 | ␉␉␉current = buildOpCode(current, AML_STORE_OP);␊ |
| 2827 | ␉␉␉current = buildByteConst(current, 0x06);␊ |
| 2828 | ␉␉␉current = buildOpCode(current, AML_INDEX_OP);␊ |
| 2829 | ␉␉␉current = buildNameSeg(current, NAMESEG("STS0"));␊ |
| 2830 | ␉␉␉current = buildByteConst(current, 0x00);␊ |
| 2831 | ␉␉␉current = buildOpCode(current, AML_ZERO_OP);␊ |
| 2832 | ␉␉␉␊ |
| 2833 | ␉␉␉// Return (Arg3)␊ |
| 2834 | ␉␉␉current = buildReturnOpcode(current, AML_ARG3_OP);␊ |
| 2835 | ␉␉␉␊ |
| 2836 | ␉␉␉setPackageLength(packageLength,␊ |
| 2837 | ␉␉␉␉␉␉␉ (U8 *)current - (U8 *)packageLength);␊ |
| 2838 | ␉␉}␊ |
| 2839 | ␉}␊ |
| 2840 | ␉␊ |
| 2841 | ␉// If (LNotEqual (Arg1, 0x01))␊ |
| 2842 | ␉// {␊ |
| 2843 | ␉// Store (0x0A, Index (STS0, 0x00))␊ |
| 2844 | ␉// Return (Arg3)␊ |
| 2845 | ␉// }␊ |
| 2846 | ␉{␊ |
| 2847 | ␉␉current = buildOpCode(current, AML_IF_OP);␊ |
| 2848 | ␉␉{␊ |
| 2849 | ␉␉␉ACPI_PACKAGE_LENGTH * packageLength = current;␊ |
| 2850 | ␉␉␉current = buildPackageLength(current, 0);␊ |
| 2851 | ␉␉␉␊ |
| 2852 | ␉␉␉// If ("LNotEqual (Arg1, 0x01)")␊ |
| 2853 | ␉␉␉current = buildOpCode(current, AML_LNOT_OP);␊ |
| 2854 | ␉␉␉current = buildOpCode(current, AML_LEQUAL_OP);␊ |
| 2855 | ␉␉␉current = buildOpCode(current, AML_ARG1_OP);␊ |
| 2856 | ␉␉␉current = buildByteConst(current, 0x01);␊ |
| 2857 | ␉␉␉␊ |
| 2858 | ␉␉␉// Store (0x0A, Index (STS0, 0x00))␊ |
| 2859 | ␉␉␉current = buildOpCode(current, AML_STORE_OP);␊ |
| 2860 | ␉␉␉current = buildByteConst(current, 0x0A);␊ |
| 2861 | ␉␉␉current = buildOpCode(current, AML_INDEX_OP);␊ |
| 2862 | ␉␉␉current = buildNameSeg(current, NAMESEG("STS0"));␊ |
| 2863 | ␉␉␉current = buildByteConst(current, 0x00);␊ |
| 2864 | ␉␉␉current = buildOpCode(current, AML_ZERO_OP);␊ |
| 2865 | ␉␉␉␊ |
| 2866 | ␉␉␉// Return (Arg3)␊ |
| 2867 | ␉␉␉current = buildReturnOpcode(current, AML_ARG3_OP);␊ |
| 2868 | ␉␉␉␊ |
| 2869 | ␉␉␉setPackageLength(packageLength,␊ |
| 2870 | ␉␉␉␉␉␉␉ (U8 *)current - (U8 *)packageLength);␊ |
| 2871 | ␉␉}␊ |
| 2872 | ␉}␊ |
| 2873 | ␉␊ |
| 2874 | ␉// If (And (STS0, 0x01))␊ |
| 2875 | ␉// {␊ |
| 2876 | ␉// And (CAP0, 0x0BFF, CAP0)␊ |
| 2877 | ␉// Return (Arg3)␊ |
| 2878 | ␉// }␊ |
| 2879 | ␉{␊ |
| 2880 | ␉␉current = buildOpCode(current, AML_IF_OP);␊ |
| 2881 | ␉␉{␊ |
| 2882 | ␉␉␉ACPI_PACKAGE_LENGTH * packageLength = current;␊ |
| 2883 | ␉␉␉current = buildPackageLength(current, 0);␊ |
| 2884 | ␉␉␉␊ |
| 2885 | ␉␉␉// If ("And (STS0, 0x01)")␊ |
| 2886 | ␉␉␉current = buildOpCode(current, AML_AND_OP);␊ |
| 2887 | ␉␉␉current = buildNameSeg(current, NAMESEG("STS0"));␊ |
| 2888 | ␉␉␉current = buildByteConst(current, 0x01);␊ |
| 2889 | ␉␉␉current = buildOpCode(current, AML_ZERO_OP);␊ |
| 2890 | ␉␉␉␊ |
| 2891 | ␉␉␉// And (CAP0, 0x0BFF, CAP0)␊ |
| 2892 | ␉␉␉current = buildOpCode(current, AML_AND_OP);␊ |
| 2893 | ␉␉␉current = buildNameSeg(current, NAMESEG("CAP0"));␊ |
| 2894 | ␉␉␉current = buildWordConst(current, 0x0BFF);␊ |
| 2895 | ␉␉␉current = buildNameSeg(current, NAMESEG("CAP0"));␊ |
| 2896 | ␉␉␉␊ |
| 2897 | ␉␉␉// Return (Arg3)␊ |
| 2898 | ␉␉␉current = buildReturnOpcode(current, AML_ARG3_OP);␊ |
| 2899 | ␉␉␉␊ |
| 2900 | ␉␉␉setPackageLength(packageLength,␊ |
| 2901 | ␉␉␉␉␉␉␉ (U8 *)current - (U8 *)packageLength);␊ |
| 2902 | ␉␉}␊ |
| 2903 | ␉}␊ |
| 2904 | ␉␊ |
| 2905 | ␉// And (CAP0, 0x0BFF, CAP0)␊ |
| 2906 | ␉current = buildOpCode(current, AML_AND_OP);␊ |
| 2907 | ␉current = buildNameSeg(current, NAMESEG("CAP0"));␊ |
| 2908 | ␉current = buildWordConst(current, 0x0BFF);␊ |
| 2909 | ␉current = buildNameSeg(current, NAMESEG("CAP0"));␊ |
| 2910 | ␉␊ |
| 2911 | ␉// Store (CAP0, TYPE)␊ |
| 2912 | ␉current = buildOpCode(current, AML_STORE_OP);␊ |
| 2913 | ␉current = buildNameSeg(current, NAMESEG("CAP0"));␊ |
| 2914 | ␉current = buildNameSeg(current, NAMESEG("TYPE"));␊ |
| 2915 | ␉␊ |
| 2916 | ␉// Return (Arg3)␊ |
| 2917 | ␉current = buildReturnOpcode(current, AML_ARG3_OP);␊ |
| 2918 | ␉␊ |
| 2919 | ␉// Set package length for the OSC object␊ |
| 2920 | ␉setPackageLength(&osc->pkgLength, (U8 *)current - (U8 *)&osc->pkgLength);␊ |
| 2921 | ␉␊ |
| 2922 | ␉return(current);␊ |
| 2923 | }␊ |
| 2924 | ␊ |
| 2925 | //-----------------------------------------------------------------------------␊ |
| 2926 | static void * buildPSS(void * current, PKG_PSTATES * pkg_pstates)␊ |
| 2927 | {␊ |
| 2928 | ␉//␊ |
| 2929 | ␉// IF (PSEN)␊ |
| 2930 | ␉// {␊ |
| 2931 | ␉// Return (Package of Pstate Packages)␊ |
| 2932 | ␉// }␊ |
| 2933 | ␉// Return(Zero)␊ |
| 2934 | ␉//␊ |
| 2935 | ␉ACPI_METHOD * pss = current;␊ |
| 2936 | ␉current = buildMethod(current, NAMESEG("_PSS"), 0);␊ |
| 2937 | ␉␊ |
| 2938 | ␉{␊ |
| 2939 | ␉␉// "IF" (PSEN) -- IF Opcode␊ |
| 2940 | ␉␉current = buildOpCode(current, AML_IF_OP);␊ |
| 2941 | ␉␉{␊ |
| 2942 | ␉␉␉ACPI_PACKAGE_LENGTH * packageLength = current;␊ |
| 2943 | ␉␉␉current = buildPackageLength(current, 0);␊ |
| 2944 | ␉␉␉␊ |
| 2945 | ␉␉␉// IF "(PSEN)" -- IF Predicate␊ |
| 2946 | ␉␉␉current = buildNameSeg(current, NAMESEG("PSEN"));␊ |
| 2947 | ␉␉␉␊ |
| 2948 | ␉␉␉{␊ |
| 2949 | ␉␉␉␉ACPI_RETURN_PACKAGE * returnPkg = current;␊ |
| 2950 | ␉␉␉␉current = buildReturnPackage(current, (U8)pkg_pstates->num_pstates);␊ |
| 2951 | ␉␉␉␉␊ |
| 2952 | ␉␉␉␉// (3.3.3) For each P-state␊ |
| 2953 | ␉␉␉␉{␊ |
| 2954 | ␉␉␉␉␉U32 pstateIndex = 0;␊ |
| 2955 | ␉␉␉␉␉for (pstateIndex=0; pstateIndex < pkg_pstates->num_pstates; pstateIndex++)␊ |
| 2956 | ␉␉␉␉␉{␊ |
| 2957 | ␉␉␉␉␉␉// (3.3.3.1) Create P-state package␊ |
| 2958 | ␉␉␉␉␉␉ACPI_PSTATE_PACKAGE * pstate = current;␊ |
| 2959 | ␉␉␉␉␉␉current = pstate + 1;␊ |
| 2960 | ␉␉␉␉␉␉␊ |
| 2961 | ␉␉␉␉␉␉setSmallPackage(&pstate->package, 6);␊ |
| 2962 | ␉␉␉␉␉␉pstate->package.packageLength = (U8)(sizeof(ACPI_PSTATE_PACKAGE) - 1);␊ |
| 2963 | ␉␉␉␉␉␉␊ |
| 2964 | ␉␉␉␉␉␉setDwordConst(&pstate->CoreFreq, pkg_pstates->pstate[pstateIndex].frequency);// CoreFreq (in MHz).␊ |
| 2965 | ␉␉␉␉␉␉setDwordConst(&pstate->Power, pkg_pstates->pstate[pstateIndex].power);// Power (in milliWatts).␊ |
| 2966 | ␉␉␉␉␉␉setDwordConst(&pstate->TransLatency, pkg_pstates->pstate[pstateIndex].translatency);// Transition Latency (in microseconds).␊ |
| 2967 | ␉␉␉␉␉␉setDwordConst(&pstate->BMLatency, pkg_pstates->pstate[pstateIndex].bmlatency);// Bus Master Latency (in microseconds).␊ |
| 2968 | ␉␉␉␉␉␉setDwordConst(&pstate->Control, pkg_pstates->pstate[pstateIndex].control); // Control.␊ |
| 2969 | ␉␉␉␉␉␉␊ |
| 2970 | ␉␉␉␉␉␉setDwordConst(&pstate->Status, encode_pstate(pkg_pstates->pstate[pstateIndex].ratio));// Status.␉␊ |
| 2971 | ␉␉␉␉␉} // for␊ |
| 2972 | ␉␉␉␉} // for block␊ |
| 2973 | ␉␉␉␉␊ |
| 2974 | ␉␉␉␉// (3.3.4) Update package length in return package␊ |
| 2975 | ␉␉␉␉setPackageLength(&returnPkg->package.pkgLength, (U8 *)current - (U8 *)&returnPkg->package.pkgLength);␊ |
| 2976 | ␉␉␉}␊ |
| 2977 | ␉␉␉␊ |
| 2978 | ␉␉␉// "IF (PSEN) and its body" -- Set package length␊ |
| 2979 | ␉␉␉setPackageLength(packageLength,␊ |
| 2980 | ␉␉␉␉␉␉␉ (U8 *)current - (U8 *)packageLength);␊ |
| 2981 | ␉␉}␊ |
| 2982 | ␉␉// "Return (ZERO)"␊ |
| 2983 | ␉␉current = buildReturnZero(current);␊ |
| 2984 | ␉}␊ |
| 2985 | ␉// Set package length for the _PSS object␊ |
| 2986 | ␉setPackageLength(&pss->pkgLength, (U8 *)current - (U8 *)&pss->pkgLength);␊ |
| 2987 | ␉␊ |
| 2988 | ␉return(current);␊ |
| 2989 | }␊ |
| 2990 | ␊ |
| 2991 | //-----------------------------------------------------------------------------␊ |
| 2992 | static void * buildPSD(void * current, U32 domain, U32 cpusInDomain, U32 pstate_coordination)␊ |
| 2993 | {␊ |
| 2994 | ␉// If (And(TYPE, 0x0820))␊ |
| 2995 | ␉// {␊ |
| 2996 | ␉// Return (PSD Package)␊ |
| 2997 | ␉// }␊ |
| 2998 | ␉// Return(Zero)␊ |
| 2999 | ␉␊ |
| 3000 | ␉ACPI_METHOD * psdMethod = current;␊ |
| 3001 | ␉current = buildMethod(current, NAMESEG("_PSD"), 0);␊ |
| 3002 | ␉{␊ |
| 3003 | ␉␉// "IF" (And(TYPE, 0x0820)) -- IF Opcode␊ |
| 3004 | ␉␉current = buildOpCode(current, AML_IF_OP);␊ |
| 3005 | ␉␉{␊ |
| 3006 | ␉␉␉ACPI_PACKAGE_LENGTH * packageLength = current;␊ |
| 3007 | ␉␉␉current = buildPackageLength(current, 0);␊ |
| 3008 | ␉␉␉␊ |
| 3009 | ␉␉␉// IF ("And"(TYPE, 0x820)) -- AND Opcode␊ |
| 3010 | ␉␉␉current = buildOpCode(current, AML_AND_OP);␊ |
| 3011 | ␉␉␉␊ |
| 3012 | ␉␉␉// IF (And("TYPE", 0x820)) -- TYPE Term␊ |
| 3013 | ␉␉␉current = buildNameSeg(current, NAMESEG("TYPE"));␊ |
| 3014 | ␉␉␉␊ |
| 3015 | ␉␉␉// IF (And(TYPE, "0x0820")) -- DWORD Value Term␊ |
| 3016 | ␉␉␉current = buildDwordConst(current, 0x820);␊ |
| 3017 | ␉␉␉␊ |
| 3018 | ␉␉␉// IF ("And(TYPE, 0x200)") -- Target for And term (unused)␊ |
| 3019 | ␉␉␉current = buildOpCode(current, AML_ZERO_OP);␊ |
| 3020 | ␉␉␉␊ |
| 3021 | ␉␉␉// Build return package containing PSD package␊ |
| 3022 | ␉␉␉{␊ |
| 3023 | ␉␉␉␉ACPI_RETURN_PACKAGE * returnPkg = current;␊ |
| 3024 | ␉␉␉␉current = buildReturnPackage(current, 1);␊ |
| 3025 | ␉␉␉␉␊ |
| 3026 | ␉␉␉␉{␊ |
| 3027 | ␉␉␉␉␉// Create PSD package␊ |
| 3028 | ␉␉␉␉␉ACPI_PSD_PACKAGE * psd = current;␊ |
| 3029 | ␉␉␉␉␉current = psd + 1;␊ |
| 3030 | ␉␉␉␉␉␊ |
| 3031 | ␉␉␉␉␉setSmallPackage(&psd->package, 5);␊ |
| 3032 | ␉␉␉␉␉psd->package.packageLength = (U8)(sizeof(ACPI_PSD_PACKAGE) - 1);␊ |
| 3033 | ␉␉␉␉␉␊ |
| 3034 | ␉␉␉␉␉setByteConst(&psd->NumberOfEntries, 5);␊ |
| 3035 | ␉␉␉␉␉setByteConst(&psd->Revision, 0);␊ |
| 3036 | ␉␉␉␉␉setDwordConst(&psd->Domain, domain);␊ |
| 3037 | ␉␉␉␉␉setDwordConst(&psd->CoordType, pstate_coordination);␊ |
| 3038 | ␉␉␉␉␉setDwordConst(&psd->NumProcessors, cpusInDomain);␊ |
| 3039 | ␉␉␉␉␉␊ |
| 3040 | ␉␉␉␉} // PSD package␊ |
| 3041 | ␉␉␉␉␊ |
| 3042 | ␉␉␉␉setPackageLength(&returnPkg->package.pkgLength,␊ |
| 3043 | ␉␉␉␉␉␉␉␉ (U8 *)current - (U8 *)&returnPkg->package.pkgLength);␊ |
| 3044 | ␉␉␉}␊ |
| 3045 | ␉␉␉setPackageLength(packageLength, (U8 *)current - (U8 *)packageLength);␊ |
| 3046 | ␉␉}␊ |
| 3047 | ␉␉// "Return (ZERO)"␊ |
| 3048 | ␉␉current = buildReturnZero(current);␊ |
| 3049 | ␉}␊ |
| 3050 | ␉// Update length in _PSD method␊ |
| 3051 | ␉setPackageLength(&psdMethod->pkgLength, (U8 *)current - (U8 *)&psdMethod->pkgLength);␊ |
| 3052 | ␉␊ |
| 3053 | ␉return(current);␊ |
| 3054 | }␊ |
| 3055 | ␊ |
| 3056 | //-----------------------------------------------------------------------------␊ |
| 3057 | static void * buildPPC(void * current)␊ |
| 3058 | {␊ |
| 3059 | ␉ACPI_SMALL_METHOD * ppc = current;␊ |
| 3060 | ␉current = buildSmallMethod(current, NAMESEG("_PPC"), 0);␊ |
| 3061 | ␉␊ |
| 3062 | ␉current = buildReturnZero(current);␊ |
| 3063 | ␉␊ |
| 3064 | ␉// Update package length in PPC object␊ |
| 3065 | ␉ppc->packageLength = (U8) ( (U8 *)current - (U8 *)&ppc->packageLength );␊ |
| 3066 | ␉␊ |
| 3067 | ␉return(current);␊ |
| 3068 | }␊ |
| 3069 | ␊ |
| 3070 | //-----------------------------------------------------------------------------␊ |
| 3071 | static void * buildPCT(void * current)␊ |
| 3072 | {␊ |
| 3073 | ␉static const ACPI_GENERIC_ADDRESS pct_gas[] = {␊ |
| 3074 | ␉␉{0x7f,0x40,0,0,0x199},␊ |
| 3075 | ␉␉{0x7f,0x10,0,0,0x198},␊ |
| 3076 | ␉};␊ |
| 3077 | ␉␊ |
| 3078 | ␉ACPI_SMALL_METHOD * pct = current;␊ |
| 3079 | ␉current = buildSmallMethod(current, NAMESEG("_PCT"), 0);␊ |
| 3080 | ␉␊ |
| 3081 | ␉{␊ |
| 3082 | ␉␉ACPI_RETURN_PACKAGE * returnPkg = current;␊ |
| 3083 | ␉␉current = buildReturnPackage(current, 2);␊ |
| 3084 | ␉␉␊ |
| 3085 | ␉␉{␊ |
| 3086 | ␉␉␉ACPI_SMALL_BUFFER * buff = current;␊ |
| 3087 | ␉␉␉current = buildSmallBuffer(current);␊ |
| 3088 | ␉␉␉␊ |
| 3089 | ␉␉␉current = buildByteConst(current, sizeof(ACPI_GENERIC_REGISTER) + sizeof(ACPI_END_TAG) );␊ |
| 3090 | ␉␉␉current = buildGenericRegister(current, &pct_gas[0]);␊ |
| 3091 | ␉␉␉current = buildEndTag(current);␊ |
| 3092 | ␉␉␉␊ |
| 3093 | ␉␉␉{␊ |
| 3094 | ␉␉␉␉U32 length = (U8 *)current - (U8 *)buff;␊ |
| 3095 | ␉␉␉␉buff->packageLength = (U8)length - 1;␊ |
| 3096 | ␉␉␉}␊ |
| 3097 | ␉␉}␊ |
| 3098 | ␉␉{␊ |
| 3099 | ␉␉␉ACPI_SMALL_BUFFER * buff = current;␊ |
| 3100 | ␉␉␉current = buildSmallBuffer(current);␊ |
| 3101 | ␉␉␉␊ |
| 3102 | ␉␉␉current = buildByteConst(current, sizeof(ACPI_GENERIC_REGISTER) + sizeof(ACPI_END_TAG) );␊ |
| 3103 | ␉␉␉current = buildGenericRegister(current, &pct_gas[1]);␊ |
| 3104 | ␉␉␉current = buildEndTag(current);␊ |
| 3105 | ␉␉␉␊ |
| 3106 | ␉␉␉{␊ |
| 3107 | ␉␉␉␉U32 length = (U8 *)current - (U8 *)buff;␊ |
| 3108 | ␉␉␉␉buff->packageLength = (U8)length - 1;␊ |
| 3109 | ␉␉␉}␊ |
| 3110 | ␉␉␉␊ |
| 3111 | ␉␉}␊ |
| 3112 | ␉␉␊ |
| 3113 | ␉␉setPackageLength(&returnPkg->package.pkgLength,␊ |
| 3114 | ␉␉␉␉␉␉ (U8 *)current - (U8 *)&returnPkg->package.pkgLength);␊ |
| 3115 | ␉}␊ |
| 3116 | ␉␊ |
| 3117 | ␉// Update package length in PCT object␊ |
| 3118 | ␉pct->packageLength = (U8)((U8 *)current - (U8 *)&pct->packageLength);␊ |
| 3119 | ␉␊ |
| 3120 | ␉return(current);␊ |
| 3121 | }␊ |
| 3122 | ␊ |
| 3123 | //-----------------------------------------------------------------------------␊ |
| 3124 | static void * buildCstate(void * current, ACPI_GENERIC_ADDRESS * gas, CSTATE * cstate)␊ |
| 3125 | {␊ |
| 3126 | ␉//␊ |
| 3127 | ␉// Build a C-state␊ |
| 3128 | ␉//␊ |
| 3129 | ␉ACPI_SMALL_PACKAGE * pkg1 = current;␊ |
| 3130 | ␉current = buildSmallPackage(current, 4);␊ |
| 3131 | ␉␊ |
| 3132 | ␉{␊ |
| 3133 | ␉␉{␊ |
| 3134 | ␉␉␉ACPI_SMALL_BUFFER * buffer = current;␊ |
| 3135 | ␉␉␉current = buildSmallBuffer(current);␊ |
| 3136 | ␉␉␉␊ |
| 3137 | ␉␉␉{␊ |
| 3138 | ␉␉␉␉// Buffer length␊ |
| 3139 | ␉␉␉␉current = buildByteConst(current, sizeof(ACPI_GENERIC_REGISTER) + sizeof(ACPI_END_TAG) );␊ |
| 3140 | ␉␉␉␉current = buildGenericRegister(current, gas);␊ |
| 3141 | ␉␉␉␉current = buildEndTag(current);␊ |
| 3142 | ␉␉␉}␊ |
| 3143 | ␉␉␉{␊ |
| 3144 | ␉␉␉␉U32 length = (U8 *)current - (U8 *)buffer;␊ |
| 3145 | ␉␉␉␉buffer->packageLength = (U8)length - 1;␊ |
| 3146 | ␉␉␉}␊ |
| 3147 | ␉␉}␊ |
| 3148 | ␉␉␊ |
| 3149 | ␉␉{␊ |
| 3150 | ␉␉␉current = buildByteConst(current, cstate->type);␊ |
| 3151 | ␉␉␉current = buildWordConst(current, cstate->latency);␊ |
| 3152 | ␉␉␉current = buildDwordConst(current, cstate->power);␊ |
| 3153 | ␉␉}␊ |
| 3154 | ␉}␊ |
| 3155 | ␉pkg1->packageLength = (U8)((U8 *)current - (U8 *)&pkg1->packageLength);␊ |
| 3156 | ␉␊ |
| 3157 | ␉return(current);␊ |
| 3158 | }␊ |
| 3159 | ␊ |
| 3160 | //-----------------------------------------------------------------------------␊ |
| 3161 | static void * buildReturnPackageCST(void * current, PKG_CSTATES * pkg_cstates)␊ |
| 3162 | {␊ |
| 3163 | ␉// Create package returning C-states␊ |
| 3164 | ␉ACPI_RETURN_PACKAGE * returnPkg = current;␊ |
| 3165 | ␉current = buildReturnPackage(current, (U8)pkg_cstates->num_cstates + 1);␊ |
| 3166 | ␉␊ |
| 3167 | ␉{␊ |
| 3168 | ␉␉// Include number of C-states␊ |
| 3169 | ␉␉current = buildByteConst(current, (U8)pkg_cstates->num_cstates);␊ |
| 3170 | ␉␉␊ |
| 3171 | ␉␉{␊ |
| 3172 | ␉␉␉U32 cstateIndex = 0;␊ |
| 3173 | ␉␉␉for (cstateIndex=0; cstateIndex < pkg_cstates->num_cstates; cstateIndex++)␊ |
| 3174 | ␉␉␉␉// Build C-state␊ |
| 3175 | ␉␉␉␉current = buildCstate(current, &pkg_cstates->gas[cstateIndex], &pkg_cstates->cstate[cstateIndex]);␊ |
| 3176 | ␉␉}␊ |
| 3177 | ␉}␊ |
| 3178 | ␉␊ |
| 3179 | ␉// Update package length in return package␊ |
| 3180 | ␉setPackageLength(&returnPkg->package.pkgLength,␊ |
| 3181 | (U8 *)current - (U8 *)&returnPkg->package.pkgLength);␊ |
| 3182 | ␉␊ |
| 3183 | ␉return(current);␊ |
| 3184 | }␊ |
| 3185 | ␊ |
| 3186 | //-----------------------------------------------------------------------------␊ |
| 3187 | static void * buildCST(void * current, PKG_CSTATES * mwait_pkg_cstates, PKG_CSTATES * io_pkg_cstates)␊ |
| 3188 | {␊ |
| 3189 | ␉//␊ |
| 3190 | ␉// IF (CSEN)␊ |
| 3191 | ␉// {␊ |
| 3192 | ␉// IF (LAnd(MWOS, And(TYPE, 0x200)))␊ |
| 3193 | ␉// {␊ |
| 3194 | ␉// Return package containing MWAIT C-states␊ |
| 3195 | ␉// }␊ |
| 3196 | ␉// Return package containing IO C-states␊ |
| 3197 | ␉// }␊ |
| 3198 | ␉// Return(Zero)␊ |
| 3199 | ␉//␊ |
| 3200 | ␉ACPI_METHOD * cst = current;␊ |
| 3201 | ␉current = buildMethod(current, NAMESEG("_CST"), 0);␊ |
| 3202 | ␉{␊ |
| 3203 | ␉␉// "IF" CSEN -- IF Opcode␊ |
| 3204 | ␉␉current = buildOpCode(current, AML_IF_OP);␊ |
| 3205 | ␉␉{␊ |
| 3206 | ␉␉␉ACPI_PACKAGE_LENGTH * packageLength1 = current;␊ |
| 3207 | ␉␉␉current = buildPackageLength(current, 0);␊ |
| 3208 | ␉␉␉␊ |
| 3209 | ␉␉␉// IF "(CSEN)" -- IF Predicate␊ |
| 3210 | ␉␉␉current = buildNameSeg(current, NAMESEG("CSEN"));␊ |
| 3211 | ␉␉␉␊ |
| 3212 | ␉␉␉// "IF" (LAnd(MWOS, And(TYPE, 0x200))) -- IF Opcode␊ |
| 3213 | ␉␉␉current = buildOpCode(current, AML_IF_OP);␊ |
| 3214 | ␉␉␉{␊ |
| 3215 | ␉␉␉␉ACPI_PACKAGE_LENGTH * packageLength2 = current;␊ |
| 3216 | ␉␉␉␉current = buildPackageLength(current, 0);␊ |
| 3217 | ␉␉␉␉␊ |
| 3218 | ␉␉␉␉// IF ("LAnd"(MWOS, And(TYPE, 0x200))) -- LAND Opcode␊ |
| 3219 | ␉␉␉␉current = buildOpCode(current, AML_LAND_OP);␊ |
| 3220 | ␉␉␉␉␊ |
| 3221 | ␉␉␉␉// IF (LAnd("MWOS", And(TYPE, 0x200))) -- MWOS Term␊ |
| 3222 | ␉␉␉␉current = buildNameSeg(current, NAMESEG("MWOS"));␊ |
| 3223 | ␉␉␉␉␊ |
| 3224 | ␉␉␉␉// IF (LAnd(MWOS, "And"(TYPE, 0x200))) -- AND Opcode␊ |
| 3225 | ␉␉␉␉current = buildOpCode(current, AML_AND_OP);␊ |
| 3226 | ␉␉␉␉␊ |
| 3227 | ␉␉␉␉// IF (LAnd(MWOS, And("TYPE", 0x200))) -- TYPE Term␊ |
| 3228 | ␉␉␉␉current = buildNameSeg(current, NAMESEG("TYPE"));␊ |
| 3229 | ␉␉␉␉␊ |
| 3230 | ␉␉␉␉// IF (LAnd(MWOS, And(TYPE, "0x200"))) -- DWORD Value Term␊ |
| 3231 | ␉␉␉␉current = buildWordConst(current, 0x200);␊ |
| 3232 | ␉␉␉␉␊ |
| 3233 | ␉␉␉␉// IF (LAnd(MWOS, "And(TYPE, 0x200)")) -- Target for And term (unused)␊ |
| 3234 | ␉␉␉␉current = buildOpCode(current, AML_ZERO_OP);␊ |
| 3235 | ␉␉␉␉␊ |
| 3236 | ␉␉␉␉// Build return package for mwait c-states␊ |
| 3237 | ␉␉␉␉current = buildReturnPackageCST(current, mwait_pkg_cstates);␊ |
| 3238 | ␉␉␉␉␊ |
| 3239 | ␉␉␉␉setPackageLength(packageLength2,␊ |
| 3240 | ␉␉␉␉␉␉␉␉ (U8 *)current - (U8 *)packageLength2);␊ |
| 3241 | ␉␉␉}␊ |
| 3242 | ␉␉␉␊ |
| 3243 | ␉␉␉// Build return package for io c-states␊ |
| 3244 | ␉␉␉current = buildReturnPackageCST(current, io_pkg_cstates);␊ |
| 3245 | ␉␉␉␊ |
| 3246 | ␉␉␉setPackageLength(packageLength1,␊ |
| 3247 | ␉␉␉␉␉␉␉ (U8 *)current - (U8 *)packageLength1);␊ |
| 3248 | ␉␉}␊ |
| 3249 | ␉␉// "Return (ZERO)"␊ |
| 3250 | ␉␉current = buildReturnZero(current);␊ |
| 3251 | ␉}␊ |
| 3252 | ␉// Update length in _CST method␊ |
| 3253 | ␉setPackageLength(&cst->pkgLength, (U8 *)current - (U8 *)&cst->pkgLength);␊ |
| 3254 | ␉␊ |
| 3255 | ␉return(current);␊ |
| 3256 | }␊ |
| 3257 | ␊ |
| 3258 | #if BUILD_ACPI_CSD␊ |
| 3259 | //-----------------------------------------------------------------------------␊ |
| 3260 | static void * buildCSD(void * current, U32 domain, U32 cpusInDomain, PKG_CSTATES * pkg_cstates)␊ |
| 3261 | {␊ |
| 3262 | // If (And(TYPE, 0x0040))␊ |
| 3263 | // {␊ |
| 3264 | // Return (CSD Package)␊ |
| 3265 | // }␊ |
| 3266 | // Return(Zero)␊ |
| 3267 | ␊ |
| 3268 | ACPI_METHOD * csdMethod = current;␊ |
| 3269 | current = buildMethod(current, NAMESEG("_CSD"), 0);␊ |
| 3270 | {␊ |
| 3271 | // "IF" (And(TYPE, 0x0040)) -- IF Opcode␊ |
| 3272 | current = buildOpCode(current, AML_IF_OP);␊ |
| 3273 | {␊ |
| 3274 | ACPI_PACKAGE_LENGTH * packageLength = current;␊ |
| 3275 | current = buildPackageLength(current, 0);␊ |
| 3276 | ␊ |
| 3277 | // IF ("And"(TYPE, 0x0040)) -- AND Opcode␊ |
| 3278 | current = buildOpCode(current, AML_AND_OP);␊ |
| 3279 | ␊ |
| 3280 | // IF (And("TYPE", 0x0040)) -- TYPE Term␊ |
| 3281 | current = buildNameSeg(current, NAMESEG("TYPE"));␊ |
| 3282 | ␊ |
| 3283 | // IF (And(TYPE, "0x0040")) -- DWORD Value Term␊ |
| 3284 | current = buildDwordConst(current, 0x0040);␊ |
| 3285 | ␊ |
| 3286 | // IF ("And(TYPE, 0x0040)") -- Target for And term (unused)␊ |
| 3287 | current = buildOpCode(current, AML_ZERO_OP);␊ |
| 3288 | ␊ |
| 3289 | // Build return package containing CSD package(s)␊ |
| 3290 | {␊ |
| 3291 | ACPI_RETURN_PACKAGE * returnPkg = current;␊ |
| 3292 | current = buildReturnPackage(current, (U8)pkg_cstates->num_cstates - 1);␊ |
| 3293 | ␊ |
| 3294 | {␊ |
| 3295 | U32 cstateIndex;␊ |
| 3296 | for (cstateIndex=1; cstateIndex < pkg_cstates->num_cstates; cstateIndex++)␊ |
| 3297 | {␊ |
| 3298 | // Build CSD for this C-state␊ |
| 3299 | ␊ |
| 3300 | // Create CSD package␊ |
| 3301 | ACPI_CSD_PACKAGE * csd = current;␊ |
| 3302 | current = csd + 1;␊ |
| 3303 | ␊ |
| 3304 | setSmallPackage(&csd->package, 6);␊ |
| 3305 | csd->package.packageLength = (U8)(sizeof(ACPI_CSD_PACKAGE) - 1);␊ |
| 3306 | ␊ |
| 3307 | setByteConst(&csd->NumberOfEntries, 6);␊ |
| 3308 | setByteConst(&csd->Revision, 0);␊ |
| 3309 | setDwordConst(&csd->Domain, domain);␊ |
| 3310 | setDwordConst(&csd->CoordType, ACPI_COORD_TYPE_HW_ALL);␊ |
| 3311 | setDwordConst(&csd->NumProcessors, cpusInDomain);␊ |
| 3312 | setDwordConst(&csd->Index, cstateIndex);␊ |
| 3313 | }␊ |
| 3314 | }␊ |
| 3315 | ␊ |
| 3316 | setPackageLength(&returnPkg->package.pkgLength,␊ |
| 3317 | (U8 *)current - (U8 *)&returnPkg->package.pkgLength);␊ |
| 3318 | }␊ |
| 3319 | ␊ |
| 3320 | setPackageLength(packageLength, (U8 *)current - (U8 *)packageLength);␊ |
| 3321 | }␊ |
| 3322 | // "Return (ZERO)"␊ |
| 3323 | current = buildReturnZero(current);␊ |
| 3324 | }␊ |
| 3325 | // Update length in _CSD method␊ |
| 3326 | setPackageLength(&csdMethod->pkgLength, (U8 *)current - (U8 *)&csdMethod->pkgLength);␊ |
| 3327 | ␊ |
| 3328 | return(current);␊ |
| 3329 | }␊ |
| 3330 | #endif␊ |
| 3331 | ␊ |
| 3332 | #if BUILD_ACPI_TSS␊ |
| 3333 | //-----------------------------------------------------------------------------␊ |
| 3334 | static void * buildTPC(void * current)␊ |
| 3335 | {␊ |
| 3336 | ACPI_SMALL_METHOD * tpc = current;␊ |
| 3337 | current = buildSmallMethod(current, NAMESEG("_TPC"), 0);␊ |
| 3338 | ␊ |
| 3339 | current = buildReturnZero(current);␊ |
| 3340 | ␊ |
| 3341 | // Update package length in PPC object␊ |
| 3342 | tpc->packageLength = (U8) ( (U8 *)current - (U8 *)&tpc->packageLength );␊ |
| 3343 | ␊ |
| 3344 | return(current);␊ |
| 3345 | }␊ |
| 3346 | ␊ |
| 3347 | //-----------------------------------------------------------------------------␊ |
| 3348 | static void * buildPTC(void * current)␊ |
| 3349 | {␊ |
| 3350 | static const ACPI_GENERIC_ADDRESS ptc_gas[] = {␊ |
| 3351 | {0x7f,0x00,0,0,0},␊ |
| 3352 | {0x7f,0x00,0,0,0},␊ |
| 3353 | };␊ |
| 3354 | ␊ |
| 3355 | ACPI_SMALL_METHOD * ptc = current;␊ |
| 3356 | current = buildSmallMethod(current, NAMESEG("_PTC"), 0);␊ |
| 3357 | ␊ |
| 3358 | {␊ |
| 3359 | ACPI_RETURN_PACKAGE * returnPkg = current;␊ |
| 3360 | current = buildReturnPackage(current, 2);␊ |
| 3361 | ␊ |
| 3362 | {␊ |
| 3363 | ACPI_SMALL_BUFFER * buff = current;␊ |
| 3364 | current = buildSmallBuffer(current);␊ |
| 3365 | ␊ |
| 3366 | current = buildByteConst(current, sizeof(ACPI_GENERIC_REGISTER) + sizeof(ACPI_END_TAG) );␊ |
| 3367 | current = buildGenericRegister(current, &ptc_gas[0]);␊ |
| 3368 | current = buildEndTag(current);␊ |
| 3369 | ␊ |
| 3370 | {␊ |
| 3371 | U32 length = (U8 *)current - (U8 *)buff;␊ |
| 3372 | buff->packageLength = (U8)length - 1;␊ |
| 3373 | }␊ |
| 3374 | }␊ |
| 3375 | {␊ |
| 3376 | ACPI_SMALL_BUFFER * buff = current;␊ |
| 3377 | current = buildSmallBuffer(current);␊ |
| 3378 | ␊ |
| 3379 | current = buildByteConst(current, sizeof(ACPI_GENERIC_REGISTER) + sizeof(ACPI_END_TAG) );␊ |
| 3380 | current = buildGenericRegister(current, &ptc_gas[1]);␊ |
| 3381 | current = buildEndTag(current);␊ |
| 3382 | ␊ |
| 3383 | {␊ |
| 3384 | U32 length = (U8 *)current - (U8 *)buff;␊ |
| 3385 | buff->packageLength = (U8)length - 1;␊ |
| 3386 | }␊ |
| 3387 | }␊ |
| 3388 | ␊ |
| 3389 | setPackageLength(&returnPkg->package.pkgLength,␊ |
| 3390 | (U8 *)current - (U8 *)&returnPkg->package.pkgLength);␊ |
| 3391 | }␊ |
| 3392 | ␊ |
| 3393 | // Update package length in PTC object␊ |
| 3394 | ptc->packageLength = (U8)((U8 *)current - (U8 *)&ptc->packageLength);␊ |
| 3395 | ␊ |
| 3396 | return(current);␊ |
| 3397 | }␊ |
| 3398 | ␊ |
| 3399 | //-----------------------------------------------------------------------------␊ |
| 3400 | static void * buildTSS(void * current, PKG_TSTATES * pkg_tstates)␊ |
| 3401 | {␊ |
| 3402 | //␊ |
| 3403 | // IF (LAnd(TSEN, And(TYPE,4)))␊ |
| 3404 | // {␊ |
| 3405 | // Return (Package of Tstate Packages)␊ |
| 3406 | // }␊ |
| 3407 | // Return(Zero)␊ |
| 3408 | //␊ |
| 3409 | ACPI_METHOD * tss = current;␊ |
| 3410 | current = buildMethod(current, NAMESEG("_TSS"), 0);␊ |
| 3411 | ␊ |
| 3412 | {␊ |
| 3413 | // "IF" (LAnd(TSEN, And(TYPE,4))) -- IF Opcode␊ |
| 3414 | current = buildOpCode(current, AML_IF_OP);␊ |
| 3415 | {␊ |
| 3416 | ACPI_PACKAGE_LENGTH * packageLength = current;␊ |
| 3417 | current = buildPackageLength(current, 0);␊ |
| 3418 | ␊ |
| 3419 | // IF ("LAnd"(TSEN, And(TYPE, 4))) -- LAND Opcode␊ |
| 3420 | current = buildOpCode(current, AML_LAND_OP);␊ |
| 3421 | ␊ |
| 3422 | // IF (LAnd("TSEN", And(TYPE, 4))) -- TSEN Term␊ |
| 3423 | current = buildNameSeg(current, NAMESEG("TSEN"));␊ |
| 3424 | ␊ |
| 3425 | // IF (LAnd(TSEN, "And"(TYPE, 4))) -- AND Opcode␊ |
| 3426 | current = buildOpCode(current, AML_AND_OP);␊ |
| 3427 | ␊ |
| 3428 | // IF (LAnd(TSEN, And("TYPE", 4))) -- TYPE Term␊ |
| 3429 | current = buildNameSeg(current, NAMESEG("TYPE"));␊ |
| 3430 | ␊ |
| 3431 | // IF (LAnd(TSEN, And(TYPE, "4"))) -- DWORD Value Term␊ |
| 3432 | current = buildWordConst(current, 4);␊ |
| 3433 | ␊ |
| 3434 | // IF (LAnd(MWOS, "And(TYPE, 4)")) -- Target for And term (unused)␊ |
| 3435 | current = buildOpCode(current, AML_ZERO_OP);␊ |
| 3436 | ␊ |
| 3437 | // Return (Package of Tstate Packages)␊ |
| 3438 | {␊ |
| 3439 | ACPI_RETURN_PACKAGE * returnPkg = current;␊ |
| 3440 | current = buildReturnPackage(current, (U8)pkg_tstates->num_tstates);␊ |
| 3441 | ␊ |
| 3442 | // (3.3.3) For each T-state␊ |
| 3443 | {␊ |
| 3444 | U32 tstateIndex = 0;␊ |
| 3445 | for (tstateIndex=0; tstateIndex < pkg_tstates->num_tstates; tstateIndex++)␊ |
| 3446 | {␊ |
| 3447 | // (3.3.3.1) Create T-state package␊ |
| 3448 | ACPI_TSTATE_PACKAGE * tstate = current;␊ |
| 3449 | current = tstate + 1;␊ |
| 3450 | ␊ |
| 3451 | setSmallPackage(&tstate->package, 5);␊ |
| 3452 | tstate->package.packageLength = (U8)(sizeof(ACPI_TSTATE_PACKAGE) - 1);␊ |
| 3453 | ␊ |
| 3454 | setDwordConst(&tstate->FreqPercent, pkg_tstates->tstate[tstateIndex].freqpercent);␊ |
| 3455 | setDwordConst(&tstate->Power, pkg_tstates->tstate[tstateIndex].power);␊ |
| 3456 | setDwordConst(&tstate->TransLatency, pkg_tstates->tstate[tstateIndex].latency);␊ |
| 3457 | setDwordConst(&tstate->Control, pkg_tstates->tstate[tstateIndex].control);␊ |
| 3458 | setDwordConst(&tstate->Status, pkg_tstates->tstate[tstateIndex].status);␊ |
| 3459 | } // for␊ |
| 3460 | } // for block␊ |
| 3461 | ␊ |
| 3462 | // (3.3.4) Update package length in return package␊ |
| 3463 | setPackageLength(&returnPkg->package.pkgLength, (U8 *)current - (U8 *)&returnPkg->package.pkgLength);␊ |
| 3464 | }␊ |
| 3465 | ␊ |
| 3466 | // "IF (LAnd(TSEN, And(TYPE,4))) and its body" -- Set package length␊ |
| 3467 | setPackageLength(packageLength, (U8 *)current - (U8 *)packageLength);␊ |
| 3468 | }␊ |
| 3469 | // "Return (ZERO)"␊ |
| 3470 | current = buildReturnZero(current);␊ |
| 3471 | }␊ |
| 3472 | // Set package length for the _TSS object␊ |
| 3473 | setPackageLength(&tss->pkgLength, (U8 *)current - (U8 *)&tss->pkgLength);␊ |
| 3474 | ␊ |
| 3475 | return(current);␊ |
| 3476 | }␊ |
| 3477 | ␊ |
| 3478 | //-----------------------------------------------------------------------------␊ |
| 3479 | static void * buildTSD(void * current, U32 domain, U32 cpusInDomain)␊ |
| 3480 | {␊ |
| 3481 | // If (And(TYPE, 0x0080))␊ |
| 3482 | // {␊ |
| 3483 | // Return (Package containing TSD package)␊ |
| 3484 | // }␊ |
| 3485 | // Return(Zero)␊ |
| 3486 | ␊ |
| 3487 | ACPI_METHOD * tsdMethod = current;␊ |
| 3488 | current = buildMethod(current, NAMESEG("_TSD"), 0);␊ |
| 3489 | {␊ |
| 3490 | // "IF" (And(TYPE, 0x0080)) -- IF Opcode␊ |
| 3491 | current = buildOpCode(current, AML_IF_OP);␊ |
| 3492 | {␊ |
| 3493 | ACPI_PACKAGE_LENGTH * packageLength = current;␊ |
| 3494 | current = buildPackageLength(current, 0);␊ |
| 3495 | ␊ |
| 3496 | // IF ("And"(TYPE, 0x0080)) -- AND Opcode␊ |
| 3497 | current = buildOpCode(current, AML_AND_OP);␊ |
| 3498 | ␊ |
| 3499 | // IF (And("TYPE", 0x0080)) -- TYPE Term␊ |
| 3500 | current = buildNameSeg(current, NAMESEG("TYPE"));␊ |
| 3501 | ␊ |
| 3502 | // IF (And(TYPE, "0x0080")) -- DWORD Value Term␊ |
| 3503 | current = buildDwordConst(current, 0x0080);␊ |
| 3504 | ␊ |
| 3505 | // IF ("And(TYPE, 0x0080)") -- Target for And term (unused)␊ |
| 3506 | current = buildOpCode(current, AML_ZERO_OP);␊ |
| 3507 | ␊ |
| 3508 | // Build package containing TSD package␊ |
| 3509 | {␊ |
| 3510 | ACPI_RETURN_PACKAGE * returnPkg = current;␊ |
| 3511 | current = buildReturnPackage(current, 1);␊ |
| 3512 | ␊ |
| 3513 | {␊ |
| 3514 | // Create PSD package␊ |
| 3515 | ACPI_TSD_PACKAGE * tsd = current;␊ |
| 3516 | current = tsd + 1;␊ |
| 3517 | ␊ |
| 3518 | setSmallPackage(&tsd->package, 5);␊ |
| 3519 | tsd->package.packageLength = (U8)(sizeof(ACPI_TSD_PACKAGE) - 1);␊ |
| 3520 | ␊ |
| 3521 | setByteConst(&tsd->NumberOfEntries, 5);␊ |
| 3522 | setByteConst(&tsd->Revision, 0);␊ |
| 3523 | setDwordConst(&tsd->Domain, domain);␊ |
| 3524 | setDwordConst(&tsd->CoordType, ACPI_COORD_TYPE_SW_ANY);␊ |
| 3525 | setDwordConst(&tsd->NumProcessors, cpusInDomain);␊ |
| 3526 | ␊ |
| 3527 | } // TSD package␊ |
| 3528 | ␊ |
| 3529 | setPackageLength(&returnPkg->package.pkgLength,␊ |
| 3530 | (U8 *)current - (U8 *)&returnPkg->package.pkgLength);␊ |
| 3531 | }␊ |
| 3532 | ␊ |
| 3533 | setPackageLength(packageLength, (U8 *)current - (U8 *)packageLength);␊ |
| 3534 | }␊ |
| 3535 | // "Return (ZERO)"␊ |
| 3536 | current = buildReturnZero(current);␊ |
| 3537 | }␊ |
| 3538 | // Update length in _TSD method␊ |
| 3539 | setPackageLength(&tsdMethod->pkgLength, (U8 *)current - (U8 *)&tsdMethod->pkgLength);␊ |
| 3540 | ␊ |
| 3541 | return(current);␊ |
| 3542 | }␊ |
| 3543 | #endif␊ |
| 3544 | ␊ |
| 3545 | //-----------------------------------------------------------------------------␊ |
| 3546 | static U32 BuildSsdt(ACPI_TABLE_MADT * madt, ACPI_TABLE_DSDT *dsdt, void * buffer, U32 bufferSize, bool enable_cstates, bool enable_pstates, bool enable_tstates)␊ |
| 3547 | {␊ |
| 3548 | ␉// Build SSDT␊ |
| 3549 | ␉{␊ |
| 3550 | ␉␉// (1) Setup pointers to SSDT memory location␊ |
| 3551 | ␉␉// (2) Create SSDT Definition Block␊ |
| 3552 | ␉␉// (2.1) Save pointer to SSDT package length and checksum fields␊ |
| 3553 | ␉␉// (2.2) Create variables in SSDT scope␊ |
| 3554 | ␉␉// (3) For each logical processor CPUn ␊ |
| 3555 | ␉␉// (3.1) Create scope for CPUn␊ |
| 3556 | ␉␉// (3.2) Create variables in CPU scope␊ |
| 3557 | ␉␉// (3.3) Create _OSC and/or _PDC Methods␊ |
| 3558 | ␉␉// (3.4) Create P-state related structures␊ |
| 3559 | ␉␉// (3.4.1) Create _PSS Method␊ |
| 3560 | ␉␉// (3.4.2) Create _PCT Object␊ |
| 3561 | ␉␉// (3.4.3) Create _PPC Method␊ |
| 3562 | ␉␉// (3.4.4) Create _PSD Object␊ |
| 3563 | ␉␉// (3.5) Create C-state related structures␊ |
| 3564 | ␉␉// (3.5.1) Create _CST Method␊ |
| 3565 | ␉␉// (3.5.2) Create _CSD Method␊ |
| 3566 | ␉␉// (3.6) Create T-state related structures (Optional)␊ |
| 3567 | ␉␉// (3.6.1) Create _TPC Method␊ |
| 3568 | ␉␉// (3.6.2) Create _PTC Method␊ |
| 3569 | ␉␉// (3.6.3) Create _TSS Method␊ |
| 3570 | ␉␉// (3.6.4) Create _TSD Method␊ |
| 3571 | ␉␉// (3.7) Update length in CPUn Scope␊ |
| 3572 | ␉␉// (4) Update length and checksum in SSDT Definition Block␊ |
| 3573 | ␉␉DBG("Attempting to build SSDT\n");␊ |
| 3574 | ␊ |
| 3575 | ␉␉U32 pstates_enabled = 0;␊ |
| 3576 | ␉␉U32 cstates_enabled = 0;␊ |
| 3577 | ␉␉CPU_DETAILS cpu;␊ |
| 3578 | ␉␉MADT_INFO madt_info;␊ |
| 3579 | ␉␉U8 ACPI_COORD_TYPE = ACPI_COORD_TYPE_SW_ANY; // default␊ |
| 3580 | ␉␉ACPI_TABLE_SSDT *SsdtPointer = (void*)0ul;␊ |
| 3581 | ␉␉␊ |
| 3582 | ␉␉// Desired state for providing alternate ACPI _CST structure using MWAIT␊ |
| 3583 | ␉␉// extensions␊ |
| 3584 | ␉␉// 1= Alternate _CST using MWAIT extension is enabled for OSPM use␊ |
| 3585 | ␉␉// 0= Alternate _CST using MWAIT extension is disabled for OSPM use␊ |
| 3586 | ␉␉bool enable_mwait = 1;␊ |
| 3587 | ␉␉␊ |
| 3588 | ␉␉// (1) Setup pointers to SSDT memory location␊ |
| 3589 | ␉␉void * current = buffer;␊ |
| 3590 | ␉␉void * end = (U8 *)buffer + bufferSize;␉␉␊ |
| 3591 | ␉␉␊ |
| 3592 | ␉␉// Check that we have a valid cpu_map (if it's not already done, it will try to generate it)␊ |
| 3593 | ␉␉if (generate_cpu_map_from_acpi(dsdt) != 0)␊ |
| 3594 | ␉␉{␊ |
| 3595 | ␉␉␉return(0);␊ |
| 3596 | ␉␉}␊ |
| 3597 | ␉␉␊ |
| 3598 | ␉␉// Confirm a valid SSDT buffer was provided␊ |
| 3599 | ␉␉if (!buffer)␊ |
| 3600 | ␉␉{␊ |
| 3601 | ␉␉␉printf("Error: Invalid Buffer Address for SSDT\n");␊ |
| 3602 | ␉␉␉return(0);␊ |
| 3603 | ␉␉}␊ |
| 3604 | ␉␉␊ |
| 3605 | ␉␉// Confirm a valid SSDT buffer length was provided␊ |
| 3606 | ␉␉if (!bufferSize)␊ |
| 3607 | ␉␉{␊ |
| 3608 | ␉␉␉printf("Error: Invalid Buffer Length for SSDT\n");␊ |
| 3609 | ␉␉␉return(0);␊ |
| 3610 | ␉␉}␉␉␊ |
| 3611 | ␉␉␊ |
| 3612 | ␉␉collect_cpu_info(&cpu);␊ |
| 3613 | ␉␉ProcessMadt(madt, &madt_info);␊ |
| 3614 | ␉␉␊ |
| 3615 | ␉␉if (enable_cstates && pmbase)␊ |
| 3616 | ␉␉{␊ |
| 3617 | ␉␉␉DBG("Building Cstate Info\n");␊ |
| 3618 | ␊ |
| 3619 | ␉␉␉cstates_enabled = BuildCstateInfo(&cpu, pmbase);␊ |
| 3620 | ␉␉␉if (cstates_enabled)␊ |
| 3621 | ␉␉␉{␊ |
| 3622 | ␉␉␉␉getBoolForKey(KEnableMwait, &enable_mwait, &bootInfo->bootConfig);␊ |
| 3623 | ␉␉␉}␊ |
| 3624 | ␉␉}␊ |
| 3625 | ␉␉␊ |
| 3626 | ␉␉if (enable_pstates)␊ |
| 3627 | ␉␉{␊ |
| 3628 | ␉␉␉DBG("Building Pstate Info\n");␊ |
| 3629 | ␊ |
| 3630 | ␉␉␉pstates_enabled = BuildPstateInfo(&cpu);␊ |
| 3631 | ␉␉␉if (pstates_enabled)␊ |
| 3632 | ␉␉␉{␊ |
| 3633 | ␉␉␉␉const char *str = getStringForKey(KAcpiCoordType, &bootInfo->bootConfig);␊ |
| 3634 | ␉␉␉␉U8 tmp = (U8)strtoul(str, NULL,16);␊ |
| 3635 | ␉␉␉␉if ((tmp == ACPI_COORD_TYPE_SW_ALL) || (tmp == ACPI_COORD_TYPE_SW_ANY) || (tmp == ACPI_COORD_TYPE_HW_ALL) )␊ |
| 3636 | ␉␉␉␉{␊ |
| 3637 | ␉␉␉␉␉ACPI_COORD_TYPE = tmp;␊ |
| 3638 | ␉␉␉␉}␊ |
| 3639 | ␉␉␉}␊ |
| 3640 | ␉␉}␊ |
| 3641 | #if BUILD_ACPI_TSS␊ |
| 3642 | U32 tstates_enabled = 0;␊ |
| 3643 | if (enable_tstates)␊ |
| 3644 | ␉␉{␊ |
| 3645 | ␉␉␉DBG("Building Pstate Info\n");␊ |
| 3646 | ␊ |
| 3647 | ␉␉␉tstates_enabled = BuildTstateInfo(&cpu);␉␉␉␊ |
| 3648 | ␉␉} ␊ |
| 3649 | #endif␊ |
| 3650 | ␉␉␊ |
| 3651 | ␉␉SsdtPointer = (ACPI_TABLE_SSDT *)buffer;␊ |
| 3652 | ␉␉␊ |
| 3653 | ␉␉// (2) Create SSDT Definition Block␊ |
| 3654 | ␉␉// (2.1) Save pointer to SSDT package length and checksum fields␊ |
| 3655 | ␉␉current = buildTableHeader(current, NAMESEG("SSDT"), NAMESEG64("PPM RCM "));␊ |
| 3656 | ␉␉␊ |
| 3657 | ␉␉// Check to confirm no SSDT buffer overflow␊ |
| 3658 | ␉␉if ( (U8 *)current > (U8 *)end )␊ |
| 3659 | ␉␉{␊ |
| 3660 | ␉␉␉printf("Error: SSDT Buffer Length exceeded available space \n");␊ |
| 3661 | ␉␉␉return(0);␊ |
| 3662 | ␉␉}␊ |
| 3663 | ␉␉␊ |
| 3664 | ␉␉// (3) For each logical processor CPUn ␊ |
| 3665 | ␉␉// We will use the dsdt datas in place of madt,for the cpu(s) detection.␊ |
| 3666 | ␉␉// Most users use the dsdt table to change the numbers of cpu(s) that the OS and the bootloader should use,␊ |
| 3667 | ␉␉// (MADT patch to sync the nb of cpu(s) with DSDT is still in progress, ␊ |
| 3668 | ␉␉// in an ideal world we should sync the dsdt and madt tables with the with the cpu options found into the boot.plist in first,␊ |
| 3669 | ␉␉// then the number of core cpu detected by cpu.c, then the dsdt )␊ |
| 3670 | ␉␉// Note also that due to chameleon limit we use the same package per each cpu(s) for all objects and methods␊ |
| 3671 | ␉␉// (package detection for each cpu(s) is still in progress) ␊ |
| 3672 | ␉␉{␉␉␉␊ |
| 3673 | ␉␉␉U32 lapic_index;␊ |
| 3674 | ␉␉␉for (lapic_index=0; lapic_index < cpu_map_count; lapic_index++)␊ |
| 3675 | ␉␉␉{␊ |
| 3676 | ␉␉␉␉// (3.1) Create scope for CPUn␊ |
| 3677 | ␉␉␉␉ACPI_SCOPE * scope = current;␊ |
| 3678 | ␉␉␉␉␊ |
| 3679 | ␉␉␉␉{␊ |
| 3680 | ␉␉␉␉␉DBG("Building CPU Scope\n");␊ |
| 3681 | ␉␉␉␉␉U32 cpu_namespace = (cpuNamespace == CPU_NAMESPACE_SB) ? NAMESEG("_SB_") : NAMESEG("_PR_");␊ |
| 3682 | ␉␉␉␉␉PROCESSOR_NUMBER_TO_NAMESEG * namepath = &cpu_map[lapic_index];␊ |
| 3683 | ␉␉␉␉␉current = buildCpuScope (current, cpu_namespace, namepath );␊ |
| 3684 | ␉␉␉␉}␊ |
| 3685 | ␉␉␉␉␊ |
| 3686 | ␉␉␉␉// Check to confirm no SSDT buffer overflow␊ |
| 3687 | ␉␉␉␉if ( (U8 *)current > (U8 *)end )␊ |
| 3688 | ␉␉␉␉{␊ |
| 3689 | ␉␉␉␉␉printf("Error: SSDT Buffer Length exceeded available space \n");␊ |
| 3690 | ␉␉␉␉␉return(0);␊ |
| 3691 | ␉␉␉␉}␊ |
| 3692 | ␉␉␉␉␊ |
| 3693 | ␉␉␉␉// (3.2) Create variables in CPU scope␊ |
| 3694 | ␉␉␉␉DBG("Creating variables in CPU scope\n");␉␉␉␉// Build Type variable used to store PDC capabilities␊ |
| 3695 | ␉␉␉␉current = buildNamedDword(current, NAMESEG("TYPE"), 0);␊ |
| 3696 | ␉␉␉␉␊ |
| 3697 | ␉␉␉␉// Build PSEN variable used to store state of P-State Enable setup option␊ |
| 3698 | ␉␉␉␉current = buildNamedDword(current, NAMESEG("PSEN"), pstates_enabled);␊ |
| 3699 | ␉␉␉␉␊ |
| 3700 | ␉␉␉␉// Build CSEN variable used to store state of C-State Enable setup option␊ |
| 3701 | ␉␉␉␉current = buildNamedDword(current, NAMESEG("CSEN"), cstates_enabled);␊ |
| 3702 | ␉␉␉␉␊ |
| 3703 | ␉␉␉␉// Build MWOS variable used to store state of MWAIT OS setup option␊ |
| 3704 | ␉␉␉␉current = buildNamedDword(current, NAMESEG("MWOS"), (U32)(enable_mwait&&cpu.mwait_supported));␊ |
| 3705 | ␉␉␉␉␉␉␉␉␊ |
| 3706 | ␉␉␉␉// (3.3) Create _OSC and/or _PDC Methods␊ |
| 3707 | ␉␉␉␉{␊ |
| 3708 | ␉␉␉␉␉// Build _PDC method␊ |
| 3709 | ␉␉␉␉␉DBG("Building PDC method\n");␊ |
| 3710 | ␉␉␉␉␉current = buildPDC(current);␊ |
| 3711 | ␉␉␉␉␉␊ |
| 3712 | ␉␉␉␉␉// Check to confirm no SSDT buffer overflow␊ |
| 3713 | ␉␉␉␉␉if ( (U8 *)current > (U8 *)end )␊ |
| 3714 | ␉␉␉␉␉{␊ |
| 3715 | ␉␉␉␉␉␉printf("Error: SSDT Buffer Length exceeded available space \n");␊ |
| 3716 | ␉␉␉␉␉␉return(0);␊ |
| 3717 | ␉␉␉␉␉}␊ |
| 3718 | ␉␉␉␉␉␊ |
| 3719 | ␉␉␉␉␉// Build _OSC method␊ |
| 3720 | ␉␉␉␉␉DBG("Building _OSC method\n");␊ |
| 3721 | ␉␉␉␉␉current = buildOSC(current);␊ |
| 3722 | ␉␉␉␉␉␊ |
| 3723 | ␉␉␉␉␉// Check to confirm no SSDT buffer overflow␊ |
| 3724 | ␉␉␉␉␉if ( (U8 *)current > (U8 *)end )␊ |
| 3725 | ␉␉␉␉␉{␊ |
| 3726 | ␉␉␉␉␉␉printf("Error: SSDT Buffer Length exceeded available space \n");␊ |
| 3727 | ␉␉␉␉␉␉return(0);␊ |
| 3728 | ␉␉␉␉␉}␊ |
| 3729 | ␉␉␉␉}␊ |
| 3730 | ␉␉␉␉␊ |
| 3731 | ␉␉␉␉// (3.4) Create P-state related structures␊ |
| 3732 | ␉␉␉␉if (pstates_enabled == 1)␊ |
| 3733 | ␉␉␉␉{␊ |
| 3734 | ␉␉␉␉␉// (3.4.1) Create _PSS Method␊ |
| 3735 | ␉␉␉␉␉{␊ |
| 3736 | ␉␉␉␉␉␉DBG("Building _PSS method\n");␊ |
| 3737 | ␉␉␉␉␉␉PKG_PSTATES * pkg_pstates = &cpu.pkg_pstates;␊ |
| 3738 | ␉␉␉␉␉␉current = buildPSS(current, pkg_pstates);␊ |
| 3739 | ␉␉␉␉␉}␊ |
| 3740 | ␉␉␉␉␉␊ |
| 3741 | ␉␉␉␉␉// Check to confirm no SSDT buffer overflow␊ |
| 3742 | ␉␉␉␉␉if ( (U8 *)(current) > (U8 *)end )␊ |
| 3743 | ␉␉␉␉␉{␊ |
| 3744 | ␉␉␉␉␉␉printf("Error: SSDT Buffer Length exceeded available space \n");␊ |
| 3745 | ␉␉␉␉␉␉return(0);␊ |
| 3746 | ␉␉␉␉␉}␊ |
| 3747 | ␉␉␉␉␉␊ |
| 3748 | ␉␉␉␉␉// (3.4.2) Create _PCT Object␊ |
| 3749 | ␉␉␉␉␉DBG("Building _PCT Object\n");␊ |
| 3750 | ␉␉␉␉␉current = buildPCT(current);␊ |
| 3751 | ␉␉␉␉␉␊ |
| 3752 | ␉␉␉␉␉// Check to confirm no SSDT buffer overflow␊ |
| 3753 | ␉␉␉␉␉if ( (U8 *)(current) > (U8 *)end )␊ |
| 3754 | ␉␉␉␉␉{␊ |
| 3755 | ␉␉␉␉␉␉printf("Error: SSDT Buffer Length exceeded available space \n");␊ |
| 3756 | ␉␉␉␉␉␉return(0);␊ |
| 3757 | ␉␉␉␉␉}␊ |
| 3758 | ␉␉␉␉␉␊ |
| 3759 | ␉␉␉␉␉// (3.4.3) Create _PPC Method␊ |
| 3760 | ␉␉␉␉␉DBG("Building _PPC Method\n");␊ |
| 3761 | ␉␉␉␉␉current = buildPPC(current);␊ |
| 3762 | ␉␉␉␉␉␊ |
| 3763 | ␉␉␉␉␉// Check to confirm no SSDT buffer overflow␊ |
| 3764 | ␉␉␉␉␉if ( (U8 *)(current) > (U8 *)end )␊ |
| 3765 | ␉␉␉␉␉{␊ |
| 3766 | ␉␉␉␉␉␉printf("Error: SSDT Buffer Length exceeded available space \n");␊ |
| 3767 | ␉␉␉␉␉␉return(0);␊ |
| 3768 | ␉␉␉␉␉}␊ |
| 3769 | ␉␉␉␉␉␊ |
| 3770 | ␉␉␉␉␉// (3.4.4) Create PSD with hardware coordination␊ |
| 3771 | ␉␉␉␉␉{␊ |
| 3772 | ␉␉␉␉␉␉DBG("Building _PSD Method\n");␊ |
| 3773 | ␉␉␉␉␉␉U32 domain = madt_info.lapic[lapic_index].pkg_index;␊ |
| 3774 | ␊ |
| 3775 | // In this (bad?) implementation we use the nb of cpu found in the dsdt␊ |
| 3776 | ␉␉␉␉␉␉U32 cpusInDomain = cpu_map_count;␉␉␉␉␉␉␉␊ |
| 3777 | ␉␉␉␉␉␉current = buildPSD(current, domain, cpusInDomain, ACPI_COORD_TYPE);␊ |
| 3778 | ␉␉␉␉␉}␊ |
| 3779 | ␉␉␉␉␉␊ |
| 3780 | ␉␉␉␉␉// Check to confirm no SSDT buffer overflow␊ |
| 3781 | ␉␉␉␉␉if ( (U8 *)(current) > (U8 *)end )␊ |
| 3782 | ␉␉␉␉␉{␊ |
| 3783 | ␉␉␉␉␉␉printf("Error: SSDT Buffer Length exceeded available space \n");␊ |
| 3784 | ␉␉␉␉␉␉return(0);␊ |
| 3785 | ␉␉␉␉␉}␊ |
| 3786 | ␉␉␉␉}␊ |
| 3787 | ␊ |
| 3788 | ␉␉␉␉// (3.5) Create C-state related structures␊ |
| 3789 | ␉␉␉␉if (cstates_enabled == 1)␊ |
| 3790 | ␉␉␉␉{␊ |
| 3791 | ␉␉␉␉␉{␊ |
| 3792 | ␉␉␉␉␉␉PKG_CSTATES * mwait_pkg_cstates = &cpu.pkg_mwait_cstates;␊ |
| 3793 | ␉␉␉␉␉␉PKG_CSTATES * io_pkg_cstates = &cpu.pkg_io_cstates;␊ |
| 3794 | ␉␉␉␉␉␉␊ |
| 3795 | ␉␉␉␉␉␉// Build CST␊ |
| 3796 | ␉␉␉␉␉␉DBG("Building _CST Method\n");␊ |
| 3797 | ␉␉␉␉␉␉current = buildCST(current, mwait_pkg_cstates, io_pkg_cstates);␉␉␉␉␉␉␊ |
| 3798 | ␉␉␉␉␉}␊ |
| 3799 | ␊ |
| 3800 | #if BUILD_ACPI_CSD␊ |
| 3801 | {␊ |
| 3802 | // Use core_apic_id as domain␊ |
| 3803 | U32 domain = lapic->core_apic_id;␊ |
| 3804 | ␊ |
| 3805 | // In this (bad?) implementation we use the nb of cpu found in the dsdt ␊ |
| 3806 | U32 cpusInDomain = cpu_map_count;␊ |
| 3807 | ␊ |
| 3808 | // Create CSD␊ |
| 3809 | current = buildCSD(current, domain, cpusInDomain, io_pkg_cstates);␊ |
| 3810 | }␊ |
| 3811 | #endif␊ |
| 3812 | ␉␉␉␉␉␊ |
| 3813 | ␉␉␉␉␉// Check to confirm no SSDT buffer overflow␊ |
| 3814 | ␉␉␉␉␉if ( (U8 *)(current) > (U8 *)end )␊ |
| 3815 | ␉␉␉␉␉{␊ |
| 3816 | ␉␉␉␉␉␉printf("Error: SSDT Buffer Length exceeded available space \n");␊ |
| 3817 | ␉␉␉␉␉␉return(0);␊ |
| 3818 | ␉␉␉␉␉}␊ |
| 3819 | ␉␉␉␉}␊ |
| 3820 | #if BUILD_ACPI_TSS␉␉␉␉␊ |
| 3821 | // (3.6) Create T-state related structures␊ |
| 3822 | if (tstates_enabled == 1)␊ |
| 3823 | {␊ |
| 3824 | // (3.6.1) Create _TPC Method␊ |
| 3825 | current = buildTPC(current);␊ |
| 3826 | ␊ |
| 3827 | // (3.6.2) Create _PTC Method␊ |
| 3828 | current = buildPTC(current);␊ |
| 3829 | ␊ |
| 3830 | // (3.6.3) Create _TSS Method␊ |
| 3831 | {␊ |
| 3832 | PKG_TSTATES * pkg_tstates = &cpu.pkg_tstates; ␊ |
| 3833 | current = buildTSS(current, pkg_tstates);␊ |
| 3834 | }␊ |
| 3835 | ␊ |
| 3836 | // (3.6.4) Create _TSD Method␊ |
| 3837 | {␊ |
| 3838 | LAPIC_INFO * lapic = &madt_info.lapic[lapic_index];␊ |
| 3839 | ␊ |
| 3840 | // Use core_apic_id as domain␊ |
| 3841 | U32 domain = lapic->core_apic_id;␊ |
| 3842 | ␊ |
| 3843 | // In this (bad?) implementation we use the nb of cpu found in the dsdt ␊ |
| 3844 | U32 cpusInDomain = cpu_map_count;␊ |
| 3845 | ␊ |
| 3846 | current = buildTSD(current, domain, cpusInDomain);␊ |
| 3847 | }␊ |
| 3848 | }␊ |
| 3849 | #endif␉␉␊ |
| 3850 | ␉␉␉␉// (3.7) Update length in CPUn Scope␊ |
| 3851 | ␉␉␉␉setPackageLength(&scope->pkgLength, (U8 *)current - (U8 *)&scope->pkgLength);␊ |
| 3852 | ␉␉␉␉␊ |
| 3853 | ␉␉␉} // End for␊ |
| 3854 | ␉␉␉␊ |
| 3855 | ␉␉␉// (4) Update length and checksum in SSDT Definition Block␊ |
| 3856 | ␉␉␉{␊ |
| 3857 | ␉␉␉␉DBG("Updating length and checksum in SSDT Definition Block\n");␊ |
| 3858 | ␊ |
| 3859 | ␉␉␉␉SsdtPointer->Header.Length = (U8 *)current - (U8 *)SsdtPointer;␉␉␉␉␊ |
| 3860 | ␉␉␉␉SetChecksum(&SsdtPointer->Header);␊ |
| 3861 | ␉␉␉}␊ |
| 3862 | ␉␉␉␊ |
| 3863 | ␉␉␉// Check to confirm no SSDT buffer overflow␊ |
| 3864 | ␉␉␉if ( (U8 *)current > (U8 *)end )␊ |
| 3865 | ␉␉␉{␊ |
| 3866 | ␉␉␉␉printf("Error: SSDT Buffer Length exceeded available space \n");␊ |
| 3867 | ␉␉␉␉return(0);␊ |
| 3868 | ␉␉␉}␊ |
| 3869 | ␉␉␉␊ |
| 3870 | ␉␉} // End build SSDT␊ |
| 3871 | ␉␉␊ |
| 3872 | ␉} // SSDT␊ |
| 3873 | ␉␊ |
| 3874 | ␉return(1);␊ |
| 3875 | }␊ |
| 3876 | #endif␊ |
| 3877 | ␊ |
| 3878 | #if UNUSED␊ |
| 3879 | static ACPI_TABLE_FACS* generate_facs(bool updatefacs )␊ |
| 3880 | {␊ |
| 3881 | ACPI_TABLE_FACS* facs_mod=(ACPI_TABLE_FACS *)AllocateKernelMemory(sizeof(ACPI_TABLE_FACS));␊ |
| 3882 | bzero(facs_mod, sizeof(ACPI_TABLE_FACS));␊ |
| 3883 | ␉␊ |
| 3884 | ␉ACPI_TABLE_FACS * FacsPointer =(acpi_tables.FacsPointer64 != (void *)0ul) ? ␊ |
| 3885 | ␉(ACPI_TABLE_FACS *)acpi_tables.FacsPointer64 : (ACPI_TABLE_FACS *)acpi_tables.FacsPointer;␊ |
| 3886 | ␉␊ |
| 3887 | memcpy(facs_mod, FacsPointer , FacsPointer->Length);␊ |
| 3888 | facs_mod->Length = sizeof(ACPI_TABLE_FACS);␊ |
| 3889 | ␉␉ ␊ |
| 3890 | ␉if (FacsPointer->Length < sizeof(ACPI_TABLE_FACS))␊ |
| 3891 | ␉{␊ |
| 3892 | ␉␉facs_mod->FirmwareWakingVector = 0;␊ |
| 3893 | ␉␉facs_mod->GlobalLock = 0;␊ |
| 3894 | ␉␉facs_mod->Flags = 0;␊ |
| 3895 | ␉}␉␉␊ |
| 3896 | ␊ |
| 3897 | if (updatefacs && FacsPointer->Version < 2)␊ |
| 3898 | ␉{␊ |
| 3899 | ␉␉if (FacsPointer->Version > 0)␊ |
| 3900 | ␉␉{␊ |
| 3901 | ␉␉␉facs_mod->XFirmwareWakingVector = FacsPointer->XFirmwareWakingVector;␊ |
| 3902 | ␉␉} ␊ |
| 3903 | ␉␉else␊ |
| 3904 | ␉␉{␊ |
| 3905 | ␉␉␉facs_mod->XFirmwareWakingVector = (U64)facs_mod->FirmwareWakingVector;␊ |
| 3906 | ␉␉}␊ |
| 3907 | ␊ |
| 3908 | ␉␉facs_mod->Version = 2; /* ACPI 1.0: 0, ACPI 2.0/3.0: 1, ACPI 4.0: 2 */␊ |
| 3909 | ␉␉␊ |
| 3910 | ␉}␊ |
| 3911 | ␊ |
| 3912 | return facs_mod;␊ |
| 3913 | }␊ |
| 3914 | #endif␊ |
| 3915 | ␊ |
| 3916 | static ACPI_GENERIC_ADDRESS FillGASStruct(U32 Address, U8 Length)␊ |
| 3917 | {␊ |
| 3918 | ␉ACPI_GENERIC_ADDRESS TmpGAS;␊ |
| 3919 | ␉␊ |
| 3920 | ␉TmpGAS.SpaceId = 1; /* I/O Address */␊ |
| 3921 | ␉␊ |
| 3922 | ␉if (Address == 0)␊ |
| 3923 | ␉{␊ |
| 3924 | ␉␉TmpGAS.BitWidth = 0;␊ |
| 3925 | ␉} ␊ |
| 3926 | ␉else␊ |
| 3927 | ␉{␊ |
| 3928 | ␉␉TmpGAS.BitWidth = Length * 8;␊ |
| 3929 | ␉}␊ |
| 3930 | ␉␊ |
| 3931 | ␉TmpGAS.BitOffset = 0;␊ |
| 3932 | ␉TmpGAS.AccessWidth = 0; /* Not set for Legacy reasons... */␊ |
| 3933 | ␉TmpGAS.Address = (U64)Address;␊ |
| 3934 | ␉␊ |
| 3935 | ␉return (TmpGAS);␊ |
| 3936 | }␊ |
| 3937 | ␊ |
| 3938 | static ACPI_TABLE_FADT *␊ |
| 3939 | patch_fadt(ACPI_TABLE_FADT *fadt, ACPI_TABLE_DSDT *new_dsdt, bool UpdateFADT)␊ |
| 3940 | {␉␉␊ |
| 3941 | ␉ACPI_TABLE_FADT *fadt_mod = (void*)0;␊ |
| 3942 | ␉bool fadt_rev2_needed = false;␊ |
| 3943 | ␉bool fix_restart = false;␉␊ |
| 3944 | ␉const char * value;␉␊ |
| 3945 | ␊ |
| 3946 | ␉// Restart Fix␊ |
| 3947 | ␉if (Platform->CPU.Vendor == 0x756E6547) /* Intel */␊ |
| 3948 | ␉{␉␊ |
| 3949 | ␉␉fix_restart = true;␊ |
| 3950 | ␉␉getBoolForKey(kRestartFix, &fix_restart, &bootInfo->bootConfig);␊ |
| 3951 | ␉␉␊ |
| 3952 | ␉} else {␊ |
| 3953 | ␉␉verbose ("Not an Intel platform: Restart Fix disabled !!!\n");␊ |
| 3954 | ␉}␊ |
| 3955 | ␉␊ |
| 3956 | ␉if (fix_restart)␊ |
| 3957 | ␉␉fadt_rev2_needed = true;␊ |
| 3958 | ␉␉␉␊ |
| 3959 | ␉// Allocate new fadt table␊ |
| 3960 | ␉if (UpdateFADT) ␊ |
| 3961 | ␉{ ␊ |
| 3962 | if (fadt->Header.Length < 0xF4)␊ |
| 3963 | ␉ {␊ |
| 3964 | ␉␉␉fadt_mod=(ACPI_TABLE_FADT *)AllocateKernelMemory(0xF4);␊ |
| 3965 | ␉␉ bzero(fadt_mod, 0xF4);␊ |
| 3966 | ␉␉␉memcpy(fadt_mod, fadt, fadt->Header.Length);␊ |
| 3967 | ␉␉␉fadt_mod->Header.Length = 0xF4;␊ |
| 3968 | ␉␉}␊ |
| 3969 | ␉␉else␊ |
| 3970 | ␉␉{␉␉␉␊ |
| 3971 | ␉␉␉fadt_mod=(ACPI_TABLE_FADT *)AllocateKernelMemory(fadt->Header.Length);␉␊ |
| 3972 | ␉␉␉memcpy(fadt_mod, fadt, fadt->Header.Length);␊ |
| 3973 | ␉␉}␉␉ ␊ |
| 3974 | ␉␉␉␉␊ |
| 3975 | ␊ |
| 3976 | ␉␉//fadt_mod->Header.Revision = 0x04; // FADT rev 4␊ |
| 3977 | ␉␉fadt_mod->ResetRegister = FillGASStruct(0, 0);␊ |
| 3978 | ␉␉fadt_mod->ResetValue = 0;␊ |
| 3979 | ␉␉fadt_mod->Reserved4[0] = 0;␊ |
| 3980 | ␉␉fadt_mod->Reserved4[1] = 0;␊ |
| 3981 | ␉␉fadt_mod->Reserved4[2] = 0;␊ |
| 3982 | ␊ |
| 3983 | fadt_mod->XPm1aEventBlock = FillGASStruct(fadt_mod->Pm1aEventBlock, fadt_mod->Pm1EventLength);␊ |
| 3984 | ␉␉fadt_mod->XPm1bEventBlock = FillGASStruct(fadt_mod->Pm1bEventBlock, fadt_mod->Pm1EventLength);␊ |
| 3985 | ␉␉fadt_mod->XPm1aControlBlock = FillGASStruct(fadt_mod->Pm1aControlBlock, fadt_mod->Pm1ControlLength);␊ |
| 3986 | ␉␉fadt_mod->XPm1bControlBlock = FillGASStruct(fadt_mod->Pm1bControlBlock, fadt_mod->Pm1ControlLength);␊ |
| 3987 | ␉␉fadt_mod->XPm2ControlBlock = FillGASStruct(fadt_mod->Pm2ControlBlock, fadt_mod->Pm2ControlLength);␊ |
| 3988 | ␉␉fadt_mod->XPmTimerBlock = FillGASStruct(fadt_mod->PmTimerBlock, fadt_mod->PmTimerLength);␊ |
| 3989 | ␉␉fadt_mod->XGpe0Block = FillGASStruct(fadt_mod->Gpe0Block, fadt_mod->Gpe0BlockLength);␊ |
| 3990 | ␉␉fadt_mod->XGpe1Block = FillGASStruct(fadt_mod->Gpe1Block, fadt_mod->Gpe1BlockLength);␉␊ |
| 3991 | if (fadt->Header.Revision < 4)␊ |
| 3992 | ␉␉{␉␉␉␉␉␊ |
| 3993 | ␉␉␉fadt_mod->Header.Revision = 0x04; // FADT rev 4␊ |
| 3994 | ␉␉␉verbose("Converted ACPI V%d FADT to ACPI V4 FADT\n", fadt->Header.Revision);␊ |
| 3995 | ␊ |
| 3996 | ␉␉}␊ |
| 3997 | ␉}␊ |
| 3998 | ␉else␊ |
| 3999 | ␉{␊ |
| 4000 | ␉␉␊ |
| 4001 | ␉␉if (fadt_rev2_needed)␊ |
| 4002 | ␉␉{␊ |
| 4003 | ␉␉␉if (fadt->Header.Length < 0x84 )␊ |
| 4004 | ␉␉␉{␊ |
| 4005 | ␉␉␉␉fadt_mod=(ACPI_TABLE_FADT *)AllocateKernelMemory(0x84);␊ |
| 4006 | ␉␉␉␉bzero(fadt_mod, 0x84);␊ |
| 4007 | ␉␉␉␉memcpy(fadt_mod, fadt, fadt->Header.Length);␊ |
| 4008 | ␉␉␉␉fadt_mod->Header.Length = 0x84;␊ |
| 4009 | ␉␉␉}␊ |
| 4010 | ␉␉␉else␊ |
| 4011 | ␉␉␉{␊ |
| 4012 | ␉␉␉␉fadt_mod=(ACPI_TABLE_FADT *)AllocateKernelMemory(fadt->Header.Length);␊ |
| 4013 | ␉␉␉␉memcpy(fadt_mod, fadt, fadt->Header.Length);␊ |
| 4014 | ␉␉␉}␉␉␉␊ |
| 4015 | ␉␉␉␊ |
| 4016 | ␉␉␉if (fadt->Header.Revision < 2) ␊ |
| 4017 | ␉␉␉{␉␉␉␉␉␊ |
| 4018 | ␉␉␉␉fadt_mod->Header.Revision = 0x02; // FADT rev 2 (ACPI 1.0B MS extensions) ␊ |
| 4019 | ␉␉␉␉verbose("Converted ACPI V%d FADT to ACPI V2 FADT\n", fadt->Header.Revision );␊ |
| 4020 | ␉␉␉}␊ |
| 4021 | ␉␉} ␊ |
| 4022 | ␉␉else␊ |
| 4023 | ␉␉{␊ |
| 4024 | ␉␉␉if (fadt->Header.Length < 0x74 )␊ |
| 4025 | ␉␉␉{␊ |
| 4026 | ␉␉␉␉fadt_mod=(ACPI_TABLE_FADT *)AllocateKernelMemory(0x74);␊ |
| 4027 | ␉␉␉␉bzero(fadt_mod, 0x74);␊ |
| 4028 | ␉␉␉␉memcpy(fadt_mod, fadt, fadt->Header.Length);␊ |
| 4029 | ␉␉␉␉fadt_mod->Header.Length = 0x74;␊ |
| 4030 | ␉␉␉␉fadt_mod->Header.Revision = 0x01; ␊ |
| 4031 | ␉␉␉␉verbose("Warning: ACPI FADT length was < 0x74 which is the minimum for the ACPI FADT V1 specification, \n", fadt->Header.Revision );␊ |
| 4032 | ␉␉␉␉verbose(" trying to convert it to Version 1. \n");␉␉␉␉␊ |
| 4033 | ␊ |
| 4034 | ␉␉␉} ␊ |
| 4035 | ␉␉␉else␊ |
| 4036 | ␉␉␉{␊ |
| 4037 | ␉␉␉␉fadt_mod=(ACPI_TABLE_FADT *)AllocateKernelMemory(fadt->Header.Length);␊ |
| 4038 | ␉␉␉␉memcpy(fadt_mod, fadt, fadt->Header.Length);␊ |
| 4039 | ␉␉␉}␊ |
| 4040 | ␉␉}␉␉ ␉␉␊ |
| 4041 | ␉}␊ |
| 4042 | ␉bool intelfadtspec = true;␊ |
| 4043 | ␉U8 Type = PMProfileError;␊ |
| 4044 | ␉// Determine system type / PM_Model␊ |
| 4045 | ␉␊ |
| 4046 | ␉// Fix System-type if needed (should never happen)␊ |
| 4047 | ␉if (Platform->Type > MaxSupportedPMProfile) ␊ |
| 4048 | ␉{␊ |
| 4049 | ␉␉if(fadt_mod->PreferredProfile <= MaxSupportedPMProfile)␊ |
| 4050 | ␉␉␉Platform->Type = fadt_mod->PreferredProfile; // get the fadt if correct␊ |
| 4051 | ␉␉else ␊ |
| 4052 | ␉␉␉Platform->Type = 1;␉␉/* Set a fixed value (Desktop) */␊ |
| 4053 | ␉}␊ |
| 4054 | ␉␊ |
| 4055 | ␉// If needed, set System-type from PM_Profile (if valid) else set PM_Profile with a fixed the System-type ␊ |
| 4056 | ␉// Give prior to the FADT pm profile, allow to also control this value with a patched FADT table␊ |
| 4057 | ␉if (fadt_mod->PreferredProfile != Platform->Type) ␊ |
| 4058 | ␉{␊ |
| 4059 | ␉␉bool val = false; ␊ |
| 4060 | ␉␉getBoolForKey("PreferInternalProfileDetect", &val, &bootInfo->bootConfig); // if true Give prior to the profile resolved trought the CPU model␊ |
| 4061 | ␉␉␊ |
| 4062 | ␉␉val = Platform->CPU.isServer ;␊ |
| 4063 | ␉␉␊ |
| 4064 | ␉␉if (fadt_mod->PreferredProfile <= MaxSupportedPMProfile && !val)␊ |
| 4065 | ␉␉{␊ |
| 4066 | ␉␉␉Platform->Type = fadt_mod->PreferredProfile;␊ |
| 4067 | ␉␉} ␊ |
| 4068 | ␉␉else␊ |
| 4069 | ␉␉{␊ |
| 4070 | ␉␉␉fadt_mod->PreferredProfile = Platform->Type;␊ |
| 4071 | ␉␉}␉␉␊ |
| 4072 | ␉␉␊ |
| 4073 | ␉}␊ |
| 4074 | ␉␊ |
| 4075 | ␉// Set PM_Profile and System-type if user wanted this value to be forced␊ |
| 4076 | ␉if ( (value=getStringForKey("SystemType", &bootInfo->bootConfig))!=NULL)␊ |
| 4077 | ␉{␊ |
| 4078 | ␉␉if ((Type = (unsigned char) strtoul(value, NULL, 10) ) <= MaxSupportedPMProfile)␊ |
| 4079 | ␉␉{␊ |
| 4080 | ␉␉␉if (fadt_mod->PreferredProfile != Type)␊ |
| 4081 | ␉␉␉{␊ |
| 4082 | ␉␉␉␉verbose("FADT: changing Preferred_PM_Profile from %d to %d\n", fadt->PreferredProfile, Type);␊ |
| 4083 | ␉␉␉␉fadt_mod->PreferredProfile = Platform->Type = Type;␊ |
| 4084 | ␉␉␉} ␊ |
| 4085 | ␉␉␉else␊ |
| 4086 | ␉␉␉{␊ |
| 4087 | ␉␉␉␉DBG("FADT: Preferred_PM_Profile was already set to %d, no need to be changed\n",Type);␊ |
| 4088 | ␉␉␉}␊ |
| 4089 | ␉␉␉␊ |
| 4090 | ␉␉} else printf("Error: system-type must be 0..6. Defaulting to %d !\n", Platform->Type);␊ |
| 4091 | ␉}␉␉␊ |
| 4092 | ␉␊ |
| 4093 | ␉getBoolForKey(KIntelFADT, &intelfadtspec, &bootInfo->bootConfig);␊ |
| 4094 | ␉if ((pmbase == 0) && (cpu_map_error == 0) && (intelfadtspec == true)) ␊ |
| 4095 | ␉{␊ |
| 4096 | ␉␉ACPI_TABLE_DSDT *DsdtPointer ;␊ |
| 4097 | ␉␉if (new_dsdt != (void*)0ul) ␊ |
| 4098 | ␉␉␉DsdtPointer = new_dsdt;␊ |
| 4099 | ␉␉else if ((fadt_mod->Header.Revision >= 3) && (fadt_mod->XDsdt != 0ul))␊ |
| 4100 | ␉␉␉DsdtPointer = (ACPI_TABLE_DSDT *)((U32)fadt_mod->XDsdt);␊ |
| 4101 | ␉␉else␊ |
| 4102 | ␉␉␉DsdtPointer = (ACPI_TABLE_DSDT *)fadt_mod->Dsdt;␊ |
| 4103 | ␉␉␊ |
| 4104 | ␉␉generate_cpu_map_from_acpi(DsdtPointer);␊ |
| 4105 | ␉}␉␊ |
| 4106 | ␉␊ |
| 4107 | ␉// Patch DSDT Address if we have loaded a DSDT table␊ |
| 4108 | ␉if(new_dsdt != (void*)0ul)␉␉␊ |
| 4109 | ␉␉fadt_mod->Dsdt=(U32)new_dsdt;␉␊ |
| 4110 | ␉␊ |
| 4111 | ␉fadt_mod->Facs= fadt->Facs;␊ |
| 4112 | ␉//fadt_mod->Facs=(U32)generate_facs(false);␊ |
| 4113 | ␊ |
| 4114 | ␉// Patch FADT to fix restart␊ |
| 4115 | ␉if (fadt_mod->Header.Revision >= 2 && fix_restart)␊ |
| 4116 | ␉{␉␉␊ |
| 4117 | fadt_mod->Flags|= 0x400;␉␉␊ |
| 4118 | ␉␉␊ |
| 4119 | ␉␉int type = PCI_RESET_TYPE;␊ |
| 4120 | ␉␉getIntForKey(KResetType, &type, &bootInfo->bootConfig);␊ |
| 4121 | ␉␉if (type == KEYBOARD_RESET_TYPE)␊ |
| 4122 | ␉␉{␊ |
| 4123 | ␉␉␉//Azi: keyboard reset; http://forum.voodooprojects.org/index.php/topic,1056.msg9802.html#msg9802␊ |
| 4124 | ␉␉␉fadt_mod->ResetRegister = FillGASStruct(0x64, 1);␊ |
| 4125 | ␉␉␉fadt_mod->ResetValue = 0xfe;␊ |
| 4126 | ␉␉} ␊ |
| 4127 | ␉␉else␊ |
| 4128 | ␉␉{␊ |
| 4129 | ␉␉␉fadt_mod->ResetRegister = FillGASStruct(0x0cf9, 1);␊ |
| 4130 | ␉␉␉fadt_mod->ResetValue = 0x06;␊ |
| 4131 | ␉␉}␊ |
| 4132 | ␉␉verbose("FADT: Restart Fix applied (Type : %s) !\n", (type == 0) ? "PCI": "KEYBOARD");␊ |
| 4133 | ␉}␊ |
| 4134 | ␉ ␊ |
| 4135 | if (fadt_mod->Header.Revision >= 3)␊ |
| 4136 | ␉{ ␊ |
| 4137 | ␊ |
| 4138 | ␊ |
| 4139 | if (UpdateFADT)␊ |
| 4140 | ␉␉{ ␊ |
| 4141 | ␊ |
| 4142 | ␉␉␉//fadt_mod->XFacs= (U64)((U32)generate_facs(true));␊ |
| 4143 | fadt_mod->XFacs=(U64)fadt->Facs; ␊ |
| 4144 | ␊ |
| 4145 | } ␊ |
| 4146 | ␉␉else␊ |
| 4147 | ␉␉{␊ |
| 4148 | ␉␉␉fadt_mod->XFacs=(U64)fadt->XFacs;␊ |
| 4149 | ␉␉}␊ |
| 4150 | ␊ |
| 4151 | ␊ |
| 4152 | if(new_dsdt != (void*)0ul)␊ |
| 4153 | fadt_mod->XDsdt=((U64)(U32)new_dsdt);␊ |
| 4154 | ␉␉else if (UpdateFADT)␊ |
| 4155 | ␉␉␉␉fadt_mod->XDsdt=(U64)fadt_mod->Dsdt;␊ |
| 4156 | ␊ |
| 4157 | ␊ |
| 4158 | Platform->hardware_signature = ((ACPI_TABLE_FACS *)((U32)fadt_mod->XFacs))->HardwareSignature;␊ |
| 4159 | ␊ |
| 4160 | }␊ |
| 4161 | ␉else␊ |
| 4162 | ␉{␊ |
| 4163 | ␊ |
| 4164 | Platform->hardware_signature = ␉((ACPI_TABLE_FACS *)fadt_mod->Facs)->HardwareSignature;␊ |
| 4165 | ␊ |
| 4166 | } ␊ |
| 4167 | ␉␊ |
| 4168 | ␊ |
| 4169 | ␉DBG("setting hardware_signature to %x \n",Platform->hardware_signature); ␊ |
| 4170 | ␉␉␉␊ |
| 4171 | ␉␉␊ |
| 4172 | ␊ |
| 4173 | ␉if (pmbase && (intelfadtspec == true))␊ |
| 4174 | ␉␉ProcessFadt(fadt_mod, pmbase); // The checksum correction will be done by ProcessFadt␊ |
| 4175 | ␉else␊ |
| 4176 | ␉␉SetChecksum(&fadt_mod->Header); // Correct the checksum␊ |
| 4177 | ␊ |
| 4178 | ␉return fadt_mod;␊ |
| 4179 | }␊ |
| 4180 | ␊ |
| 4181 | static void process_xsdt (ACPI_TABLE_RSDP *rsdp_mod , U32 *new_table_list)␊ |
| 4182 | {␊ |
| 4183 | ␉TagPtr DropTables_p = XMLCastDict(XMLGetProperty(bootInfo->bootConfig.dictionary, (const char*)"ACPIDropTables"));␊ |
| 4184 | ␉U32 new_table = 0ul;␊ |
| 4185 | ␉U8 new_table_index = 0, table_added = 0;␊ |
| 4186 | ␉ACPI_TABLE_XSDT *xsdt = (void*)0ul, *xsdt_mod = (void*)0ul;␊ |
| 4187 | ␉ACPI_TABLE_RSDT *rsdt_conv␉= (void *)0ul;␊ |
| 4188 | ␉␊ |
| 4189 | ␉// FIXME: handle 64-bit address correctly␊ |
| 4190 | ␉␊ |
| 4191 | ␉xsdt=(ACPI_TABLE_XSDT *)acpi_tables.XsdtPointer;␊ |
| 4192 | ␉␊ |
| 4193 | ␉verbose("* Processing XSDT: \n");␊ |
| 4194 | ␉␊ |
| 4195 | ␉DBG(" XSDT @%x, Length=%d\n", (U32)xsdt,␊ |
| 4196 | ␉␉xsdt->Header.Length);␊ |
| 4197 | ␉␊ |
| 4198 | ␉if (xsdt != (void *)0ul)␊ |
| 4199 | ␉{␉␉␉␉␊ |
| 4200 | ␉␉U32 dropoffset=0, index;␊ |
| 4201 | ␉␉table_added = 0;␊ |
| 4202 | ␉␉␊ |
| 4203 | ␉␉xsdt_mod=(ACPI_TABLE_XSDT *)AllocateKernelMemory(xsdt->Header.Length); ␊ |
| 4204 | ␉␉bzero(xsdt_mod, xsdt->Header.Length);␊ |
| 4205 | ␉␉memcpy(&xsdt_mod->Header, &xsdt->Header, sizeof(ACPI_TABLE_HEADER));␊ |
| 4206 | ␉␉␊ |
| 4207 | ␉␉U32 num_tables=get_num_tables64(xsdt);␊ |
| 4208 | ␉␉␊ |
| 4209 | ␉␉for (index = 0; index < num_tables; index++)␊ |
| 4210 | ␉␉{␊ |
| 4211 | ␉␉␉␊ |
| 4212 | ␉␉␉U64 ptr = xsdt->TableOffsetEntry[index];␊ |
| 4213 | ␉␉␉␊ |
| 4214 | ␉␉␉{␉␉␉␉␊ |
| 4215 | ␉␉␉␉if (ptr > ULONG_MAX_32)␊ |
| 4216 | ␉␉␉␉{␊ |
| 4217 | #if DEBUG_ACPI␉␉␉␉␉␉␊ |
| 4218 | ␉␉␉␉␉printf("Warning xsdt->TableOffsetEntry[%d]: Beyond addressable memory in this CPU mode, ignored !!!\n",index);␊ |
| 4219 | #endif␊ |
| 4220 | ␉␉␉␉␉continue;␉␊ |
| 4221 | ␉␉␉␉}␊ |
| 4222 | ␉␉␉␉␊ |
| 4223 | ␉␉␉␉bool unsafe = false;␊ |
| 4224 | ␉␉␉␉getBoolForKey(kUnsafeACPI, &unsafe, &bootInfo->bootConfig);␊ |
| 4225 | ␉␉␉␉␊ |
| 4226 | ␉␉␉␉if (!unsafe) ␊ |
| 4227 | ␉␉␉␉{␊ |
| 4228 | ␉␉␉␉␉if (GetChecksum(((ACPI_TABLE_HEADER *) (unsigned long)ptr), ␊ |
| 4229 | ␉␉␉␉␉␉␉␉␉((ACPI_TABLE_HEADER *) (unsigned long)ptr)->Length) != 0)␊ |
| 4230 | ␉␉␉␉␉{␊ |
| 4231 | #if DEBUG_ACPI␉␉␉␉␉␉␊ |
| 4232 | ␉␉␉␉␉␉printf("Warning xsdt->TableOffsetEntry[%d]: Invalide checksum, ignored !!!\n",index);␊ |
| 4233 | #endif␊ |
| 4234 | ␉␉␉␉␉␉continue;␊ |
| 4235 | ␉␉␉␉␉}␊ |
| 4236 | ␉␉␉␉}␊ |
| 4237 | ␉␉␉␉␉␉␉␉␊ |
| 4238 | ␉␉␉}␊ |
| 4239 | ␉␉␉␊ |
| 4240 | ␉␉␉xsdt_mod->TableOffsetEntry[index-dropoffset]=ptr;␊ |
| 4241 | ␉␉␉␊ |
| 4242 | ␉␉␉char tableSig[4];␉␉␉␊ |
| 4243 | ␉␉␉␊ |
| 4244 | ␉␉␉strlcpy(tableSig, (char*)((U32)ptr), sizeof(tableSig)+1);␊ |
| 4245 | ␉␉␉␊ |
| 4246 | ␉␉␉DBG("** Processing %s,", tableSig );␊ |
| 4247 | ␉␉␉␊ |
| 4248 | ␉␉␉DBG(" @%x, Length=%d\n", (U32)ptr,␊ |
| 4249 | ␉␉␉␉((ACPI_TABLE_HEADER *) (unsigned long)ptr)->Length);␊ |
| 4250 | ␉␉␉␊ |
| 4251 | ␉␉␉{␊ |
| 4252 | ␉␉␉␉bool oem = false;␊ |
| 4253 | ␉␉␉␉char oemOption[OEMOPT_SIZE];␊ |
| 4254 | ␉␉␉␉sprintf(oemOption, "oem%s",tableSig );␊ |
| 4255 | ␉␉␉␉if (getBoolForKey(oemOption, &oem, &bootInfo->bootConfig) && oem) // This method don't work for DSDT and FACS␊ |
| 4256 | ␉␉␉␉{ ␊ |
| 4257 | ␉␉␉␉␉␊ |
| 4258 | ␉␉␉␉␉DBG(" %s required\n", oemOption);␊ |
| 4259 | ␉␉␉␉␉␊ |
| 4260 | ␉␉␉␉␉if (get_new_table_in_list(new_table_list,(*(U32 *) ((ACPI_TABLE_HEADER *) (unsigned long)ptr)->Signature), &new_table_index) != (void*)0ul) ␊ |
| 4261 | ␉␉␉␉␉␉new_table_list[new_table_index] = 0ul; // This way new table will not be added to the new rsdt list !!␊ |
| 4262 | ␉␉␉␉␉␊ |
| 4263 | ␉␉␉␉␉continue;␊ |
| 4264 | ␉␉␉␉}␊ |
| 4265 | ␉␉␉}␊ |
| 4266 | ␉␉␉␊ |
| 4267 | ␉␉␉{␊ |
| 4268 | ␉␉␉␉TagPtr match_drop = XMLGetProperty(DropTables_p, (const char*)tableSig); ␊ |
| 4269 | ␉␉␉␉if ( match_drop ) ␊ |
| 4270 | ␉␉␉␉{␊ |
| 4271 | ␉␉␉␉␉char *tmp = XMLCastString(match_drop);␊ |
| 4272 | ␉␉␉␉␉if (strcmp(tmp,"No") != 0)␊ |
| 4273 | ␉␉␉␉␉{␊ |
| 4274 | ␉␉␉␉␉␉dropoffset++;␊ |
| 4275 | ␉␉␉␉␉␉DBG(" %s table dropped\n",tableSig);␊ |
| 4276 | ␉␉␉␉␉␉continue;␊ |
| 4277 | ␉␉␉␉␉}␊ |
| 4278 | ␉␉␉␉}␉␉␉␊ |
| 4279 | ␉␉␉}␊ |
| 4280 | ␉␉␉␊ |
| 4281 | ␉␉␉{␊ |
| 4282 | ␉␉␉␉if ((new_table = (U32)get_new_table_in_list(new_table_list,(*(U32 *) ((ACPI_TABLE_HEADER *) (unsigned long)ptr)->Signature), &new_table_index)) != 0ul)␊ |
| 4283 | ␉␉␉␉{␊ |
| 4284 | ␉␉␉␉␉DBG(" Found replacement for table %s\n",tableSig);␊ |
| 4285 | ␉␉␉␉␉xsdt_mod->TableOffsetEntry[index-dropoffset]=(U64)new_table;␊ |
| 4286 | ␉␉␉␉␉new_table_list[new_table_index] = 0ul; // table replaced !!␊ |
| 4287 | ␉␉␉␉␉continue;␊ |
| 4288 | ␉␉␉␉}␊ |
| 4289 | ␉␉␉}␉␉␉␉␉␉␉␊ |
| 4290 | ␉␉␉␉␉␉␊ |
| 4291 | ␉␉} ␊ |
| 4292 | ␉␉␊ |
| 4293 | ␉␉␊ |
| 4294 | ␉␉{␊ |
| 4295 | ␉␉␉U8 i;␊ |
| 4296 | ␉␉␉for (i = 0; i< (MAX_ACPI_TABLE + RESERVED_AERA); i++)␊ |
| 4297 | ␉␉␉{␊ |
| 4298 | ␉␉␉␉if (new_table_list[i] != 0ul)␊ |
| 4299 | ␉␉␉␉{␊ |
| 4300 | #if DEBUG_ACPI␊ |
| 4301 | ␉␉␉␉␉ACPI_TABLE_HEADER **table_array = (ACPI_TABLE_HEADER **) new_table_list;␊ |
| 4302 | ␉␉␉␉␉printf("Adding table : ");␊ |
| 4303 | ␉␉␉␉␉print_nameseg(*(U32 *) (table_array[i]->Signature));␊ |
| 4304 | ␉␉␉␉␉printf("\n");␉␉␉␉␉␊ |
| 4305 | #endif␊ |
| 4306 | ␉␉␉␉␉xsdt_mod->TableOffsetEntry[index-dropoffset]=(U64)new_table_list[i];␊ |
| 4307 | ␉␉␉␉␉table_added++;␊ |
| 4308 | ␉␉␉␉␉index++;␊ |
| 4309 | ␉␉␉␉}␊ |
| 4310 | ␉␉␉}␊ |
| 4311 | ␉␉}␊ |
| 4312 | ␉␉␊ |
| 4313 | ␉␉// Correct the checksum of XSDT␊ |
| 4314 | ␉␉xsdt_mod->Header.Length-=8*dropoffset;␊ |
| 4315 | ␉␉xsdt_mod->Header.Length+=8*table_added;␊ |
| 4316 | ␉␉␊ |
| 4317 | ␉␉SetChecksum(&xsdt_mod->Header);␊ |
| 4318 | ␉␉␊ |
| 4319 | ␉␉update_rsdp_with_xsdt(rsdp_mod, xsdt_mod);␊ |
| 4320 | ␉␉␊ |
| 4321 | ␉␉verbose("* Creating new RSDT from XSDT table\n");␊ |
| 4322 | ␉␉␊ |
| 4323 | ␉␉rsdt_conv = (ACPI_TABLE_RSDT *)gen_alloc_rsdt_from_xsdt(xsdt_mod);␊ |
| 4324 | ␉␉␊ |
| 4325 | #if DEBUG_ACPI␊ |
| 4326 | ␉␉DBG("Attempting to update RSDP with RSDT \n");␊ |
| 4327 | ␉␉{␊ |
| 4328 | ␉␉␉U32 ret = update_rsdp_with_rsdt(rsdp_mod, rsdt_conv);␊ |
| 4329 | ␉␉␉if (ret)␊ |
| 4330 | ␉␉␉␉DBG("RSDP update with RSDT successfully !!! \n");␊ |
| 4331 | ␉␉}␊ |
| 4332 | #else␊ |
| 4333 | ␉␉update_rsdp_with_rsdt(rsdp_mod, rsdt_conv);␊ |
| 4334 | #endif␊ |
| 4335 | ␉␉␊ |
| 4336 | ␉␉␊ |
| 4337 | ␉}␊ |
| 4338 | ␉else␊ |
| 4339 | ␉{␉␉␉␉␊ |
| 4340 | ␉␉DBG("About to drop XSDT\n");␊ |
| 4341 | ␉␉␊ |
| 4342 | ␉␉/*FIXME: Now we just hope that if MacOS doesn't find XSDT it reverts to RSDT. ␊ |
| 4343 | ␉␉ * A Better strategy would be to generate␊ |
| 4344 | ␉␉ */␊ |
| 4345 | ␉␉␊ |
| 4346 | ␉␉rsdp_mod->XsdtPhysicalAddress=0xffffffffffffffffLL;␊ |
| 4347 | ␉␉verbose("XSDT not found or XSDT incorrect\n");␊ |
| 4348 | ␉}␊ |
| 4349 | ␊ |
| 4350 | }␊ |
| 4351 | ␊ |
| 4352 | static void process_rsdt(ACPI_TABLE_RSDP *rsdp_mod , bool gen_xsdt, U32 *new_table_list)␊ |
| 4353 | {␉␉␉␊ |
| 4354 | ␉TagPtr DropTables_p = XMLCastDict(XMLGetProperty(bootInfo->bootConfig.dictionary, (const char*)"ACPIDropTables"));␊ |
| 4355 | ␉U32 new_table = 0ul;␊ |
| 4356 | ␉U8 new_table_index = 0, table_added = 0;␊ |
| 4357 | ␉U32 dropoffset=0, index;␊ |
| 4358 | ␉ACPI_TABLE_RSDT *rsdt␉␉ = (void *)0ul, *rsdt_mod␉= (void *)0ul;␊ |
| 4359 | ␉ACPI_TABLE_XSDT *xsdt_conv␉ = (void *)0ul;␊ |
| 4360 | ␉␊ |
| 4361 | ␉rsdt=(ACPI_TABLE_RSDT *)acpi_tables.RsdtPointer;␊ |
| 4362 | ␊ |
| 4363 | ␉rsdt_mod=(ACPI_TABLE_RSDT *)AllocateKernelMemory(rsdt->Header.Length);␊ |
| 4364 | ␉bzero(rsdt_mod, rsdt->Header.Length);␊ |
| 4365 | ␉memcpy (&rsdt_mod->Header, &rsdt->Header, sizeof(ACPI_TABLE_HEADER));␊ |
| 4366 | ␉␊ |
| 4367 | ␉U32 num_tables = get_num_tables(rsdt); ␊ |
| 4368 | ␉␊ |
| 4369 | ␉verbose("* Processing RSDT: \n");␊ |
| 4370 | ␉␊ |
| 4371 | ␉DBG(" RSDT @%x, Length %d\n",rsdt, rsdt->Header.Length);␊ |
| 4372 | ␉␊ |
| 4373 | ␉ACPI_TABLE_HEADER **table_array = (ACPI_TABLE_HEADER **) rsdt->TableOffsetEntry;␊ |
| 4374 | ␉␊ |
| 4375 | ␉// Compute number of table pointers included in RSDT␊ |
| 4376 | ␉num_tables = get_num_tables(rsdt);␊ |
| 4377 | ␉␊ |
| 4378 | ␉for (index = 0; index < num_tables; index++)␊ |
| 4379 | ␉{␊ |
| 4380 | ␉␉␉␉␊ |
| 4381 | ␉␉{␉␉␊ |
| 4382 | ␉␉␉␊ |
| 4383 | ␉␉␉bool unsafe = false;␊ |
| 4384 | ␉␉␉getBoolForKey(kUnsafeACPI, &unsafe, &bootInfo->bootConfig);␊ |
| 4385 | ␉␉␉␊ |
| 4386 | ␉␉␉if (!unsafe)␊ |
| 4387 | ␉␉␉{␊ |
| 4388 | ␉␉␉␉if (GetChecksum(table_array[index], table_array[index]->Length) != 0)␊ |
| 4389 | ␉␉␉␉{␊ |
| 4390 | #if DEBUG_ACPI␉␉␉␉␉␉␊ |
| 4391 | ␉␉␉␉␉printf("Warning rsdt->TableOffsetEntry[%d]: Invalide checksum, ignored !!!\n",index);␊ |
| 4392 | #endif␊ |
| 4393 | ␉␉␉␉␉continue;␊ |
| 4394 | ␉␉␉␉}␊ |
| 4395 | ␉␉␉}␉␉␉␊ |
| 4396 | ␉␉␉␊ |
| 4397 | ␉␉}␊ |
| 4398 | ␉␉␊ |
| 4399 | ␉␉rsdt_mod->TableOffsetEntry[index-dropoffset]=rsdt->TableOffsetEntry[index];␊ |
| 4400 | ␉␉␊ |
| 4401 | ␉␉char tableSig[4];␉␉␊ |
| 4402 | ␉␉␊ |
| 4403 | ␉␉strlcpy(tableSig, (char*)(rsdt->TableOffsetEntry[index]), sizeof(tableSig)+1);␊ |
| 4404 | ␉␉␊ |
| 4405 | ␉␉DBG("** Processing %s,", tableSig );␊ |
| 4406 | ␉␉␊ |
| 4407 | ␉␉DBG(" @%x, Length=%d\n", (U32)table_array[index],␊ |
| 4408 | ␉␉␉table_array[index]->Length);␊ |
| 4409 | ␉␉␊ |
| 4410 | ␉␉{␊ |
| 4411 | ␉␉␉bool oem = false;␊ |
| 4412 | ␉␉␉char oemOption[OEMOPT_SIZE];␊ |
| 4413 | ␉␉␉sprintf(oemOption, "oem%s",tableSig );␊ |
| 4414 | ␉␉␉if (getBoolForKey(oemOption, &oem, &bootInfo->bootConfig) && oem) // This method don't work for DSDT and FACS␊ |
| 4415 | ␉␉␉{ ␊ |
| 4416 | ␉␉␉␉DBG(" %s required\n", oemOption);␊ |
| 4417 | ␉␉␉␉␊ |
| 4418 | ␉␉␉␉if (get_new_table_in_list(new_table_list,(*(U32 *) (table_array[index]->Signature)), &new_table_index) != (void*)0ul ) ␊ |
| 4419 | ␉␉␉␉␉new_table_list[new_table_index] = 0ul; // This way new table will not be added to the new rsdt list !!␊ |
| 4420 | ␉␉␉␉␊ |
| 4421 | ␉␉␉␉continue;␊ |
| 4422 | ␉␉␉}␊ |
| 4423 | ␉␉}␊ |
| 4424 | ␉␉␉␊ |
| 4425 | ␉␉{␊ |
| 4426 | ␉␉␉TagPtr match_drop = XMLGetProperty(DropTables_p, (const char*)tableSig);␊ |
| 4427 | ␉␉␉if ( match_drop )␊ |
| 4428 | ␉␉␉{␊ |
| 4429 | ␉␉␉␉char *tmp = XMLCastString(match_drop);␊ |
| 4430 | ␉␉␉␉if (strcmp(tmp,"No") != 0)␊ |
| 4431 | ␉␉␉␉{␉␉␉␉␉␉␊ |
| 4432 | ␉␉␉␉␉dropoffset++;␊ |
| 4433 | ␉␉␉␉␉DBG(" %s table dropped\n",tableSig);␊ |
| 4434 | ␉␉␉␉␉continue;␊ |
| 4435 | ␉␉␉␉}␊ |
| 4436 | ␉␉␉}␊ |
| 4437 | ␉␉}␊ |
| 4438 | ␉␉␊ |
| 4439 | ␉␉{␊ |
| 4440 | ␉␉␉if ((new_table = (U32)get_new_table_in_list(new_table_list,(*(U32 *) (table_array[index]->Signature)), &new_table_index)) != 0ul)␊ |
| 4441 | ␉␉␉{␉␉␉␊ |
| 4442 | ␉␉␉␉DBG(" Found replacement for table %s\n",tableSig);␊ |
| 4443 | ␉␉␉␉␊ |
| 4444 | ␉␉␉␉rsdt_mod->TableOffsetEntry[index-dropoffset]=new_table;␊ |
| 4445 | ␉␉␉␉new_table_list[new_table_index] = 0ul; // table replaced !!␊ |
| 4446 | ␉␉␉␉continue;␊ |
| 4447 | ␉␉␉}␊ |
| 4448 | ␉␉}␉␉␉␊ |
| 4449 | ␉␉//}␊ |
| 4450 | ␉}␉␉␉␊ |
| 4451 | ␉DBG("\n");␊ |
| 4452 | ␉␊ |
| 4453 | ␉{␊ |
| 4454 | ␉␉U8 i;␊ |
| 4455 | ␉␉for (i = 0; i< (MAX_ACPI_TABLE + RESERVED_AERA); i++)␊ |
| 4456 | ␉␉{␊ |
| 4457 | ␉␉␉if (new_table_list[i] != 0ul)␊ |
| 4458 | ␉␉␉{␊ |
| 4459 | #if DEBUG_ACPI␊ |
| 4460 | ␉␉␉␉ACPI_TABLE_HEADER **table_array = (ACPI_TABLE_HEADER **) new_table_list;␊ |
| 4461 | ␉␉␉␉printf("Adding table : ");␊ |
| 4462 | ␉␉␉␉print_nameseg(*(U32 *) (table_array[i]->Signature));␊ |
| 4463 | ␉␉␉␉printf("\n");␉␉␉␉␊ |
| 4464 | #endif␊ |
| 4465 | ␉␉␉␉rsdt_mod->TableOffsetEntry[index-dropoffset]=new_table_list[i];␊ |
| 4466 | ␉␉␉␉table_added++;␊ |
| 4467 | ␉␉␉␉index++;␊ |
| 4468 | ␉␉␉}␊ |
| 4469 | ␉␉}␊ |
| 4470 | ␉}␉␉␊ |
| 4471 | ␉␊ |
| 4472 | ␉// Correct the checksum of RSDT␊ |
| 4473 | ␉rsdt_mod->Header.Length-=4*dropoffset;␊ |
| 4474 | ␉rsdt_mod->Header.Length+=4*table_added;␉␉␊ |
| 4475 | ␉␊ |
| 4476 | ␉DBG("RSDT: Original checksum %d\n", rsdt_mod->Header.Checksum);␉␉␉␊ |
| 4477 | ␉␊ |
| 4478 | ␉SetChecksum(&rsdt_mod->Header);␊ |
| 4479 | ␉␊ |
| 4480 | ␉DBG("New checksum %d at %x\n", rsdt_mod->Header.Checksum,rsdt_mod);␊ |
| 4481 | ␉␊ |
| 4482 | ␉update_rsdp_with_rsdt(rsdp_mod, rsdt_mod);␊ |
| 4483 | ␉␊ |
| 4484 | ␉if (gen_xsdt)␊ |
| 4485 | ␉{␊ |
| 4486 | ␉␉verbose("* Creating new XSDT from RSDT table\n");␊ |
| 4487 | ␉␉xsdt_conv = (ACPI_TABLE_XSDT *)gen_alloc_xsdt_from_rsdt(rsdt_mod);␊ |
| 4488 | ␉␉␊ |
| 4489 | ␉␉update_rsdp_with_xsdt(rsdp_mod, xsdt_conv); ␉␉␊ |
| 4490 | ␉␉␊ |
| 4491 | #if DEBUG_ACPI␊ |
| 4492 | ␉␉DBG("Attempting to update RSDP with XSDT \n");␊ |
| 4493 | ␉␉{␊ |
| 4494 | ␉␉␉U32 ret = update_rsdp_with_xsdt(rsdp_mod, xsdt_conv);␊ |
| 4495 | ␉␉␉if (ret)␊ |
| 4496 | ␉␉␉␉DBG("RSDP update with XSDT successfully !!! \n");␊ |
| 4497 | ␉␉}␊ |
| 4498 | #else␊ |
| 4499 | ␉␉update_rsdp_with_xsdt(rsdp_mod, xsdt_conv);␊ |
| 4500 | #endif␊ |
| 4501 | ␉␉␊ |
| 4502 | ␉}␉␊ |
| 4503 | }␊ |
| 4504 | ␊ |
| 4505 | EFI_STATUS setupAcpi(void)␊ |
| 4506 | {␉␊ |
| 4507 | ␉U8 Revision = 0;␊ |
| 4508 | ␉␊ |
| 4509 | cpu_map_error = 0;␊ |
| 4510 | cpu_map_count = 0;␊ |
| 4511 | pmbase = 0;␊ |
| 4512 | ␊ |
| 4513 | EFI_STATUS Status = EFI_ABORTED;␊ |
| 4514 | ␉␊ |
| 4515 | ␉U32 new_table_list[MAX_ACPI_TABLE + RESERVED_AERA]; //max table + reserved aera ␊ |
| 4516 | ␉U8 new_table_index = 0;␊ |
| 4517 | ␉␊ |
| 4518 | ␉ACPI_TABLE_DSDT* DsdtPtr␉ = (void *)0ul; // a Pointer to the dsdt table present in fadt_mod␊ |
| 4519 | ␉␊ |
| 4520 | ␉ACPI_TABLE_DSDT *new_dsdt␉ = (void *)0ul;␉// a Pointer to the dsdt file␉␊ |
| 4521 | ␉ACPI_TABLE_FADT *fadt_mod␉ = (void *)0ul; // a Pointer to the patched FACP table␊ |
| 4522 | ␉ACPI_TABLE_FADT *fadt_file␉ = (void *)0ul; // a Pointer to the (non-patched) fadt file ␊ |
| 4523 | ␉ACPI_TABLE_FADT *FacpPointer = (void *)0ul; // a Pointer to the non-patched FACP table, it can be a file or the FACP table found in the RSDT/XSDT␊ |
| 4524 | ␉ACPI_TABLE_RSDP *rsdp_mod␉ = (void *)0ul, *rsdp_conv␉= (void *)0ul;␊ |
| 4525 | ␉␊ |
| 4526 | ␉␊ |
| 4527 | ␉U32 rsdplength;␊ |
| 4528 | ␉␊ |
| 4529 | ␉bool update_acpi=false, gen_xsdt=false;␊ |
| 4530 | ␉␊ |
| 4531 | ␉bool gen_csta=false, gen_psta=false, speed_step=false;␊ |
| 4532 | #if !OLD_SSDT␊ |
| 4533 | ␉bool gen_ssdt=false; // will force to generate ssdt even if gen_csta and gen_psta = false␊ |
| 4534 | bool gen_tsta=false;␊ |
| 4535 | #endif␊ |
| 4536 | ␉bool oem_dsdt=false, oem_fadt=false;␊ |
| 4537 | ␉␊ |
| 4538 | ␉// Find original rsdp ␊ |
| 4539 | ␉if (!FindAcpiTables(&acpi_tables))␊ |
| 4540 | ␉{␊ |
| 4541 | ␉␉printf("Error: AcpiCodec Failed to detect ACPI tables.\n");␊ |
| 4542 | ␉␉getc();␊ |
| 4543 | ␉␉return EFI_NOT_FOUND;␊ |
| 4544 | ␉}␊ |
| 4545 | ␉␊ |
| 4546 | ␉{␊ |
| 4547 | ␉␉U8 i;␊ |
| 4548 | ␉␉␊ |
| 4549 | ␉␉for (i=0; i<(MAX_ACPI_TABLE + RESERVED_AERA); i++)␊ |
| 4550 | ␉␉{␊ |
| 4551 | ␉␉␉new_table_list[i] = 0ul;␊ |
| 4552 | ␉␉}␊ |
| 4553 | ␉␉bool tmpval;␊ |
| 4554 | ␉␉␊ |
| 4555 | ␉␉oem_dsdt=getBoolForKey(kOEMDSDT, &tmpval, &bootInfo->bootConfig)&&tmpval;␊ |
| 4556 | ␉␉oem_fadt=getBoolForKey(kOEMFADT, &tmpval, &bootInfo->bootConfig)&&tmpval;␊ |
| 4557 | ␊ |
| 4558 | ␉␉␊ |
| 4559 | ␉␉gen_csta=getBoolForKey(kGenerateCStates, &tmpval, &bootInfo->bootConfig)&&tmpval;␊ |
| 4560 | ␉␉gen_psta=getBoolForKey(kGeneratePStates, &tmpval, &bootInfo->bootConfig)&&tmpval;␊ |
| 4561 | #if !OLD_SSDT␊ |
| 4562 | ␉␉gen_ssdt=getBoolForKey(KForceSSDT, &tmpval, &bootInfo->bootConfig)&&tmpval;␊ |
| 4563 | #endif␊ |
| 4564 | ␉␉update_acpi=getBoolForKey(kUpdateACPI, &tmpval, &bootInfo->bootConfig)&&tmpval;␊ |
| 4565 | ␉␉␊ |
| 4566 | ␉␉speed_step=getBoolForKey(kSpeedstep, &tmpval, &bootInfo->bootConfig)&&tmpval;␊ |
| 4567 | #if !OLD_SSDT ␊ |
| 4568 | ␉␉turbo_enabled=(U32)getBoolForKey(kCoreTurbo, &tmpval, &bootInfo->bootConfig)&&tmpval;␊ |
| 4569 | #endif␊ |
| 4570 | #if BUILD_ACPI_TSS ␊ |
| 4571 | ␉␉gen_tsta=(U32)getBoolForKey(kGenerateTStates, &tmpval, &bootInfo->bootConfig)&&tmpval;␊ |
| 4572 | #endif␊ |
| 4573 | ␉} ␊ |
| 4574 | ␉␉␊ |
| 4575 | ␉{␊ |
| 4576 | ␉␉char* name;␊ |
| 4577 | ␉␉long flags;␊ |
| 4578 | ␉␉long time;␊ |
| 4579 | ␉␉long ret = -1;␊ |
| 4580 | ␉␉U8 i = 0;␊ |
| 4581 | ␉␉char dirspec[512];␊ |
| 4582 | ␉␉bool acpidir_found = false;␊ |
| 4583 | ␉␉␊ |
| 4584 | ␉␉ret = GetFileInfo("rd(0,0)/Extra/", "Acpi", &flags, &time);␊ |
| 4585 | if ((ret == 0) && ((flags & kFileTypeMask) == kFileTypeDirectory)) ␊ |
| 4586 | ␉␉{␊ |
| 4587 | sprintf(dirspec, "rd(0,0)/Extra/Acpi/");␊ |
| 4588 | acpidir_found = true;␊ |
| 4589 | ␊ |
| 4590 | }␊ |
| 4591 | ␉␉else␊ |
| 4592 | ␉␉{␊ |
| 4593 | ␉␉␉␊ |
| 4594 | ret = GetFileInfo("/Extra/", "Acpi", &flags, &time);␊ |
| 4595 | if ((ret == 0) && ((flags & kFileTypeMask) == kFileTypeDirectory))␊ |
| 4596 | ␉␉␉{␊ |
| 4597 | sprintf(dirspec, "/Extra/Acpi/");␊ |
| 4598 | acpidir_found = true;␊ |
| 4599 | ␉␉␉␉␊ |
| 4600 | }␊ |
| 4601 | ␉␉␉else␊ |
| 4602 | ␉␉␉{␊ |
| 4603 | ret = GetFileInfo("bt(0,0)/Extra/", "Acpi", &flags, &time);␊ |
| 4604 | if ((ret == 0) && ((flags & kFileTypeMask) == kFileTypeDirectory))␊ |
| 4605 | ␉␉␉␉{␊ |
| 4606 | sprintf(dirspec, "bt(0,0)/Extra/Acpi/");␊ |
| 4607 | acpidir_found = true;␊ |
| 4608 | ␉␉␉␉␉␊ |
| 4609 | } ␊ |
| 4610 | }␊ |
| 4611 | }␊ |
| 4612 | ␊ |
| 4613 | ␉␉if (acpidir_found == true)␊ |
| 4614 | ␉␉{␊ |
| 4615 | ␉␉␉struct dirstuff* moduleDir = opendir(dirspec);␊ |
| 4616 | ␉␉␉while(readdir(moduleDir, (const char**)&name, &flags, &time) >= 0)␊ |
| 4617 | ␉␉␉{␉␉␊ |
| 4618 | ␉␉␉␉if((strcmp(&name[strlen(name) - sizeof("aml")], ".aml") == 0) && ((strlen(dirspec)+strlen(name)) < 512))␊ |
| 4619 | ␉␉␉␉{␉␉␉␉␉␊ |
| 4620 | ␉␉␉␉␉// Some simple verifications to save time in case of those tables simply named as follow:␊ |
| 4621 | ␉␉␉␉␉if ((strncmp(name, "RSDT", 4) == 0) || (strncmp(name, "rsdt", 4) == 0) ||␊ |
| 4622 | ␉␉␉␉␉␉(strncmp(name, "XSDT", 4) == 0) || (strncmp(name, "xsdt", 4) == 0) ||␊ |
| 4623 | ␉␉␉␉␉␉(strncmp(name, "RSDP", 4) == 0) || (strncmp(name, "rsdp", 4) == 0))␊ |
| 4624 | ␉␉␉␉␉{ ␊ |
| 4625 | ␉␉␉␉␉␉continue;␊ |
| 4626 | ␉␉␉␉␉}␊ |
| 4627 | ␉␉␉␉␉␊ |
| 4628 | ␉␉␉␉␉if ((strncmp(name, "FACS", 4) == 0) || (strncmp(name, "facs", 4) == 0)) // FACS is not supported␊ |
| 4629 | ␉␉␉␉␉{ ␊ |
| 4630 | ␉␉␉␉␉␉continue;␊ |
| 4631 | ␉␉␉␉␉}␉␉␉␉␉␊ |
| 4632 | ␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␊ |
| 4633 | ␉␉␉␉␉//char* tmp = malloc(strlen(name) + 1);␊ |
| 4634 | ␉␉␉␉␉//strcpy(tmp, name);␊ |
| 4635 | ␉␉␉␉␉␊ |
| 4636 | ␉␉␉␉␉DBG("* Attempting to load acpi table: %s\n", name);␉␉␉␊ |
| 4637 | ␉␉␉␉␉if ( (new_table_list[i]=(U32)loadACPITable(dirspec,name)))␊ |
| 4638 | ␉␉␉␉␉{␊ |
| 4639 | ␉␉␉␉␉␉if (i < MAX_ACPI_TABLE)␊ |
| 4640 | ␉␉␉␉␉␉{␊ |
| 4641 | ␉␉␉␉␉␉␉i++;␊ |
| 4642 | ␉␉␉␉␉␉} ␊ |
| 4643 | ␉␉␉␉␉␉else␊ |
| 4644 | ␉␉␉␉␉␉{␊ |
| 4645 | ␉␉␉␉␉␉␉break;␊ |
| 4646 | ␉␉␉␉␉␉}␉␉␉␉␉␉␊ |
| 4647 | ␉␉␉␉␉} ␊ |
| 4648 | ␉␉␉␉␉//else␊ |
| 4649 | ␉␉␉␉␉//{␊ |
| 4650 | ␉␉␉␉␉//␉free(tmp);␊ |
| 4651 | ␉␉␉␉␉//}␊ |
| 4652 | ␊ |
| 4653 | ␉␉␉␉}␊ |
| 4654 | #if DEBUG_ACPI␊ |
| 4655 | ␉␉␉␉else ␊ |
| 4656 | ␉␉␉␉{␊ |
| 4657 | ␉␉␉␉␉DBG("Ignoring %s\n", name);␊ |
| 4658 | ␉␉␉␉}␊ |
| 4659 | #endif␊ |
| 4660 | ␉␉␉␉␊ |
| 4661 | ␉␉␉}␊ |
| 4662 | ␉␉␉␊ |
| 4663 | ␉␉␉if (i)␊ |
| 4664 | ␉␉␉{␊ |
| 4665 | ␉␉␉␉//sanitize the new tables list ␊ |
| 4666 | ␉␉␉␉sanitize_new_table_list(new_table_list);␊ |
| 4667 | ␉␉␉␉␊ |
| 4668 | ␉␉␉␉//move to kernel memory ␊ |
| 4669 | ␉␉␉␉move_table_list_to_kmem(new_table_list);␊ |
| 4670 | ␉␉␉␉␊ |
| 4671 | ␉␉␉␉DBG("New ACPI tables Loaded in memory\n");␊ |
| 4672 | ␉␉␉}␊ |
| 4673 | ␉␉}␊ |
| 4674 | ␉␉␊ |
| 4675 | ␉}␉␉␉␊ |
| 4676 | ␊ |
| 4677 | ␉// TODO : Add an option for that␊ |
| 4678 | //cpuNamespace = CPU_NAMESPACE_PR; //Default␊ |
| 4679 | ␊ |
| 4680 | ␊ |
| 4681 | ␉if (speed_step)␊ |
| 4682 | ␉{␊ |
| 4683 | ␉␉gen_psta= true;␊ |
| 4684 | ␉␉gen_csta= true;␊ |
| 4685 | ␉} ␉␉␊ |
| 4686 | ␉ ␊ |
| 4687 | ␉␊ |
| 4688 | ␉ACPI_TABLE_RSDP *rsdp=(ACPI_TABLE_RSDP *)acpi_tables.RsdPointer;␊ |
| 4689 | ␉␊ |
| 4690 | ␉if (rsdp == (void*)0ul || (GetChecksum(rsdp, (rsdp->Revision == 0) ? ACPI_RSDP_REV0_SIZE:sizeof(ACPI_TABLE_RSDP)) != 0) )␊ |
| 4691 | ␉{␊ |
| 4692 | ␉␉printf("Error : ACPI RSD PTR Revision %d checksum is incorrect or table not found \n",rsdp->Revision );␊ |
| 4693 | ␉␉return EFI_UNSUPPORTED;␊ |
| 4694 | ␉}␊ |
| 4695 | ␉␊ |
| 4696 | ␉if ((update_acpi) && (rsdp->Revision == 0))␊ |
| 4697 | ␉{␊ |
| 4698 | ␉␉␊ |
| 4699 | ␉␉rsdp_conv = (ACPI_TABLE_RSDP *)gen_alloc_rsdp_v2_from_v1(rsdp);␊ |
| 4700 | ␉␉if (rsdp_conv != (void *)0ul)␊ |
| 4701 | ␉␉{␊ |
| 4702 | ␉␉␉gen_xsdt = true; ␊ |
| 4703 | ␉␉␉rsdp = rsdp_conv;␊ |
| 4704 | ␉␉␉verbose("Converted ACPI RSD PTR Revision 0 to Revision 2\n");␊ |
| 4705 | ␉␉}␊ |
| 4706 | ␉␉␊ |
| 4707 | ␉}␊ |
| 4708 | ␉␊ |
| 4709 | ␉Revision = rsdp->Revision ;␊ |
| 4710 | ␉rsdplength=(Revision == 2)?rsdp->Length:ACPI_RSDP_REV0_SIZE;␊ |
| 4711 | ␉␊ |
| 4712 | ␉DBG("RSDP Revision %d found @%x. Length=%d\n",Revision,rsdp,rsdplength);␊ |
| 4713 | ␉␊ |
| 4714 | ␉/* FIXME: no check that memory allocation succeeded ␊ |
| 4715 | ␉ * Copy and patch RSDP,RSDT, XSDT and FADT␊ |
| 4716 | ␉ * For more info see ACPI Specification pages 110 and following␊ |
| 4717 | ␉ */␊ |
| 4718 | ␉␊ |
| 4719 | ␉if (gen_xsdt)␊ |
| 4720 | ␉{␊ |
| 4721 | ␉␉rsdp_mod=rsdp_conv;␊ |
| 4722 | ␉}␊ |
| 4723 | ␉else␊ |
| 4724 | ␉{␊ |
| 4725 | ␉␉rsdp_mod=(ACPI_TABLE_RSDP *) AllocateKernelMemory(rsdplength);␊ |
| 4726 | ␉␉memcpy(rsdp_mod, rsdp, rsdplength);␊ |
| 4727 | ␉}␉␊ |
| 4728 | ␉␊ |
| 4729 | ␉␉␊ |
| 4730 | ␉if ((fadt_file = (ACPI_TABLE_FADT *)get_new_table_in_list(new_table_list, NAMESEG("FACP"), &new_table_index)) != (void *)0ul)␊ |
| 4731 | ␉{␊ |
| 4732 | ␉␉␊ |
| 4733 | ␉␉if (oem_fadt == false)␊ |
| 4734 | ␉␉␉FacpPointer = (ACPI_TABLE_FADT *)fadt_file;␊ |
| 4735 | ␉␉␊ |
| 4736 | ␉␉new_table_list[new_table_index] = 0ul; // This way, the non-patched table will not be added in our new rsdt/xsdt table list␊ |
| 4737 | ␉␉␊ |
| 4738 | ␉} else␊ |
| 4739 | ␉␉FacpPointer = (acpi_tables.FacpPointer64 != (void *)0ul) ? ␊ |
| 4740 | ␉␉(ACPI_TABLE_FADT *)acpi_tables.FacpPointer64 : (ACPI_TABLE_FADT *)acpi_tables.FacpPointer;␉␉␉␊ |
| 4741 | ␉␊ |
| 4742 | #if DEBUG_ACPI␊ |
| 4743 | ␉if ((FacpPointer != (void *)0ul) || (oem_fadt == false))␊ |
| 4744 | ␉{␊ |
| 4745 | ␉␉printf("FADT found @%x, Length %d\n",FacpPointer, FacpPointer->Header.Length);␊ |
| 4746 | ␉␉printf("Attempting to patch FADT entry of %s\n",(acpi_tables.FacpPointer64 != (void *)0ul) ? ACPI_SIG_XSDT : ACPI_SIG_RSDT);␊ |
| 4747 | ␉} ␊ |
| 4748 | ␉else if (oem_fadt == true)␊ |
| 4749 | ␉{␊ |
| 4750 | ␉␉ACPI_TABLE_FADT * FacpPtr = (acpi_tables.FacpPointer64 != (void *)0ul) ? ␊ |
| 4751 | ␉␉(ACPI_TABLE_FADT *)acpi_tables.FacpPointer64 : (ACPI_TABLE_FADT *)acpi_tables.FacpPointer;␊ |
| 4752 | ␉␉␊ |
| 4753 | ␉␉printf("FADT found @%x ( Length %d ) in %s \n",FacpPtr, FacpPtr->Header.Length, (acpi_tables.FacpPointer64 != (void *)0ul) ? ACPI_SIG_XSDT : ACPI_SIG_RSDT);␊ |
| 4754 | ␉}␊ |
| 4755 | #endif␉␊ |
| 4756 | ␉␊ |
| 4757 | ␉if ((new_dsdt = (ACPI_TABLE_DSDT *)get_new_table_in_list(new_table_list, NAMESEG("DSDT"), &new_table_index)) != (void*)0ul )␊ |
| 4758 | ␉{␊ |
| 4759 | ␉␉new_table_list[new_table_index] = 0ul; // This way, the DSDT file will not be added in our new rsdt/xsdt table list, and it shouldn't be anyway␊ |
| 4760 | ␉}␊ |
| 4761 | ␉␊ |
| 4762 | ␉if (oem_fadt == false)␊ |
| 4763 | ␉{␊ |
| 4764 | ␉␉␊ |
| 4765 | ␉␉fadt_mod = patch_fadt(FacpPointer, (oem_dsdt == false) ? new_dsdt : (void*)0ul , (acpi_tables.FacpPointer64 != (void *)0ul ));␉␊ |
| 4766 | ␉␉␊ |
| 4767 | ␉␉␊ |
| 4768 | ␉␉DsdtPtr = ((fadt_mod->Header.Revision >= 3) && (fadt_mod->XDsdt != 0)) ? (ACPI_TABLE_DSDT*)((U32)fadt_mod->XDsdt):(ACPI_TABLE_DSDT*)fadt_mod->Dsdt;␊ |
| 4769 | ␉␉␊ |
| 4770 | ␉␉if (fadt_mod != (void*)0ul)␊ |
| 4771 | ␉␉{␊ |
| 4772 | ␉␉␉␊ |
| 4773 | ␉␉␉U8 empty = get_0ul_index_in_list(new_table_list,true);␊ |
| 4774 | ␉␉␉if (empty != ACPI_TABLE_LIST_FULL)␊ |
| 4775 | ␉␉␉{␊ |
| 4776 | ␉␉␉␉new_table_list[empty] = (U32)fadt_mod; // add the patched table to the list␊ |
| 4777 | ␉␉␉} ␊ |
| 4778 | ␉␉␉else␊ |
| 4779 | ␉␉␉{␊ |
| 4780 | ␉␉␉␉printf("Error: not enought reserved space in the new acpi list for the Patched FACP table,\n ");␊ |
| 4781 | ␉␉␉␉printf(" please increase the RESERVED_AERA\n");␊ |
| 4782 | ␉␉␉}␉␉␉␊ |
| 4783 | ␉␉␉␊ |
| 4784 | ␉␉} ␊ |
| 4785 | ␉␉else␊ |
| 4786 | ␉␉{␊ |
| 4787 | ␉␉␉printf("Error: Failed to patch the FADT Table, trying fallback to the FADT original pointer\n");␊ |
| 4788 | ␉␉␉fadt_mod = (acpi_tables.FacpPointer64 != (void *)0ul) ? ␊ |
| 4789 | ␉␉␉(ACPI_TABLE_FADT *)acpi_tables.FacpPointer64 : (ACPI_TABLE_FADT *)acpi_tables.FacpPointer;␊ |
| 4790 | ␉␉␉␊ |
| 4791 | ␉␉␉U8 empty = get_0ul_index_in_list(new_table_list,true);␊ |
| 4792 | ␉␉␉if (empty != ACPI_TABLE_LIST_FULL)␊ |
| 4793 | ␉␉␉{␊ |
| 4794 | ␉␉␉␉new_table_list[empty] = (U32)fadt_mod; ␊ |
| 4795 | ␉␉␉} ␊ |
| 4796 | ␉␉␉else␊ |
| 4797 | ␉␉␉{␊ |
| 4798 | ␉␉␉␉printf("Error: not enought reserved space in the new acpi list for the FACP table,\n ");␊ |
| 4799 | ␉␉␉␉printf(" please increase the RESERVED_AERA\n");␊ |
| 4800 | ␉␉␉}␊ |
| 4801 | ␉␉}␉␊ |
| 4802 | ␉␉␊ |
| 4803 | ␉␉if (oem_dsdt == false)␊ |
| 4804 | ␉␉{␊ |
| 4805 | ␉␉␉if (generate_cpu_map_from_acpi(DsdtPtr) == 0)␊ |
| 4806 | ␉␉␉{␊ |
| 4807 | ␉␉␉␉U8 new_uid = (U8)getPciRootUID();␊ |
| 4808 | ␉␉␉␉␊ |
| 4809 | ␉␉␉␉/* WARNING: THIS METHOD WORK PERFECTLY BUT IT CAN RESULT TO AN INCORRECT CHECKSUM */␊ |
| 4810 | ␉␉␉␉␊ |
| 4811 | ␉␉␉␉if (ProcessDsdt(DsdtPtr, UIDPointer, new_uid))␊ |
| 4812 | ␉␉␉␉{␊ |
| 4813 | ␉␉␉␉␉printf("PCI0 _UID patched to %d in the DSDT table\n", new_uid);␊ |
| 4814 | ␉␉␉␉}␉␉␉␉␊ |
| 4815 | ␉␉␉␉␊ |
| 4816 | ␉␉␉}␊ |
| 4817 | ␉␉}␊ |
| 4818 | ␉␉␊ |
| 4819 | ␉␉ ␊ |
| 4820 | ␉} ␊ |
| 4821 | ␉else ␊ |
| 4822 | ␉{␊ |
| 4823 | ␉␉␊ |
| 4824 | ␉␉// here we use the variable fadt_mod only for SSDT Generation␊ |
| 4825 | ␉␉␊ |
| 4826 | ␉␉fadt_mod = (acpi_tables.FacpPointer64 != (void *)0ul) ? ␊ |
| 4827 | ␉␉(ACPI_TABLE_FADT *)acpi_tables.FacpPointer64 : (ACPI_TABLE_FADT *)acpi_tables.FacpPointer;␊ |
| 4828 | ␉␉␊ |
| 4829 | ␉␉DsdtPtr = ((fadt_mod->Header.Revision >= 3) && (fadt_mod->XDsdt != 0)) ? (ACPI_TABLE_DSDT*)((U32)fadt_mod->XDsdt)␊ |
| 4830 | ␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉␉:(ACPI_TABLE_DSDT*)fadt_mod->Dsdt;␊ |
| 4831 | ␉}␊ |
| 4832 | #if OLD_SSDT␊ |
| 4833 | ␉if (get_needed_symbols())␊ |
| 4834 | ␉{␊ |
| 4835 | ␉␉if (speed_step || gen_csta || gen_psta) ␊ |
| 4836 | ␉␉{␊ |
| 4837 | ␉␉␉U8 empty = get_0ul_index_in_list(new_table_list, true);␊ |
| 4838 | ␉␉␉␊ |
| 4839 | ␉␉␉// Generate _CST SSDT␊ |
| 4840 | ␉␉␉if ( speed_step || gen_csta)␊ |
| 4841 | ␉␉␉{␊ |
| 4842 | ␉␉␉␉if (empty != ACPI_TABLE_LIST_FULL) ␊ |
| 4843 | ␉␉␉␉{␊ |
| 4844 | ␉␉␉␉␉if (new_table_list[empty] =(U32)generate_cst_ssdt(fadt_mod))␊ |
| 4845 | ␉␉␉␉␉{␊ |
| 4846 | ␉␉␉␉␉␉if (speed_step || gen_psta)␊ |
| 4847 | ␉␉␉␉␉␉␉empty = get_0ul_index_in_list(new_table_list,true);␊ |
| 4848 | ␉␉␉␉␉}␊ |
| 4849 | ␉␉␉␉} ␊ |
| 4850 | ␉␉␉␉else␊ |
| 4851 | ␉␉␉␉{␊ |
| 4852 | ␉␉␉␉␉printf("Error: not enought reserved space in the new acpi list for the _CST SSDT table,\n ");␊ |
| 4853 | ␉␉␉␉␉printf(" please increase the RESERVED_AERA\n");␊ |
| 4854 | ␉␉␉␉}␊ |
| 4855 | ␉␉␉}␊ |
| 4856 | ␉␉␉␊ |
| 4857 | ␉␉␉␊ |
| 4858 | ␉␉␉// Generating _PSS SSDT␊ |
| 4859 | ␉␉␉if (speed_step || gen_psta)␊ |
| 4860 | ␉␉␉{␊ |
| 4861 | ␉␉␉␉if (empty != ACPI_TABLE_LIST_FULL)␊ |
| 4862 | ␉␉␉␉{␊ |
| 4863 | ␉␉␉␉␉␊ |
| 4864 | ␉␉␉␉␉new_table_list[empty] =(U32)generate_pss_ssdt(DsdtPtr);␊ |
| 4865 | ␉␉␉␉␉␊ |
| 4866 | ␉␉␉␉}␊ |
| 4867 | ␉␉␉␉else␊ |
| 4868 | ␉␉␉␉{␊ |
| 4869 | ␉␉␉␉␉printf("Error: not enought reserved space in the new acpi list for the _PSS SSDT table,\n ");␊ |
| 4870 | ␉␉␉␉␉printf(" please increase the RESERVED_AERA\n");␊ |
| 4871 | ␉␉␉␉}␊ |
| 4872 | ␉␉␉}␊ |
| 4873 | ␉␉}␊ |
| 4874 | ␉}␉␊ |
| 4875 | #else␊ |
| 4876 | ␉if (gen_ssdt || gen_csta || gen_psta || gen_tsta) ␊ |
| 4877 | ␉{␊ |
| 4878 | ␉␉ProcessSsdt(new_table_list, DsdtPtr, gen_csta, gen_psta, gen_tsta );␉␉␊ |
| 4879 | ␉}␊ |
| 4880 | #endif␊ |
| 4881 | ␉␊ |
| 4882 | ␉if ((rsdp_mod != (void *)0ul) && (rsdp_mod->Length >= ACPI_RSDP_REV0_SIZE) ) ␊ |
| 4883 | ␉{␊ |
| 4884 | ␉␉if ((rsdp_mod->Revision == 0) || (gen_xsdt == true))␊ |
| 4885 | ␉␉{␊ |
| 4886 | ␉␉␉process_rsdt(rsdp_mod, gen_xsdt, new_table_list);␊ |
| 4887 | ␉␉␉goto out;␊ |
| 4888 | ␉␉}␊ |
| 4889 | ␉␉␊ |
| 4890 | ␉}␊ |
| 4891 | ␉else ␊ |
| 4892 | ␉{␊ |
| 4893 | ␉␉printf("Error: Incorect ACPI RSD PTR or not found \n");␊ |
| 4894 | ␉␉return EFI_UNSUPPORTED;␊ |
| 4895 | ␉}␊ |
| 4896 | ␊ |
| 4897 | ␉if ((GetChecksum(rsdp_mod, sizeof(ACPI_TABLE_RSDP)) == 0) &&␊ |
| 4898 | ␉␉(Revision == 2) &&␊ |
| 4899 | ␉␉(rsdplength == sizeof(ACPI_TABLE_RSDP)))␊ |
| 4900 | ␉{␊ |
| 4901 | ␉␉process_xsdt(rsdp_mod, new_table_list);␊ |
| 4902 | ␊ |
| 4903 | ␉} ␊ |
| 4904 | ␉else ␊ |
| 4905 | ␉{␊ |
| 4906 | ␉␉printf("Warning : ACPI RSD PTR Revision 2 is incorrect, \n");␊ |
| 4907 | ␉␉printf(" trying to fallback to Revision 1\n");␊ |
| 4908 | ␉␉if ((rsdp_mod != (void *)0ul) && (rsdp_mod->Length >= ACPI_RSDP_REV0_SIZE) ) ␊ |
| 4909 | ␉␉{␉␉␉␊ |
| 4910 | ␉␉␉process_rsdt(rsdp_mod, false, new_table_list);␊ |
| 4911 | ␉␉␉␉␉␉␊ |
| 4912 | ␉␉} ␊ |
| 4913 | ␉␉else ␊ |
| 4914 | ␉␉{␊ |
| 4915 | ␉␉␉printf("Error: Incorect ACPI RSD PTR or not found \n");␊ |
| 4916 | ␉␉␉return EFI_UNSUPPORTED;␊ |
| 4917 | ␉␉}␊ |
| 4918 | ␉}␊ |
| 4919 | ␊ |
| 4920 | out:␊ |
| 4921 | ␉// Correct the checksum of RSDP ␊ |
| 4922 | ␉␊ |
| 4923 | ␉DBG("RSDP: Original checksum %d\n", rsdp_mod->Checksum);␉␉␊ |
| 4924 | ␉␊ |
| 4925 | ␉setRsdpchecksum(rsdp_mod);␊ |
| 4926 | ␉␊ |
| 4927 | ␉DBG("New checksum %d\n", rsdp_mod->Checksum);␊ |
| 4928 | ␉␊ |
| 4929 | ␉if (Revision == 2)␊ |
| 4930 | ␉{␊ |
| 4931 | ␉␉DBG("RSDP: Original extended checksum %d\n", rsdp_mod->ExtendedChecksum);␉␉␉␊ |
| 4932 | ␉␉␊ |
| 4933 | ␉␉setRsdpXchecksum(rsdp_mod);␊ |
| 4934 | ␉␉␊ |
| 4935 | ␉␉DBG("New extended checksum %d\n", rsdp_mod->ExtendedChecksum);␊ |
| 4936 | ␉␉␊ |
| 4937 | ␉}␊ |
| 4938 | ␉␊ |
| 4939 | ␉verbose("ACPI Revision %d successfully patched\n", Revision);␊ |
| 4940 | ␉␊ |
| 4941 | ␉if (Revision == 2)␊ |
| 4942 | ␉{␊ |
| 4943 | ␉␉rsd_p = ((U64)((U32)rsdp_mod));␊ |
| 4944 | ␉␉if (rsd_p)␊ |
| 4945 | ␉␉␉Status = addConfigurationTable(&gEfiAcpi20TableGuid, &rsd_p, "ACPI_20");␊ |
| 4946 | ␉}␊ |
| 4947 | ␉else␊ |
| 4948 | ␉{␊ |
| 4949 | ␉␉rsd_p = ((U64)((U32)rsdp_mod));␊ |
| 4950 | ␉␉if (rsd_p)␊ |
| 4951 | ␉␉␉Status = addConfigurationTable(&gEfiAcpiTableGuid, &rsd_p, "ACPI");␉␉␊ |
| 4952 | ␊ |
| 4953 | ␉}␊ |
| 4954 | ␉␊ |
| 4955 | #if DEBUG_ACPI==2␊ |
| 4956 | ␉printf("Press a key to continue... (DEBUG_ACPI)\n");␊ |
| 4957 | ␉getc();␊ |
| 4958 | #endif␊ |
| 4959 | ␉return Status;␊ |
| 4960 | }␊ |
| 4961 | |
