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1/*␊
2 * Add (c) here␊
3 *␊
4 * Copyright .... All rights reserved.␊
5 *␊
6 */␊
7␊
8#include "smbios_getters.h"␊
9#include "modules.h"␊
10␊
11#ifndef DEBUG_SMBIOS␊
12#define DEBUG_SMBIOS 0␊
13#endif␊
14␊
15#if DEBUG_SMBIOS␊
16#define DBG(x...)␉printf(x)␊
17#else␊
18#define DBG(x...)␊
19#endif␊
20static uint16_t simpleGetSMBOemProcessorType(void);␊
21␊
22␊
23bool getProcessorInformationExternalClock(returnType *value)␊
24{␊
25␉value->word = Platform->CPU.FSBFrequency/1000000;␊
26␉return true;␊
27}␊
28␊
29bool getProcessorInformationMaximumClock(returnType *value)␊
30{␊
31␉value->word = Platform->CPU.CPUFrequency/1000000;␊
32␉return true;␊
33}␊
34␊
35bool getSMBOemProcessorBusSpeed(returnType *value)␊
36{␊
37␉if (Platform->CPU.Vendor == 0x756E6547) // Intel␊
38␉{␉␉␊
39␉␉switch (Platform->CPU.Family) ␊
40␉␉{␊
41␉␉␉case 0x06:␊
42␉␉␉{␊
43␉␉␉␉switch (Platform->CPU.Model)␊
44␉␉␉␉{␊
45 case CPUID_MODEL_BANIAS:␉// Banias␉␉0x09␊
46 case CPUID_MODEL_DOTHAN:␉// Dothan␉␉0x0D␊
47␉␉␉␉␉case CPUID_MODEL_YONAH:␉␉// Yonah␉␉0x0E␊
48␉␉␉␉␉case CPUID_MODEL_MEROM:␉␉// Merom␉␉0x0F␊
49␉␉␉␉␉case CPUID_MODEL_PENRYN:␉␉// Penryn␉␉0x17␊
50␉␉␉␉␉case CPUID_MODEL_ATOM:␉␉// Atom 45nm␉0x1C␊
51␉␉␉␉␉␉return false;␊
52␊
53␉␉␉␉␉case 0x19:␉␉␉␉␉// Intel Core i5 650 @3.20 Ghz␊
54␉␉␉␉␉case CPUID_MODEL_NEHALEM:␉␉// Intel Core i7 LGA1366 (45nm)␊
55␉␉␉␉␉case CPUID_MODEL_FIELDS:␉␉// Intel Core i5, i7 LGA1156 (45nm)␊
56␉␉␉␉␉case CPUID_MODEL_DALES:␉␉// Intel Core i5, i7 LGA1156 (45nm) ???␊
57␉␉␉␉␉case CPUID_MODEL_DALES_32NM:␉// Intel Core i3, i5, i7 LGA1156 (32nm)␊
58␉␉␉␉␉case CPUID_MODEL_WESTMERE:␉// Intel Core i7 LGA1366 (32nm) 6 Core␊
59␉␉␉␉␉case CPUID_MODEL_NEHALEM_EX:␉// Intel Core i7 LGA1366 (45nm) 6 Core ???␊
60␉␉␉␉␉case CPUID_MODEL_WESTMERE_EX:␉// Intel Core i7 LGA1366 (45nm) 6 Core ???␊
61␉␉␉␉␉case CPUID_MODEL_SANDYBRIDGE:␊
62␉␉␉␉␉case CPUID_MODEL_JAKETOWN:␊
63␉␉␉␉␉{␊
64␉␉␉␉␉␉// thanks to dgobe for i3/i5/i7 bus speed detection␊
65␉␉␉␉␉␉int nhm_bus = 0x3F;␊
66␉␉␉␉␉␉static long possible_nhm_bus[] = {0xFF, 0x7F, 0x3F};␊
67␉␉␉␉␉␉unsigned long did, vid;␊
68␉␉␉␉␉␉unsigned int i;␊
69␉␉␉␉␉␉␊
70␉␉␉␉␉␉// Nehalem supports Scrubbing␊
71␉␉␉␉␉␉// First, locate the PCI bus where the MCH is located␊
72␉␉␉␉␉␉for(i = 0; i < sizeof(possible_nhm_bus); i++)␊
73␉␉␉␉␉␉{␊
74␉␉␉␉␉␉␉vid = pci_config_read16(PCIADDR(possible_nhm_bus[i], 3, 4), 0x00);␊
75␉␉␉␉␉␉␉did = pci_config_read16(PCIADDR(possible_nhm_bus[i], 3, 4), 0x02);␊
76␉␉␉␉␉␉␉vid &= 0xFFFF;␊
77␉␉␉␉␉␉␉did &= 0xFF00;␊
78␉␉␉␉␉␉␉␊
79␉␉␉␉␉␉␉if(vid == 0x8086 && did >= 0x2C00)␊
80␉␉␉␉␉␉␉␉nhm_bus = possible_nhm_bus[i]; ␊
81␉␉␉␉␉␉}␊
82␉␉␉␉␉␉␊
83␉␉␉␉␉␉unsigned long qpimult, qpibusspeed;␊
84␉␉␉␉␉␉qpimult = pci_config_read32(PCIADDR(nhm_bus, 2, 1), 0x50);␊
85␉␉␉␉␉␉qpimult &= 0x7F;␊
86␉␉␉␉␉␉DBG("qpimult %d\n", qpimult);␊
87␉␉␉␉␉␉qpibusspeed = (qpimult * 2 * (Platform->CPU.FSBFrequency/1000000));␊
88␉␉␉␉␉␉// Rek: rounding decimals to match original mac profile info␊
89␉␉␉␉␉␉if (qpibusspeed%100 != 0)qpibusspeed = ((qpibusspeed+50)/100)*100;␊
90␉␉␉␉␉␉DBG("qpibusspeed %d\n", qpibusspeed);␊
91␉␉␉␉␉␉value->word = qpibusspeed;␊
92␉␉␉␉␉␉return true;␊
93␉␉␉␉␉}␊
94␉␉␉␉␉default:␊
95␉␉␉␉␉␉break; //Unsupported CPU type␊
96␉␉␉␉}␊
97␉␉␉}␊
98␉␉␉default:␊
99␉␉␉␉break; ␊
100␉␉}␊
101␉}␊
102␉return false;␊
103}␊
104␊
105static uint16_t simpleGetSMBOemProcessorType(void)␊
106{␊
107␉if (Platform->CPU.NoCores >= 4) ␊
108␉{␊
109␉␉return 0x0501;␉// Quad-Core Xeon␊
110␉}␊
111␉if (((Platform->CPU.NoCores == 1) || (Platform->CPU.NoCores == 2)) && !(platformCPUExtFeature(CPUID_EXTFEATURE_EM64T))) ␊
112␉{␊
113␉␉return 0x0201;␉// Core Solo / Duo␊
114␉};␊
115␉␊
116␉return 0x0301;␉␉// Core 2 Solo / Duo␊
117}␊
118␊
119bool getSMBOemProcessorType(returnType *value)␊
120{␊
121␉static bool done = false;␉␉␊
122␉␉␊
123␉value->word = simpleGetSMBOemProcessorType();␊
124␊
125␉if (Platform->CPU.Vendor == 0x756E6547) // Intel␊
126␉{␊
127␉␉if (!done)␊
128␉␉{␊
129␉␉␉verbose("CPU is %s, family 0x%x, model 0x%x\n", Platform->CPU.BrandString, Platform->CPU.Family, Platform->CPU.Model);␊
130␉␉␉done = true;␊
131␉␉}␊
132␉␉␊
133␉␉switch (Platform->CPU.Family) ␊
134␉␉{␊
135␉␉␉case 0x06:␊
136␉␉␉{␊
137␉␉␉␉switch (Platform->CPU.Model)␊
138␉␉␉␉{␊
139 case CPUID_MODEL_BANIAS:␉// Banias␉␉␊
140 case CPUID_MODEL_DOTHAN:␉// Dothan␉␉␊
141␉␉␉␉␉case CPUID_MODEL_YONAH:␉␉␉␉// Yonah␊
142␉␉␉␉␉case CPUID_MODEL_MEROM:␉␉␉␉// Merom␊
143␉␉␉␉␉case CPUID_MODEL_PENRYN:␉␉␉␉// Penryn␊
144␉␉␉␉␉case CPUID_MODEL_ATOM:␉␉␉␉// Intel Atom (45nm)␊
145␉␉␉␉␉␉return true;␊
146␊
147␉␉␉␉␉case CPUID_MODEL_NEHALEM:␉␉␉␉// Intel Core i7 LGA1366 (45nm)␊
148␉␉␉␉␉␉value->word = 0x0701;␉␉␉// Core i7␊
149␉␉␉␉␉␉return true;␊
150␊
151␉␉␉␉␉case CPUID_MODEL_FIELDS:␉␉␉␉// Lynnfield, Clarksfield, Jasper␊
152␉␉␉␉␉␉if (strstr(Platform->CPU.BrandString, "Core(TM) i5"))␊
153␉␉␉␉␉␉␉value->word = 0x601;␉␉// Core i5␊
154␉␉␉␉␉␉else␊
155␉␉␉␉␉␉␉value->word = 0x701;␉␉// Core i7␊
156␉␉␉␉␉␉return true;␊
157␊
158␉␉␉␉␉case CPUID_MODEL_DALES:␉␉␉␉// Intel Core i5, i7 LGA1156 (45nm) (Havendale, Auburndale)␊
159␉␉␉␉␉␉if (strstr(Platform->CPU.BrandString, "Core(TM) i5"))␊
160␉␉␉␉␉␉␉value->word = 0x601;␉␉// Core i5␊
161␉␉␉␉␉␉else␊
162␉␉␉␉␉␉␉value->word = 0x0701;␉␉// Core i7␊
163␉␉␉␉␉␉return true;␊
164␊
165␉␉␉␉␉case CPUID_MODEL_SANDYBRIDGE:␊
166␉␉␉␉␉case CPUID_MODEL_DALES_32NM:␉␉␉// Intel Core i3, i5, i7 LGA1156 (32nm) (Clarkdale, Arrandale)␊
167␉␉␉␉␉␉if (strstr(Platform->CPU.BrandString, "Core(TM) i3"))␊
168␉␉␉␉␉␉␉␉value->word = 0x901;␉// Core i3␊
169␉␉␉␉␉␉else if (strstr(Platform->CPU.BrandString, "Core(TM) i5"))␊
170␉␉␉␉␉␉␉␉value->word = 0x601;␉// Core i5␊
171␉␉␉␉␉␉else if (strstr(Platform->CPU.BrandString, "Core(TM) i7"))␊
172␉␉␉␉␉␉␉␉value->word = 0x0701;␉// Core i7␊
173␉␉␉␉␉␉/*else ␊
174␉␉␉␉␉␉␉␉value->word = simpleGetSMBOemProcessorType();*/␊
175␉␉␉␉␉␉return true;␊
176␊
177 case CPUID_MODEL_JAKETOWN:␊
178␉␉␉␉␉case CPUID_MODEL_WESTMERE:␉␉␉// Intel Core i7 LGA1366 (32nm) 6 Core (Gulftown, Westmere-EP, Westmere-WS)␊
179␉␉␉␉␉case CPUID_MODEL_WESTMERE_EX:␉␉␉// Intel Core i7 LGA1366 (45nm) 6 Core ???␊
180␉␉␉␉␉␉value->word = 0x0501;␉␉␉// Core i7␊
181␉␉␉␉␉␉return true;␊
182␊
183␉␉␉␉␉case 0x19:␉␉␉␉␉␉␉// Intel Core i5 650 @3.20 Ghz␊
184␉␉␉␉␉␉value->word = 0x601;␉␉␉// Core i5␊
185␉␉␉␉␉␉return true;␊
186␉␉␉␉␉default:␊
187␉␉␉␉␉␉break; //Unsupported CPU type␊
188␉␉␉␉}␊
189␉␉␉}␊
190␉␉␉default:␊
191␉␉␉␉break; ␊
192␉␉}␊
193␉}␊
194␉␊
195␉return false;␊
196}␊
197␊
198bool getSMBMemoryDeviceMemoryType(returnType *value)␊
199{␊
200␉static int idx = -1;␊
201␉if (execute_hook("isMemoryRegistred", NULL, NULL, NULL, NULL, NULL, NULL) == EFI_SUCCESS) {␊
202␉␉int␉map;␊
203␊
204␉␉idx++;␊
205␉␉if (idx < MAX_RAM_SLOTS)␊
206␉␉{␊
207␉␉␉map = Platform->DMI.DIMM[idx];␊
208␉␉␉if (Platform->RAM.DIMM[map].InUse && Platform->RAM.DIMM[map].Type != 0)␊
209␉␉␉{␊
210␉␉␉␉DBG("RAM Detected Type = %d\n", Platform->RAM.DIMM[map].Type);␊
211␉␉␉␉value->byte = Platform->RAM.DIMM[map].Type;␊
212␉␉␉␉return true;␊
213␉␉␉}␊
214␉␉}␊
215␉}␊
216␉value->byte = SMB_MEM_TYPE_DDR2;␊
217␉return true;␊
218}␊
219␊
220bool getSMBMemoryDeviceMemorySpeed(returnType *value)␊
221{␊
222␉static int idx = -1;␊
223␉if (execute_hook("isMemoryRegistred", NULL, NULL, NULL, NULL, NULL, NULL) == EFI_SUCCESS) {␊
224␉␉int␉map;␊
225␊
226␉␉idx++;␊
227␉␉if (idx < MAX_RAM_SLOTS)␊
228␉␉{␊
229␉␉␉map = Platform->DMI.DIMM[idx];␊
230␉␉␉if (Platform->RAM.DIMM[map].InUse && Platform->RAM.DIMM[map].Frequency != 0)␊
231␉␉␉{␊
232␉␉␉␉DBG("RAM Detected Freq = %d Mhz\n", Platform->RAM.DIMM[map].Frequency);␊
233␉␉␉␉value->dword = Platform->RAM.DIMM[map].Frequency;␊
234␉␉␉␉return true;␊
235␉␉␉}␊
236␉␉}␊
237␉}␊
238␉value->dword = 800;␊
239␉return true;␊
240}␊
241␊
242bool getSMBMemoryDeviceManufacturer(returnType *value)␊
243{␊
244␉static int idx = -1;␊
245␉if (execute_hook("isMemoryRegistred", NULL, NULL, NULL, NULL, NULL, NULL) == EFI_SUCCESS) {␊
246␉␉int␉map;␊
247␊
248␉␉idx++;␊
249␉␉if (idx < MAX_RAM_SLOTS)␊
250␉␉{␊
251␉␉␉map = Platform->DMI.DIMM[idx];␊
252␉␉␉if (Platform->RAM.DIMM[map].InUse && strlen(Platform->RAM.DIMM[map].Vendor) > 0)␊
253␉␉␉{␊
254␉␉␉␉DBG("RAM Detected Vendor[%d]='%s'\n", idx, Platform->RAM.DIMM[map].Vendor);␊
255␉␉␉␉value->string = Platform->RAM.DIMM[map].Vendor;␊
256␉␉␉␉return true;␊
257␉␉␉}␊
258␉␉}␊
259␉}␊
260␉value->string = "N/A";␊
261␉return true;␊
262}␊
263␉␊
264bool getSMBMemoryDeviceSerialNumber(returnType *value)␊
265{␊
266␉static int idx = -1;␊
267␉if (execute_hook("isMemoryRegistred", NULL, NULL, NULL, NULL, NULL, NULL) == EFI_SUCCESS) {␊
268␉␉int␉map;␊
269␊
270␉␉idx++;␊
271␉␉if (idx < MAX_RAM_SLOTS)␊
272␉␉{␊
273␉␉␉map = Platform->DMI.DIMM[idx];␊
274␉␉␉if (Platform->RAM.DIMM[map].InUse && strlen(Platform->RAM.DIMM[map].SerialNo) > 0)␊
275␉␉␉{␊
276␉␉␉␉DBG("name = %s, map=%d, RAM Detected SerialNo[%d]='%s'\n", name ? name : "", ␊
277␉␉␉␉map, idx, Platform->RAM.DIMM[map].SerialNo);␊
278␉␉␉␉value->string = Platform->RAM.DIMM[map].SerialNo;␊
279␉␉␉␉return true;␊
280␉␉␉}␊
281␉␉}␊
282␉}␊
283␉value->string = "N/A";␊
284␉return true;␊
285}␊
286␊
287bool getSMBMemoryDevicePartNumber(returnType *value)␊
288{␊
289␉static int idx = -1;␊
290␉if (execute_hook("isMemoryRegistred", NULL, NULL, NULL, NULL, NULL, NULL) == EFI_SUCCESS) {␊
291␉␉int␉map;␊
292␊
293␉␉idx++;␊
294␉␉if (idx < MAX_RAM_SLOTS)␊
295␉␉{␊
296␉␉␉map = Platform->DMI.DIMM[idx];␊
297␉␉␉if (Platform->RAM.DIMM[map].InUse && strlen(Platform->RAM.DIMM[map].PartNo) > 0)␊
298␉␉␉{␊
299␉␉␉␉DBG("Ram Detected PartNo[%d]='%s'\n", idx, Platform->RAM.DIMM[map].PartNo);␊
300␉␉␉␉value->string = Platform->RAM.DIMM[map].PartNo;␊
301␉␉␉␉return true;␊
302␉␉␉}␊
303␉␉}␊
304␉}␊
305␉value->string = "N/A";␊
306␉return true;␊
307}␊
308

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