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Source at commit 150 created 13 years 11 months ago.
By meklort, USBLecayOff patch. Runs immediately before kernel is started / after last file is loaded
1/*␊
2 * usb.c␊
3 * ␊
4 *␊
5 * Created by mackerintel on 12/20/08.␊
6 * Copyright 2008 mackerintel. All rights reserved.␊
7 *␊
8 */␊
9␊
10#include "libsaio.h"␊
11#include "boot.h"␊
12#include "bootstruct.h"␊
13#include "pci.h"␊
14␊
15#ifndef DEBUG_USB␊
16#define DEBUG_USB 0␊
17#endif␊
18␊
19#if DEBUG_USB␊
20#define DBG(x...)␉printf(x)␊
21#else␊
22#define DBG(x...)␊
23#endif␊
24␊
25␊
26#define MAX_USB_DEVS 9␊
27␊
28struct pciList␊
29{␊
30␉pci_dt_t* pciDev;␊
31␉struct pciList* next;␊
32};␊
33␊
34struct pciList* usbList = NULL;␊
35␊
36int legacy_off (pci_dt_t *pci_dev);␊
37int ehci_acquire (pci_dt_t *pci_dev);␊
38int uhci_reset (pci_dt_t *pci_dev);␊
39␊
40void notify_usb_dev(pci_dt_t *pci_dev)␊
41{␊
42␉struct pciList* current = usbList;␊
43␉if(!usbList)␊
44␉{␊
45␉␉usbList = (struct pciList*)malloc(sizeof(struct pciList));␊
46␉␉usbList->next = NULL;␊
47␉␉usbList->pciDev = pci_dev;␊
48␉}␊
49␉else {␊
50␉␉while(current != NULL && current->next != NULL)␊
51␉␉{␊
52␉␉␉current = current->next;␊
53␉␉}␊
54␉␉current->next = (struct pciList*)malloc(sizeof(struct pciList));␊
55␉␉current = current->next;␊
56␉␉␊
57␉␉current->pciDev = pci_dev;␊
58␉␉current->next = NULL;␊
59␉}␊
60␊
61␉␊
62␉␊
63␉␊
64}␊
65␊
66int usb_loop()␊
67{␊
68␉bool fix_ehci, fix_uhci, fix_usb, fix_legacy;␊
69␉fix_ehci = fix_uhci = fix_usb = fix_legacy;␊
70␉if (getBoolForKey(kUSBBusFix, &fix_usb, &bootInfo->bootConfig) && fix_usb) {␊
71␉␉fix_ehci = fix_uhci = fix_legacy = true;␊
72␉} else {␊
73␉␉getBoolForKey(kEHCIacquire, &fix_ehci, &bootInfo->bootConfig);␊
74␉␉getBoolForKey(kUHCIreset, &fix_uhci, &bootInfo->bootConfig);␊
75␉␉getBoolForKey(kLegacyOff, &fix_legacy, &bootInfo->bootConfig);␊
76␊
77␉}␊
78␊
79␉␊
80␉struct pciList* current = usbList;␊
81␉while(current)␊
82␉{␊
83␉␉uhci_reset(current->pciDev);␊
84␉␉legacy_off(current->pciDev);␊
85␉␉ehci_acquire(current->pciDev);␊
86␉␉␊
87␉␉current = current->next;␊
88␉}␊
89␉return 1;␊
90}␊
91␊
92int legacy_off (pci_dt_t *pci_dev)␊
93{␊
94␉// Set usb legacy off modification by Signal64␊
95␉// NOTE: This *must* be called after the last file is loaded from the drive in the event that we are booting form usb.␊
96␉// NOTE2: This should be called after any getc() call. (aka, after the Wait=y keyworkd is used)␊
97␉// AKA: Make this run immediatly before the kernel is calles␊
98␉uint32_t␉capaddr, opaddr; ␉␉␊
99␉uint8_t␉␉eecp;␉␉␉␊
100␉uint32_t␉usbcmd, usbsts, usbintr;␉␉␉␊
101␉uint32_t␉usblegsup, usblegctlsts;␉␉␊
102␉␊
103␉int isOSowned;␊
104␉int isBIOSowned;␊
105␉␊
106␉verbose("Setting Legacy USB Off on controller [%04x:%04x] at %02x:%2x.%x\n", ␊
107␉␉␉pci_dev->vendor_id, pci_dev->device_id,␊
108␉␉␉pci_dev->dev.bits.bus, pci_dev->dev.bits.dev, pci_dev->dev.bits.func);␊
109␉␊
110␉// capaddr = Capability Registers = dev.addr + offset stored in dev.addr + 0x10 (USBBASE)␊
111␉capaddr = pci_config_read32(pci_dev->dev.addr, 0x10);␉␊
112␉␊
113␉// opaddr = Operational Registers = capaddr + offset (8bit CAPLENGTH in Capability Registers + offset 0)␊
114␉opaddr = capaddr + *((unsigned char*)(capaddr)); ␉␉␊
115␉␊
116␉// eecp = EHCI Extended Capabilities offset = capaddr HCCPARAMS bits 15:8␊
117␉eecp=*((unsigned char*)(capaddr + 9));␊
118␉␊
119␉DBG("capaddr=%x opaddr=%x eecp=%x\n", capaddr, opaddr, eecp);␊
120␉␊
121␉usbcmd = *((unsigned int*)(opaddr));␉␉␉// Command Register␊
122␉usbsts = *((unsigned int*)(opaddr + 4));␉␉// Status Register␊
123␉usbintr = *((unsigned int*)(opaddr + 8));␉␉// Interrupt Enable Register␊
124␉␊
125␉DBG("usbcmd=%08x usbsts=%08x usbintr=%08x\n", usbcmd, usbsts, usbintr);␊
126␉␊
127␉// read PCI Config 32bit USBLEGSUP (eecp+0) ␊
128␉usblegsup = pci_config_read32(pci_dev->dev.addr, eecp);␊
129␉␊
130␉// informational only␊
131␉isBIOSowned = !!((usblegsup) & (1 << (16)));␊
132␉isOSowned = !!((usblegsup) & (1 << (24)));␊
133␉␊
134␉// read PCI Config 32bit USBLEGCTLSTS (eecp+4) ␊
135␉usblegctlsts = pci_config_read32(pci_dev->dev.addr, eecp + 4);␊
136␉␊
137␉DBG("usblegsup=%08x isOSowned=%d isBIOSowned=%d usblegctlsts=%08x\n", usblegsup, isOSowned, isBIOSowned, usblegctlsts);␊
138␉␊
139␉// Reset registers to Legacy OFF␊
140␉DBG("Clearing USBLEGCTLSTS\n");␊
141␉pci_config_write32(pci_dev->dev.addr, eecp + 4, 0);␉//usblegctlsts␊
142␉␊
143␉// if delay value is in milliseconds it doesn't appear to work. ␊
144␉// setting value to anything up to 65535 does not add the expected delay here.␊
145␉delay(100);␊
146␉␊
147␉usbcmd = *((unsigned int*)(opaddr));␊
148␉usbsts = *((unsigned int*)(opaddr + 4));␊
149␉usbintr = *((unsigned int*)(opaddr + 8));␊
150␉␊
151␉DBG("usbcmd=%08x usbsts=%08x usbintr=%08x\n", usbcmd, usbsts, usbintr);␊
152␉␊
153␉DBG("Clearing Registers\n");␊
154␉␊
155␉// clear registers to default␊
156␉usbcmd = (usbcmd & 0xffffff00);␊
157␉*((unsigned int*)(opaddr)) = usbcmd;␊
158␉*((unsigned int*)(opaddr + 8)) = 0;␉␉␉␉␉//usbintr - clear interrupt registers␊
159␉*((unsigned int*)(opaddr + 4)) = 0x1000;␉␉␉//usbsts - clear status registers ␉␊
160␉pci_config_write32(pci_dev->dev.addr, eecp, 1);␉␉//usblegsup␊
161␉␊
162␉// get the results␊
163␉usbcmd = *((unsigned int*)(opaddr));␊
164␉usbsts = *((unsigned int*)(opaddr + 4));␊
165␉usbintr = *((unsigned int*)(opaddr + 8));␊
166␉␊
167␉DBG("usbcmd=%08x usbsts=%08x usbintr=%08x\n", usbcmd, usbsts, usbintr);␊
168␉␊
169␉// read 32bit USBLEGSUP (eecp+0) ␊
170␉usblegsup = pci_config_read32(pci_dev->dev.addr, eecp);␊
171␉␊
172␉// informational only␊
173␉isBIOSowned = !!((usblegsup) & (1 << (16)));␊
174␉isOSowned = !!((usblegsup) & (1 << (24)));␊
175␉␊
176␉// read 32bit USBLEGCTLSTS (eecp+4) ␊
177␉usblegctlsts = pci_config_read32(pci_dev->dev.addr, eecp + 4);␊
178␉␊
179␉DBG("usblegsup=%08x isOSowned=%d isBIOSowned=%d usblegctlsts=%08x\n", usblegsup, isOSowned, isBIOSowned, usblegctlsts);␊
180␉␊
181␉verbose("Legacy USB Off Done\n");␉␊
182␉return 1;␊
183}␊
184␊
185␊
186␊
187int ehci_acquire (pci_dt_t *pci_dev)␊
188{␊
189␉int␉␉j, k;␊
190␉uint32_t␉base;␊
191␉uint8_t␉␉eecp;␊
192␉uint8_t␉␉legacy[8];␊
193␉bool␉␉isOwnershipConflict;␉␊
194␉bool␉␉alwaysHardBIOSReset;␊
195␊
196␉alwaysHardBIOSReset = false;␉␊
197␉if (!getBoolForKey(kEHCIhard, &alwaysHardBIOSReset, &bootInfo->bootConfig)) {␊
198␉␉alwaysHardBIOSReset = true;␊
199␉}␊
200␊
201␉pci_config_write16(pci_dev->dev.addr, 0x04, 0x0002);␊
202␉base = pci_config_read32(pci_dev->dev.addr, 0x10);␊
203␊
204␉verbose("EHCI controller [%04x:%04x] at %02x:%2x.%x DMA @%x\n", ␊
205␉␉pci_dev->vendor_id, pci_dev->device_id,␊
206␉␉pci_dev->dev.bits.bus, pci_dev->dev.bits.dev, pci_dev->dev.bits.func, ␊
207␉␉base);␊
208␊
209␉if (*((unsigned char*)base) < 0xc)␊
210␉{␊
211␉␉DBG("Config space too small: no legacy implementation\n");␊
212␉␉return 1;␊
213␉}␊
214␉eecp = *((unsigned char*)(base + 9));␊
215␉if (!eecp) {␊
216␉␉DBG("No extended capabilities: no legacy implementation\n");␊
217␉␉return 1;␊
218␉}␊
219␊
220␉DBG("eecp=%x\n",eecp);␊
221␊
222␉// bad way to do it␊
223␉// pci_conf_write(pci_dev->dev.addr, eecp, 4, 0x01000001);␊
224␉for (j = 0; j < 8; j++) {␊
225␉␉legacy[j] = pci_config_read8(pci_dev->dev.addr, eecp + j);␊
226␉␉DBG("%02x ", legacy[j]);␊
227␉}␊
228␉DBG("\n");␊
229␊
230␉//Real Job: based on orByte's AppleUSBEHCI.cpp␊
231␉//We try soft reset first - some systems hang on reboot with hard reset␊
232␉// Definitely needed during reboot on 10.4.6␊
233␊
234␉isOwnershipConflict = ((legacy[3] & 1 != 0) && (legacy[2] & 1 != 0));␊
235␉if (!alwaysHardBIOSReset && isOwnershipConflict) {␊
236␉␉DBG("EHCI - Ownership conflict - attempting soft reset ...\n");␊
237␉␉DBG("EHCI - toggle OS Ownership to 0\n");␊
238␉␉pci_config_write8(pci_dev->dev.addr, eecp + 3, 0);␊
239␉␉for (k = 0; k < 25; k++) {␊
240␉␉␉for (j = 0; j < 8; j++) {␊
241␉␉␉␉legacy[j] = pci_config_read8(pci_dev->dev.addr, eecp + j);␊
242␉␉␉}␊
243␉␉␉if (legacy[3] == 0) {␊
244␉␉␉␉break;␊
245␉␉␉}␊
246␉␉␉delay(10);␊
247␉␉}␊
248␉}␉␊
249␊
250␉DBG("Found USBLEGSUP_ID - value %x:%x - writing OSOwned\n", legacy[3],legacy[2]);␊
251␉pci_config_write8(pci_dev->dev.addr, eecp + 3, 1);␊
252␊
253␉// wait for kEHCI_USBLEGSUP_BIOSOwned bit to clear␊
254␉for (k = 0; k < 25; k++) {␊
255␉␉for (j = 0;j < 8; j++) {␊
256␉␉␉legacy[j] = pci_config_read8(pci_dev->dev.addr, eecp + j);␊
257␉␉}␊
258␉␉DBG ("%x:%x,",legacy[3],legacy[2]);␊
259␉␉if (legacy[2] == 0) {␊
260␉␉␉break;␊
261␉␉}␊
262␉␉delay(10);␊
263␉}␊
264␊
265␉for (j = 0;j < 8; j++) {␊
266␉␉legacy[j] = pci_config_read8(pci_dev->dev.addr, eecp + j);␊
267␉}␊
268␉isOwnershipConflict = ((legacy[2]) != 0);␊
269␉if (isOwnershipConflict) {␊
270␉␉// Soft reset has failed. Assume SMI being ignored␊
271␉␉// Hard reset␊
272␉␉// Force Clear BIOS BIT␊
273␉␉DBG("EHCI - Ownership conflict - attempting hard reset ...\n");␉␉␉␊
274␉␉DBG ("%x:%x\n",legacy[3],legacy[2]);␊
275␉␉DBG("EHCI - Force BIOS Ownership to 0\n");␊
276␊
277␉␉pci_config_write8(pci_dev->dev.addr, eecp + 2, 0);␊
278␉␉for (k = 0; k < 25; k++) {␊
279␉␉␉for (j = 0; j < 8; j++) {␊
280␉␉␉␉legacy[j] = pci_config_read8(pci_dev->dev.addr, eecp + j);␊
281␉␉␉}␊
282␉␉␉DBG ("%x:%x,",legacy[3],legacy[2]);␊
283␊
284␉␉␉if ((legacy[2]) == 0) {␊
285␉␉␉␉break;␊
286␉␉␉}␊
287␉␉␉delay(10);␉␊
288␉␉}␉␉␊
289␉␉// Disable further SMI events␊
290␉␉for (j = 4; j < 8; j++) {␊
291␉␉␉pci_config_write8(pci_dev->dev.addr, eecp + j, 0);␊
292␉␉}␊
293␉}␊
294␊
295␉for (j = 0; j < 8; j++) {␊
296␉␉legacy[j] = pci_config_read8(pci_dev->dev.addr, eecp + j);␊
297␉}␊
298␊
299␉DBG ("%x:%x\n",legacy[3],legacy[2]);␊
300␊
301␉// Final Ownership Resolution Check...␊
302␉if (legacy[2] & 1) {␉␉␉␉␉␊
303␉␉DBG("EHCI controller unable to take control from BIOS\n");␊
304␉␉return 0;␊
305␉}␊
306␊
307␉DBG("EHCI Acquire OS Ownership done\n");␉␊
308␉return 1;␊
309}␊
310␊
311int uhci_reset (pci_dt_t *pci_dev)␊
312{␊
313␉uint32_t base, port_base;␊
314␉␊
315␉base = pci_config_read32(pci_dev->dev.addr, 0x20);␊
316␉port_base = (base >> 5) & 0x07ff;␊
317␊
318␉verbose("UHCI controller [%04x:%04x] at %02x:%2x.%x base %x(%x)\n", ␊
319␉␉pci_dev->vendor_id, pci_dev->device_id,␊
320␉␉pci_dev->dev.bits.bus, pci_dev->dev.bits.dev, pci_dev->dev.bits.func, ␊
321␉␉port_base, base);␊
322␉␊
323␉pci_config_write16(pci_dev->dev.addr, 0xc0, 0x8f00);␊
324␊
325␉outw (port_base, 0x0002);␊
326␉delay(10);␊
327␉outw (port_base+4,0);␊
328␉delay(10);␊
329␉outw (port_base,0);␊
330␉return 1;␊
331}␊
332

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