Chameleon

Chameleon Svn Source Tree

Root/branches/azimutz/trunkGraphicsEnablerModules/i386/modules/AMDGraphicsEnabler/ati.c

1/*
2 * ATI Graphics Card Enabler, part of the Chameleon Boot Loader Project
3 *
4 * Copyright 2010 by Islam M. Ahmed Zaid. All rights reserved.
5 *
6 */
7
8#include "libsa.h"
9#include "saio_internal.h"
10#include "bootstruct.h"
11#include "pci.h"
12#include "platform.h"
13#include "device_inject.h"
14#include "ati_reg.h"
15
16#define OFFSET_TO_GET_ATOMBIOS_STRINGS_START 0x6e
17
18#define kUseAtiROM"UseAtiROM"
19#define kAtiConfig"AtiConfig"
20#define kAtiPorts"AtiPorts"
21#define kATYbinimage"ATYbinimage"
22
23#define Reg32(reg)(*(volatile uint32_t *)(card->mmio + reg))
24#define RegRead32(reg)(Reg32(reg))
25#define RegWrite32(reg, value)(Reg32(reg) = value)
26
27typedef enum {
28kNul,
29kStr,
30kPtr,
31kCst
32} type_t;
33
34typedef enum {
35CHIP_FAMILY_UNKNOW,
36/* IGP */
37CHIP_FAMILY_RS600,
38CHIP_FAMILY_RS690,
39CHIP_FAMILY_RS740,
40CHIP_FAMILY_RS780,
41CHIP_FAMILY_RS880,
42/* R600 */
43CHIP_FAMILY_R600,
44CHIP_FAMILY_RV610,
45CHIP_FAMILY_RV620,
46CHIP_FAMILY_RV630,
47CHIP_FAMILY_RV635,
48CHIP_FAMILY_RV670,
49/* R700 */
50CHIP_FAMILY_RV710,
51CHIP_FAMILY_RV730,
52CHIP_FAMILY_RV740,
53CHIP_FAMILY_RV770,
54/* Evergreen */
55CHIP_FAMILY_CEDAR,
56CHIP_FAMILY_CYPRESS,
57CHIP_FAMILY_HEMLOCK,
58CHIP_FAMILY_JUNIPER,
59CHIP_FAMILY_REDWOOD,
60/* Northern Islands */
61CHIP_FAMILY_BARTS,
62CHIP_FAMILY_CAICOS,
63CHIP_FAMILY_CAYMAN,
64CHIP_FAMILY_TURKS,
65CHIP_FAMILY_LAST
66} chip_family_t;
67
68static const char *chip_family_name[] = {
69"UNKNOW",
70/* IGP */
71"RS600",
72"RS690",
73"RS740",
74"RS780",
75"RS880",
76/* R600 */
77"R600",
78"RV610",
79"RV620",
80"RV630",
81"RV635",
82"RV670",
83/* R700 */
84"RV710",
85"RV730",
86"RV740",
87"RV770",
88/* Evergreen */
89"Cedar",
90"Cypress",
91"Hemlock",
92"Juniper",
93"Redwood",
94/* Northern Islands */
95"Barts",
96"Caicos",
97"Cayman",
98"Turks",
99""
100};
101
102typedef struct {
103const char*name;
104uint8_tports;
105} card_config_t;
106
107static card_config_t card_configs[] = {
108{NULL,0},
109{"Alopias",2},
110{"Alouatta",4},
111{"Baboon",3},
112{"Cardinal",2},
113{"Caretta",1},
114{"Colobus",2},
115{"Douc",2},
116{"Eulemur",3},
117{"Flicker",3},
118{"Galago",2},
119{"Gliff",3},
120{"Hoolock",3},
121{"Hypoprion",2},
122{"Iago",2},
123{"Kakapo",3},
124{"Kipunji",4},
125{"Lamna",2},
126{"Langur",3},
127{"Megalodon",3},
128{"Motmot",2},
129{"Nomascus",5},
130{"Orangutan",2},
131{"Peregrine",2},
132{"Quail",3},
133{"Raven",3},
134{"Shrike",3},
135{"Sphyrna",1},
136{"Triakis",2},
137{"Uakari",4},
138{"Vervet",4},
139{"Zonalis",6},
140{"Pithecia",3},
141{"Bulrushes",6},
142{"Cattail",4},
143{"Hydrilla",5},
144{"Duckweed",4},
145{"Fanwort",4},
146{"Elodea",5},
147{"Kudzu",2},
148{"Gibba",5},
149{"Lotus",3},
150{"Ipomoea",3},
151{"Mangabey",2},
152{"Muskgrass",4},
153{"Juncus",4}
154};
155
156typedef enum {
157kNull,
158kAlopias,
159kAlouatta,
160kBaboon,
161kCardinal,
162kCaretta,
163kColobus,
164kDouc,
165kEulemur,
166kFlicker,
167kGalago,
168kGliff,
169kHoolock,
170kHypoprion,
171kIago,
172kKakapo,
173kKipunji,
174kLamna,
175kLangur,
176kMegalodon,
177kMotmot,
178kNomascus,
179kOrangutan,
180kPeregrine,
181kQuail,
182kRaven,
183kShrike,
184kSphyrna,
185kTriakis,
186kUakari,
187kVervet,
188kZonalis,
189kPithecia,
190kBulrushes,
191kCattail,
192kHydrilla,
193kDuckweed,
194kFanwort,
195kElodea,
196kKudzu,
197kGibba,
198kLotus,
199kIpomoea,
200kMangabey,
201kMuskgrass,
202kJuncus,
203kCfgEnd
204} config_name_t;
205
206typedef struct {
207uint16_tdevice_id;
208uint32_tsubsys_id;
209chip_family_tchip_family;
210const char*model_name;
211config_name_tcfg_name;
212uint8_tmax_ports;
213} radeon_card_info_t;
214
215static radeon_card_info_t radeon_cards[] = {
216
217// Earlier cards are not supported
218//
219// Layout is device_id, subsys_id (subsystem id plus vendor id), chip_family_name, display name, frame buffer
220// Cards are grouped by device id and vendor id then sorted by subsystem id to make it easier to add new cards
221//
222{ 0x9400,0x25521002, CHIP_FAMILY_R600,"ATI Radeon HD 2900 XT",kNull, 0 },
223{ 0x9400,0x30001002, CHIP_FAMILY_R600,"ATI Radeon HD 2900 PRO",kNull, 0 },
224
225{ 0x9440,0x24401682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot, 0 },
226{ 0x9440,0x24411682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot, 0 },
227{ 0x9440,0x24441682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot, 0 },
228{ 0x9440,0x24451682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot, 0 },
229
230{ 0x9441,0x24401682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870 X2",kMotmot, 0 },
231
232{ 0x9442,0x080110B0, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot, 0 },
233
234{ 0x9442,0x24701682, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot, 0 },
235{ 0x9442,0x24711682, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot, 0 },
236
237{ 0x9442,0xE104174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot, 0 },
238
239{ 0x944A,0x30001043, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
240
241{ 0x944A,0x30001458, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
242
243{ 0x944A,0x30001462, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
244
245{ 0x944A,0x30001545, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
246
247{ 0x944A,0x30001682, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
248
249{ 0x944A,0x3000174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
250
251{ 0x944A,0x30001787, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
252
253{ 0x944A,0x300017AF, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
254
255{ 0x944C,0x24801682, CHIP_FAMILY_RV770,"ATI Radeon HD 4830",kMotmot, 0 },
256{ 0x944C,0x24811682, CHIP_FAMILY_RV770,"ATI Radeon HD 4830",kMotmot, 0 },
257
258{ 0x944E,0x3260174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4810 Series",kMotmot, 0 },
259{ 0x944E,0x3261174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4810 series",kMotmot, 0 },
260
261{ 0x944E,0x30001787, CHIP_FAMILY_RV770,"ATI Radeon HD 4730 Series",kMotmot, 0 },
262{ 0x944E,0x30101787, CHIP_FAMILY_RV770,"ATI Radeon HD 4810 Series",kMotmot, 0 },
263{ 0x944E,0x31001787, CHIP_FAMILY_RV770,"ATI Radeon HD 4820",kMotmot, 0 },
264
265{ 0x9480,0x3628103C, CHIP_FAMILY_RV730,"ATI Radeon HD 4650M",kGliff, 2 },
266
267{ 0x9480,0x9035104D, CHIP_FAMILY_RV730,"ATI Radeon HD 4650M",kGliff, 0 },
268
269{ 0x9490,0x4710174B, CHIP_FAMILY_RV730,"ATI Radeon HD 4710",kNull, 0 },
270
271{ 0x9490,0x20031787, CHIP_FAMILY_RV730,"ATI Radeon HD 4670",kFlicker, 0 },
272{ 0x9490,0x30501787, CHIP_FAMILY_RV730,"ATI Radeon HD 4710",kNull, 0 },
273
274{ 0x9490,0x300017AF, CHIP_FAMILY_RV730,"ATI Radeon HD 4710",kNull, 0 },
275
276{ 0x9498,0x21CF1458, CHIP_FAMILY_RV730,"ATI Radeon HD 4600 Series",kNull, 0 },
277
278{ 0x9498,0x24511682, CHIP_FAMILY_RV730,"ATI Radeon HD 4650",kNull, 0 },
279{ 0x9498,0x24521682, CHIP_FAMILY_RV730,"ATI Radeon HD 4650",kNull, 0 },
280{ 0x9498,0x24541682, CHIP_FAMILY_RV730,"ATI Radeon HD 4650",kNull, 0 },
281{ 0x9498,0x29331682, CHIP_FAMILY_RV730,"ATI Radeon HD 4670",kNull, 0 },
282{ 0x9498,0x29341682, CHIP_FAMILY_RV730,"ATI Radeon HD 4670",kNull, 0 },
283
284{ 0x9498,0x30501787, CHIP_FAMILY_RV730,"ATI Radeon HD 4700",kNull, 0 },
285{ 0x9498,0x31001787, CHIP_FAMILY_RV730,"ATI Radeon HD 4720",kNull, 0 },
286
287{ 0x94B3,0x0D001002, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker, 0 },
288
289{ 0x94B3,0x29001682, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker, 0 },
290
291{ 0x94B3,0x1170174B, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker, 0 },
292
293{ 0x94C1,0x0D021002, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull, 0 },
294{ 0x94C1,0x10021002, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Pro",kNull, 0 },
295
296{ 0x94C1,0x0D021028, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull, 0 },
297
298{ 0x94C1,0x21741458, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull, 0 },
299
300{ 0x94C1,0x10331462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull, 0 },
301{ 0x94C1,0x10401462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull, 0 },
302{ 0x94C1,0x11101462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull, 0 },
303
304{ 0x94C3,0x03421002, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
305
306{ 0x94C3,0x30001025, CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull, 0 },
307
308{ 0x94C3,0x03021028, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
309{ 0x94C3,0x04021028, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
310
311{ 0x94C3,0x216A1458, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
312{ 0x94C3,0x21721458, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
313{ 0x94C3,0x30001458, CHIP_FAMILY_RV610,"ATI Radeon HD 3410",kNull, 0 },
314
315{ 0x94C3,0x10321462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
316{ 0x94C3,0x10411462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull, 0 },
317{ 0x94C3,0x11041462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull, 0 },
318{ 0x94C3,0x11051462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull, 0 },
319{ 0x94C3,0x30001462, CHIP_FAMILY_RV610,"ATI Radeon HD 3410",kNull, 0 },
320
321{ 0x94C3,0x2247148C, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 LE",kNull, 0 },
322{ 0x94C3,0x3000148C, CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull, 0 },
323
324{ 0x94C3,0x3000174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull, 0 },
325{ 0x94C3,0xE370174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
326{ 0x94C3,0xE400174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
327
328{ 0x94C3,0x203817AF, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull, 0 },
329
330{ 0x94C3,0x22471787, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 LE",kNull, 0 },
331{ 0x94C3,0x30001787, CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull, 0 },
332
333{ 0x94C3,0x01011A93, CHIP_FAMILY_RV610,"Qimonda Radeon HD 2400 PRO",kNull, 0 },
334
335{ 0x9501,0x25421002, CHIP_FAMILY_RV670,"ATI Radeon HD 3870",kNull, 0 },
336{ 0x9501,0x30001002, CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull, 0 },
337
338{ 0x9501,0x3000174B, CHIP_FAMILY_RV670,"Sapphire Radeon HD 3690",kNull, 0 },
339{ 0x9501,0x4750174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull, 0 },
340
341{ 0x9501,0x30001787, CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull, 0 },
342
343{ 0x9505,0x25421002, CHIP_FAMILY_RV670,"ATI Radeon HD 3850",kNull, 0 },
344{ 0x9505,0x30001002, CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull, 0 },
345
346{ 0x9505,0x30011043, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull, 0 },
347
348{ 0x9505,0x3000148C, CHIP_FAMILY_RV670,"ATI Radeon HD 3850",kNull, 0 },
349{ 0x9505,0x3001148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull, 0 },
350{ 0x9505,0x3002148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull, 0 },
351{ 0x9505,0x3003148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull, 0 },
352{ 0x9505,0x3004148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull, 0 },
353
354{ 0x9505,0x3000174B, CHIP_FAMILY_RV670,"Sapphire Radeon HD 3690",kNull, 0 },
355{ 0x9505,0x3001174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull, 0 },
356{ 0x9505,0x3010174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull, 0 },
357{ 0x9505,0x4730174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull, 0 },
358
359{ 0x9505,0x30001787, CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull, 0 },
360{ 0x9505,0x301017AF, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull, 0 },
361
362{ 0x9540,0x4590174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4590",kNull, 0 },
363
364{ 0x9540,0x30501787, CHIP_FAMILY_RV710,"ATI Radeon HD 4590",kNull, 0 },
365
366{ 0x954F,0x29201682, CHIP_FAMILY_RV710,"ATI Radeon HD 4550",kNull, 0 },
367{ 0x954F,0x29211682, CHIP_FAMILY_RV710,"ATI Radeon HD 4550",kNull, 0 },
368{ 0x954F,0x30901682, CHIP_FAMILY_RV710,"XFX Radeon HD 4570",kNull, 0 },
369
370{ 0x954F,0x30501787, CHIP_FAMILY_RV710,"ATI Radeon HD 4450",kNull, 0 },
371{ 0x954F,0x31001787, CHIP_FAMILY_RV710,"ATI Radeon HD 4520",kNull, 0 },
372
373{ 0x954F,0x3000174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4520",kNull, 0 },
374{ 0x954F,0x4450174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4450",kNull, 0 },
375{ 0x954F,0x4570174B, CHIP_FAMILY_RV710,"Sapphire Radeon HD 4570",kNull, 0 },
376{ 0x954F,0xE990174B, CHIP_FAMILY_RV710,"Sapphire Radeon HD 4350",kNull, 0 },
377
378{ 0x954F,0x301017AF, CHIP_FAMILY_RV710,"ATI Radeon HD 4450",kNull, 0 },
379
380{ 0x9552,0x04341028, CHIP_FAMILY_RV710,"ATI Mobility Radeon 4330",kShrike, 2 },
381
382{ 0x9552,0x308B103C, CHIP_FAMILY_RV710,"ATI Mobility Radeon HD 4300 Series", kShrike, 0 },
383
384{ 0x9552,0x3000148C, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull, 0 },
385
386{ 0x9552,0x3000174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull, 0 },
387
388{ 0x9552,0x30001787, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull, 0 },
389
390{ 0x9552,0x300017AF, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull, 0 },
391
392{ 0x9553,0x18751043, CHIP_FAMILY_RV710,"ATI Mobility Radeon HD 4570",kShrike, 0 },
393{ 0x9553,0x1B321043, CHIP_FAMILY_RV710,"ATI Mobility Radeon HD 4570",kShrike, 0 },
394
395{ 0x9581,0x95811002, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull, 0 },
396
397{ 0x9581,0x3000148C, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull, 0 },
398
399{ 0x9583,0x3000148C, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull, 0 },
400
401{ 0x9588,0x01021A93, CHIP_FAMILY_RV630,"Qimonda Radeon HD 2600 XT",kNull, 0 },
402
403{ 0x9589,0x30001462, CHIP_FAMILY_RV630,"ATI Radeon HD 3610",kNull, 0 },
404
405{ 0x9589,0x0E41174B, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull, 0 },
406
407{ 0x9589,0x30001787, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull, 0 },
408
409{ 0x9589,0x01001A93, CHIP_FAMILY_RV630,"Qimonda Radeon HD 2600 PRO",kNull, 0 },
410
411{ 0x9591,0x2303148C, CHIP_FAMILY_RV635,"ATI Radeon HD 3600 Series",kNull, 0 },
412
413{ 0x9598,0xB3831002, CHIP_FAMILY_RV635,"ATI All-in-Wonder HD",kNull, 0 },
414
415{ 0x9598,0x30001043, CHIP_FAMILY_RV635,"HD3730",kNull, 0 },
416{ 0x9598,0x30011043, CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull, 0 },
417
418{ 0x9598,0x3000148C, CHIP_FAMILY_RV635,"ATI Radeon HD 3730",kNull, 0 },
419{ 0x9598,0x3001148C, CHIP_FAMILY_RV635,"ATI Radeon HD 4580",kNull, 0 },
420{ 0x9598,0x3031148C, CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull, 0 },
421
422{ 0x9598,0x30001545, CHIP_FAMILY_RV635,"VisionTek Radeon HD 2600 XT",kNull, 0 },
423{ 0x9598,0x30011545, CHIP_FAMILY_RV635,"VisionTek Radeon HD 2600 Pro",kNull, 0 },
424
425{ 0x9598,0x3000174B, CHIP_FAMILY_RV635,"Sapphire Radeon HD 3730",kNull, 0 },
426{ 0x9598,0x3001174B, CHIP_FAMILY_RV635,"Sapphire Radeon HD 3750",kNull, 0 },
427{ 0x9598,0x4570174B, CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull, 0 },
428{ 0x9598,0x4580174B, CHIP_FAMILY_RV635,"ATI Radeon HD 4580",kNull, 0 },
429{ 0x9598,0x4610174B, CHIP_FAMILY_RV635,"ATI Radeon HD 4610",kNull, 0 },
430
431{ 0x9598,0x300117AF, CHIP_FAMILY_RV635,"ATI Radeon HD 3750",kNull, 0 },
432{ 0x9598,0x301017AF, CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull, 0 },
433{ 0x9598,0x301117AF, CHIP_FAMILY_RV635,"ATI Radeon HD 4580",kNull, 0 },
434
435{ 0x9598,0x30501787, CHIP_FAMILY_RV635,"ATI Radeon HD 4610",kNull, 0 },
436
437{ 0x95C0,0x3000148C, CHIP_FAMILY_RV620,"ATI Radeon HD 3550",kNull, 0 },
438
439{ 0x95C0,0xE3901745, CHIP_FAMILY_RV620,"ATI Radeon HD 3550",kNull, 0 },
440
441{ 0x95C0,0x3000174B, CHIP_FAMILY_RV620,"Sapphire Radeon HD 3550",kNull, 0 },
442{ 0x95C0,0x3002174B, CHIP_FAMILY_RV620,"ATI Radeon HD 3570",kNull, 0 },
443{ 0x95C0,0x3020174B, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull, 0 },
444
445{ 0x95C5,0x3000148C, CHIP_FAMILY_RV620,"ATI Radeon HD 3450",kNull, 0 },
446{ 0x95C5,0x3001148C, CHIP_FAMILY_RV620,"ATI Radeon HD 3550",kNull, 0 },
447{ 0x95C5,0x3002148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4230",kNull, 0 },
448{ 0x95C5,0x3003148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull, 0 },
449{ 0x95C5,0x3032148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull, 0 },
450{ 0x95C5,0x3033148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4230",kNull, 0 },
451
452{ 0x95C5,0x3010174B, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull, 0 },
453{ 0x95C5,0x4250174B, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull, 0 },
454
455{ 0x95C5,0x30501787, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull, 0 },
456
457{ 0x95C5,0x301017AF, CHIP_FAMILY_RV620,"ATI Radeon HD 4230",kNull, 0 },
458
459{ 0x95C5,0x01041A93, CHIP_FAMILY_RV620,"Qimonda Radeon HD 3450",kNull, 0 },
460{ 0x95C5,0x01051A93, CHIP_FAMILY_RV620,"Qimonda Radeon HD 3450",kNull, 0 },
461
462/* Evergreen */
463{ 0x6898,0x0B001002, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kZonalis, 0 },
464
465{ 0x6898,0x032E1043, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kUakari, 0 },
466
467{ 0x6898,0x00D0106B, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kLangur, 0 },
468
469{ 0x6898,0xE140174B, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kUakari, 0 },
470
471{ 0x6898,0x29611682, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kUakari, 0 },
472
473{ 0x6899,0x21E41458, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari, 0 },
474
475{ 0x6899,0xE140174B, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari, 0 },
476
477{ 0x6899,0x200A1787, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari, 0 },
478{ 0x6899,0x22901787, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari, 0 },
479
480{ 0x689C,0x03521043, CHIP_FAMILY_HEMLOCK,"ASUS ARES",kUakari, 0 },
481{ 0x689C,0x039E1043, CHIP_FAMILY_HEMLOCK,"ASUS EAH5870 Series",kUakari, 0 },
482
483{ 0x689C,0x30201682, CHIP_FAMILY_HEMLOCK,"ATI Radeon HD 5970",kUakari, 0 },
484
485{ 0x68A1,0x144D103C,CHIP_FAMILY_CYPRESS,"ATI Mobility Radeon HD 5850",kNomascus, 0 },
486{ 0x68A1,0x1522103C, CHIP_FAMILY_CYPRESS,"ATI Mobility Radeon HD 5850",kHoolock, 0 },
487
488{ 0x68A8,0x050E1025, CHIP_FAMILY_CYPRESS,"AMD Radeon HD 6850M",kUakari, 0 },
489
490{ 0x68B8,0x00CF106B, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kHoolock, 0 },
491
492{ 0x68B8,0x29901682, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 },
493{ 0x68B8,0x29911682, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 },
494
495{ 0x68B8,0x1482174B, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 },
496{ 0x68B8,0xE147174B, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 },
497
498{ 0x68B8,0x21D71458, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 },
499
500{ 0x68B8,0x200B1787, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 },
501{ 0x68B8,0x22881787, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 },
502
503{ 0x68C0,0x1594103C, CHIP_FAMILY_REDWOOD,"AMD Radeon HD 6570M",kNull, 0 },
504
505{ 0x68C0,0x392717AA, CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5730",kNull, 0 },
506
507{ 0x68C1,0x033E1025, CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5650",kNull, 0 },
508{ 0x68C1,0x9071104D,CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5650",kEulemur, 0 },
509
510{ 0x68C8,0x2306103C, CHIP_FAMILY_REDWOOD,"ATI FirePro V4800 (FireGL)",kNull, 0 },
511
512{ 0x68D8,0x03561043, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kBaboon, 0 },
513
514{ 0x68D8,0x21D91458, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kBaboon, 0 },
515
516{ 0x68D8,0x5690174B, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5690",kNull, 0 },
517{ 0x68D8,0x5730174B, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull, 0 },
518{ 0x68D8,0xE151174B, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kBaboon, 0 },
519
520{ 0x68D8,0x30001787, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull, 0 },
521
522{ 0x68D8,0x301017AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull, 0 },
523{ 0x68D8,0x301117AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5690",kNull, 0 },
524
525{ 0x68D9,0x301017AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull, 0 },
526
527{ 0x68DA,0x5630174B, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull, 0 },
528
529{ 0x68DA,0x30001787, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull, 0 },
530
531{ 0x68DA,0x301017AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull, 0 },
532
533{ 0x68E0,0x04561028, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470M",kEulemur, 0 },
534
535{ 0x68E0,0x1433103C, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470M",kEulemur, 0 },
536
537{ 0x68E1,0x1426103C, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5430M",kEulemur, 0 },
538
539{ 0x68F9,0x5470174B, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull, 0 },
540{ 0x68F9,0x5490174B, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5490",kNull, 0 },
541{ 0x68F9,0x5530174B, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5530",kNull, 0 },
542
543{ 0x68F9,0x20091787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5450",kEulemur, 0 },
544{ 0x68F9,0x22911787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5450",kEulemur, 0 },
545{ 0x68F9,0x30001787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull, 0 },
546{ 0x68F9,0x30011787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5530",kNull, 0 },
547{ 0x68F9,0x30021787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5490",kNull, 0 },
548
549{ 0x68F9,0x301117AF, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull, 0 },
550{ 0x68F9,0x301217AF, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5490",kNull, 0 },
551{ 0x68F9,0x301317AF, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull, 0 },
552
553/* Northen Islands */
554{ 0x6718,0x0B001002, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6970",kNull, 0 },
555{ 0x6718,0x67181002, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6970",kNull, 0 },
556
557{ 0x6718,0x31301682, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6970",kNull, 0 },
558
559{ 0x6738,0x67381002, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 },
560
561{ 0x6739,0x67391002, CHIP_FAMILY_BARTS,"AMD Radeon HD 6850",kDuckweed, 0 },
562
563{ 0x6739,0x21F81458, CHIP_FAMILY_BARTS,"AMD Radeon HD 6850",kDuckweed, 0 },
564
565{ 0x6740,0x1657103C, CHIP_FAMILY_TURKS,"AMD Radeon HD 6770M",kNull, 0 },
566
567{ 0x6741,0x050E1025, CHIP_FAMILY_TURKS,"AMD Radeon HD 6650M",kNull, 0 },
568{ 0x6741,0x05131025, CHIP_FAMILY_TURKS,"AMD Radeon HD 6650M",kNull, 0 },
569{ 0x6741,0x1646103C, CHIP_FAMILY_TURKS,"AMD Radeon HD 6750M",kNull, 0 },
570{ 0x6741,0x9080104D,CHIP_FAMILY_TURKS,"AMD Radeon HD 6630M",kNull, 0 },
571
572{ 0x6759,0xE193174B, CHIP_FAMILY_TURKS,"AMD Radeon HD 6570",kNull, 0 },
573
574{ 0x6760,0x04CC1028,CHIP_FAMILY_RV730,"AMD Radeon HD 6490M",kNull, 0 },
575{ 0x6760,0x1CB21043, CHIP_FAMILY_RV730,"AMD Radeon HD 6470M",kNull, 0 },
576
577/* standard/default models */
578{ 0x9400,0x00000000, CHIP_FAMILY_R600,"ATI Radeon HD 2900 XT",kNull, 0 },
579{ 0x9405,0x00000000, CHIP_FAMILY_R600,"ATI Radeon HD 2900 GT",kNull, 0 },
580
581{ 0x9440,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
582{ 0x9441,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4870 X2",kMotmot, 0 },
583{ 0x9442,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
584{ 0x9443,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4850 X2",kMotmot, 0 },
585{ 0x944C,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
586{ 0x944E,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4700 Series",kMotmot, 0 },
587
588{ 0x9450,0x00000000, CHIP_FAMILY_RV770,"AMD FireStream 9270",kMotmot, 0 },
589{ 0x9452,0x00000000, CHIP_FAMILY_RV770,"AMD FireStream 9250",kMotmot, 0 },
590
591{ 0x9460,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
592{ 0x9462,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
593
594{ 0x9490,0x00000000, CHIP_FAMILY_RV730,"ATI Radeon HD 4600 Series",kFlicker, 0 },
595{ 0x9498,0x00000000, CHIP_FAMILY_RV730,"ATI Radeon HD 4600 Series",kFlicker, 0 },
596
597{ 0x94B3,0x00000000, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker, 0 },
598{ 0x94B4,0x00000000, CHIP_FAMILY_RV740,"ATI Radeon HD 4700 Series",kFlicker, 0 },
599{ 0x94B5,0x00000000, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker, 0 },
600
601{ 0x94C1,0x00000000, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Series",kIago, 0 },
602{ 0x94C3,0x00000000, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Series",kIago, 0 },
603{ 0x94C7,0x00000000, CHIP_FAMILY_RV610,"ATI Radeon HD 2350",kIago, 0 },
604{ 0x94CC,0x00000000, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Series",kIago, 0 },
605
606{ 0x9501,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3800 Series",kMegalodon, 0 },
607{ 0x9505,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3800 Series",kMegalodon, 0 },
608{ 0x9507,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3830",kMegalodon, 0 },
609{ 0x950F,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3870 X2",kMegalodon, 0 },
610
611{ 0x9513,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3850 X2",kMegalodon, 0 },
612{ 0x9519,0x00000000, CHIP_FAMILY_RV670,"AMD FireStream 9170",kMegalodon, 0 },
613
614{ 0x9540,0x00000000, CHIP_FAMILY_RV710,"ATI Radeon HD 4550",kNull, 0 },
615{ 0x954F,0x00000000, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull, 0 },
616
617{ 0x9553,0x00000000, CHIP_FAMILY_RV710,"ATI Mobility Radeon HD 4500/5100 Series",kShrike , 0 },
618
619{ 0x9588,0x00000000, CHIP_FAMILY_RV630,"ATI Radeon HD 2600 XT",kLamna, 0 },
620{ 0x9589,0x00000000, CHIP_FAMILY_RV630,"ATI Radeon HD 2600 PRO",kLamna, 0 },
621{ 0x958A,0x00000000, CHIP_FAMILY_RV630,"ATI Radeon HD 2600 X2 Series",kLamna, 0 },
622
623{ 0x9598,0x00000000, CHIP_FAMILY_RV635,"ATI Radeon HD 3600 Series",kMegalodon, 0 },
624
625{ 0x95C0,0x00000000, CHIP_FAMILY_RV620,"ATI Radeon HD 3400 Series",kIago, 0 },
626{ 0x95C5,0x00000000, CHIP_FAMILY_RV620,"ATI Radeon HD 3400 Series",kIago, 0 },
627
628/* IGP */
629{ 0x9610,0x00000000, CHIP_FAMILY_RS780,"ATI Radeon HD 3200 Graphics",kNull, 0 },
630{ 0x9611,0x00000000, CHIP_FAMILY_RS780,"ATI Radeon 3100 Graphics",kNull, 0 },
631{ 0x9614,0x00000000, CHIP_FAMILY_RS780,"ATI Radeon HD 3300 Graphics",kNull, 0 },
632{ 0x9616,0x00000000, CHIP_FAMILY_RS780,"AMD 760G",kNull, 0 },
633
634{ 0x9710,0x00000000, CHIP_FAMILY_RS880,"ATI Radeon HD 4200",kNull, 0 },
635{ 0x9715,0x00000000, CHIP_FAMILY_RS880,"ATI Radeon HD 4250",kNull, 0 },
636{ 0x9714,0x00000000, CHIP_FAMILY_RS880,"ATI Radeon HD 4290",kNull, 0 },
637
638/* Evergreen */
639{ 0x688D,0x00000000, CHIP_FAMILY_CYPRESS,"AMD FireStream 9350",kUakari, 0 },
640
641{ 0x6898,0x00000000, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5800 Series",kUakari, 0 },
642{ 0x6899,0x00000000, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5800 Series",kUakari, 0 },
643{ 0x689C,0x00000000, CHIP_FAMILY_HEMLOCK,"ATI Radeon HD 5900 Series",kUakari, 0 },
644{ 0x689E,0x00000000, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5800 Series",kUakari, 0 },
645
646{ 0x68B8,0x00000000, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5700 Series",kVervet, 0 },
647{ 0x68B9,0x00000000, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5600 Series",kVervet, 0 },
648{ 0x68BE,0x00000000, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5700 Series",kVervet, 0 },
649
650{ 0x68D8,0x00000000, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5600 Series",kBaboon, 0 },
651{ 0x68D9,0x00000000, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5500 Series",kBaboon, 0 },
652{ 0x68DA,0x00000000, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5500 Series",kBaboon, 0 },
653
654{ 0x68F9,0x00000000, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5400 Series",kNull, 0 },
655
656/* Northen Islands */
657{ 0x6718,0x00000000, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6970 Series",kNull, 0 },
658{ 0x6719,0x00000000, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6950 Series",kNull, 0 },
659
660{ 0x6738,0x00000000, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870 Series",kDuckweed, 0 },
661{ 0x6739,0x00000000, CHIP_FAMILY_BARTS,"AMD Radeon HD 6850 Series",kDuckweed, 0 },
662{ 0x673E,0x00000000, CHIP_FAMILY_BARTS,"AMD Radeon HD 6790 Series",kNull, 0 },
663
664{ 0x6740,0x00000000, CHIP_FAMILY_TURKS,"AMD Radeon HD 6700M Series",kNull, 0 },
665{ 0x6741,0x00000000, CHIP_FAMILY_TURKS,"AMD Radeon HD 6600/6700M Series",kNull, 0 },
666
667{ 0x6758,0x00000000, CHIP_FAMILY_TURKS,"AMD Radeon HD 6670 Series",kNull, 0 },
668{ 0x6759,0x00000000, CHIP_FAMILY_TURKS,"AMD Radeon HD 6500 Series",kNull, 0 },
669
670{ 0x6770,0x00000000, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6400 Series",kNull, 0 },
671{ 0x6779,0x00000000, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6450 Series",kNull, 0 },
672
673{ 0x0000,0x00000000, CHIP_FAMILY_UNKNOW,NULL,kNull, 0 }
674};
675
676typedef struct {
677struct DevPropDevice*device;
678radeon_card_info_t*info;
679pci_dt_t*pci_dev;
680uint8_t*fb;
681uint8_t*mmio;
682uint8_t*io;
683uint8_t*rom;
684uint32_trom_size;
685uint32_tvram_size;
686const char*cfg_name;
687uint8_tports;
688uint32_tflags;
689boolposted;
690} card_t;
691card_t *card;
692
693/* Flags */
694#define MKFLAG(n)(1 << n)
695#define FLAGTRUEMKFLAG(0)
696#define EVERGREENMKFLAG(1)
697
698//static uint8_t atN = 0;
699
700typedef struct {
701type_ttype;
702uint32_tsize;
703uint8_t*data;
704} value_t;
705
706static value_t aty_name;
707static value_t aty_nameparent;
708//static value_t aty_model;
709
710#define DATVAL(x){kPtr, sizeof(x), (uint8_t *)x}
711#define STRVAL(x){kStr, sizeof(x), (uint8_t *)x}
712#define BYTVAL(x){kCst, 1, (uint8_t *)x}
713#define WRDVAL(x){kCst, 2, (uint8_t *)x}
714#define DWRVAL(x){kCst, 4, (uint8_t *)x}
715#define QWRVAL(x){kCst, 8, (uint8_t *)x}
716#define NULVAL{kNul, 0, (uint8_t *)NULL}
717
718bool get_bootdisplay_val(value_t *val);
719bool get_vrammemory_val(value_t *val);
720bool get_name_val(value_t *val);
721bool get_nameparent_val(value_t *val);
722bool get_model_val(value_t *val);
723bool get_conntype_val(value_t *val);
724bool get_vrammemsize_val(value_t *val);
725bool get_binimage_val(value_t *val);
726bool get_romrevision_val(value_t *val);
727bool get_deviceid_val(value_t *val);
728bool get_mclk_val(value_t *val);
729bool get_sclk_val(value_t *val);
730bool get_refclk_val(value_t *val);
731bool get_platforminfo_val(value_t *val);
732bool get_vramtotalsize_val(value_t *val);
733
734typedef struct {
735uint32_tflags;
736boolall_ports;
737char*name;
738bool(*get_value)(value_t *val);
739value_tdefault_val;
740} dev_prop_t;
741
742dev_prop_t ati_devprop_list[] = {
743{FLAGTRUE,false,"@0,AAPL,boot-display",get_bootdisplay_val,NULVAL},
744//{FLAGTRUE,false,"@0,ATY,EFIDisplay",NULL,STRVAL("TMDSA")},
745
746//{FLAGTRUE,true,"@0,AAPL,vram-memory",get_vrammemory_val,NULVAL},
747//{FLAGTRUE,true,"@0,compatible",get_name_val,NULVAL},
748//{FLAGTRUE,true,"@0,connector-type",get_conntype_val,NULVAL},
749//{FLAGTRUE,true,"@0,device_type",NULL,STRVAL("display")},
750//{FLAGTRUE,false,"@0,display-connect-flags", NULL,DWRVAL((uint32_t)0)},
751//{FLAGTRUE,true,"@0,display-type",NULL,STRVAL("NONE")},
752{FLAGTRUE,true,"@0,name",get_name_val,NULVAL},
753//{FLAGTRUE,true,"@0,VRAM,memsize",get_vrammemsize_val,NULVAL},
754
755//{FLAGTRUE,false,"AAPL,aux-power-connected", NULL,DWRVAL((uint32_t)1)},
756//{FLAGTRUE,false,"AAPL,backlight-control",NULL,DWRVAL((uint32_t)0)},
757{FLAGTRUE,false,"ATY,bin_image",get_binimage_val,NULVAL},
758{FLAGTRUE,false,"ATY,Copyright",NULL,STRVAL("Copyright AMD Inc. All Rights Reserved. 2005-2010") },
759{FLAGTRUE,false,"ATY,Card#",get_romrevision_val,NULVAL},
760{FLAGTRUE,false,"ATY,VendorID",NULL,WRDVAL((uint16_t)0x1002)},
761{FLAGTRUE,false,"ATY,DeviceID",get_deviceid_val,NULVAL},
762
763//{FLAGTRUE,false,"ATY,MCLK",get_mclk_val,NULVAL},
764//{FLAGTRUE,false,"ATY,SCLK",get_sclk_val,NULVAL},
765//{FLAGTRUE,false,"ATY,RefCLK",get_refclk_val,DWRVAL((uint32_t)0x0a8c)},
766
767//{FLAGTRUE,false,"ATY,PlatformInfo",get_platforminfo_val,NULVAL},
768
769{FLAGTRUE,false,"name",get_nameparent_val,NULVAL},
770{FLAGTRUE,false,"device_type",get_nameparent_val,NULVAL},
771{FLAGTRUE,false,"model",get_model_val,STRVAL("ATI Radeon")},
772//{FLAGTRUE,false,"VRAM,totalsize",get_vramtotalsize_val,NULVAL},
773
774{FLAGTRUE,false,NULL,NULL,NULVAL}
775};
776
777bool get_bootdisplay_val(value_t *val)
778{
779static uint32_t v = 0;
780
781if (v)
782return false;
783
784if (!card->posted)
785return false;
786
787v = 1;
788val->type = kCst;
789val->size = 4;
790val->data = (uint8_t *)&v;
791
792return true;
793}
794
795bool get_vrammemory_val(value_t *val)
796{
797return false;
798}
799
800bool get_name_val(value_t *val)
801{
802val->type = aty_name.type;
803val->size = aty_name.size;
804val->data = aty_name.data;
805
806return true;
807}
808
809bool get_nameparent_val(value_t *val)
810{
811val->type = aty_nameparent.type;
812val->size = aty_nameparent.size;
813val->data = aty_nameparent.data;
814
815return true;
816}
817
818bool get_model_val(value_t *val)
819{
820if (!card->info->model_name)
821return false;
822
823val->type = kStr;
824val->size = strlen(card->info->model_name) + 1;
825val->data = (uint8_t *)card->info->model_name;
826
827return true;
828}
829
830bool get_conntype_val(value_t *val)
831{
832//Connector types:
833//0x4 : DisplayPort
834//0x400: DL DVI-I
835//0x800: HDMI
836
837return false;
838}
839
840bool get_vrammemsize_val(value_t *val)
841{
842static int idx = -1;
843static uint64_t memsize;
844
845idx++;
846memsize = ((uint64_t)card->vram_size << 32);
847if (idx == 0)
848memsize = memsize | (uint64_t)card->vram_size;
849
850val->type = kCst;
851val->size = 8;
852val->data = (uint8_t *)&memsize;
853
854return true;
855}
856
857bool get_binimage_val(value_t *val)
858{
859if (!card->rom)
860return false;
861
862val->type = kPtr;
863val->size = card->rom_size;
864val->data = card->rom;
865
866return true;
867}
868
869bool get_romrevision_val(value_t *val)
870{
871uint8_t *rev;
872if (!card->rom)
873return false;
874
875rev = card->rom + *(uint8_t *)(card->rom + OFFSET_TO_GET_ATOMBIOS_STRINGS_START);
876
877val->type = kPtr;
878val->size = strlen((char *)rev);
879val->data = malloc(val->size);
880
881if (!val->data)
882return false;
883
884memcpy(val->data, rev, val->size);
885
886return true;
887}
888
889bool get_deviceid_val(value_t *val)
890{
891val->type = kCst;
892val->size = 2;
893val->data = (uint8_t *)&card->pci_dev->device_id;
894
895return true;
896}
897
898bool get_mclk_val(value_t *val)
899{
900return false;
901}
902
903bool get_sclk_val(value_t *val)
904{
905return false;
906}
907
908bool get_refclk_val(value_t *val)
909{
910return false;
911}
912
913bool get_platforminfo_val(value_t *val)
914{
915val->data = malloc(0x80);
916if (!val->data)
917return false;
918
919bzero(val->data, 0x80);
920
921val->type= kPtr;
922val->size= 0x80;
923val->data[0]= 1;
924
925return true;
926}
927
928bool get_vramtotalsize_val(value_t *val)
929{
930val->type = kCst;
931val->size = 4;
932val->data = (uint8_t *)&card->vram_size;
933
934return true;
935}
936
937void free_val(value_t *val)
938{
939if (val->type == kPtr)
940free(val->data);
941
942bzero(val, sizeof(value_t));
943}
944
945void devprop_add_list(dev_prop_t devprop_list[])
946{
947value_t *val = malloc(sizeof(value_t));
948int i, pnum;
949
950for (i = 0; devprop_list[i].name != NULL; i++)
951{
952if ((devprop_list[i].flags == FLAGTRUE) || (devprop_list[i].flags | card->flags))
953{
954if (devprop_list[i].get_value && devprop_list[i].get_value(val))
955{
956devprop_add_value(card->device, devprop_list[i].name, val->data, val->size);
957free_val(val);
958
959if (devprop_list[i].all_ports)
960{
961for (pnum = 1; pnum < card->ports; pnum++)
962{
963if (devprop_list[i].get_value(val))
964{
965devprop_list[i].name[1] = 0x30 + pnum; // convert to ascii
966devprop_add_value(card->device, devprop_list[i].name, val->data, val->size);
967free_val(val);
968}
969}
970devprop_list[i].name[1] = 0x30; // write back our "@0," for a next possible card
971}
972}
973else
974{
975if (devprop_list[i].default_val.type != kNul)
976{
977devprop_add_value(card->device, devprop_list[i].name,
978devprop_list[i].default_val.type == kCst ?
979(uint8_t *)&(devprop_list[i].default_val.data) : devprop_list[i].default_val.data,
980devprop_list[i].default_val.size);
981}
982
983if (devprop_list[i].all_ports)
984{
985for (pnum = 1; pnum < card->ports; pnum++)
986{
987if (devprop_list[i].default_val.type != kNul)
988{
989devprop_list[i].name[1] = 0x30 + pnum; // convert to ascii
990devprop_add_value(card->device, devprop_list[i].name,
991devprop_list[i].default_val.type == kCst ?
992(uint8_t *)&(devprop_list[i].default_val.data) : devprop_list[i].default_val.data,
993devprop_list[i].default_val.size);
994}
995}
996devprop_list[i].name[1] = 0x30; // write back our "@0," for a next possible card
997}
998}
999}
1000}
1001
1002free(val);
1003}
1004
1005bool validate_rom(option_rom_header_t *rom_header, pci_dt_t *pci_dev)
1006{
1007option_rom_pci_header_t *rom_pci_header;
1008
1009if (rom_header->signature != 0xaa55)
1010return false;
1011
1012rom_pci_header = (option_rom_pci_header_t *)((uint8_t *)rom_header + rom_header->pci_header_offset);
1013
1014if (rom_pci_header->signature != 0x52494350)
1015return false;
1016
1017if (rom_pci_header->vendor_id != pci_dev->vendor_id || rom_pci_header->device_id != pci_dev->device_id)
1018return false;
1019
1020return true;
1021}
1022
1023bool load_vbios_file(const char *key, uint16_t vendor_id, uint16_t device_id, uint32_t subsys_id)
1024{
1025int fd;
1026char file_name[24];
1027bool do_load = false;
1028
1029getBoolForKey(key, &do_load, &bootInfo->chameleonConfig);
1030if (!do_load)
1031return false;
1032
1033sprintf(file_name, "/Extra/%04x_%04x_%08x.rom", vendor_id, device_id, subsys_id);
1034if ((fd = open_bvdev("bt(0,0)", file_name, 0)) < 0)
1035return false;
1036
1037card->rom_size = file_size(fd);
1038card->rom = malloc(card->rom_size);
1039if (!card->rom)
1040return false;
1041
1042read(fd, (char *)card->rom, card->rom_size);
1043
1044if (!validate_rom((option_rom_header_t *)card->rom, card->pci_dev))
1045{
1046card->rom_size = 0;
1047card->rom = 0;
1048return false;
1049}
1050
1051card->rom_size = ((option_rom_header_t *)card->rom)->rom_size * 512;
1052
1053close(fd);
1054
1055return true;
1056}
1057
1058void get_vram_size(void)
1059{
1060chip_family_t chip_family = card->info->chip_family;
1061
1062card->vram_size = 0;
1063
1064if (chip_family >= CHIP_FAMILY_CEDAR)
1065// size in MB on evergreen
1066// XXX watch for overflow!!!
1067card->vram_size = RegRead32(R600_CONFIG_MEMSIZE) * 1024 * 1024;
1068else
1069if (chip_family >= CHIP_FAMILY_R600)
1070card->vram_size = RegRead32(R600_CONFIG_MEMSIZE);
1071}
1072
1073bool read_vbios(bool from_pci)
1074{
1075option_rom_header_t *rom_addr;
1076
1077if (from_pci)
1078{
1079rom_addr = (option_rom_header_t *)(pci_config_read32(card->pci_dev->dev.addr, PCI_ROM_ADDRESS) & ~0x7ff);
1080verbose(" @0x%x", rom_addr);
1081}
1082else
1083rom_addr = (option_rom_header_t *)0xc0000;
1084
1085if (!validate_rom(rom_addr, card->pci_dev))
1086return false;
1087
1088card->rom_size = rom_addr->rom_size * 512;
1089if (!card->rom_size)
1090return false;
1091
1092card->rom = malloc(card->rom_size);
1093if (!card->rom)
1094return false;
1095
1096memcpy(card->rom, (void *)rom_addr, card->rom_size);
1097
1098return true;
1099}
1100
1101bool read_disabled_vbios(void)
1102{
1103bool ret = false;
1104chip_family_t chip_family = card->info->chip_family;
1105
1106if (chip_family >= CHIP_FAMILY_RV770)
1107{
1108uint32_t viph_control= RegRead32(RADEON_VIPH_CONTROL);
1109uint32_t bus_cntl= RegRead32(RADEON_BUS_CNTL);
1110uint32_t d1vga_control= RegRead32(AVIVO_D1VGA_CONTROL);
1111uint32_t d2vga_control= RegRead32(AVIVO_D2VGA_CONTROL);
1112uint32_t vga_render_control = RegRead32(AVIVO_VGA_RENDER_CONTROL);
1113uint32_t rom_cntl= RegRead32(R600_ROM_CNTL);
1114uint32_t cg_spll_func_cntl= 0;
1115uint32_t cg_spll_status;
1116
1117// disable VIP
1118RegWrite32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));
1119
1120// enable the rom
1121RegWrite32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM));
1122
1123// Disable VGA mode
1124RegWrite32(AVIVO_D1VGA_CONTROL, (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));
1125RegWrite32(AVIVO_D2VGA_CONTROL, (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));
1126RegWrite32(AVIVO_VGA_RENDER_CONTROL, (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));
1127
1128if (chip_family == CHIP_FAMILY_RV730)
1129{
1130cg_spll_func_cntl = RegRead32(R600_CG_SPLL_FUNC_CNTL);
1131
1132// enable bypass mode
1133RegWrite32(R600_CG_SPLL_FUNC_CNTL, (cg_spll_func_cntl | R600_SPLL_BYPASS_EN));
1134
1135// wait for SPLL_CHG_STATUS to change to 1
1136cg_spll_status = 0;
1137while (!(cg_spll_status & R600_SPLL_CHG_STATUS))
1138cg_spll_status = RegRead32(R600_CG_SPLL_STATUS);
1139
1140RegWrite32(R600_ROM_CNTL, (rom_cntl & ~R600_SCK_OVERWRITE));
1141}
1142else
1143RegWrite32(R600_ROM_CNTL, (rom_cntl | R600_SCK_OVERWRITE));
1144
1145ret = read_vbios(true);
1146
1147// restore regs
1148if (chip_family == CHIP_FAMILY_RV730)
1149{
1150RegWrite32(R600_CG_SPLL_FUNC_CNTL, cg_spll_func_cntl);
1151
1152// wait for SPLL_CHG_STATUS to change to 1
1153cg_spll_status = 0;
1154while (!(cg_spll_status & R600_SPLL_CHG_STATUS))
1155cg_spll_status = RegRead32(R600_CG_SPLL_STATUS);
1156}
1157RegWrite32(RADEON_VIPH_CONTROL, viph_control);
1158RegWrite32(RADEON_BUS_CNTL, bus_cntl);
1159RegWrite32(AVIVO_D1VGA_CONTROL, d1vga_control);
1160RegWrite32(AVIVO_D2VGA_CONTROL, d2vga_control);
1161RegWrite32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);
1162RegWrite32(R600_ROM_CNTL, rom_cntl);
1163}
1164else
1165if (chip_family >= CHIP_FAMILY_R600)
1166{
1167uint32_t viph_control= RegRead32(RADEON_VIPH_CONTROL);
1168uint32_t bus_cntl= RegRead32(RADEON_BUS_CNTL);
1169uint32_t d1vga_control= RegRead32(AVIVO_D1VGA_CONTROL);
1170uint32_t d2vga_control= RegRead32(AVIVO_D2VGA_CONTROL);
1171uint32_t vga_render_control= RegRead32(AVIVO_VGA_RENDER_CONTROL);
1172uint32_t rom_cntl= RegRead32(R600_ROM_CNTL);
1173uint32_t general_pwrmgt= RegRead32(R600_GENERAL_PWRMGT);
1174uint32_t low_vid_lower_gpio_cntl= RegRead32(R600_LOW_VID_LOWER_GPIO_CNTL);
1175uint32_t medium_vid_lower_gpio_cntl = RegRead32(R600_MEDIUM_VID_LOWER_GPIO_CNTL);
1176uint32_t high_vid_lower_gpio_cntl= RegRead32(R600_HIGH_VID_LOWER_GPIO_CNTL);
1177uint32_t ctxsw_vid_lower_gpio_cntl= RegRead32(R600_CTXSW_VID_LOWER_GPIO_CNTL);
1178uint32_t lower_gpio_enable= RegRead32(R600_LOWER_GPIO_ENABLE);
1179
1180// disable VIP
1181RegWrite32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));
1182
1183// enable the rom
1184RegWrite32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM));
1185
1186// Disable VGA mode
1187RegWrite32(AVIVO_D1VGA_CONTROL, (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));
1188RegWrite32(AVIVO_D2VGA_CONTROL, (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));
1189RegWrite32(AVIVO_VGA_RENDER_CONTROL, (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));
1190RegWrite32(R600_ROM_CNTL, ((rom_cntl & ~R600_SCK_PRESCALE_CRYSTAL_CLK_MASK) | (1 << R600_SCK_PRESCALE_CRYSTAL_CLK_SHIFT) | R600_SCK_OVERWRITE));
1191RegWrite32(R600_GENERAL_PWRMGT, (general_pwrmgt & ~R600_OPEN_DRAIN_PADS));
1192RegWrite32(R600_LOW_VID_LOWER_GPIO_CNTL, (low_vid_lower_gpio_cntl & ~0x400));
1193RegWrite32(R600_MEDIUM_VID_LOWER_GPIO_CNTL, (medium_vid_lower_gpio_cntl & ~0x400));
1194RegWrite32(R600_HIGH_VID_LOWER_GPIO_CNTL, (high_vid_lower_gpio_cntl & ~0x400));
1195RegWrite32(R600_CTXSW_VID_LOWER_GPIO_CNTL, (ctxsw_vid_lower_gpio_cntl & ~0x400));
1196RegWrite32(R600_LOWER_GPIO_ENABLE, (lower_gpio_enable | 0x400));
1197
1198ret = read_vbios(true);
1199
1200// restore regs
1201RegWrite32(RADEON_VIPH_CONTROL, viph_control);
1202RegWrite32(RADEON_BUS_CNTL, bus_cntl);
1203RegWrite32(AVIVO_D1VGA_CONTROL, d1vga_control);
1204RegWrite32(AVIVO_D2VGA_CONTROL, d2vga_control);
1205RegWrite32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);
1206RegWrite32(R600_ROM_CNTL, rom_cntl);
1207RegWrite32(R600_GENERAL_PWRMGT, general_pwrmgt);
1208RegWrite32(R600_LOW_VID_LOWER_GPIO_CNTL, low_vid_lower_gpio_cntl);
1209RegWrite32(R600_MEDIUM_VID_LOWER_GPIO_CNTL, medium_vid_lower_gpio_cntl);
1210RegWrite32(R600_HIGH_VID_LOWER_GPIO_CNTL, high_vid_lower_gpio_cntl);
1211RegWrite32(R600_CTXSW_VID_LOWER_GPIO_CNTL, ctxsw_vid_lower_gpio_cntl);
1212RegWrite32(R600_LOWER_GPIO_ENABLE, lower_gpio_enable);
1213}
1214
1215return ret;
1216}
1217
1218bool radeon_card_posted(void)
1219{
1220uint32_t reg;
1221
1222// first check CRTCs
1223reg = RegRead32(RADEON_CRTC_GEN_CNTL) | RegRead32(RADEON_CRTC2_GEN_CNTL);
1224if (reg & RADEON_CRTC_EN)
1225return true;
1226
1227// then check MEM_SIZE, in case something turned the crtcs off
1228reg = RegRead32(R600_CONFIG_MEMSIZE);
1229if (reg)
1230return true;
1231
1232return false;
1233}
1234
1235#if 0
1236bool devprop_add_pci_config_space(void)
1237{
1238int offset;
1239
1240uint8_t *config_space = malloc(0x100);
1241if (!config_space)
1242return false;
1243
1244for (offset = 0; offset < 0x100; offset += 4)
1245config_space[offset / 4] = pci_config_read32(card->pci_dev->dev.addr, offset);
1246
1247devprop_add_value(card->device, "ATY,PCIConfigSpace", config_space, 0x100);
1248free(config_space);
1249
1250return true;
1251}
1252#endif
1253
1254static bool init_card(pci_dt_t *pci_dev)
1255{
1256booladd_vbios = true;
1257charname[24];
1258charname_parent[24];
1259inti;
1260intn_ports = 0;
1261
1262card = malloc(sizeof(card_t));
1263if (!card)
1264return false;
1265bzero(card, sizeof(card_t));
1266
1267card->pci_dev = pci_dev;
1268
1269for (i = 0; radeon_cards[i].device_id ; i++)
1270{
1271if (radeon_cards[i].device_id == pci_dev->device_id)
1272{
1273card->info = &radeon_cards[i];
1274if ((radeon_cards[i].subsys_id == 0x00000000) ||
1275(radeon_cards[i].subsys_id == pci_dev->subsys_id.subsys_id))
1276break;
1277}
1278}
1279
1280if (!card->info->device_id || !card->info->cfg_name)
1281{
1282printf("Unsupported card!\n");
1283return false;
1284}
1285
1286card->fb= (uint8_t *)(pci_config_read32(pci_dev->dev.addr, PCI_BASE_ADDRESS_0) & ~0x0f);
1287card->mmio= (uint8_t *)(pci_config_read32(pci_dev->dev.addr, PCI_BASE_ADDRESS_2) & ~0x0f);
1288card->io= (uint8_t *)(pci_config_read32(pci_dev->dev.addr, PCI_BASE_ADDRESS_4) & ~0x03);
1289
1290verbose("Framebuffer @0x%08X MMIO @0x%08XI/O Port @0x%08X ROM Addr @0x%08X\n",
1291card->fb, card->mmio, card->io, pci_config_read32(pci_dev->dev.addr, PCI_ROM_ADDRESS));
1292
1293card->posted = radeon_card_posted();
1294verbose("ATI card %s, ", card->posted ? "POSTed" : "non-POSTed");
1295
1296get_vram_size();
1297
1298getBoolForKey(kATYbinimage, &add_vbios, &bootInfo->chameleonConfig);
1299
1300if (add_vbios)
1301{
1302if (!load_vbios_file(kUseAtiROM, pci_dev->vendor_id, pci_dev->device_id, pci_dev->subsys_id.subsys_id))
1303{
1304verbose("reading VBIOS from %s", card->posted ? "legacy space" : "PCI ROM");
1305if (card->posted)
1306read_vbios(false);
1307else
1308read_disabled_vbios();
1309verbose("\n");
1310}
1311}
1312
1313//card->ports = 2; // default - Azi: default is card_configs
1314
1315if (card->info->chip_family >= CHIP_FAMILY_CEDAR)
1316{
1317card->flags |= EVERGREEN;
1318//card->ports = 3; //Azi: use the AtiPorts key if needed
1319}
1320
1321//atN = 0;
1322
1323// Check AtiConfig key for a framebuffer name,
1324card->cfg_name = getStringForKey(kAtiConfig, &bootInfo->chameleonConfig);
1325// if none,
1326if (!card->cfg_name)
1327{
1328// use cfg_name on radeon_cards, to retrive the default name from card_configs,
1329card->cfg_name = card_configs[card->info->cfg_name].name;
1330// and leave ports alone!
1331//card->ports = card_configs[card->info->cfg_name].ports;
1332
1333// which means one of the fb's or kNull
1334verbose("Framebuffer set to device's default: %s\n", card->cfg_name);
1335}
1336else
1337{
1338// else, use the fb name returned by AtiConfig.
1339verbose("(AtiConfig) Framebuffer set to: %s\n", card->cfg_name);
1340}
1341
1342// Check AtiPorts key for nr of ports,
1343card->ports = getIntForKey(kAtiPorts, &n_ports, &bootInfo->chameleonConfig);
1344// if a value bigger than 0 ?? is found, (do we need >= 0 ?? that's null FB on card_configs)
1345if (n_ports > 0)
1346{
1347card->ports = n_ports; // use it.
1348verbose("(AtiPorts) Nr of ports set to: %d\n", card->ports);
1349 }
1350else// if (card->cfg_name > 0) // do we want 0 ports if fb is kNull or mistyped ?
1351{
1352// use max_ports value on radeon_cards
1353card->ports = card->info->max_ports;
1354// if max_ports value is 0
1355if (card->ports <= 0)
1356{
1357// match cfg_name with card_configs list and retrive default nr of ports.
1358for (i = 0; i < kCfgEnd; i++)
1359{
1360if (strcmp(card->cfg_name, card_configs[i].name) == 0)
1361card->ports = card_configs[i].ports; // default
1362}
1363verbose("Nr of ports set to framebuffer's default: %d\n", card->ports);
1364}
1365else
1366{
1367verbose("Nr of ports set to card's ?? max: %d\n", card->ports);
1368}
1369}
1370//else
1371//card->ports = 2/1 ?; // set a min if 0 ports ?
1372//verbose("Nr of ports set to min: %d\n", card->ports);
1373
1374sprintf(name, "ATY,%s", card->cfg_name);
1375aty_name.type = kStr;
1376aty_name.size = strlen(name) + 1;
1377aty_name.data = (uint8_t *)name;
1378
1379sprintf(name_parent, "ATY,%sParent", card->cfg_name);
1380aty_nameparent.type = kStr;
1381aty_nameparent.size = strlen(name_parent) + 1;
1382aty_nameparent.data = (uint8_t *)name_parent;
1383
1384return true;
1385}
1386
1387bool setup_ati_devprop(pci_dt_t *ati_dev)
1388{
1389char *devicepath;
1390
1391if (!init_card(ati_dev))
1392return false;
1393
1394// -------------------------------------------------
1395// Find a better way to do this (in device_inject.c)
1396if (!string)
1397string = devprop_create_string();
1398
1399devicepath = get_pci_dev_path(ati_dev);
1400card->device = devprop_add_device(string, devicepath);
1401if (!card->device)
1402return false;
1403// -------------------------------------------------
1404
1405#if 0
1406uint64_t fb= (uint32_t)card->fb;
1407uint64_t mmio= (uint32_t)card->mmio;
1408uint64_t io= (uint32_t)card->io;
1409devprop_add_value(card->device, "ATY,FrameBufferOffset", &fb, 8);
1410devprop_add_value(card->device, "ATY,RegisterSpaceOffset", &mmio, 8);
1411devprop_add_value(card->device, "ATY,IOSpaceOffset", &io, 8);
1412#endif
1413
1414devprop_add_list(ati_devprop_list);
1415
1416// -------------------------------------------------
1417// Find a better way to do this (in device_inject.c)
1418//Azi: XXX tried to fix a malloc error in vain; this is related to XCode 4 compilation!
1419stringdata = malloc(sizeof(uint8_t) * string->length);
1420memcpy(stringdata, (uint8_t*)devprop_generate_string(string), string->length);
1421stringlength = string->length;
1422// -------------------------------------------------
1423
1424verbose("ATI %s %s %dMB (%s) [%04x:%04x] (subsys [%04x:%04x]):: %s\n",
1425chip_family_name[card->info->chip_family], card->info->model_name,
1426(uint32_t)(card->vram_size / (1024 * 1024)), card->cfg_name,
1427ati_dev->vendor_id, ati_dev->device_id,
1428ati_dev->subsys_id.subsys.vendor_id, ati_dev->subsys_id.subsys.device_id,
1429devicepath);
1430
1431free(card);
1432
1433return true;
1434}
1435

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