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Root/branches/meklort/i386/libsaio/usb.c

Source at commit 158 created 13 years 10 months ago.
By meklort, Update kernel patch routine, works on 10.6.0/1 kernel now. Fixed usb loop, and temperarily disabled legacy_off code
1/*␊
2 * usb.c␊
3 * ␊
4 *␊
5 * Created by mackerintel on 12/20/08.␊
6 * Copyright 2008 mackerintel. All rights reserved.␊
7 *␊
8 */␊
9␊
10#include "libsaio.h"␊
11#include "boot.h"␊
12#include "bootstruct.h"␊
13#include "pci.h"␊
14␊
15#ifndef DEBUG_USB␊
16#define DEBUG_USB 0␊
17#endif␊
18␊
19#if DEBUG_USB␊
20#define DBG(x...)␉printf(x)␊
21#else␊
22#define DBG(x...)␊
23#endif␊
24␊
25␊
26struct pciList␊
27{␊
28␉pci_dt_t* pciDev;␊
29␉struct pciList* next;␊
30};␊
31␊
32struct pciList* usbList = NULL;␊
33␊
34int legacy_off (pci_dt_t *pci_dev);␊
35int ehci_acquire (pci_dt_t *pci_dev);␊
36int uhci_reset (pci_dt_t *pci_dev);␊
37␊
38void notify_usb_dev(pci_dt_t *pci_dev)␊
39{␊
40␉struct pciList* current = usbList;␊
41␉if(!usbList)␊
42␉{␊
43␉␉usbList = (struct pciList*)malloc(sizeof(struct pciList));␊
44␉␉usbList->next = NULL;␊
45␉␉usbList->pciDev = pci_dev;␊
46␉}␊
47␉else {␊
48␉␉while(current != NULL && current->next != NULL)␊
49␉␉{␊
50␉␉␉current = current->next;␊
51␉␉}␊
52␉␉current->next = (struct pciList*)malloc(sizeof(struct pciList));␊
53␉␉current = current->next;␊
54␉␉␊
55␉␉current->pciDev = pci_dev;␊
56␉␉current->next = NULL;␊
57␉}␊
58␊
59␉␊
60␉␊
61␉␊
62}␊
63␊
64int usb_loop()␊
65{␊
66␉bool fix_ehci, fix_uhci, fix_usb, fix_legacy;␊
67␉fix_ehci = fix_uhci = fix_usb = fix_legacy = true;␊
68␉␊
69␉␊
70␉␊
71␉if (!getBoolForKey(kUSBBusFix, &fix_usb, &bootInfo->bootConfig))␊
72␉{␊
73␉␉fix_ehci = fix_uhci = fix_legacy = true;␉// Enable all if none set␊
74␉}␊
75␉else ␊
76␉{␊
77␉␉if(!getBoolForKey(kEHCIacquire, &fix_ehci, &bootInfo->bootConfig))␊
78␉␉{␊
79␉␉␉fix_ehci = false;␊
80␉␉}␊
81␉␉␊
82␉␉if(!getBoolForKey(kUHCIreset, &fix_uhci, &bootInfo->bootConfig))␊
83␉␉{␊
84␉␉␉fix_uhci = false;␊
85␉␉}␊
86␉␉␊
87␉␉if(!getBoolForKey(kLegacyOff, &fix_legacy, &bootInfo->bootConfig))␊
88␉␉{␊
89␉␉␉fix_legacy = false;␊
90␉␉}␊
91␊
92␉}␊
93␊
94␉␊
95␉struct pciList* current = usbList;␊
96␉while(current)␊
97␉{␊
98␉␉if(fix_uhci) uhci_reset(current->pciDev);␊
99␉␉if(fix_ehci) ehci_acquire(current->pciDev);␊
100␉␉//if(fix_legacy) legacy_off(current->pciDev);␊
101␊
102␉␉current = current->next;␊
103␉}␊
104␉␊
105␉return 1;␊
106}␊
107␊
108int legacy_off (pci_dt_t *pci_dev)␊
109{␊
110␉// Set usb legacy off modification by Signal64␊
111␉// NOTE: This *must* be called after the last file is loaded from the drive in the event that we are booting form usb.␊
112␉// NOTE2: This should be called after any getc() call. (aka, after the Wait=y keyworkd is used)␊
113␉// AKA: Make this run immediatly before the kernel is called␊
114␉uint32_t␉capaddr, opaddr; ␉␉␊
115␉uint8_t␉␉eecp;␉␉␉␊
116␉uint32_t␉usbcmd, usbsts, usbintr;␉␉␉␊
117␉uint32_t␉usblegsup, usblegctlsts;␉␉␊
118␉␊
119␉int isOSowned;␊
120␉int isBIOSowned;␊
121␉␊
122␉verbose("Setting Legacy USB Off on controller [%04x:%04x] at %02x:%2x.%x\n", ␊
123␉␉␉pci_dev->vendor_id, pci_dev->device_id,␊
124␉␉␉pci_dev->dev.bits.bus, pci_dev->dev.bits.dev, pci_dev->dev.bits.func);␊
125␉␊
126␉// capaddr = Capability Registers = dev.addr + offset stored in dev.addr + 0x10 (USBBASE)␊
127␉capaddr = pci_config_read32(pci_dev->dev.addr, 0x10);␉␊
128␉␊
129␉// opaddr = Operational Registers = capaddr + offset (8bit CAPLENGTH in Capability Registers + offset 0)␊
130␉opaddr = capaddr + *((unsigned char*)(capaddr)); ␉␉␊
131␉␊
132␉// eecp = EHCI Extended Capabilities offset = capaddr HCCPARAMS bits 15:8␊
133␉eecp=*((unsigned char*)(capaddr + 9));␊
134␉␊
135␉DBG("capaddr=%x opaddr=%x eecp=%x\n", capaddr, opaddr, eecp);␊
136␉␊
137␉usbcmd = *((unsigned int*)(opaddr));␉␉␉// Command Register␊
138␉usbsts = *((unsigned int*)(opaddr + 4));␉␉// Status Register␊
139␉usbintr = *((unsigned int*)(opaddr + 8));␉␉// Interrupt Enable Register␊
140␉␊
141␉DBG("usbcmd=%08x usbsts=%08x usbintr=%08x\n", usbcmd, usbsts, usbintr);␊
142␉␊
143␉// read PCI Config 32bit USBLEGSUP (eecp+0) ␊
144␉usblegsup = pci_config_read32(pci_dev->dev.addr, eecp);␊
145␉␊
146␉// informational only␊
147␉isBIOSowned = !!((usblegsup) & (1 << (16)));␊
148␉isOSowned = !!((usblegsup) & (1 << (24)));␊
149␉␊
150␉// read PCI Config 32bit USBLEGCTLSTS (eecp+4) ␊
151␉usblegctlsts = pci_config_read32(pci_dev->dev.addr, eecp + 4);␊
152␉␊
153␉DBG("usblegsup=%08x isOSowned=%d isBIOSowned=%d usblegctlsts=%08x\n", usblegsup, isOSowned, isBIOSowned, usblegctlsts);␊
154␉␊
155␉// Reset registers to Legacy OFF␊
156␉DBG("Clearing USBLEGCTLSTS\n");␊
157␉pci_config_write32(pci_dev->dev.addr, eecp + 4, 0);␉//usblegctlsts␊
158␉␊
159␉// if delay value is in milliseconds it doesn't appear to work. ␊
160␉// setting value to anything up to 65535 does not add the expected delay here.␊
161␉delay(100);␊
162␉␊
163␉usbcmd = *((unsigned int*)(opaddr));␊
164␉usbsts = *((unsigned int*)(opaddr + 4));␊
165␉usbintr = *((unsigned int*)(opaddr + 8));␊
166␉␊
167␉DBG("usbcmd=%08x usbsts=%08x usbintr=%08x\n", usbcmd, usbsts, usbintr);␊
168␉␊
169␉DBG("Clearing Registers\n");␊
170␉␊
171␉// clear registers to default␊
172␉usbcmd = (usbcmd & 0xffffff00);␊
173␉*((unsigned int*)(opaddr)) = usbcmd;␊
174␉*((unsigned int*)(opaddr + 8)) = 0;␉␉␉␉␉//usbintr - clear interrupt registers␊
175␉*((unsigned int*)(opaddr + 4)) = 0x1000;␉␉␉//usbsts - clear status registers ␉␊
176␉pci_config_write32(pci_dev->dev.addr, eecp, 1);␉␉//usblegsup␊
177␉␊
178␉// get the results␊
179␉usbcmd = *((unsigned int*)(opaddr));␊
180␉usbsts = *((unsigned int*)(opaddr + 4));␊
181␉usbintr = *((unsigned int*)(opaddr + 8));␊
182␉␊
183␉DBG("usbcmd=%08x usbsts=%08x usbintr=%08x\n", usbcmd, usbsts, usbintr);␊
184␉␊
185␉// read 32bit USBLEGSUP (eecp+0) ␊
186␉usblegsup = pci_config_read32(pci_dev->dev.addr, eecp);␊
187␉␊
188␉// informational only␊
189␉isBIOSowned = !!((usblegsup) & (1 << (16)));␊
190␉isOSowned = !!((usblegsup) & (1 << (24)));␊
191␉␊
192␉// read 32bit USBLEGCTLSTS (eecp+4) ␊
193␉usblegctlsts = pci_config_read32(pci_dev->dev.addr, eecp + 4);␊
194␉␊
195␉DBG("usblegsup=%08x isOSowned=%d isBIOSowned=%d usblegctlsts=%08x\n", usblegsup, isOSowned, isBIOSowned, usblegctlsts);␊
196␉␊
197␉verbose("Legacy USB Off Done\n");␉␊
198␉return 1;␊
199}␊
200␊
201␊
202␊
203int ehci_acquire (pci_dt_t *pci_dev)␊
204{␊
205␉int␉␉j, k;␊
206␉uint32_t␉base;␊
207␉uint8_t␉␉eecp;␊
208␉uint8_t␉␉legacy[8];␊
209␉bool␉␉isOwnershipConflict;␉␊
210␉bool␉␉alwaysHardBIOSReset;␊
211␊
212␉alwaysHardBIOSReset = false;␉␊
213␉if (!getBoolForKey(kEHCIhard, &alwaysHardBIOSReset, &bootInfo->bootConfig)) {␊
214␉␉alwaysHardBIOSReset = true;␊
215␉}␊
216␊
217␉pci_config_write16(pci_dev->dev.addr, 0x04, 0x0002);␊
218␉base = pci_config_read32(pci_dev->dev.addr, 0x10);␊
219␊
220␉verbose("EHCI controller [%04x:%04x] at %02x:%2x.%x DMA @%x\n", ␊
221␉␉pci_dev->vendor_id, pci_dev->device_id,␊
222␉␉pci_dev->dev.bits.bus, pci_dev->dev.bits.dev, pci_dev->dev.bits.func, ␊
223␉␉base);␊
224␊
225␉if (*((unsigned char*)base) < 0xc)␊
226␉{␊
227␉␉DBG("Config space too small: no legacy implementation\n");␊
228␉␉return 1;␊
229␉}␊
230␉eecp = *((unsigned char*)(base + 9));␊
231␉if (!eecp) {␊
232␉␉DBG("No extended capabilities: no legacy implementation\n");␊
233␉␉return 1;␊
234␉}␊
235␊
236␉DBG("eecp=%x\n",eecp);␊
237␊
238␉// bad way to do it␊
239␉// pci_conf_write(pci_dev->dev.addr, eecp, 4, 0x01000001);␊
240␉for (j = 0; j < 8; j++) {␊
241␉␉legacy[j] = pci_config_read8(pci_dev->dev.addr, eecp + j);␊
242␉␉DBG("%02x ", legacy[j]);␊
243␉}␊
244␉DBG("\n");␊
245␊
246␉//Real Job: based on orByte's AppleUSBEHCI.cpp␊
247␉//We try soft reset first - some systems hang on reboot with hard reset␊
248␉// Definitely needed during reboot on 10.4.6␊
249␊
250␉isOwnershipConflict = ((legacy[3] & 1 != 0) && (legacy[2] & 1 != 0));␊
251␉if (!alwaysHardBIOSReset && isOwnershipConflict) {␊
252␉␉DBG("EHCI - Ownership conflict - attempting soft reset ...\n");␊
253␉␉DBG("EHCI - toggle OS Ownership to 0\n");␊
254␉␉pci_config_write8(pci_dev->dev.addr, eecp + 3, 0);␊
255␉␉for (k = 0; k < 25; k++) {␊
256␉␉␉for (j = 0; j < 8; j++) {␊
257␉␉␉␉legacy[j] = pci_config_read8(pci_dev->dev.addr, eecp + j);␊
258␉␉␉}␊
259␉␉␉if (legacy[3] == 0) {␊
260␉␉␉␉break;␊
261␉␉␉}␊
262␉␉␉delay(10);␊
263␉␉}␊
264␉}␉␊
265␊
266␉DBG("Found USBLEGSUP_ID - value %x:%x - writing OSOwned\n", legacy[3],legacy[2]);␊
267␉pci_config_write8(pci_dev->dev.addr, eecp + 3, 1);␊
268␊
269␉// wait for kEHCI_USBLEGSUP_BIOSOwned bit to clear␊
270␉for (k = 0; k < 25; k++) {␊
271␉␉for (j = 0;j < 8; j++) {␊
272␉␉␉legacy[j] = pci_config_read8(pci_dev->dev.addr, eecp + j);␊
273␉␉}␊
274␉␉DBG ("%x:%x,",legacy[3],legacy[2]);␊
275␉␉if (legacy[2] == 0) {␊
276␉␉␉break;␊
277␉␉}␊
278␉␉delay(10);␊
279␉}␊
280␊
281␉for (j = 0;j < 8; j++) {␊
282␉␉legacy[j] = pci_config_read8(pci_dev->dev.addr, eecp + j);␊
283␉}␊
284␉isOwnershipConflict = ((legacy[2]) != 0);␊
285␉if (isOwnershipConflict) {␊
286␉␉// Soft reset has failed. Assume SMI being ignored␊
287␉␉// Hard reset␊
288␉␉// Force Clear BIOS BIT␊
289␉␉DBG("EHCI - Ownership conflict - attempting hard reset ...\n");␉␉␉␊
290␉␉DBG ("%x:%x\n",legacy[3],legacy[2]);␊
291␉␉DBG("EHCI - Force BIOS Ownership to 0\n");␊
292␊
293␉␉pci_config_write8(pci_dev->dev.addr, eecp + 2, 0);␊
294␉␉for (k = 0; k < 25; k++) {␊
295␉␉␉for (j = 0; j < 8; j++) {␊
296␉␉␉␉legacy[j] = pci_config_read8(pci_dev->dev.addr, eecp + j);␊
297␉␉␉}␊
298␉␉␉DBG ("%x:%x,",legacy[3],legacy[2]);␊
299␊
300␉␉␉if ((legacy[2]) == 0) {␊
301␉␉␉␉break;␊
302␉␉␉}␊
303␉␉␉delay(10);␉␊
304␉␉}␉␉␊
305␉␉// Disable further SMI events␊
306␉␉for (j = 4; j < 8; j++) {␊
307␉␉␉pci_config_write8(pci_dev->dev.addr, eecp + j, 0);␊
308␉␉}␊
309␉}␊
310␊
311␉for (j = 0; j < 8; j++) {␊
312␉␉legacy[j] = pci_config_read8(pci_dev->dev.addr, eecp + j);␊
313␉}␊
314␊
315␉DBG ("%x:%x\n",legacy[3],legacy[2]);␊
316␊
317␉// Final Ownership Resolution Check...␊
318␉if (legacy[2] & 1) {␉␉␉␉␉␊
319␉␉DBG("EHCI controller unable to take control from BIOS\n");␊
320␉␉return 0;␊
321␉}␊
322␊
323␉DBG("EHCI Acquire OS Ownership done\n");␉␊
324␉return 1;␊
325}␊
326␊
327int uhci_reset (pci_dt_t *pci_dev)␊
328{␊
329␉uint32_t base, port_base;␊
330␉␊
331␉base = pci_config_read32(pci_dev->dev.addr, 0x20);␊
332␉port_base = (base >> 5) & 0x07ff;␊
333␊
334␉verbose("UHCI controller [%04x:%04x] at %02x:%2x.%x base %x(%x)\n", ␊
335␉␉pci_dev->vendor_id, pci_dev->device_id,␊
336␉␉pci_dev->dev.bits.bus, pci_dev->dev.bits.dev, pci_dev->dev.bits.func, ␊
337␉␉port_base, base);␊
338␉␊
339␉pci_config_write16(pci_dev->dev.addr, 0xc0, 0x8f00);␊
340␊
341␉outw (port_base, 0x0002);␊
342␉delay(10);␊
343␉outw (port_base+4,0);␊
344␉delay(10);␊
345␉outw (port_base,0);␊
346␉return 1;␊
347}␊
348

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