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1/*␊
2 * Copyright (c) 1998-2009 Apple Computer, Inc. All rights reserved.␊
3 *␊
4 * @APPLE_LICENSE_HEADER_START@␊
5 * ␊
6 * The contents of this file constitute Original Code as defined in and␊
7 * are subject to the Apple Public Source License Version 1.1 (the␊
8 * "License"). You may not use this file except in compliance with the␊
9 * License. Please obtain a copy of the License at␊
10 * http://www.apple.com/publicsource and read it before using this file.␊
11 * ␊
12 * This Original Code and all software distributed under the License are␊
13 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER␊
14 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,␊
15 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,␊
16 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the␊
17 * License for the specific language governing rights and limitations␊
18 * under the License.␊
19 * ␊
20 * @APPLE_LICENSE_HEADER_END@␊
21 */␊
22␊
23#ifndef __LIBSAIO_MYSMBIOS_H␊
24#define __LIBSAIO_MYSMBIOS_H␊
25␊
26#include "SMBIOS.h"␊
27#include "fake_efi.h"␊
28␊
29#define kSMBIOSdefaults␉␉"SMBIOSdefaults"␉␊
30␊
31#define kSMBIOSRandomSerial␉"randomSerial"␊
32␊
33extern uint64_t smbios_p;␊
34␊
35typedef struct SMBAnchor␊
36{␊
37␉const SMBStructHeader *␉header;␊
38␉const uint8_t *␉␉␉next;␊
39␉const uint8_t *␉␉␉end;␊
40} SMBAnchor;␊
41␊
42#define SMB_ANCHOR_IS_VALID(x)␉\␊
43␉((x) && ((x)->header) && ((x)->next) && ((x)->end))␊
44␊
45#define SMB_ANCHOR_RESET(x)␉␉\␊
46␉bzero(x, sizeof(typedef struct SMBAnchor));␊
47␊
48//␊
49// BIOS Information (Type 0)␊
50//␊
51typedef struct SMBBIOSInformation {␊
52 SMB_STRUCT_HEADER // Type 0␊
53 SMBString vendor; // BIOS vendor name␊
54 SMBString version; // BIOS version␊
55 SMBWord startSegment; // BIOS segment start␊
56 SMBString releaseDate; // BIOS release date␊
57 SMBByte romSize; // (n); 64K * (n+1) bytes␊
58 SMBQWord characteristics; // supported BIOS functions␊
59} __attribute__((packed)) SMBBIOSInformation;␊
60␊
61#if UNUSED␊
62//␊
63// Base Board (Type 2)␊
64//␊
65typedef struct SMBBaseBoard {␊
66 SMB_STRUCT_HEADER // Type 2␊
67 SMBString␉manufacturer;␊
68 SMBString␉product;␊
69 SMBString␉version;␊
70 SMBString␉serialNumber;␊
71 SMBString␉assetTagNumber;␊
72 SMBByte␉␉featureFlags;␊
73 SMBString␉locationInChassis;␊
74 SMBWord␉␉chassisHandle;␊
75 SMBByte␉␉boardType;␊
76 SMBByte␉␉numberOfContainedHandles;␊
77␉// 0 - 255 contained handles go here but we do not include␊
78␉// them in our structure. Be careful to use numberOfContainedHandles␊
79␉// times sizeof(SMBWord) when computing the actual record size,␊
80␉// if you need it.␊
81} __attribute__((packed)) SMBBaseBoard;␊
82#endif␊
83␊
84// Values for boardType in Type 2 records␊
85enum {␊
86 kSMBBaseBoardUnknown␉␉␉␉= 0x01,␊
87 kSMBBaseBoardOther␉␉␉␉␉= 0x02,␊
88 kSMBBaseBoardServerBlade␉␉␉= 0x03,␊
89 kSMBBaseBoardConnectivitySwitch␉␉= 0x04,␊
90 kSMBBaseBoardSystemMgmtModule␉␉= 0x05,␊
91 kSMBBaseBoardProcessorModule␉␉= 0x06,␊
92 kSMBBaseBoardIOModule␉␉␉␉= 0x07,␊
93 kSMBBaseBoardMemoryModule␉␉␉= 0x08,␊
94 kSMBBaseBoardDaughter␉␉␉␉= 0x09,␊
95 kSMBBaseBoardMotherboard␉␉␉= 0x0A,␊
96 kSMBBaseBoardProcessorMemoryModule␉= 0x0B,␊
97 kSMBBaseBoardProcessorIOModule␉␉= 0x0C,␊
98 kSMBBaseBoardInterconnect␉␉␉= 0x0D,␊
99};␊
100␊
101␊
102//␊
103// System Enclosure (Type 3)␊
104//␊
105␊
106typedef struct SMBSystemEnclosure {␊
107 SMB_STRUCT_HEADER // Type 3␊
108 SMBString manufacturer;␊
109 SMBByte type;␊
110 SMBString version;␊
111 SMBString serialNumber;␊
112 SMBString assetTagNumber;␊
113 SMBByte bootupState;␊
114 SMBByte powerSupplyState;␊
115 SMBByte thermalState;␊
116 SMBByte securityStatus;␊
117 SMBDWord oemDefined;␊
118} __attribute__((packed)) SMBSystemEnclosure;␊
119␊
120//␊
121// Processor Information (Type 4)␊
122//␊
123␊
124typedef struct SMBProcessorInformation {␊
125 // 2.0+ spec (26 bytes)␊
126 SMB_STRUCT_HEADER // Type 4␊
127 SMBString socketDesignation;␊
128 SMBByte processorType; // CPU = 3␊
129 SMBByte processorFamily; // processor family enum␊
130 SMBString manufacturer;␊
131 SMBQWord processorID; // based on CPUID␊
132 SMBString processorVersion;␊
133 SMBByte voltage; // bit7 cleared indicate legacy mode␊
134 SMBWord externalClock; // external clock in MHz␊
135 SMBWord maximumClock; // max internal clock in MHz␊
136 SMBWord currentClock; // current internal clock in MHz␊
137 SMBByte status;␊
138 SMBByte processorUpgrade; // processor upgrade enum␊
139 // 2.1+ spec (32 bytes)␊
140 SMBWord L1CacheHandle;␊
141 SMBWord L2CacheHandle;␊
142 SMBWord L3CacheHandle;␊
143 // 2.3+ spec (35 bytes)␊
144 SMBString serialNumber;␊
145 SMBString assetTag;␊
146 SMBString partNumber;␊
147} __attribute__((packed)) SMBProcessorInformation;␊
148␊
149#define kSMBProcessorInformationMinSize 26␊
150␊
151//␊
152// Memory Module Information (Type 6)␊
153// Obsoleted since SMBIOS version 2.1␊
154//␊
155␊
156typedef struct SMBMemoryModule {␊
157 SMB_STRUCT_HEADER // Type 6␊
158 SMBString socketDesignation;␊
159 SMBByte bankConnections;␊
160 SMBByte currentSpeed;␊
161 SMBWord currentMemoryType;␊
162 SMBByte installedSize;␊
163 SMBByte enabledSize;␊
164 SMBByte errorStatus;␊
165} __attribute__((packed)) SMBMemoryModule;␊
166␊
167#define kSMBMemoryModuleSizeNotDeterminable 0x7D␊
168#define kSMBMemoryModuleSizeNotEnabled 0x7E␊
169#define kSMBMemoryModuleSizeNotInstalled 0x7F␊
170␊
171//␊
172// Cache Information (Type 7)␊
173//␊
174␊
175typedef struct SMBCacheInformation {␊
176 SMB_STRUCT_HEADER // Type 7␊
177 SMBString socketDesignation;␊
178 SMBWord cacheConfiguration;␊
179 SMBWord maximumCacheSize;␊
180 SMBWord installedSize;␊
181 SMBWord supportedSRAMType;␊
182 SMBWord currentSRAMType;␊
183 SMBByte cacheSpeed;␊
184 SMBByte errorCorrectionType;␊
185 SMBByte systemCacheType;␊
186 SMBByte associativity;␊
187} __attribute__((packed)) SMBCacheInformation;␊
188␊
189typedef struct SMBSystemSlot {␊
190 // 2.0+ spec (12 bytes)␊
191 SMB_STRUCT_HEADER // Type 9␊
192 SMBString slotDesignation;␊
193 SMBByte slotType;␊
194 SMBByte slotDataBusWidth;␊
195 SMBByte currentUsage;␊
196 SMBByte slotLength;␊
197 SMBWord slotID;␊
198 SMBByte slotCharacteristics1;␊
199 // 2.1+ spec (13 bytes)␊
200 SMBByte slotCharacteristics2;␊
201} __attribute__((packed)) SMBSystemSlot;␊
202␊
203//␊
204// Physical Memory Array (Type 16)␊
205//␊
206␊
207typedef struct SMBPhysicalMemoryArray {␊
208 // 2.1+ spec (15 bytes)␊
209 SMB_STRUCT_HEADER // Type 16␊
210 SMBByte physicalLocation; // physical location␊
211 SMBByte arrayUse; // the use for the memory array␊
212 SMBByte errorCorrection; // error correction/detection method␊
213 SMBDWord maximumCapacity; // maximum memory capacity in kilobytes␊
214 SMBWord errorHandle; // handle of a previously detected error␊
215 SMBWord numMemoryDevices; // number of memory slots or sockets␊
216} __attribute__((packed)) SMBPhysicalMemoryArray;␊
217␊
218// Memory Array - Use␊
219enum {␊
220 kSMBMemoryArrayUseOther = 0x01,␊
221 kSMBMemoryArrayUseUnknown = 0x02,␊
222 kSMBMemoryArrayUseSystemMemory = 0x03,␊
223 kSMBMemoryArrayUseVideoMemory = 0x04,␊
224 kSMBMemoryArrayUseFlashMemory = 0x05,␊
225 kSMBMemoryArrayUseNonVolatileMemory = 0x06,␊
226 kSMBMemoryArrayUseCacheMemory = 0x07␊
227};␊
228␊
229// Memory Array - Error Correction Types␊
230enum {␊
231 kSMBMemoryArrayErrorCorrectionTypeOther = 0x01,␊
232 kSMBMemoryArrayErrorCorrectionTypeUnknown = 0x02,␊
233 kSMBMemoryArrayErrorCorrectionTypeNone = 0x03,␊
234 kSMBMemoryArrayErrorCorrectionTypeParity = 0x04,␊
235 kSMBMemoryArrayErrorCorrectionTypeSingleBitECC = 0x05,␊
236 kSMBMemoryArrayErrorCorrectionTypeMultiBitECC = 0x06,␊
237 kSMBMemoryArrayErrorCorrectionTypeCRC = 0x07␊
238};␊
239␊
240//␊
241// Memory Device (Type 17)␊
242//␊
243␊
244typedef struct SMBMemoryDevice {␊
245 // 2.1+ spec (21 bytes)␊
246 SMB_STRUCT_HEADER // Type 17␊
247 SMBWord arrayHandle; // handle of the parent memory array␊
248 SMBWord errorHandle; // handle of a previously detected error␊
249 SMBWord totalWidth; // total width in bits; including ECC bits␊
250 SMBWord dataWidth; // data width in bits␊
251 SMBWord memorySize; // bit15 is scale, 0 = MB, 1 = KB␊
252 SMBByte formFactor; // memory device form factor␊
253 SMBByte deviceSet; // parent set of identical memory devices␊
254 SMBString deviceLocator; // labeled socket; e.g. "SIMM 3"␊
255 SMBString bankLocator; // labeled bank; e.g. "Bank 0" or "A"␊
256 SMBByte memoryType; // type of memory␊
257 SMBWord memoryTypeDetail; // additional detail on memory type␊
258 // 2.3+ spec (27 bytes)␊
259 SMBWord memorySpeed; // speed of device in MHz (0 for unknown)␊
260 SMBString manufacturer;␊
261 SMBString serialNumber;␊
262 SMBString assetTag;␊
263 SMBString partNumber;␊
264} __attribute__((packed)) SMBMemoryDevice;␊
265␊
266//␊
267// Firmware Volume Description (Apple Specific - Type 128)␊
268//␊
269␊
270enum {␊
271 FW_REGION_RESERVED = 0,␊
272 FW_REGION_RECOVERY = 1,␊
273 FW_REGION_MAIN = 2,␊
274 FW_REGION_NVRAM = 3,␊
275 FW_REGION_CONFIG = 4,␊
276 FW_REGION_DIAGVAULT = 5,␊
277␊
278 NUM_FLASHMAP_ENTRIES = 8␊
279};␊
280␊
281typedef struct FW_REGION_INFO␊
282{␊
283 SMBDWord StartAddress;␊
284 SMBDWord EndAddress;␊
285} __attribute__((packed)) FW_REGION_INFO;␊
286␊
287typedef struct SMBFirmwareVolume {␊
288 SMB_STRUCT_HEADER // Type 128␊
289 SMBByte RegionCount;␊
290 SMBByte Reserved[3];␊
291 SMBDWord FirmwareFeatures;␊
292 SMBDWord FirmwareFeaturesMask;␊
293 SMBByte RegionType[ NUM_FLASHMAP_ENTRIES ];␊
294 FW_REGION_INFO FlashMap[ NUM_FLASHMAP_ENTRIES ];␊
295} __attribute__((packed)) SMBFirmwareVolume;␊
296␊
297//␊
298// Memory SPD Data (Apple Specific - Type 130)␊
299//␊
300␊
301typedef struct SMBMemorySPD {␊
302␉SMB_STRUCT_HEADER // Type 130␊
303␉SMBWord Type17Handle;␊
304␉SMBWord Offset;␊
305␉SMBWord Size;␊
306␉SMBWord Data[];␊
307} __attribute__((packed)) SMBMemorySPD;␊
308␊
309static const char *␊
310SMBMemoryDeviceTypes[] =␊
311{␊
312 "RAM", /* 00h Undefined */␊
313 "RAM", /* 01h Other */␊
314 "RAM", /* 02h Unknown */␊
315 "DRAM", /* 03h DRAM */␊
316 "EDRAM", /* 04h EDRAM */␊
317 "VRAM", /* 05h VRAM */␊
318 "SRAM", /* 06h SRAM */␊
319 "RAM", /* 07h RAM */␊
320 "ROM", /* 08h ROM */␊
321 "FLASH", /* 09h FLASH */␊
322 "EEPROM", /* 0Ah EEPROM */␊
323 "FEPROM", /* 0Bh FEPROM */␊
324 "EPROM", /* 0Ch EPROM */␊
325 "CDRAM", /* 0Dh CDRAM */␊
326 "3DRAM", /* 0Eh 3DRAM */␊
327 "SDRAM", /* 0Fh SDRAM */␊
328 "SGRAM", /* 10h SGRAM */␊
329 "RDRAM", /* 11h RDRAM */␊
330 "DDR SDRAM", /* 12h DDR */␊
331 "DDR2 SDRAM", /* 13h DDR2 */␊
332 "DDR2 FB-DIMM", /* 14h DDR2 FB-DIMM */␊
333 "RAM",␉␉␉/* 15h unused */␊
334 "RAM",␉␉␉/* 16h unused */␊
335 "RAM",␉␉␉/* 17h unused */␊
336 "DDR3",␉␉␉/* 18h DDR3, chosen in [5776134] */␊
337};␊
338␊
339static const int␊
340kSMBMemoryDeviceTypeCount = sizeof(SMBMemoryDeviceTypes) /␊
341 sizeof(SMBMemoryDeviceTypes[0]);␊
342␊
343//␊
344// OEM Processor Type (Apple Specific - Type 131)␊
345//␊
346␊
347typedef struct SMBOemProcessorType {␊
348␉SMB_STRUCT_HEADER␊
349␉SMBWord ProcessorType;␊
350} __attribute__((packed)) SMBOemProcessorType;␊
351␊
352//␊
353// OEM Processor Bus Speed (Apple Specific - Type 132)␊
354//␊
355typedef struct SMBOemProcessorBusSpeed {␊
356␉SMB_STRUCT_HEADER␊
357␉SMBWord ProcessorBusSpeed; // MT/s unit␊
358} __attribute__((packed)) SMBOemProcessorBusSpeed;␊
359␊
360extern void readSMBIOSInfo(SMBEntryPoint *eps);␊
361extern SMBEntryPoint * setupSMBIOSTable(SMBEntryPoint *origeps);␊
362extern void decodeSMBIOSTable(SMBEntryPoint *eps);␊
363extern const char *getDefaultSMBproductName(void);␊
364extern const char *getDefaultSMBBoardProduct(void);␊
365extern const char *getSMBStringForField(SMBStructHeader *structHeader, uint8_t field);␊
366␊
367#endif /* !__LIBSAIO_MYSMBIOS_H */␊
368

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