1 | ␊ |
2 | /* Copied from 915 resolution created by steve tomljenovic␊ |
3 | *␊ |
4 | * This code is based on the techniques used in :␊ |
5 | *␊ |
6 | * - 855patch. Many thanks to Christian Zietz (czietz gmx net)␊ |
7 | * for demonstrating how to shadow the VBIOS into system RAM␊ |
8 | * and then modify it.␊ |
9 | *␊ |
10 | * - 1280patch by Andrew Tipton (andrewtipton null li).␊ |
11 | *␊ |
12 | * - 855resolution by Alain Poirier␊ |
13 | *␊ |
14 | * This source code is into the public domain.␊ |
15 | */␊ |
16 | ␊ |
17 | #include "libsaio.h"␊ |
18 | #include "915resolution.h"␊ |
19 | ␊ |
20 | char * chipset_type_names[] = {␊ |
21 | ␉"UNKNOWN", "830", "845G", "855GM", "865G", "915G", "915GM", "945G", "945GM", "945GME",␊ |
22 | ␉"946GZ", "G965", "Q965", "965GM", "500"␊ |
23 | };␊ |
24 | ␊ |
25 | char * bios_type_names[] = {"UNKNOWN", "TYPE 1", "TYPE 2", "TYPE 3"};␊ |
26 | ␊ |
27 | int freqs[] = { 60, 75, 85 };␊ |
28 | ␊ |
29 | UInt32 get_chipset_id(void) {␊ |
30 | ␉outl(0xcf8, 0x80000000);␊ |
31 | ␉return inl(0xcfc);␊ |
32 | }␊ |
33 | ␊ |
34 | chipset_type get_chipset(UInt32 id) {␊ |
35 | ␉chipset_type type;␊ |
36 | ␉␊ |
37 | ␉switch (id) {␊ |
38 | ␉␉case 0x35758086:␊ |
39 | ␉␉␉type = CT_830;␊ |
40 | ␉␉␉break;␊ |
41 | ␉␉␊ |
42 | ␉␉case 0x25608086:␊ |
43 | ␉␉␉type = CT_845G;␊ |
44 | ␉␉␉break;␊ |
45 | ␉␉␉␉␊ |
46 | ␉␉case 0x35808086:␊ |
47 | ␉␉␉type = CT_855GM;␊ |
48 | ␉␉␉break;␊ |
49 | ␉␉␉␉␊ |
50 | ␉␉case 0x25708086:␊ |
51 | ␉␉␉type = CT_865G;␊ |
52 | ␉␉␉break;␊ |
53 | ␉␉␊ |
54 | ␉␉case 0x25808086:␊ |
55 | ␉␉␉type = CT_915G;␊ |
56 | ␉␉␉break;␊ |
57 | ␉␉␉␊ |
58 | ␉␉case 0x25908086:␊ |
59 | ␉␉␉type = CT_915GM;␊ |
60 | ␉␉␉break;␊ |
61 | ␉␉␉␊ |
62 | ␉␉case 0x27708086:␊ |
63 | ␉␉␉type = CT_945G;␊ |
64 | ␉␉␉break;␊ |
65 | ␉␉␊ |
66 | ␉␉case 0x27a08086:␊ |
67 | ␉␉␉type = CT_945GM;␊ |
68 | ␉␉␉break;␊ |
69 | ␊ |
70 | ␉␉case 0x27a68086:␊ |
71 | ␉␉␉type = CT_945GM;␊ |
72 | ␉␉␉break;␊ |
73 | ␊ |
74 | ␉␉case 0x27ac8086:␊ |
75 | ␉␉␉type = CT_945GME;␊ |
76 | ␉␉␉break;␊ |
77 | ␊ |
78 | ␉␉case 0x27ae8086:␊ |
79 | ␉␉␉type = CT_945GM;␊ |
80 | ␉␉␉break;␊ |
81 | ␊ |
82 | ␉␉case 0x29708086:␊ |
83 | ␉␉␉type = CT_946GZ;␊ |
84 | ␉␉␉break;␊ |
85 | ␉␉␉␊ |
86 | ␉␉case 0x29a08086:␊ |
87 | ␉␉␉type = CT_G965;␊ |
88 | ␉␉␉break;␊ |
89 | ␉␉␉␊ |
90 | ␉␉case 0x29908086:␊ |
91 | ␉␉␉type = CT_Q965;␊ |
92 | ␉␉␉break;␊ |
93 | ␉␉␉␊ |
94 | ␉␉case 0x81008086:␊ |
95 | ␉␉␉type = CT_500;␊ |
96 | ␉␉␉break;␊ |
97 | ␉␉␉␊ |
98 | ␉␉case 0x2a008086:␊ |
99 | ␉␉␉type = CT_965GM;␊ |
100 | ␉␉␉break;␊ |
101 | ␉␉␉␊ |
102 | ␉␉␉␊ |
103 | ␉␉default:␊ |
104 | ␉␉␉type = CT_UNKWN;␊ |
105 | ␉␉␉break;␊ |
106 | ␉}␊ |
107 | ␉return type;␊ |
108 | }␊ |
109 | ␊ |
110 | vbios_resolution_type1 * map_type1_resolution(vbios_map * map, UInt16 res) {␊ |
111 | ␉vbios_resolution_type1 * ptr = ((vbios_resolution_type1*)(map->bios_ptr + res)); ␊ |
112 | ␉return ptr;␊ |
113 | }␊ |
114 | ␊ |
115 | vbios_resolution_type2 * map_type2_resolution(vbios_map * map, UInt16 res) {␊ |
116 | ␉vbios_resolution_type2 * ptr = ((vbios_resolution_type2*)(map->bios_ptr + res)); ␊ |
117 | ␉return ptr;␊ |
118 | }␊ |
119 | ␊ |
120 | vbios_resolution_type3 * map_type3_resolution(vbios_map * map, UInt16 res) {␊ |
121 | ␉vbios_resolution_type3 * ptr = ((vbios_resolution_type3*)(map->bios_ptr + res)); ␊ |
122 | ␉return ptr;␊ |
123 | }␊ |
124 | ␊ |
125 | char detect_bios_type(vbios_map * map, char modeline, int entry_size) {␊ |
126 | ␉UInt32 i;␊ |
127 | ␉UInt16 r1, r2;␊ |
128 | ␉ ␊ |
129 | ␉r1 = r2 = 32000;␊ |
130 | ␉␊ |
131 | ␉for (i=0; i < map->mode_table_size; i++) {␊ |
132 | ␉␉if (map->mode_table[i].resolution <= r1) {␊ |
133 | ␉␉␉r1 = map->mode_table[i].resolution;␊ |
134 | ␉␉}␊ |
135 | ␉␉else {␊ |
136 | ␉␉␉if (map->mode_table[i].resolution <= r2) {␊ |
137 | ␉␉␉␉r2 = map->mode_table[i].resolution;␊ |
138 | ␉␉␉}␊ |
139 | ␉␉}␊ |
140 | ␉␉␊ |
141 | ␉␉/*printf("r1 = %d r2 = %d\n", r1, r2);*/␊ |
142 | ␉}␊ |
143 | ␊ |
144 | ␉return (r2-r1-6) % entry_size == 0;␊ |
145 | }␊ |
146 | ␊ |
147 | void close_vbios(vbios_map * map);␊ |
148 | ␊ |
149 | vbios_map * open_vbios(chipset_type forced_chipset) {␊ |
150 | ␉UInt32 z;␊ |
151 | ␉vbios_map * map = NEW(vbios_map);␊ |
152 | ␉for(z=0; z<sizeof(vbios_map); z++) ((char*)map)[z]=0;␊ |
153 | ␉/*␊ |
154 | ␉ * Determine chipset␊ |
155 | ␉␉ + */␊ |
156 | ␉␊ |
157 | ␉if (forced_chipset == CT_UNKWN) {␊ |
158 | ␉␉map->chipset_id = get_chipset_id();␊ |
159 | ␉␉map->chipset = get_chipset(map->chipset_id);␊ |
160 | ␉}␊ |
161 | ␉else if (forced_chipset != CT_UNKWN) {␊ |
162 | ␉␉map->chipset = forced_chipset;␊ |
163 | ␉}␊ |
164 | ␉else {␊ |
165 | ␉␉map->chipset = CT_915GM;␊ |
166 | ␉}␊ |
167 | ␉ ␊ |
168 | ␉/*␊ |
169 | ␉ * Map the video bios to memory␊ |
170 | ␉ */␊ |
171 | ␉␊ |
172 | ␉map->bios_ptr=(char*)VBIOS_START;␊ |
173 | ␉␊ |
174 | ␉/*␊ |
175 | ␉ * check if we have ATI Radeon␊ |
176 | ␉ */␊ |
177 | ␉ ␊ |
178 | ␉/*if (memmem(map->bios_ptr, VBIOS_SIZE, ATI_SIGNATURE1, strlen(ATI_SIGNATURE1)) ||␊ |
179 | ␉␉memmem(map->bios_ptr, VBIOS_SIZE, ATI_SIGNATURE2, strlen(ATI_SIGNATURE2)) ) {␊ |
180 | ␉␉printf(stderr, "ATI chipset detected. 915resolution only works with Intel 800/900 series graphic chipsets.\n");␊ |
181 | ␉␉return 0;␊ |
182 | ␉}*/␊ |
183 | ␉␊ |
184 | ␉/*␊ |
185 | ␉ * check if we have NVIDIA␊ |
186 | ␉ */␊ |
187 | ␉ ␊ |
188 | ␉/*if (memmem(map->bios_ptr, VBIOS_SIZE, NVIDIA_SIGNATURE, strlen(NVIDIA_SIGNATURE))) {␊ |
189 | ␉␉printf("NVIDIA chipset detected. 915resolution only works with Intel 800/900 series graphic chipsets.\n");␊ |
190 | ␉␉return 0;␊ |
191 | ␉}*/␊ |
192 | ␉␊ |
193 | ␉/*␊ |
194 | ␉ * check if we have Intel␊ |
195 | ␉ */␊ |
196 | ␉ ␊ |
197 | ␉/*if (map->chipset == CT_UNKWN && memmem(map->bios_ptr, VBIOS_SIZE, INTEL_SIGNATURE, strlen(INTEL_SIGNATURE))) {␊ |
198 | ␉␉printf( "Intel chipset detected. However, 915resolution was unable to determine the chipset type.\n");␊ |
199 | ␉␊ |
200 | ␉␉printf("Chipset Id: %x\n", map->chipset_id);␊ |
201 | ␉␉␊ |
202 | ␉␉printf("Please report this problem to stomljen@yahoo.com\n");␊ |
203 | ␉␉␊ |
204 | ␉␉␉close_vbios(map);␊ |
205 | ␉␉␉return 0;␊ |
206 | ␉␉}*/␊ |
207 | ␉␊ |
208 | ␉␉/*␊ |
209 | ␉␉ * check for others␊ |
210 | ␉␉ */␊ |
211 | ␉␊ |
212 | ␉if (map->chipset == CT_UNKWN) {␊ |
213 | ␉␉/*␊ |
214 | ␉␉printf("Unknown chipset type and unrecognized bios.\n");␊ |
215 | ␉␉ ␊ |
216 | ␉␉printf("915resolution only works with Intel 800/900 series graphic chipsets.\n");␊ |
217 | ␉␉*/␊ |
218 | ␉␉printf("Chipset Id: %x\n", map->chipset_id);␊ |
219 | ␉␉close_vbios(map);␊ |
220 | ␉␉return 0;␊ |
221 | ␉}␊ |
222 | ␊ |
223 | ␉/*␊ |
224 | ␉ * Figure out where the mode table is ␊ |
225 | ␉ */␊ |
226 | ␉␊ |
227 | ␉{␊ |
228 | ␉␉char* p = map->bios_ptr + 16;␊ |
229 | ␉␉char* limit = map->bios_ptr + VBIOS_SIZE - (3 * sizeof(vbios_mode));␊ |
230 | ␉␉␉␊ |
231 | ␉␉while (p < limit && map->mode_table == 0) {␊ |
232 | ␉␉␉vbios_mode * mode_ptr = (vbios_mode *) p;␊ |
233 | ␉␉␉ ␊ |
234 | ␉␉␉if (((mode_ptr[0].mode & 0xf0) == 0x30) && ((mode_ptr[1].mode & 0xf0) == 0x30) &&␊ |
235 | ␉␉␉␉((mode_ptr[2].mode & 0xf0) == 0x30) && ((mode_ptr[3].mode & 0xf0) == 0x30)) {␊ |
236 | ␉␉␉␊ |
237 | ␉␉␉␉map->mode_table = mode_ptr;␊ |
238 | ␉␉␉}␊ |
239 | ␉␉␉ ␊ |
240 | ␉␉␉p++;␊ |
241 | ␉␉}␊ |
242 | ␉␉␊ |
243 | ␉␉if (map->mode_table == 0) {␊ |
244 | ␉␉␉printf("Unable to locate the mode table.\n");␊ |
245 | ␉␉␉printf("Please run the program 'dump_bios' as root and\n");␊ |
246 | ␉␉␉printf("email the file 'vbios.dmp' to stomljen@yahoo.com.\n");␊ |
247 | ␉␉␉printf("Chipset: %s\n", chipset_type_names[map->chipset]);␊ |
248 | ␉␉␉close_vbios(map);␊ |
249 | ␉␉␉return 0;␊ |
250 | ␉␉}␊ |
251 | ␉}␊ |
252 | ␉␊ |
253 | ␉/*␊ |
254 | ␉ * Determine size of mode table␊ |
255 | ␉ */␊ |
256 | ␉ ␊ |
257 | ␉{␊ |
258 | ␉␉vbios_mode * mode_ptr = map->mode_table;␊ |
259 | ␉␉␉␊ |
260 | ␉␉while (mode_ptr->mode != 0xff) {␊ |
261 | ␉␉␉map->mode_table_size++;␊ |
262 | ␉␉␉mode_ptr++;␊ |
263 | ␉␉}␊ |
264 | ␉}␊ |
265 | ␉␊ |
266 | ␉/*␊ |
267 | ␉ * Figure out what type of bios we have␊ |
268 | ␉ * order of detection is important␊ |
269 | ␉ */␊ |
270 | ␉␊ |
271 | ␉if (detect_bios_type(map, TRUE, sizeof(vbios_modeline_type3))) {␊ |
272 | ␉␉map->bios = BT_3;␊ |
273 | ␉}␊ |
274 | ␉else if (detect_bios_type(map, TRUE, sizeof(vbios_modeline_type2))) {␊ |
275 | ␉␉map->bios = BT_2;␊ |
276 | ␉}␊ |
277 | ␉else if (detect_bios_type(map, FALSE, sizeof(vbios_resolution_type1))) {␊ |
278 | ␉␉map->bios = BT_1;␊ |
279 | ␉}␊ |
280 | ␉else {␊ |
281 | ␉␉printf("Unable to determine bios type.\n");␊ |
282 | ␉␉printf("Please run the program 'dump_bios' as root and\n");␊ |
283 | ␉␉printf("email the file 'vbios.dmp' to stomljen@yahoo.com.\n");␊ |
284 | ␉␊ |
285 | ␉␉printf("Chipset: %s\n", chipset_type_names[map->chipset]);␊ |
286 | ␉␉printf("Mode Table Offset: $C0000 + $%x\n", ((UInt32)map->mode_table) - ((UInt32)map->bios_ptr));␊ |
287 | ␉␉␊ |
288 | ␉␉printf("Mode Table Entries: %u\n", map->mode_table_size);␊ |
289 | ␉␉return 0;␊ |
290 | ␉}␊ |
291 | ␉␊ |
292 | ␉return map;␊ |
293 | }␊ |
294 | ␊ |
295 | void close_vbios(vbios_map * map) {␊ |
296 | ␉FREE(map);␊ |
297 | }␊ |
298 | ␊ |
299 | void unlock_vbios(vbios_map * map) {␊ |
300 | ␊ |
301 | ␉map->unlocked = TRUE;␊ |
302 | ␉ ␊ |
303 | ␉switch (map->chipset) {␊ |
304 | ␉␉case CT_UNKWN:␊ |
305 | ␉␉␉break;␊ |
306 | ␉␉case CT_830:␊ |
307 | ␉␉case CT_855GM:␊ |
308 | ␉␉␉outl(0xcf8, 0x8000005a);␊ |
309 | ␉␉␉map->b1 = inb(0xcfe);␊ |
310 | ␉␉␉␉␊ |
311 | ␉␉␉outl(0xcf8, 0x8000005a);␊ |
312 | ␉␉␉outb(0xcfe, 0x33);␊ |
313 | ␉␉␉break;␊ |
314 | ␉␉case CT_845G:␊ |
315 | ␉␉case CT_865G:␊ |
316 | ␉␉case CT_915G:␊ |
317 | ␉␉case CT_915GM:␊ |
318 | ␉␉case CT_945G:␊ |
319 | ␉␉case CT_945GM:␊ |
320 | ␉␉case CT_945GME:␊ |
321 | ␉␉case CT_946GZ:␊ |
322 | ␉␉case CT_G965:␊ |
323 | ␉␉case CT_Q965:␊ |
324 | ␉␉case CT_965GM:␊ |
325 | ␉␉case CT_500:␊ |
326 | ␊ |
327 | ␉␉␉outl(0xcf8, 0x80000090);␊ |
328 | ␉␉␉map->b1 = inb(0xcfd);␊ |
329 | ␉␉␉map->b2 = inb(0xcfe);␊ |
330 | ␉␉␉outl(0xcf8, 0x80000090);␊ |
331 | ␉␉␉outb(0xcfd, 0x33);␊ |
332 | ␉␉␉outb(0xcfe, 0x33);␊ |
333 | ␉␉break;␊ |
334 | ␉}␊ |
335 | ␉␊ |
336 | ␉#if DEBUG␊ |
337 | ␉{␊ |
338 | ␉␉UInt32 t = inl(0xcfc);␊ |
339 | ␉␉printf("unlock PAM: (0x%08x)\n", t);␊ |
340 | ␉}␊ |
341 | #endif␊ |
342 | }␊ |
343 | ␊ |
344 | void relock_vbios(vbios_map * map) {␊ |
345 | ␊ |
346 | ␉map->unlocked = FALSE;␊ |
347 | ␉␊ |
348 | ␉switch (map->chipset) {␊ |
349 | ␉␉case CT_UNKWN:␊ |
350 | ␉␉␉break;␊ |
351 | ␉␉case CT_830:␊ |
352 | ␉␉case CT_855GM:␊ |
353 | ␉␉␉outl(0xcf8, 0x8000005a);␊ |
354 | ␉␉␉outb(0xcfe, map->b1);␊ |
355 | ␉␉␉break;␊ |
356 | ␉␉case CT_845G:␊ |
357 | ␉␉␉case CT_865G:␊ |
358 | ␉␉␉case CT_915G:␊ |
359 | ␉␉␉case CT_915GM:␊ |
360 | ␉␉␉case CT_945G:␊ |
361 | ␉␉␉case CT_945GM:␊ |
362 | ␉␉␉case CT_945GME:␊ |
363 | ␉␉␉case CT_946GZ:␊ |
364 | ␉␉␉case CT_G965:␊ |
365 | ␉␉␉case CT_Q965:␊ |
366 | ␉␉␉case CT_965GM:␊ |
367 | ␉␉␉case CT_500:␊ |
368 | ␊ |
369 | ␉␉␉␉outl(0xcf8, 0x80000090);␊ |
370 | ␉␉␉␉outb(0xcfd, map->b1);␊ |
371 | ␉␉␉␉outb(0xcfe, map->b2);␊ |
372 | ␉␉␉break;␊ |
373 | ␉}␊ |
374 | ␉␊ |
375 | ␉#if DEBUG␊ |
376 | ␉{␊ |
377 | UInt32 t = inl(0xcfc);␊ |
378 | ␉␉printf("relock PAM: (0x%08x)\n", t);␊ |
379 | ␉}␊ |
380 | ␉#endif␊ |
381 | }␊ |
382 | ␊ |
383 | ␊ |
384 | static void gtf_timings(UInt32 x, UInt32 y, UInt32 freq,␊ |
385 | ␉␉␉␉␉␉unsigned long *clock,␊ |
386 | ␉␉␉␉␉␉UInt16 *hsyncstart, UInt16 *hsyncend, UInt16 *hblank,␊ |
387 | ␉␉␉␉␉␉UInt16 *vsyncstart, UInt16 *vsyncend, UInt16 *vblank)␊ |
388 | {␊ |
389 | ␉UInt32 hbl, vbl, vfreq;␊ |
390 | ␊ |
391 | ␉vbl = y + (y+1)/(20000.0/(11*freq) - 1) + 1.5;␊ |
392 | ␉vfreq = vbl * freq;␊ |
393 | ␉hbl = 16 * (int)(x * (30.0 - 300000.0 / vfreq) /␊ |
394 | ␉␉␉␉␉␉ + (70.0 + 300000.0 / vfreq) / 16.0 + 0.5);␊ |
395 | ␊ |
396 | ␉*vsyncstart = y;␊ |
397 | ␉*vsyncend = y + 3;␊ |
398 | ␉*vblank = vbl - 1;␊ |
399 | ␉*hsyncstart = x + hbl / 2 - (x + hbl + 50) / 100 * 8 - 1;␊ |
400 | ␉*hsyncend = x + hbl / 2 - 1;␊ |
401 | ␉*hblank = x + hbl - 1;␊ |
402 | ␉*clock = (x + hbl) * vfreq / 1000;␊ |
403 | }␊ |
404 | ␊ |
405 | void set_mode(vbios_map * map, /*UInt32 mode,*/ UInt32 x, UInt32 y, UInt32 bp, UInt32 htotal, UInt32 vtotal) {␊ |
406 | ␉UInt32 xprev, yprev;␊ |
407 | ␉UInt32 i = 0, j;␉// patch first available mode␊ |
408 | ␊ |
409 | //␉for (i=0; i < map->mode_table_size; i++) {␊ |
410 | //␉␉if (map->mode_table[0].mode == mode) {␊ |
411 | ␉␉␉switch(map->bios) {␊ |
412 | ␉␉␉␉case BT_1:␊ |
413 | ␉␉␉␉␉{␊ |
414 | ␉␉␉␉␉␉vbios_resolution_type1 * res = map_type1_resolution(map, map->mode_table[i].resolution);␊ |
415 | ␉␉␉␉␉␉␊ |
416 | ␉␉␉␉␉␉if (bp) {␊ |
417 | ␉␉␉␉␉␉␉map->mode_table[i].bits_per_pixel = bp;␊ |
418 | ␉␉␉␉␉␉}␊ |
419 | ␉␉␉␉␉␉␊ |
420 | ␉␉␉␉␉␉res->x2 = (htotal?(((htotal-x) >> 8) & 0x0f) : (res->x2 & 0x0f)) | ((x >> 4) & 0xf0);␊ |
421 | ␉␉␉␉␉␉res->x1 = (x & 0xff);␊ |
422 | ␉␉␉␉␉␉␊ |
423 | ␉␉␉␉␉␉res->y2 = (vtotal?(((vtotal-y) >> 8) & 0x0f) : (res->y2 & 0x0f)) | ((y >> 4) & 0xf0);␊ |
424 | ␉␉␉␉␉␉res->y1 = (y & 0xff);␊ |
425 | ␉␉␉␉␉␉if (htotal)␊ |
426 | ␉␉␉␉␉␉␉res->x_total = ((htotal-x) & 0xff);␊ |
427 | ␉␉␉␉␉␉␊ |
428 | ␉␉␉␉␉␉if (vtotal)␊ |
429 | ␉␉␉␉␉␉␉res->y_total = ((vtotal-y) & 0xff);␊ |
430 | ␉␉␉␉␉}␊ |
431 | ␉␉␉␉␉break;␊ |
432 | ␉␉␉␉case BT_2:␊ |
433 | ␉␉␉␉␉{␊ |
434 | ␉␉␉␉␉␉vbios_resolution_type2 * res = map_type2_resolution(map, map->mode_table[i].resolution);␊ |
435 | ␉␉␉␉␉␉␊ |
436 | ␉␉␉␉␉␉res->xchars = x / 8;␊ |
437 | ␉␉␉␉␉␉res->ychars = y / 16 - 1;␊ |
438 | ␉␉␉␉␉␉xprev = res->modelines[0].x1;␊ |
439 | ␉␉␉␉␉␉yprev = res->modelines[0].y1;␊ |
440 | ␉␉␉␉␉␉␊ |
441 | ␉␉␉␉␉␉for(j=0; j < 3; j++) {␊ |
442 | ␉␉␉␉␉␉␉vbios_modeline_type2 * modeline = &res->modelines[j];␊ |
443 | ␉␉␉␉␉␉␉␊ |
444 | ␉␉␉␉␉␉␉if (modeline->x1 == xprev && modeline->y1 == yprev) {␊ |
445 | ␉␉␉␉␉␉␉␉modeline->x1 = modeline->x2 = x-1;␊ |
446 | ␉␉␉␉␉␉␉␉modeline->y1 = modeline->y2 = y-1;␊ |
447 | ␉␉␉␉␊ |
448 | ␉␉␉␉␉␉␉␉gtf_timings(x, y, freqs[j], &modeline->clock,␊ |
449 | ␉␉␉␉␉␉␉␉␉␉␉&modeline->hsyncstart, &modeline->hsyncend,␊ |
450 | ␉␉␉␉␉␉␉␉␉␉␉&modeline->hblank, &modeline->vsyncstart,␊ |
451 | ␉␉␉␉␉␉␉␉␉␉␉&modeline->vsyncend, &modeline->vblank);␊ |
452 | ␉␉␉␉␉␉␉␉␊ |
453 | ␉␉␉␉␉␉␉␉if (htotal)␊ |
454 | ␉␉␉␉␉␉␉␉␉modeline->htotal = htotal;␊ |
455 | ␉␉␉␉␉␉␉␉else␊ |
456 | ␉␉␉␉␉␉␉␉␉modeline->htotal = modeline->hblank;␊ |
457 | ␉␉␉␉␉␉␉␉␊ |
458 | ␉␉␉␉␉␉␉␉if (vtotal)␊ |
459 | ␉␉␉␉␉␉␉␉␉modeline->vtotal = vtotal;␊ |
460 | ␉␉␉␉␉␉␉␉else␊ |
461 | ␉␉␉␉␉␉␉␉␉modeline->vtotal = modeline->vblank;␊ |
462 | ␉␉␉␉␉␉␉}␊ |
463 | ␉␉␉␉␉␉}␊ |
464 | ␉␉␉␉␉}␊ |
465 | ␉␉␉␉␉break;␊ |
466 | ␉␉␉␉case BT_3:␊ |
467 | ␉␉␉␉␉{␊ |
468 | ␉␉␉␉␉␉vbios_resolution_type3 * res = map_type3_resolution(map, map->mode_table[i].resolution);␊ |
469 | ␉␉␉␉␉␉␊ |
470 | ␉␉␉␉␉␉xprev = res->modelines[0].x1;␊ |
471 | ␉␉␉␉␉␉yprev = res->modelines[0].y1;␊ |
472 | ␉␉␉␉␊ |
473 | ␉␉␉␉␉␉for (j=0; j < 3; j++) {␊ |
474 | ␉␉␉␉␉␉␉vbios_modeline_type3 * modeline = &res->modelines[j];␊ |
475 | ␉␉␉␉␉␉␉ ␊ |
476 | ␉␉␉␉␉␉␉if (modeline->x1 == xprev && modeline->y1 == yprev) {␊ |
477 | ␉␉␉␉␉␉␉␉modeline->x1 = modeline->x2 = x-1;␊ |
478 | ␉␉␉␉␉␉␉␉modeline->y1 = modeline->y2 = y-1;␊ |
479 | ␉␉␉␉␉␉␉␉ ␊ |
480 | ␉␉␉␉␉␉␉␉gtf_timings(x, y, freqs[j], &modeline->clock,␊ |
481 | ␉␉␉␉␉␉␉␉␉␉␉&modeline->hsyncstart, &modeline->hsyncend,␊ |
482 | ␉␉␉␉␉␉␉␉␉␉␉&modeline->hblank, &modeline->vsyncstart,␊ |
483 | ␉␉␉␉␉␉␉␉␉␉␉&modeline->vsyncend, &modeline->vblank);␊ |
484 | ␉␉␉␉␉␉␉␉if (htotal)␊ |
485 | ␉␉␉␉␉␉␉␉␉modeline->htotal = htotal;␊ |
486 | ␉␉␉␉␉␉␉␉else␊ |
487 | ␉␉␉␉␉␉␉␉␉modeline->htotal = modeline->hblank;␊ |
488 | ␉␉␉␉␉␉␉␉if (vtotal)␊ |
489 | ␉␉␉␉␉␉␉␉␉modeline->vtotal = vtotal;␊ |
490 | ␉␉␉␉␉␉␉␉else␊ |
491 | ␉␉␉␉␉␉␉␉␉modeline->vtotal = modeline->vblank;␊ |
492 | ␉␉␉␉␉␉␊ |
493 | ␉␉␉␉␉␉␉␉modeline->timing_h = y-1;␊ |
494 | ␉␉␉␉␉␉␉␉modeline->timing_v = x-1;␊ |
495 | ␉␉␉␉␉␉␉}␊ |
496 | ␉␉␉␉␉␉}␊ |
497 | ␉␉␉␉␉}␊ |
498 | ␉␉␉␉␉break;␊ |
499 | ␉␉␉␉case BT_UNKWN:␊ |
500 | ␉␉␉␉␉break;␊ |
501 | ␉␉␉}␊ |
502 | //␉␉}␊ |
503 | //␉}␊ |
504 | } ␊ |
505 | ␊ |
506 | void display_map_info(vbios_map * map) {␊ |
507 | ␉printf("Chipset: %s\n", chipset_type_names[map->chipset]);␊ |
508 | ␉printf("BIOS: %s\n", bios_type_names[map->bios]);␊ |
509 | ␉␊ |
510 | ␉printf("Mode Table Offset: $C0000 + $%x\n", ((UInt32)map->mode_table) - ((UInt32)map->bios_ptr));␊ |
511 | ␉printf("Mode Table Entries: %u\n", map->mode_table_size);␊ |
512 | }␊ |
513 | ␊ |
514 | /*␊ |
515 | int parse_args(int argc, char *argv[], chipset_type *forced_chipset, UInt32 *list, UInt32 *mode, UInt32 *x, UInt32 *y, UInt32 *bp, UInt32 *raw, UInt32 *htotal, UInt32 *vtotal) {␊ |
516 | ␉UInt32 index = 0;␊ |
517 | ␉␊ |
518 | ␉*list = *mode = *x = *y = *raw = *htotal = *vtotal = 0;␊ |
519 | ␊ |
520 | ␉*forced_chipset = CT_UNKWN;␊ |
521 | ␉␊ |
522 | ␉if ((argc > index) && !strcmp(argv[index], "-c")) {␊ |
523 | ␉␉index++;␊ |
524 | ␉␉+␊ |
525 | ␉␉+ if(argc<=index) {␊ |
526 | ␉␉␉+ return 0;␊ |
527 | ␉␉␉+ }␊ |
528 | ␉␉+ ␊ |
529 | ␉␉+ if (!strcmp(argv[index], "845")) {␊ |
530 | ␉␉␉+ *forced_chipset = CT_845G;␊ |
531 | ␉␉␉+ }␊ |
532 | ␉␉+ else if (!strcmp(argv[index], "855")) {␊ |
533 | ␉␉␉+ *forced_chipset = CT_855GM;␊ |
534 | ␉␉␉+ }␊ |
535 | ␉␉+ else if (!strcmp(argv[index], "865")) {␊ |
536 | ␉␉␉+ *forced_chipset = CT_865G;␊ |
537 | ␉␉␉+ }␊ |
538 | ␉␉+ else if (!strcmp(argv[index], "915G")) {␊ |
539 | ␉␉␉+ *forced_chipset = CT_915G;␊ |
540 | ␉␉␉+ }␊ |
541 | ␉␉+ else if (!strcmp(argv[index], "915GM")) {␊ |
542 | ␉␉␉+ *forced_chipset = CT_915GM;␊ |
543 | ␉␉␉+ }␊ |
544 | ␉␉+ else if (!strcmp(argv[index], "945G")) {␊ |
545 | ␉␉␉+ *forced_chipset = CT_945G;␊ |
546 | ␉␉␉+ }␊ |
547 | ␉␉+ else if (!strcmp(argv[index], "945GM")) {␊ |
548 | ␉␉␉+ *forced_chipset = CT_945GM;␊ |
549 | ␉␉␉+ }␊ |
550 | ␉␉+ else if (!strcmp(argv[index], "945GME")) {␊ |
551 | ␉␉␉+ *forced_chipset = CT_945GME;␊ |
552 | ␉␉␉+ }␊ |
553 | ␉␉+ else if (!strcmp(argv[index], "946GZ")) {␊ |
554 | ␉␉␉+ *forced_chipset = CT_946GZ;␊ |
555 | ␉␉␉+ }␊ |
556 | ␉␉+ else if (!strcmp(argv[index], "G965")) {␊ |
557 | ␉␉␉+ *forced_chipset = CT_G965;␊ |
558 | ␉␉␉+ }␊ |
559 | ␉␉+ else if (!strcmp(argv[index], "Q965")) {␊ |
560 | ␉␉␉+ *forced_chipset = CT_Q965;␊ |
561 | ␉␉␉+ }␊ |
562 | ␉␉+ else if (!strcmp(argv[index], "500")) {␊ |
563 | ␉␉␉+ *forced_chipset = CT_500;␊ |
564 | ␉␉␉+ }␊ |
565 | ␉␉␊ |
566 | ␉␉+ else {␊ |
567 | ␉␉␉+␉ printf("No match for forced chipset: %s\n", argv[index]);␊ |
568 | ␉␉␉+ *forced_chipset = CT_UNKWN;␊ |
569 | ␉␉␉+ }␊ |
570 | ␉␉+ ␊ |
571 | ␉␉+ index++;␊ |
572 | ␉␉+ ␊ |
573 | ␉␉+ if (argc<=index) {␊ |
574 | ␉␉␉+ return 0;␊ |
575 | ␉␉␉+ }␊ |
576 | ␉␉+ }␊ |
577 | ␉+␊ |
578 | ␉+ if ((argc > index) && !strcmp(argv[index], "-l")) {␊ |
579 | ␉␉+ *list = 1;␊ |
580 | ␉␉+ index++;␊ |
581 | ␉␉+␊ |
582 | ␉␉+ if(argc<=index) {␊ |
583 | ␉␉␉+ return 0;␊ |
584 | ␉␉␉+ }␊ |
585 | ␉␉+ }␊ |
586 | ␉+ ␊ |
587 | ␉+ if ((argc > index) && !strcmp(argv[index], "-r")) {␊ |
588 | ␉␉+ *raw = 1;␊ |
589 | ␉␉+ index++;␊ |
590 | ␉␉+␊ |
591 | ␉␉+ if(argc<=index) {␊ |
592 | ␉␉␉+ return 0;␊ |
593 | ␉␉␉+ }␊ |
594 | ␉␉+ }␊ |
595 | ␉+ ␊ |
596 | ␉+ if (argc-index < 3 || argc-index > 6) {␊ |
597 | ␉␉+ return -1;␊ |
598 | ␉␉+ }␊ |
599 | ␉+␊ |
600 | ␉+ *mode = (UInt32) strtoul(argv[index], NULL, 16);␊ |
601 | ␉+ *x = (UInt32)strtoul(argv[index+1], NULL, 10);␊ |
602 | ␉+ *y = (UInt32)strtoul(argv[index+2], NULL, 10);␊ |
603 | ␉+␊ |
604 | ␉+␊ |
605 | ␉+ if (argc-index > 3) {␊ |
606 | ␉␉+ *bp = (UInt32)strtoul(argv[index+3], NULL, 10);␊ |
607 | ␉␉+ }␊ |
608 | ␉+ else {␊ |
609 | ␉␉+ *bp = 0;␊ |
610 | ␉␉+ }␊ |
611 | ␉+ ␊ |
612 | ␉+ if (argc-index > 4) {␊ |
613 | ␉␉+ *htotal = (UInt32)strtoul(argv[index+4], NULL, 10);␊ |
614 | ␉␉+ }␊ |
615 | ␉+ else {␊ |
616 | ␉␉+ *htotal = 0;␊ |
617 | ␉␉+ }␊ |
618 | ␉+␊ |
619 | ␉+ if (argc-index > 5) {␊ |
620 | ␉␉+ *vtotal = (UInt32)strtoul(argv[index+5], NULL, 10);␊ |
621 | ␉␉+ }␊ |
622 | ␉+ else {␊ |
623 | ␉␉+ *vtotal = 0;␊ |
624 | ␉␉+ }␊ |
625 | ␉+ ␊ |
626 | ␉+ return 0;␊ |
627 | ␉+}␊ |
628 | +␊ |
629 | ␊ |
630 | ␊ |
631 | */␊ |
632 | ␊ |
633 | ␊ |
634 | void list_modes(vbios_map *map, UInt32 raw) {␊ |
635 | UInt32 i, x, y;␊ |
636 | ␉␊ |
637 | for (i=0; i < map->mode_table_size; i++) {␊ |
638 | switch(map->bios) {␊ |
639 | ␉␉␉case BT_1:␊ |
640 | {␊ |
641 | vbios_resolution_type1 * res = map_type1_resolution(map, map->mode_table[i].resolution);␊ |
642 | ␊ |
643 | x = ((((UInt32) res->x2) & 0xf0) << 4) | res->x1;␊ |
644 | y = ((((UInt32) res->y2) & 0xf0) << 4) | res->y1;␊ |
645 | ␊ |
646 | if (x != 0 && y != 0) {␊ |
647 | printf("Mode %02x : %dx%d, %d bits/pixel\n", map->mode_table[i].mode, x, y, map->mode_table[i].bits_per_pixel);␊ |
648 | }␊ |
649 | ␉␉␉␉␊ |
650 | ␉␉␉␉if (raw)␊ |
651 | ␉␉␉␉{␊ |
652 | printf("Mode %02x (raw) :\n\t%02x %02x\n\t%02x\n\t%02x\n\t%02x\n\t%02x\n\t%02x\n\t%02x\n", map->mode_table[i].mode, res->unknow1[0],res->unknow1[1], res->x1,res->x_total,res->x2,res->y1,res->y_total,res->y2);␊ |
653 | ␉␉␉␉}␊ |
654 | ␉␉␉␉␊ |
655 | }␊ |
656 | ␉␉␉␉break;␊ |
657 | ␉␉␉case BT_2:␊ |
658 | {␊ |
659 | vbios_resolution_type2 * res = map_type2_resolution(map, map->mode_table[i].resolution);␊ |
660 | ␊ |
661 | x = res->modelines[0].x1+1;␊ |
662 | y = res->modelines[0].y1+1;␊ |
663 | ␉␉␉␉␊ |
664 | if (x != 0 && y != 0) {␊ |
665 | printf("Mode %02x : %dx%d, %d bits/pixel\n", map->mode_table[i].mode, x, y, map->mode_table[i].bits_per_pixel);␊ |
666 | }␊ |
667 | }␊ |
668 | ␉␉␉␉break;␊ |
669 | ␉␉␉case BT_3:␊ |
670 | {␊ |
671 | vbios_resolution_type3 * res = map_type3_resolution(map, map->mode_table[i].resolution);␊ |
672 | ␊ |
673 | x = res->modelines[0].x1+1;␊ |
674 | y = res->modelines[0].y1+1;␊ |
675 | ␊ |
676 | if (x != 0 && y != 0) {␊ |
677 | printf("Mode %02x : %dx%d, %d bits/pixel\n", map->mode_table[i].mode, x, y, map->mode_table[i].bits_per_pixel);␊ |
678 | }␊ |
679 | }␊ |
680 | ␉␉␉␉break;␊ |
681 | ␉␉␉case BT_UNKWN:␊ |
682 | ␉␉␉␉break;␊ |
683 | }␊ |
684 | }␊ |
685 | }␊ |
686 | ␊ |
687 | ␊ |
688 | void usage() {␊ |
689 | ␉printf("Usage: 915resolution [-c chipset] [-l] [mode X Y] [bits/pixel] [htotal] [vtotal]\n");␊ |
690 | ␉printf(" Set the resolution to XxY for a video mode\n");␊ |
691 | ␉printf(" Bits per pixel are optional. htotal/vtotal settings are additionally optional.\n");␊ |
692 | ␉printf(" Options:\n");␊ |
693 | ␉printf(" -c force chipset type (THIS IS USED FOR DEBUG PURPOSES)\n");␊ |
694 | ␉printf(" -l display the modes found in the video BIOS\n");␊ |
695 | ␉printf(" -r display the modes found in the video BIOS in raw mode (THIS IS USED FOR DEBUG PURPOSES)\n");␊ |
696 | }␊ |
697 | ␊ |
698 | /*␊ |
699 | static err_t␊ |
700 | cmd_915resolution (struct arg_list *state ,␊ |
701 | ␉␉␉␉ int argc ,␊ |
702 | ␉␉␉␉ char **argv )␊ |
703 | {␊ |
704 | ␉vbios_map * map;␊ |
705 | ␉UInt32 list, mode, x, y, bp, raw, htotal, vtotal;␊ |
706 | ␉chipset_type forced_chipset;␊ |
707 | ␉␊ |
708 | ␉printf("Intel 500/800/900 Series VBIOS Hack : version %s\n\n", VERSION);␊ |
709 | ␊ |
710 | ␉if (parse_args(argc, argv, &forced_chipset, &list, &mode, &x, &y, &bp, &raw, &htotal, &vtotal) == -1) {␊ |
711 | ␉␉␉usage();␊ |
712 | ␉␉␉return 2;␊ |
713 | ␉␉}␊ |
714 | ␊ |
715 | ␉map = open_vbios(forced_chipset);␊ |
716 | ␉display_map_info(map);␊ |
717 | ␊ |
718 | ␉printf("\n");␊ |
719 | ␊ |
720 | ␉if (list) {␊ |
721 | ␉␉list_modes(map, raw);␊ |
722 | ␉}␊ |
723 | ␊ |
724 | ␉if (mode!=0 && x!=0 && y!=0) {␊ |
725 | ␉␉unlock_vbios(map);␊ |
726 | ␉␉␊ |
727 | ␉␉set_mode(map, mode, x, y, bp, htotal, vtotal);␊ |
728 | ␉␉␊ |
729 | ␉␉relock_vbios(map);␊ |
730 | ␉␉␊ |
731 | ␉␉printf("Patch mode %02x to resolution %dx%d complete\n", mode, x, y);␊ |
732 | ␉␉ ␊ |
733 | ␉␉if (list) {␊ |
734 | ␉␉␉list_modes(map, raw);␊ |
735 | ␉␉}␊ |
736 | ␉}␊ |
737 | ␉␊ |
738 | ␉close_vbios(map);␊ |
739 | ␉ ␊ |
740 | ␉return 0;␊ |
741 | }␊ |
742 | */␊ |
743 | |