Chameleon

Chameleon Svn Source Tree

Root/branches/ErmaC/Modules/i386/modules/AMDGraphicsEnabler/ati.c

1/*
2 * ATI Graphics Card Enabler, part of the Chameleon Boot Loader Project
3 *
4 * Copyright 2010 by Islam M. Ahmed Zaid. All rights reserved.
5 *
6 */
7
8#include "libsa.h"
9#include "saio_internal.h"
10#include "bootstruct.h"
11#include "pci.h"
12#include "platform.h"
13#include "device_inject.h"
14#include "ati_reg.h"
15
16#define OFFSET_TO_GET_ATOMBIOS_STRINGS_START 0x6e
17
18#define kUseAtiROM"UseAtiROM"
19#define kAtiConfig"AtiConfig"
20#define kAtiPorts"AtiPorts"
21#define kATYbinimage"ATYbinimage"
22
23#define Reg32(reg)(*(volatile uint32_t *)(card->mmio + reg))
24#define RegRead32(reg)(Reg32(reg))
25#define RegWrite32(reg, value)(Reg32(reg) = value)
26
27typedef enum {
28kNul,
29kStr,
30kPtr,
31kCst
32} type_t;
33
34typedef enum {
35CHIP_FAMILY_UNKNOW,
36/* IGP */
37CHIP_FAMILY_RS600,
38CHIP_FAMILY_RS690,
39CHIP_FAMILY_RS740,
40CHIP_FAMILY_RS780,
41CHIP_FAMILY_RS880,
42/* R600 */
43CHIP_FAMILY_R600,
44CHIP_FAMILY_RV610,
45CHIP_FAMILY_RV620,
46CHIP_FAMILY_RV630,
47CHIP_FAMILY_RV635,
48CHIP_FAMILY_RV670,
49/* R700 */
50CHIP_FAMILY_RV710,
51CHIP_FAMILY_RV730,
52CHIP_FAMILY_RV740,
53CHIP_FAMILY_RV772,
54CHIP_FAMILY_RV770,
55CHIP_FAMILY_RV790,
56/* Evergreen */
57CHIP_FAMILY_CEDAR,
58CHIP_FAMILY_CYPRESS,
59CHIP_FAMILY_HEMLOCK,
60CHIP_FAMILY_JUNIPER,
61CHIP_FAMILY_REDWOOD,
62/* Northern Islands */
63CHIP_FAMILY_BARTS,
64CHIP_FAMILY_CAICOS,
65CHIP_FAMILY_CAYMAN,
66CHIP_FAMILY_TURKS,
67CHIP_FAMILY_LAST
68} chip_family_t;
69
70static const char *chip_family_name[] = {
71"UNKNOW",
72/* IGP */
73"RS600",
74"RS690",
75"RS740",
76"RS780",
77"RS880",
78/* R600 */
79"R600",
80"RV610",
81"RV620",
82"RV630",
83"RV635",
84"RV670",
85/* R700 */
86"RV710",
87"RV730",
88"RV740",
89"RV772",
90"RV770",
91"RV790",
92/* Evergreen */
93"Cedar",
94"Cypress",
95"Hemlock",
96"Juniper",
97"Redwood",
98/* Northern Islands */
99"Barts",
100"Caicos",
101"Cayman",
102"Turks",
103""
104};
105
106typedef struct {
107const char*name;
108uint8_tports;
109} card_config_t;
110
111static card_config_t card_configs[] = {
112{NULL,0},
113{"Alopias",2},
114{"Alouatta",4},
115{"Baboon",3},
116{"Cardinal",2},
117{"Caretta",1},
118{"Colobus",2},
119{"Douc",2},
120{"Eulemur",3},
121{"Flicker",3},
122{"Galago",2},
123{"Gliff",3},
124{"Hoolock",3},
125{"Hypoprion",2},
126{"Iago",2},
127{"Kakapo",3},
128{"Kipunji",4},
129{"Lamna",2},
130{"Langur",3},
131{"Megalodon",3},
132{"Motmot",2},
133{"Nomascus",5},
134{"Orangutan",2},
135{"Peregrine",2},
136{"Quail",3},
137{"Raven",3},
138{"Shrike",3},
139{"Sphyrna",1},
140{"Triakis",2},
141{"Uakari",4},
142{"Vervet",4},
143{"Zonalis",6},
144{"Pithecia",3},
145{"Bulrushes",6},
146{"Cattail",4},
147{"Hydrilla",5},
148{"Duckweed",4},
149{"Fanwort",4},
150{"Elodea",5},
151{"Kudzu",2},
152{"Gibba",5},
153{"Lotus",3},
154{"Ipomoea",3},
155{"Mangabey",2},
156{"Muskgrass",4},
157{"Juncus",4}
158};
159
160typedef enum {
161kNull,
162kAlopias,
163kAlouatta,
164kBaboon,
165kCardinal,
166kCaretta,
167kColobus,
168kDouc,
169kEulemur,
170kFlicker,
171kGalago,
172kGliff,
173kHoolock,
174kHypoprion,
175kIago,
176kKakapo,
177kKipunji,
178kLamna,
179kLangur,
180kMegalodon,
181kMotmot,
182kNomascus,
183kOrangutan,
184kPeregrine,
185kQuail,
186kRaven,
187kShrike,
188kSphyrna,
189kTriakis,
190kUakari,
191kVervet,
192kZonalis,
193kPithecia,
194kBulrushes,
195kCattail,
196kHydrilla,
197kDuckweed,
198kFanwort,
199kElodea,
200kKudzu,
201kGibba,
202kLotus,
203kIpomoea,
204kMangabey,
205kMuskgrass,
206kJuncus,
207kCfgEnd
208} config_name_t;
209
210typedef struct {
211uint16_tdevice_id;
212uint32_tsubsys_id;
213chip_family_tchip_family;
214const char*model_name;
215config_name_tcfg_name;
216uint8_tmax_ports;
217} radeon_card_info_t;
218
219static radeon_card_info_t radeon_cards[] = {
220
221// Earlier cards are not supported
222//
223// Layout is device_id, subsys_id (subsystem id plus vendor id), chip_family_name, display name, frame buffer
224// Cards are grouped by device id and vendor id then sorted by subsystem id to make it easier to add new cards
225//
226{ 0x9400,0x25521002, CHIP_FAMILY_R600,"ATI Radeon HD 2900 XT",kNull, 0 },
227{ 0x9400,0x30001002, CHIP_FAMILY_R600,"ATI Radeon HD 2900 PRO",kNull, 0 },
228
229{ 0x9440,0x114A174B, CHIP_FAMILY_RV770,"Sapphire Radeon HD4870 Vapor-X",kCardinal, 0 }, // ErmaC
230{ 0x9440,0x24401682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot, 0 },
231{ 0x9440,0x24411682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot, 0 },
232{ 0x9440,0x24441682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot, 0 },
233{ 0x9440,0x24451682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot, 0 },
234
235{ 0x9441,0x24401682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870 X2",kMotmot, 0 },
236
237{ 0x9442,0x080110B0, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot, 0 },
238
239{ 0x9442,0x24701682, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot, 0 },
240{ 0x9442,0x24711682, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot, 0 },
241
242{ 0x9442,0xE104174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot, 0 },
243
244{ 0x944A,0x30001043, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
245
246{ 0x944A,0x30001458, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
247
248{ 0x944A,0x30001462, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
249
250{ 0x944A,0x30001545, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
251
252{ 0x944A,0x30001682, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
253
254{ 0x944A,0x3000174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
255
256{ 0x944A,0x30001787, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
257
258{ 0x944A,0x300017AF, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
259
260{ 0x944C,0x24801682, CHIP_FAMILY_RV770,"ATI Radeon HD 4830",kMotmot, 0 },
261{ 0x944C,0x24811682, CHIP_FAMILY_RV770,"ATI Radeon HD 4830",kMotmot, 0 },
262
263{ 0x944E,0x3260174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4810 Series",kMotmot, 0 },
264{ 0x944E,0x3261174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4810 series",kMotmot, 0 },
265
266{ 0x944E,0x30001787, CHIP_FAMILY_RV770,"ATI Radeon HD 4730 Series",kMotmot, 0 },
267{ 0x944E,0x30101787, CHIP_FAMILY_RV770,"ATI Radeon HD 4810 Series",kMotmot, 0 },
268{ 0x944E,0x31001787, CHIP_FAMILY_RV770,"ATI Radeon HD 4820",kMotmot, 0 },
269
270{ 0x9480,0x3628103C, CHIP_FAMILY_RV730,"ATI Radeon HD 4650M",kGliff, 0 },
271
272{ 0x9480,0x9035104D, CHIP_FAMILY_RV730,"ATI Radeon HD 4650M",kGliff, 0 },
273
274{ 0x9490,0x4710174B, CHIP_FAMILY_RV730,"ATI Radeon HD 4710",kNull, 0 },
275
276{ 0x9490,0x20031787, CHIP_FAMILY_RV730,"ATI Radeon HD 4670",kFlicker, 0 },
277{ 0x9490,0x30501787, CHIP_FAMILY_RV730,"ATI Radeon HD 4710",kNull, 0 },
278
279{ 0x9490,0x300017AF, CHIP_FAMILY_RV730,"ATI Radeon HD 4710",kNull, 0 },
280
281{ 0x9498,0x21CF1458, CHIP_FAMILY_RV730,"ATI Radeon HD 4600 Series",kNull, 0 },
282
283{ 0x9498,0x24511682, CHIP_FAMILY_RV730,"ATI Radeon HD 4650",kNull, 0 },
284{ 0x9498,0x24521682, CHIP_FAMILY_RV730,"ATI Radeon HD 4650",kNull, 0 },
285{ 0x9498,0x24541682, CHIP_FAMILY_RV730,"ATI Radeon HD 4650",kNull, 0 },
286{ 0x9498,0x29331682, CHIP_FAMILY_RV730,"ATI Radeon HD 4670",kNull, 0 },
287{ 0x9498,0x29341682, CHIP_FAMILY_RV730,"ATI Radeon HD 4670",kNull, 0 },
288
289{ 0x9498,0x30501787, CHIP_FAMILY_RV730,"ATI Radeon HD 4700",kNull, 0 },
290{ 0x9498,0x31001787, CHIP_FAMILY_RV730,"ATI Radeon HD 4720",kNull, 0 },
291
292{ 0x94B3,0x0D001002, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker, 0 },
293
294{ 0x94B3,0x29001682, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker, 0 },
295
296{ 0x94B3,0x1170174B, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker, 0 },
297
298{ 0x94C1,0x0D021002, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull, 0 },
299{ 0x94C1,0x10021002, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Pro",kNull, 0 },
300
301{ 0x94C1,0x0D021028, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull, 0 },
302
303{ 0x94C1,0x21741458, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull, 0 },
304
305{ 0x94C1,0x10331462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull, 0 },
306{ 0x94C1,0x10401462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull, 0 },
307{ 0x94C1,0x11101462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull, 0 },
308
309{ 0x94C3,0x03421002, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
310
311{ 0x94C3,0x30001025, CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull, 0 },
312
313{ 0x94C3,0x03021028, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
314{ 0x94C3,0x04021028, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
315
316{ 0x94C3,0x216A1458, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
317{ 0x94C3,0x21721458, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
318{ 0x94C3,0x30001458, CHIP_FAMILY_RV610,"ATI Radeon HD 3410",kNull, 0 },
319
320{ 0x94C3,0x10321462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
321{ 0x94C3,0x10411462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull, 0 },
322{ 0x94C3,0x11041462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull, 0 },
323{ 0x94C3,0x11051462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull, 0 },
324{ 0x94C3,0x30001462, CHIP_FAMILY_RV610,"ATI Radeon HD 3410",kNull, 0 },
325
326{ 0x94C3,0x2247148C, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 LE",kNull, 0 },
327{ 0x94C3,0x3000148C, CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull, 0 },
328
329{ 0x94C3,0x30001642, CHIP_FAMILY_RV610,"ATI Radeon HD 3410",kNull, 0 },
330{ 0x94C3,0x37161642, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
331
332{ 0x94C3,0x3000174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull, 0 },
333{ 0x94C3,0xE370174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
334{ 0x94C3,0xE400174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
335
336{ 0x94C3,0x203817AF, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull, 0 },
337
338{ 0x94C3,0x22471787, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 LE",kNull, 0 },
339{ 0x94C3,0x30001787, CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull, 0 },
340
341{ 0x94C3,0x01011A93, CHIP_FAMILY_RV610,"Qimonda Radeon HD 2400 PRO",kNull, 0 },
342
343{ 0x9501,0x25421002, CHIP_FAMILY_RV670,"ATI Radeon HD 3870",kNull, 0 },
344{ 0x9501,0x30001002, CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull, 0 },
345
346{ 0x9501,0x3000174B, CHIP_FAMILY_RV670,"Sapphire Radeon HD 3690",kNull, 0 },
347{ 0x9501,0x4750174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull, 0 },
348
349{ 0x9501,0x30001787, CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull, 0 },
350
351{ 0x9505,0x25421002, CHIP_FAMILY_RV670,"ATI Radeon HD 3850",kNull, 0 },
352{ 0x9505,0x30001002, CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull, 0 },
353
354{ 0x9505,0x30011043, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull, 0 },
355
356{ 0x9505,0x3000148C, CHIP_FAMILY_RV670,"ATI Radeon HD 3850",kNull, 0 },
357{ 0x9505,0x3001148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull, 0 },
358{ 0x9505,0x3002148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull, 0 },
359{ 0x9505,0x3003148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull, 0 },
360{ 0x9505,0x3004148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull, 0 },
361
362{ 0x9505,0x3000174B, CHIP_FAMILY_RV670,"Sapphire Radeon HD 3690",kNull, 0 },
363{ 0x9505,0x3001174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull, 0 },
364{ 0x9505,0x3010174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull, 0 },
365{ 0x9505,0x4730174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull, 0 },
366
367{ 0x9505,0x30001787, CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull, 0 },
368{ 0x9505,0x301017AF, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull, 0 },
369
370{ 0x9540,0x4590174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4590",kNull, 0 },
371
372{ 0x9540,0x30501787, CHIP_FAMILY_RV710,"ATI Radeon HD 4590",kNull, 0 },
373
374{ 0x954F,0x16131462, CHIP_FAMILY_RV710,"ATI Radeon HD 4550",kNull, 0 }, // ErmaC
375{ 0x954F,0x29201682, CHIP_FAMILY_RV710,"ATI Radeon HD 4550",kNull, 0 },
376{ 0x954F,0x29211682, CHIP_FAMILY_RV710,"ATI Radeon HD 4550",kNull, 0 },
377{ 0x954F,0x30901682, CHIP_FAMILY_RV710,"XFX Radeon HD 4570",kNull, 0 },
378
379{ 0x954F,0x30501787, CHIP_FAMILY_RV710,"ATI Radeon HD 4450",kNull, 0 },
380{ 0x954F,0x31001787, CHIP_FAMILY_RV710,"ATI Radeon HD 4520",kNull, 0 },
381
382{ 0x954F,0x3000174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4520",kNull, 0 },
383{ 0x954F,0x4450174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4450",kNull, 0 },
384{ 0x954F,0x4570174B, CHIP_FAMILY_RV710,"Sapphire Radeon HD 4570",kNull, 0 },
385{ 0x954F,0xE990174B, CHIP_FAMILY_RV710,"Sapphire Radeon HD 4350",kNull, 0 },
386
387{ 0x954F,0x301017AF, CHIP_FAMILY_RV710,"ATI Radeon HD 4450",kNull, 0 },
388
389{ 0x9552,0x04341028, CHIP_FAMILY_RV710,"ATI Mobility Radeon 4330",kShrike, 0 },
390
391{ 0x9552,0x308B103C, CHIP_FAMILY_RV710,"ATI Mobility Radeon HD 4300 Series",kShrike, 0 },
392
393{ 0x9552,0x3000148C, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull, 0 },
394
395{ 0x9552,0x3000174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull, 0 },
396
397{ 0x9552,0x30001787, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull, 0 },
398
399{ 0x9552,0x300017AF, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull, 0 },
400
401{ 0x9553,0x18751043, CHIP_FAMILY_RV710,"ATI Mobility Radeon HD 4570",kShrike, 0 },
402{ 0x9553,0x1B321043, CHIP_FAMILY_RV710,"ATI Mobility Radeon HD 4570",kShrike, 0 },
403
404{ 0x9581,0x95811002, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull, 0 },
405
406{ 0x9581,0x3000148C, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull, 0 },
407
408{ 0x9583,0x3000148C, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull, 0 },
409
410{ 0x9588,0x01021A93, CHIP_FAMILY_RV630,"Qimonda Radeon HD 2600 XT",kNull, 0 },
411
412{ 0x9589,0x30001462, CHIP_FAMILY_RV630,"ATI Radeon HD 3610",kNull, 0 },
413
414{ 0x9589,0x0E41174B, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull, 0 },
415
416{ 0x9589,0x30001787, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull, 0 },
417
418{ 0x9589,0x01001A93, CHIP_FAMILY_RV630,"Qimonda Radeon HD 2600 PRO",kNull, 0 },
419
420{ 0x9591,0x2303148C, CHIP_FAMILY_RV635,"ATI Radeon HD 3600 Series",kNull, 0 },
421
422{ 0x9598,0xB3831002, CHIP_FAMILY_RV635,"ATI All-in-Wonder HD",kNull, 0 },
423
424{ 0x9598,0x30001043, CHIP_FAMILY_RV635,"ATI Radeon HD 3730",kNull, 0 },
425{ 0x9598,0x30011043, CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull, 0 },
426
427{ 0x9598,0x3000148C, CHIP_FAMILY_RV635,"ATI Radeon HD 3730",kNull, 0 },
428{ 0x9598,0x3001148C, CHIP_FAMILY_RV635,"ATI Radeon HD 4580",kNull, 0 },
429{ 0x9598,0x3031148C, CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull, 0 },
430
431{ 0x9598,0x30001545, CHIP_FAMILY_RV635,"VisionTek Radeon HD 2600 XT",kNull, 0 },
432{ 0x9598,0x30011545, CHIP_FAMILY_RV635,"VisionTek Radeon HD 2600 Pro",kNull, 0 },
433
434{ 0x9598,0x3000174B, CHIP_FAMILY_RV635,"Sapphire Radeon HD 3730",kNull, 0 },
435{ 0x9598,0x3001174B, CHIP_FAMILY_RV635,"Sapphire Radeon HD 3750",kNull, 0 },
436{ 0x9598,0x4570174B, CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull, 0 },
437{ 0x9598,0x4580174B, CHIP_FAMILY_RV635,"ATI Radeon HD 4580",kNull, 0 },
438{ 0x9598,0x4610174B, CHIP_FAMILY_RV635,"ATI Radeon HD 4610",kNull, 0 },
439
440{ 0x9598,0x300117AF, CHIP_FAMILY_RV635,"ATI Radeon HD 3750",kNull, 0 },
441{ 0x9598,0x301017AF, CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull, 0 },
442{ 0x9598,0x301117AF, CHIP_FAMILY_RV635,"ATI Radeon HD 4580",kNull, 0 },
443
444{ 0x9598,0x30501787, CHIP_FAMILY_RV635,"ATI Radeon HD 4610",kNull, 0 },
445
446{ 0x95C0,0x3000148C, CHIP_FAMILY_RV620,"ATI Radeon HD 3550",kNull, 0 },
447
448{ 0x95C0,0xE3901745, CHIP_FAMILY_RV620,"ATI Radeon HD 3550",kNull, 0 },
449
450{ 0x95C0,0x3000174B, CHIP_FAMILY_RV620,"Sapphire Radeon HD 3550",kNull, 0 },
451{ 0x95C0,0x3002174B, CHIP_FAMILY_RV620,"ATI Radeon HD 3570",kNull, 0 },
452{ 0x95C0,0x3020174B, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull, 0 },
453
454{ 0x95C5,0x3000148C, CHIP_FAMILY_RV620,"ATI Radeon HD 3450",kNull, 0 },
455{ 0x95C5,0x3001148C, CHIP_FAMILY_RV620,"ATI Radeon HD 3550",kNull, 0 },
456{ 0x95C5,0x3002148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4230",kNull, 0 },
457{ 0x95C5,0x3003148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull, 0 },
458{ 0x95C5,0x3032148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull, 0 },
459{ 0x95C5,0x3033148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4230",kNull, 0 },
460
461{ 0x95C5,0x3010174B, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull, 0 },
462{ 0x95C5,0x4250174B, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull, 0 },
463
464{ 0x95C5,0x30501787, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull, 0 },
465
466{ 0x95C5,0x301017AF, CHIP_FAMILY_RV620,"ATI Radeon HD 4230",kNull, 0 },
467
468{ 0x95C5,0x01041A93, CHIP_FAMILY_RV620,"Qimonda Radeon HD 3450",kNull, 0 },
469{ 0x95C5,0x01051A93, CHIP_FAMILY_RV620,"Qimonda Radeon HD 3450",kNull, 0 },
470
471/* Evergreen */
472{ 0x6898,0x0B001002, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kZonalis, 0 },
473
474{ 0x6898,0x032E1043, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kUakari, 0 },
475
476{ 0x6898,0x00D0106B, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kLangur, 0 },
477
478{ 0x6898,0xE140174B, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kUakari, 0 },
479
480{ 0x6898,0x29611682, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kUakari, 0 },
481
482{ 0x6899,0x21E41458, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari, 0 },
483
484{ 0x6899,0xE140174B, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari, 0 },
485
486{ 0x6899,0x200A1787, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari, 0 },
487{ 0x6899,0x22901787, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari, 0 },
488
489{ 0x689C,0x03521043, CHIP_FAMILY_HEMLOCK,"ASUS ARES",kUakari, 0 },
490{ 0x689C,0x039E1043, CHIP_FAMILY_HEMLOCK,"ASUS EAH5870 Series",kUakari, 0 },
491
492{ 0x689C,0x30201682, CHIP_FAMILY_HEMLOCK,"ATI Radeon HD 5970",kUakari, 0 },
493
494{ 0x68A1,0x144D103C,CHIP_FAMILY_CYPRESS,"ATI Mobility Radeon HD 5850",kNomascus, 0 },
495{ 0x68A1,0x1522103C, CHIP_FAMILY_CYPRESS,"ATI Mobility Radeon HD 5850",kHoolock, 0 },
496
497{ 0x68A8,0x050E1025, CHIP_FAMILY_CYPRESS,"AMD Radeon HD 6850M",kUakari, 0 },
498
499{ 0x68B8,0x00CF106B, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kHoolock, 0 },
500
501{ 0x68B8,0x29901682, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 },
502{ 0x68B8,0x29911682, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 },
503
504{ 0x68B8,0x1482174B, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 },
505{ 0x68B8,0xE144174B, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kHoolock, 0 }, // ErmaC
506{ 0x68B8,0xE147174B, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 },
507
508{ 0x68B8,0x21D71458, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 },
509
510{ 0x68B8,0x200A1787, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 }, // ErmaC
511{ 0x68B8,0x200B1787, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 },
512{ 0x68B8,0x22881787, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 },
513
514{ 0x68BF,0x220E1458, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 6750",kVervet, 0 },
515
516{ 0x68C0,0x1594103C, CHIP_FAMILY_REDWOOD,"AMD Radeon HD 6570M",kNull, 0 },
517
518{ 0x68C0,0x392717AA, CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5730",kNull, 0 },
519
520{ 0x68C1,0x033E1025, CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5650",kNull, 0 },
521
522{ 0x68C1,0x9071104D, CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5650",kEulemur, 0 },
523
524{ 0x68C8,0x2306103C, CHIP_FAMILY_REDWOOD,"ATI FirePro V4800 (FireGL)",kNull, 0 },
525
526{ 0x68D8,0x03561043, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kBaboon, 0 },
527
528{ 0x68D8,0x21D91458, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kBaboon, 0 },
529
530{ 0x68D8,0x5690174B, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5690",kNull, 0 },
531{ 0x68D8,0x5730174B, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull, 0 },
532{ 0x68D8,0xE151174B, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kBaboon, 0 },
533
534{ 0x68D8,0x30001787, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull, 0 },
535
536{ 0x68D8,0x301017AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull, 0 },
537{ 0x68D8,0x301117AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5690",kNull, 0 },
538
539{ 0x68D9,0x301017AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull, 0 },
540
541{ 0x68DA,0x5630174B, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull, 0 },
542
543{ 0x68DA,0x30001787, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull, 0 },
544
545{ 0x68DA,0x301017AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull, 0 },
546
547{ 0x68E0,0x04561028, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470M",kEulemur, 0 },
548
549{ 0x68E0,0x1433103C, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470M",kEulemur, 0 },
550
551{ 0x68E1,0x1426103C, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5430M",kEulemur, 0 },
552
553{ 0x68F9,0x5470174B, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull, 0 },
554{ 0x68F9,0x5490174B, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5490",kNull, 0 },
555{ 0x68F9,0x5530174B, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5530",kNull, 0 },
556
557{ 0x68F9,0x20091787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5450",kEulemur, 0 },
558{ 0x68F9,0x22911787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5450",kEulemur, 0 },
559{ 0x68F9,0x23401462, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5450",kEulemur, 0 }, // ErmaC
560{ 0x68F9,0x30001787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull, 0 },
561{ 0x68F9,0x30011787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5530",kNull, 0 },
562{ 0x68F9,0x30021787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5490",kNull, 0 },
563
564{ 0x68F9,0x301117AF, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull, 0 },
565{ 0x68F9,0x301217AF, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5490",kNull, 0 },
566{ 0x68F9,0x301317AF, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull, 0 },
567
568{ 0x68F9,0xE153174B, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5450",kEulemur, 0 }, // ErmaC
569{ 0x68F9,0xE145174B, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5450",kEulemur, 0 }, // ErmaC
570
571/* Northen Islands */
572{ 0x6718,0x0B001002, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6970",kNull, 0 },
573{ 0x6718,0x67181002, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6970",kNull, 0 },
574{ 0x6718,0x31301682, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6970",kNull, 0 },
575
576{ 0x6719,0x0B001002, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6950",kNull, 0 }, // ErmaC
577
578{ 0x6720,0x04BA1028, CHIP_FAMILY_BARTS,"AMD Radeon HD 6970m",kElodea, 0 },
579
580{ 0x6738,0x00D01002, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 },
581{ 0x6738,0x174B174B, CHIP_FAMILY_BARTS,"Sapphire Radeon HD6870",kDuckweed, 0 }, // ErmaC
582{ 0x6738,0x21FA1002, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 },
583{ 0x6738,0x67381002, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 },
584
585{ 0x6738,0x21FA1458, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 },
586
587{ 0x6738,0x31031682, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 },
588{ 0x6738,0x31041682, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 },
589{ 0x6738,0x31071682, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 }, // ErmaC
590{ 0x6738,0x31081682, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 }, // ErmaC
591
592{ 0x6738,0xE178174B, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 },
593
594{ 0x6738,0x20101787, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 },
595{ 0x6738,0x23051787, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 },
596
597{ 0x6739,0x67391002, CHIP_FAMILY_BARTS,"AMD Radeon HD 6850",kDuckweed, 0 },
598{ 0x6739,0x21F81458, CHIP_FAMILY_BARTS,"AMD Radeon HD 6850",kDuckweed, 0 }, // ErmaC ?? kBulrushes ??
599{ 0x6739,0x24411462, CHIP_FAMILY_BARTS,"AMD Radeon HD 6850",kDuckweed, 0 },
600{ 0x6739,0x31101682, CHIP_FAMILY_BARTS,"AMD Radeon HD 6850",kDuckweed, 0 },
601{ 0x6739,0xE177174B, CHIP_FAMILY_BARTS,"AMD Radeon HD 6850",kDuckweed, 0 },
602
603{ 0x6740,0x1657103C, CHIP_FAMILY_TURKS,"AMD Radeon HD 6770M",kNull, 0 },
604{ 0x6740,0x165A103C, CHIP_FAMILY_TURKS,"AMD Radeon HD 6770M",kNull, 0 },
605
606{ 0x6741,0x050E1025, CHIP_FAMILY_TURKS,"AMD Radeon HD 6650M",kNull, 0 },
607{ 0x6741,0x05131025, CHIP_FAMILY_TURKS,"AMD Radeon HD 6650M",kNull, 0 },
608
609{ 0x6741,0x1646103C, CHIP_FAMILY_TURKS,"AMD Radeon HD 6750M",kNull, 0 },
610
611{ 0x6741,0x9080104D, CHIP_FAMILY_TURKS,"AMD Radeon HD 6630M",kNull, 0 },
612
613{ 0x6758,0x67581002, CHIP_FAMILY_TURKS,"AMD Radeon HD 6670",kBulrushes, 0 },
614
615{ 0x6758,0x22051458, CHIP_FAMILY_TURKS,"AMD Radeon HD 6670",kBulrushes, 0 },
616
617{ 0x6758,0xE194174B, CHIP_FAMILY_TURKS,"AMD Radeon HD 6670",kBulrushes, 0 },
618
619{ 0x6758,0x31811682, CHIP_FAMILY_TURKS,"AMD Radeon HD 6670",kBulrushes, 0 },
620{ 0x6758,0x31831682, CHIP_FAMILY_TURKS,"AMD Radeon HD 6670",kBulrushes, 0 },
621
622{ 0x6758,0xE1941746, CHIP_FAMILY_TURKS,"AMD Radeon HD 6670",kBulrushes, 0 },
623
624{ 0x6759,0xE193174B, CHIP_FAMILY_TURKS,"AMD Radeon HD 6570",kNull, 0 },
625
626{ 0x6760,0x04CC1028, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6490M",kNull, 0 },
627
628{ 0x6760,0x1CB21043, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6470M",kNull, 0 },
629
630{ 0x6779,0x64501092, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6450",kBulrushes, 0 },
631
632{ 0x6779,0xE164174B, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6450",kBulrushes, 0 },
633
634/* standard/default models */
635{ 0x9400,0x00000000, CHIP_FAMILY_R600,"ATI Radeon HD 2900 XT",kNull, 0 },
636{ 0x9405,0x00000000, CHIP_FAMILY_R600,"ATI Radeon HD 2900 GT",kNull, 0 },
637
638{ 0x9440,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
639{ 0x9441,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4870 X2",kMotmot, 0 },
640{ 0x9442,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
641{ 0x9443,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4850 X2",kMotmot, 0 },
642{ 0x944C,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
643{ 0x944E,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4700 Series",kMotmot, 0 },
644
645{ 0x9450,0x00000000, CHIP_FAMILY_RV770,"AMD FireStream 9270",kMotmot, 0 },
646{ 0x9452,0x00000000, CHIP_FAMILY_RV770,"AMD FireStream 9250",kMotmot, 0 },
647
648{ 0x9460,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
649{ 0x9462,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
650
651{ 0x9490,0x00000000, CHIP_FAMILY_RV730,"ATI Radeon HD 4600 Series",kFlicker, 0 },
652{ 0x9498,0x00000000, CHIP_FAMILY_RV730,"ATI Radeon HD 4600 Series",kFlicker, 0 },
653
654{ 0x94B3,0x00000000, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker, 0 },
655{ 0x94B4,0x00000000, CHIP_FAMILY_RV740,"ATI Radeon HD 4700 Series",kFlicker, 0 },
656{ 0x94B5,0x00000000, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker, 0 },
657
658{ 0x94C1,0x00000000, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Series",kIago, 0 },
659{ 0x94C3,0x00000000, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Series",kIago, 0 },
660{ 0x94C7,0x00000000, CHIP_FAMILY_RV610,"ATI Radeon HD 2350",kIago, 0 },
661{ 0x94CC,0x00000000, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Series",kIago, 0 },
662
663{ 0x9501,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3800 Series",kMegalodon, 0 },
664{ 0x9505,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3800 Series",kMegalodon, 0 },
665{ 0x9507,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3830",kMegalodon, 0 },
666{ 0x950F,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3870 X2",kMegalodon, 0 },
667
668{ 0x9513,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3850 X2",kMegalodon, 0 },
669{ 0x9519,0x00000000, CHIP_FAMILY_RV670,"AMD FireStream 9170",kMegalodon, 0 },
670
671{ 0x9540,0x00000000, CHIP_FAMILY_RV710,"ATI Radeon HD 4550",kNull, 0 },
672{ 0x954F,0x00000000, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull, 0 },
673
674{ 0x9553,0x00000000, CHIP_FAMILY_RV710,"ATI Mobility Radeon HD 4500/5100 Series",kShrike , 0 },
675
676{ 0x9588,0x00000000, CHIP_FAMILY_RV630,"ATI Radeon HD 2600 XT",kLamna, 0 },
677{ 0x9589,0x00000000, CHIP_FAMILY_RV630,"ATI Radeon HD 2600 PRO",kLamna, 0 },
678{ 0x958A,0x00000000, CHIP_FAMILY_RV630,"ATI Radeon HD 2600 X2 Series",kLamna, 0 },
679
680{ 0x9598,0x00000000, CHIP_FAMILY_RV635,"ATI Radeon HD 3600 Series",kMegalodon, 0 },
681
682{ 0x95C0,0x00000000, CHIP_FAMILY_RV620,"ATI Radeon HD 3400 Series",kIago, 0 },
683{ 0x95C5,0x00000000, CHIP_FAMILY_RV620,"ATI Radeon HD 3400 Series",kIago, 0 },
684
685/* IGP */
686{ 0x9610,0x00000000, CHIP_FAMILY_RS780,"ATI Radeon HD 3200 Graphics",kNull, 0 },
687{ 0x9611,0x00000000, CHIP_FAMILY_RS780,"ATI Radeon 3100 Graphics",kNull, 0 },
688{ 0x9614,0x00000000, CHIP_FAMILY_RS780,"ATI Radeon HD 3300 Graphics",kNull, 0 },
689{ 0x9616,0x00000000, CHIP_FAMILY_RS780,"AMD 760G",kNull, 0 },
690
691{ 0x9710,0x00000000, CHIP_FAMILY_RS880,"ATI Radeon HD 4200",kNull, 0 },
692{ 0x9715,0x00000000, CHIP_FAMILY_RS880,"ATI Radeon HD 4250",kNull, 0 },
693{ 0x9714,0x00000000, CHIP_FAMILY_RS880,"ATI Radeon HD 4290",kNull, 0 },
694
695/* Evergreen */
696{ 0x688D,0x00000000, CHIP_FAMILY_CYPRESS,"AMD FireStream 9350",kUakari, 0 },
697
698{ 0x6898,0x00000000, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5800 Series",kUakari, 0 },
699{ 0x6899,0x00000000, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5800 Series",kUakari, 0 },
700{ 0x689C,0x00000000, CHIP_FAMILY_HEMLOCK,"ATI Radeon HD 5900 Series",kUakari, 0 },
701{ 0x689E,0x00000000, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5800 Series",kUakari, 0 },
702
703{ 0x68B8,0x00000000, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5700 Series",kVervet, 0 },
704{ 0x68B9,0x00000000, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5600 Series",kVervet, 0 },
705{ 0x68BE,0x00000000, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5700 Series",kVervet, 0 },
706
707{ 0x68D8,0x00000000, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5600 Series",kBaboon, 0 },
708{ 0x68D9,0x00000000, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5500 Series",kBaboon, 0 },
709{ 0x68DA,0x00000000, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5500 Series",kBaboon, 0 },
710
711{ 0x68F9,0x00000000, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5400 Series",kNull, 0 },
712
713/* Northen Islands */
714{ 0x6718,0x00000000, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6970 Series",kNull, 0 },
715{ 0x6719,0x00000000, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6950 Series",kNull, 0 },
716
717{ 0x6720,0x00000000, CHIP_FAMILY_BARTS,"AMD Radeon HD 6900M Series",kNull, 0 },
718
719{ 0x6738,0x00000000, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870 Series",kDuckweed, 0 },
720{ 0x6739,0x00000000, CHIP_FAMILY_BARTS,"AMD Radeon HD 6850 Series",kDuckweed, 0 },
721{ 0x673E,0x00000000, CHIP_FAMILY_BARTS,"AMD Radeon HD 6790 Series",kNull, 0 },
722
723{ 0x6740,0x00000000, CHIP_FAMILY_TURKS,"AMD Radeon HD 6700M Series",kNull, 0 },
724{ 0x6741,0x00000000, CHIP_FAMILY_TURKS,"AMD Radeon HD 6600M/6700M Series",kNull, 0 },
725
726{ 0x6758,0x00000000, CHIP_FAMILY_TURKS,"AMD Radeon HD 6670 Series",kBulrushes, 0 },
727{ 0x6759,0x00000000, CHIP_FAMILY_TURKS,"AMD Radeon HD 6500 Series",kNull, 0 },
728
729{ 0x6760,0x00000000, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6400M Series",kNull, 0 },
730{ 0x6761,0x00000000, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6430M Series",kNull, 0 },
731
732{ 0x6770,0x00000000, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6400 Series",kNull, 0 },
733{ 0x6779,0x00000000, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6450 Series",kBulrushes, 0 },
734
735};
736
737typedef struct {
738struct DevPropDevice*device;
739radeon_card_info_t*info;
740pci_dt_t*pci_dev;
741uint8_t*fb;
742uint8_t*mmio;
743uint8_t*io;
744uint8_t*rom;
745uint32_trom_size;
746uint32_tvram_size;
747const char*cfg_name;
748uint8_tports;
749uint32_tflags;
750boolposted;
751} card_t;
752card_t *card;
753
754/* Flags */
755#define MKFLAG(n)(1 << n)
756#define FLAGTRUEMKFLAG(0)
757#define EVERGREENMKFLAG(1)
758
759//static uint8_t atN = 0;
760
761typedef struct {
762type_ttype;
763uint32_tsize;
764uint8_t*data;
765} value_t;
766
767static value_t aty_name;
768static value_t aty_nameparent;
769//static value_t aty_model;
770
771#define DATVAL(x){kPtr, sizeof(x), (uint8_t *)x}
772#define STRVAL(x){kStr, sizeof(x), (uint8_t *)x}
773#define BYTVAL(x){kCst, 1, (uint8_t *)x}
774#define WRDVAL(x){kCst, 2, (uint8_t *)x}
775#define DWRVAL(x){kCst, 4, (uint8_t *)x}
776#define QWRVAL(x){kCst, 8, (uint8_t *)x}
777#define NULVAL{kNul, 0, (uint8_t *)NULL}
778
779bool get_bootdisplay_val(value_t *val);
780bool get_vrammemory_val(value_t *val);
781bool get_name_val(value_t *val);
782bool get_nameparent_val(value_t *val);
783bool get_model_val(value_t *val);
784bool get_conntype_val(value_t *val);
785bool get_vrammemsize_val(value_t *val);
786bool get_binimage_val(value_t *val);
787bool get_romrevision_val(value_t *val);
788bool get_deviceid_val(value_t *val);
789bool get_mclk_val(value_t *val);
790bool get_sclk_val(value_t *val);
791bool get_refclk_val(value_t *val);
792bool get_platforminfo_val(value_t *val);
793bool get_vramtotalsize_val(value_t *val);
794
795typedef struct {
796uint32_tflags;
797boolall_ports;
798char*name;
799bool(*get_value)(value_t *val);
800value_tdefault_val;
801} dev_prop_t;
802
803dev_prop_t ati_devprop_list[] = {
804{FLAGTRUE,false,"@0,AAPL,boot-display",get_bootdisplay_val,NULVAL},
805//{FLAGTRUE,false,"@0,ATY,EFIDisplay",NULL,STRVAL("TMDSA")},
806
807//{FLAGTRUE,true,"@0,AAPL,vram-memory",get_vrammemory_val,NULVAL},
808//{FLAGTRUE,true,"@0,compatible",get_name_val,NULVAL},
809//{FLAGTRUE,true,"@0,connector-type",get_conntype_val,NULVAL},
810//{FLAGTRUE,true,"@0,device_type",NULL,STRVAL("display")},
811//{FLAGTRUE,false,"@0,display-connect-flags", NULL,DWRVAL((uint32_t)0)},
812//{FLAGTRUE,true,"@0,display-type",NULL,STRVAL("NONE")},
813{FLAGTRUE,true,"@0,name",get_name_val,NULVAL},
814//{FLAGTRUE,true,"@0,VRAM,memsize",get_vrammemsize_val,NULVAL},
815
816//{FLAGTRUE,false,"AAPL,aux-power-connected", NULL,DWRVAL((uint32_t)1)},
817//{FLAGTRUE,false,"AAPL,backlight-control",NULL,DWRVAL((uint32_t)0)},
818{FLAGTRUE,false,"ATY,bin_image",get_binimage_val,NULVAL},
819{FLAGTRUE,false,"ATY,Copyright",NULL,STRVAL("Copyright AMD Inc. All Rights Reserved. 2005-2010") },
820{FLAGTRUE,false,"ATY,Card#",get_romrevision_val,NULVAL},
821{FLAGTRUE,false,"ATY,VendorID",NULL,WRDVAL((uint16_t)0x1002)},
822{FLAGTRUE,false,"ATY,DeviceID",get_deviceid_val,NULVAL},
823
824//{FLAGTRUE,false,"ATY,MCLK",get_mclk_val,NULVAL},
825//{FLAGTRUE,false,"ATY,SCLK",get_sclk_val,NULVAL},
826//{FLAGTRUE,false,"ATY,RefCLK",get_refclk_val,DWRVAL((uint32_t)0x0a8c)},
827
828//{FLAGTRUE,false,"ATY,PlatformInfo",get_platforminfo_val,NULVAL},
829
830{FLAGTRUE,false,"name",get_nameparent_val,NULVAL},
831{FLAGTRUE,false,"device_type",get_nameparent_val,NULVAL},
832{FLAGTRUE,false,"model",get_model_val,STRVAL("ATI Radeon")},
833//{FLAGTRUE,false,"VRAM,totalsize",get_vramtotalsize_val,NULVAL},
834
835{FLAGTRUE,false,NULL,NULL,NULVAL}
836};
837
838bool get_bootdisplay_val(value_t *val)
839{
840static uint32_t v = 0;
841
842if (v)
843return false;
844
845if (!card->posted)
846return false;
847
848v = 1;
849val->type = kCst;
850val->size = 4;
851val->data = (uint8_t *)&v;
852
853return true;
854}
855
856bool get_vrammemory_val(value_t *val)
857{
858return false;
859}
860
861bool get_name_val(value_t *val)
862{
863val->type = aty_name.type;
864val->size = aty_name.size;
865val->data = aty_name.data;
866
867return true;
868}
869
870bool get_nameparent_val(value_t *val)
871{
872val->type = aty_nameparent.type;
873val->size = aty_nameparent.size;
874val->data = aty_nameparent.data;
875
876return true;
877}
878
879bool get_model_val(value_t *val)
880{
881if (!card->info->model_name)
882return false;
883
884val->type = kStr;
885val->size = strlen(card->info->model_name) + 1;
886val->data = (uint8_t *)card->info->model_name;
887
888return true;
889}
890
891bool get_conntype_val(value_t *val)
892{
893//Connector types:
894//0x4 : DisplayPort
895//0x400: DL DVI-I
896//0x800: HDMI
897
898return false;
899}
900
901bool get_vrammemsize_val(value_t *val)
902{
903static int idx = -1;
904static uint64_t memsize;
905
906idx++;
907memsize = ((uint64_t)card->vram_size << 32);
908if (idx == 0)
909memsize = memsize | (uint64_t)card->vram_size;
910
911val->type = kCst;
912val->size = 8;
913val->data = (uint8_t *)&memsize;
914
915return true;
916}
917
918bool get_binimage_val(value_t *val)
919{
920if (!card->rom)
921return false;
922
923val->type = kPtr;
924val->size = card->rom_size;
925val->data = card->rom;
926
927return true;
928}
929
930bool get_romrevision_val(value_t *val)
931{
932uint8_t *rev;
933if (!card->rom)
934return false;
935
936rev = card->rom + *(uint8_t *)(card->rom + OFFSET_TO_GET_ATOMBIOS_STRINGS_START);
937
938val->type = kPtr;
939val->size = strlen((char *)rev);
940val->data = malloc(val->size);
941
942if (!val->data)
943return false;
944
945memcpy(val->data, rev, val->size);
946
947return true;
948}
949
950bool get_deviceid_val(value_t *val)
951{
952val->type = kCst;
953val->size = 2;
954val->data = (uint8_t *)&card->pci_dev->device_id;
955
956return true;
957}
958
959bool get_mclk_val(value_t *val)
960{
961return false;
962}
963
964bool get_sclk_val(value_t *val)
965{
966return false;
967}
968
969bool get_refclk_val(value_t *val)
970{
971return false;
972}
973
974bool get_platforminfo_val(value_t *val)
975{
976val->data = malloc(0x80);
977if (!val->data)
978return false;
979
980bzero(val->data, 0x80);
981
982val->type= kPtr;
983val->size= 0x80;
984val->data[0]= 1;
985
986return true;
987}
988
989bool get_vramtotalsize_val(value_t *val)
990{
991val->type = kCst;
992val->size = 4;
993val->data = (uint8_t *)&card->vram_size;
994
995return true;
996}
997
998void free_val(value_t *val)
999{
1000if (val->type == kPtr)
1001free(val->data);
1002
1003bzero(val, sizeof(value_t));
1004}
1005
1006void devprop_add_list(dev_prop_t devprop_list[])
1007{
1008value_t *val = malloc(sizeof(value_t));
1009int i, pnum;
1010
1011for (i = 0; devprop_list[i].name != NULL; i++)
1012{
1013if ((devprop_list[i].flags == FLAGTRUE) || (devprop_list[i].flags | card->flags))
1014{
1015if (devprop_list[i].get_value && devprop_list[i].get_value(val))
1016{
1017devprop_add_value(card->device, devprop_list[i].name, val->data, val->size);
1018free_val(val);
1019
1020if (devprop_list[i].all_ports)
1021{
1022for (pnum = 1; pnum < card->ports; pnum++)
1023{
1024if (devprop_list[i].get_value(val))
1025{
1026devprop_list[i].name[1] = 0x30 + pnum; // convert to ascii
1027devprop_add_value(card->device, devprop_list[i].name, val->data, val->size);
1028free_val(val);
1029}
1030}
1031devprop_list[i].name[1] = 0x30; // write back our "@0," for a next possible card
1032}
1033}
1034else
1035{
1036if (devprop_list[i].default_val.type != kNul)
1037{
1038devprop_add_value(card->device, devprop_list[i].name,
1039devprop_list[i].default_val.type == kCst ?
1040(uint8_t *)&(devprop_list[i].default_val.data) : devprop_list[i].default_val.data,
1041devprop_list[i].default_val.size);
1042}
1043
1044if (devprop_list[i].all_ports)
1045{
1046for (pnum = 1; pnum < card->ports; pnum++)
1047{
1048if (devprop_list[i].default_val.type != kNul)
1049{
1050devprop_list[i].name[1] = 0x30 + pnum; // convert to ascii
1051devprop_add_value(card->device, devprop_list[i].name,
1052devprop_list[i].default_val.type == kCst ?
1053(uint8_t *)&(devprop_list[i].default_val.data) : devprop_list[i].default_val.data,
1054devprop_list[i].default_val.size);
1055}
1056}
1057devprop_list[i].name[1] = 0x30; // write back our "@0," for a next possible card
1058}
1059}
1060}
1061}
1062
1063free(val);
1064}
1065
1066bool validate_rom(option_rom_header_t *rom_header, pci_dt_t *pci_dev)
1067{
1068option_rom_pci_header_t *rom_pci_header;
1069
1070if (rom_header->signature != 0xaa55)
1071return false;
1072
1073rom_pci_header = (option_rom_pci_header_t *)((uint8_t *)rom_header + rom_header->pci_header_offset);
1074
1075if (rom_pci_header->signature != 0x52494350)
1076return false;
1077
1078if (rom_pci_header->vendor_id != pci_dev->vendor_id || rom_pci_header->device_id != pci_dev->device_id)
1079return false;
1080
1081return true;
1082}
1083
1084bool load_vbios_file(const char *key, uint16_t vendor_id, uint16_t device_id, uint32_t subsys_id)
1085{
1086int fd;
1087char file_name[24];
1088bool do_load = false;
1089
1090getBoolForKey(key, &do_load, &bootInfo->chameleonConfig);
1091if (!do_load)
1092return false;
1093
1094sprintf(file_name, "/Extra/%04x_%04x_%08x.rom", vendor_id, device_id, subsys_id);
1095if ((fd = open_bvdev("bt(0,0)", file_name, 0)) < 0)
1096return false;
1097
1098card->rom_size = file_size(fd);
1099card->rom = malloc(card->rom_size);
1100if (!card->rom)
1101return false;
1102
1103read(fd, (char *)card->rom, card->rom_size);
1104
1105if (!validate_rom((option_rom_header_t *)card->rom, card->pci_dev))
1106{
1107card->rom_size = 0;
1108card->rom = 0;
1109return false;
1110}
1111
1112card->rom_size = ((option_rom_header_t *)card->rom)->rom_size * 512;
1113
1114close(fd);
1115
1116return true;
1117}
1118
1119void get_vram_size(void)
1120{
1121chip_family_t chip_family = card->info->chip_family;
1122
1123card->vram_size = 0;
1124
1125if (chip_family >= CHIP_FAMILY_CEDAR)
1126// size in MB on evergreen
1127// XXX watch for overflow!!!
1128card->vram_size = RegRead32(R600_CONFIG_MEMSIZE) * 1024 * 1024;
1129else
1130if (chip_family >= CHIP_FAMILY_R600)
1131card->vram_size = RegRead32(R600_CONFIG_MEMSIZE);
1132}
1133
1134bool read_vbios(bool from_pci)
1135{
1136option_rom_header_t *rom_addr;
1137
1138if (from_pci)
1139{
1140rom_addr = (option_rom_header_t *)(pci_config_read32(card->pci_dev->dev.addr, PCI_ROM_ADDRESS) & ~0x7ff);
1141verbose(" @0x%x", rom_addr);
1142}
1143else
1144rom_addr = (option_rom_header_t *)0xc0000;
1145
1146if (!validate_rom(rom_addr, card->pci_dev))
1147return false;
1148
1149card->rom_size = rom_addr->rom_size * 512;
1150if (!card->rom_size)
1151return false;
1152
1153card->rom = malloc(card->rom_size);
1154if (!card->rom)
1155return false;
1156
1157memcpy(card->rom, (void *)rom_addr, card->rom_size);
1158
1159return true;
1160}
1161
1162bool read_disabled_vbios(void)
1163{
1164bool ret = false;
1165chip_family_t chip_family = card->info->chip_family;
1166
1167if (chip_family >= CHIP_FAMILY_RV770)
1168{
1169uint32_t viph_control= RegRead32(RADEON_VIPH_CONTROL);
1170uint32_t bus_cntl= RegRead32(RADEON_BUS_CNTL);
1171uint32_t d1vga_control= RegRead32(AVIVO_D1VGA_CONTROL);
1172uint32_t d2vga_control= RegRead32(AVIVO_D2VGA_CONTROL);
1173uint32_t vga_render_control = RegRead32(AVIVO_VGA_RENDER_CONTROL);
1174uint32_t rom_cntl= RegRead32(R600_ROM_CNTL);
1175uint32_t cg_spll_func_cntl= 0;
1176uint32_t cg_spll_status;
1177
1178// disable VIP
1179RegWrite32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));
1180
1181// enable the rom
1182RegWrite32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM));
1183
1184// Disable VGA mode
1185RegWrite32(AVIVO_D1VGA_CONTROL, (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));
1186RegWrite32(AVIVO_D2VGA_CONTROL, (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));
1187RegWrite32(AVIVO_VGA_RENDER_CONTROL, (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));
1188
1189if (chip_family == CHIP_FAMILY_RV730)
1190{
1191cg_spll_func_cntl = RegRead32(R600_CG_SPLL_FUNC_CNTL);
1192
1193// enable bypass mode
1194RegWrite32(R600_CG_SPLL_FUNC_CNTL, (cg_spll_func_cntl | R600_SPLL_BYPASS_EN));
1195
1196// wait for SPLL_CHG_STATUS to change to 1
1197cg_spll_status = 0;
1198while (!(cg_spll_status & R600_SPLL_CHG_STATUS))
1199cg_spll_status = RegRead32(R600_CG_SPLL_STATUS);
1200
1201RegWrite32(R600_ROM_CNTL, (rom_cntl & ~R600_SCK_OVERWRITE));
1202}
1203else
1204RegWrite32(R600_ROM_CNTL, (rom_cntl | R600_SCK_OVERWRITE));
1205
1206ret = read_vbios(true);
1207
1208// restore regs
1209if (chip_family == CHIP_FAMILY_RV730)
1210{
1211RegWrite32(R600_CG_SPLL_FUNC_CNTL, cg_spll_func_cntl);
1212
1213// wait for SPLL_CHG_STATUS to change to 1
1214cg_spll_status = 0;
1215while (!(cg_spll_status & R600_SPLL_CHG_STATUS))
1216cg_spll_status = RegRead32(R600_CG_SPLL_STATUS);
1217}
1218RegWrite32(RADEON_VIPH_CONTROL, viph_control);
1219RegWrite32(RADEON_BUS_CNTL, bus_cntl);
1220RegWrite32(AVIVO_D1VGA_CONTROL, d1vga_control);
1221RegWrite32(AVIVO_D2VGA_CONTROL, d2vga_control);
1222RegWrite32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);
1223RegWrite32(R600_ROM_CNTL, rom_cntl);
1224}
1225else
1226if (chip_family >= CHIP_FAMILY_R600)
1227{
1228uint32_t viph_control= RegRead32(RADEON_VIPH_CONTROL);
1229uint32_t bus_cntl= RegRead32(RADEON_BUS_CNTL);
1230uint32_t d1vga_control= RegRead32(AVIVO_D1VGA_CONTROL);
1231uint32_t d2vga_control= RegRead32(AVIVO_D2VGA_CONTROL);
1232uint32_t vga_render_control= RegRead32(AVIVO_VGA_RENDER_CONTROL);
1233uint32_t rom_cntl= RegRead32(R600_ROM_CNTL);
1234uint32_t general_pwrmgt= RegRead32(R600_GENERAL_PWRMGT);
1235uint32_t low_vid_lower_gpio_cntl= RegRead32(R600_LOW_VID_LOWER_GPIO_CNTL);
1236uint32_t medium_vid_lower_gpio_cntl = RegRead32(R600_MEDIUM_VID_LOWER_GPIO_CNTL);
1237uint32_t high_vid_lower_gpio_cntl= RegRead32(R600_HIGH_VID_LOWER_GPIO_CNTL);
1238uint32_t ctxsw_vid_lower_gpio_cntl= RegRead32(R600_CTXSW_VID_LOWER_GPIO_CNTL);
1239uint32_t lower_gpio_enable= RegRead32(R600_LOWER_GPIO_ENABLE);
1240
1241// disable VIP
1242RegWrite32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));
1243
1244// enable the rom
1245RegWrite32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM));
1246
1247// Disable VGA mode
1248RegWrite32(AVIVO_D1VGA_CONTROL, (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));
1249RegWrite32(AVIVO_D2VGA_CONTROL, (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));
1250RegWrite32(AVIVO_VGA_RENDER_CONTROL, (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));
1251RegWrite32(R600_ROM_CNTL, ((rom_cntl & ~R600_SCK_PRESCALE_CRYSTAL_CLK_MASK) | (1 << R600_SCK_PRESCALE_CRYSTAL_CLK_SHIFT) | R600_SCK_OVERWRITE));
1252RegWrite32(R600_GENERAL_PWRMGT, (general_pwrmgt & ~R600_OPEN_DRAIN_PADS));
1253RegWrite32(R600_LOW_VID_LOWER_GPIO_CNTL, (low_vid_lower_gpio_cntl & ~0x400));
1254RegWrite32(R600_MEDIUM_VID_LOWER_GPIO_CNTL, (medium_vid_lower_gpio_cntl & ~0x400));
1255RegWrite32(R600_HIGH_VID_LOWER_GPIO_CNTL, (high_vid_lower_gpio_cntl & ~0x400));
1256RegWrite32(R600_CTXSW_VID_LOWER_GPIO_CNTL, (ctxsw_vid_lower_gpio_cntl & ~0x400));
1257RegWrite32(R600_LOWER_GPIO_ENABLE, (lower_gpio_enable | 0x400));
1258
1259ret = read_vbios(true);
1260
1261// restore regs
1262RegWrite32(RADEON_VIPH_CONTROL, viph_control);
1263RegWrite32(RADEON_BUS_CNTL, bus_cntl);
1264RegWrite32(AVIVO_D1VGA_CONTROL, d1vga_control);
1265RegWrite32(AVIVO_D2VGA_CONTROL, d2vga_control);
1266RegWrite32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);
1267RegWrite32(R600_ROM_CNTL, rom_cntl);
1268RegWrite32(R600_GENERAL_PWRMGT, general_pwrmgt);
1269RegWrite32(R600_LOW_VID_LOWER_GPIO_CNTL, low_vid_lower_gpio_cntl);
1270RegWrite32(R600_MEDIUM_VID_LOWER_GPIO_CNTL, medium_vid_lower_gpio_cntl);
1271RegWrite32(R600_HIGH_VID_LOWER_GPIO_CNTL, high_vid_lower_gpio_cntl);
1272RegWrite32(R600_CTXSW_VID_LOWER_GPIO_CNTL, ctxsw_vid_lower_gpio_cntl);
1273RegWrite32(R600_LOWER_GPIO_ENABLE, lower_gpio_enable);
1274}
1275
1276return ret;
1277}
1278
1279bool radeon_card_posted(void)
1280{
1281uint32_t reg;
1282
1283// first check CRTCs
1284reg = RegRead32(RADEON_CRTC_GEN_CNTL) | RegRead32(RADEON_CRTC2_GEN_CNTL);
1285if (reg & RADEON_CRTC_EN)
1286return true;
1287
1288// then check MEM_SIZE, in case something turned the crtcs off
1289reg = RegRead32(R600_CONFIG_MEMSIZE);
1290if (reg)
1291return true;
1292
1293return false;
1294}
1295
1296#if 0
1297bool devprop_add_pci_config_space(void)
1298{
1299int offset;
1300
1301uint8_t *config_space = malloc(0x100);
1302if (!config_space)
1303return false;
1304
1305for (offset = 0; offset < 0x100; offset += 4)
1306config_space[offset / 4] = pci_config_read32(card->pci_dev->dev.addr, offset);
1307
1308devprop_add_value(card->device, "ATY,PCIConfigSpace", config_space, 0x100);
1309free(config_space);
1310
1311return true;
1312}
1313#endif
1314
1315static bool init_card(pci_dt_t *pci_dev)
1316{
1317booladd_vbios = true;
1318charname[24];
1319charname_parent[24];
1320inti;
1321intn_ports = 0;
1322
1323card = malloc(sizeof(card_t));
1324if (!card)
1325return false;
1326bzero(card, sizeof(card_t));
1327
1328card->pci_dev = pci_dev;
1329
1330for (i = 0; radeon_cards[i].device_id ; i++)
1331{
1332if (radeon_cards[i].device_id == pci_dev->device_id)
1333{
1334card->info = &radeon_cards[i];
1335if ((radeon_cards[i].subsys_id == 0x00000000) ||
1336(radeon_cards[i].subsys_id == pci_dev->subsys_id.subsys_id))
1337break;
1338}
1339}
1340
1341if (!card->info->device_id || !card->info->cfg_name)
1342{
1343printf("Unsupported card!\n");
1344return false;
1345}
1346
1347card->fb= (uint8_t *)(pci_config_read32(pci_dev->dev.addr, PCI_BASE_ADDRESS_0) & ~0x0f);
1348card->mmio= (uint8_t *)(pci_config_read32(pci_dev->dev.addr, PCI_BASE_ADDRESS_2) & ~0x0f);
1349card->io= (uint8_t *)(pci_config_read32(pci_dev->dev.addr, PCI_BASE_ADDRESS_4) & ~0x03);
1350
1351verbose("Framebuffer @0x%08X MMIO @0x%08XI/O Port @0x%08X ROM Addr @0x%08X\n",
1352card->fb, card->mmio, card->io, pci_config_read32(pci_dev->dev.addr, PCI_ROM_ADDRESS));
1353
1354card->posted = radeon_card_posted();
1355verbose("ATI card %s, ", card->posted ? "POSTed" : "non-POSTed");
1356
1357get_vram_size();
1358
1359getBoolForKey(kATYbinimage, &add_vbios, &bootInfo->chameleonConfig);
1360
1361if (add_vbios)
1362{
1363if (!load_vbios_file(kUseAtiROM, pci_dev->vendor_id, pci_dev->device_id, pci_dev->subsys_id.subsys_id))
1364{
1365verbose("reading VBIOS from %s", card->posted ? "legacy space" : "PCI ROM");
1366if (card->posted)
1367read_vbios(false);
1368else
1369read_disabled_vbios();
1370verbose("\n");
1371}
1372}
1373
1374//card->ports = 2; // default - Azi: default is card_configs
1375
1376if (card->info->chip_family >= CHIP_FAMILY_CEDAR)
1377{
1378card->flags |= EVERGREEN;
1379//card->ports = 3; //Azi: use the AtiPorts key if needed
1380}
1381
1382//atN = 0;
1383
1384// Check AtiConfig key for a framebuffer name,
1385card->cfg_name = getStringForKey(kAtiConfig, &bootInfo->chameleonConfig);
1386// if none,
1387if (!card->cfg_name)
1388{
1389// use cfg_name on radeon_cards, to retrive the default name from card_configs,
1390card->cfg_name = card_configs[card->info->cfg_name].name;
1391// and leave ports alone!
1392//card->ports = card_configs[card->info->cfg_name].ports;
1393
1394// which means one of the fb's or kNull
1395verbose("Framebuffer set to device's default: %s\n", card->cfg_name);
1396}
1397else
1398{
1399// else, use the fb name returned by AtiConfig.
1400verbose("(AtiConfig) Framebuffer set to: %s\n", card->cfg_name);
1401}
1402
1403// Check AtiPorts key for nr of ports,
1404card->ports = getIntForKey(kAtiPorts, &n_ports, &bootInfo->chameleonConfig);
1405// if a value bigger than 0 ?? is found, (do we need >= 0 ?? that's null FB on card_configs)
1406if (n_ports > 0)
1407{
1408card->ports = n_ports; // use it.
1409verbose("(AtiPorts) Nr of ports set to: %d\n", card->ports);
1410 }
1411else// if (card->cfg_name > 0) // do we want 0 ports if fb is kNull or mistyped ?
1412{
1413// use max_ports value on radeon_cards
1414card->ports = card->info->max_ports;
1415// if max_ports value is 0
1416if (card->ports <= 0)
1417{
1418// match cfg_name with card_configs list and retrive default nr of ports.
1419for (i = 0; i < kCfgEnd; i++)
1420{
1421if (strcmp(card->cfg_name, card_configs[i].name) == 0)
1422card->ports = card_configs[i].ports; // default
1423}
1424verbose("Nr of ports set to framebuffer's default: %d\n", card->ports);
1425}
1426else
1427{
1428verbose("Nr of ports set to card's ?? max: %d\n", card->ports);
1429}
1430}
1431//else
1432//card->ports = 2/1 ?; // set a min if 0 ports ?
1433//verbose("Nr of ports set to min: %d\n", card->ports);
1434
1435sprintf(name, "ATY,%s", card->cfg_name);
1436aty_name.type = kStr;
1437aty_name.size = strlen(name) + 1;
1438aty_name.data = (uint8_t *)name;
1439
1440sprintf(name_parent, "ATY,%sParent", card->cfg_name);
1441aty_nameparent.type = kStr;
1442aty_nameparent.size = strlen(name_parent) + 1;
1443aty_nameparent.data = (uint8_t *)name_parent;
1444
1445return true;
1446}
1447
1448bool setup_ati_devprop(pci_dt_t *ati_dev)
1449{
1450char *devicepath;
1451
1452if (!init_card(ati_dev))
1453return false;
1454
1455// -------------------------------------------------
1456// Find a better way to do this (in device_inject.c)
1457if (!string)
1458string = devprop_create_string();
1459
1460devicepath = get_pci_dev_path(ati_dev);
1461card->device = devprop_add_device(string, devicepath);
1462if (!card->device)
1463return false;
1464// -------------------------------------------------
1465
1466#if 0
1467uint64_t fb= (uint32_t)card->fb;
1468uint64_t mmio= (uint32_t)card->mmio;
1469uint64_t io= (uint32_t)card->io;
1470devprop_add_value(card->device, "ATY,FrameBufferOffset", &fb, 8);
1471devprop_add_value(card->device, "ATY,RegisterSpaceOffset", &mmio, 8);
1472devprop_add_value(card->device, "ATY,IOSpaceOffset", &io, 8);
1473#endif
1474
1475devprop_add_list(ati_devprop_list);
1476
1477// -------------------------------------------------
1478// Find a better way to do this (in device_inject.c)
1479//Azi: XXX tried to fix a malloc error in vain; this is related to XCode 4 compilation!
1480stringdata = malloc(sizeof(uint8_t) * string->length);
1481memcpy(stringdata, (uint8_t*)devprop_generate_string(string), string->length);
1482stringlength = string->length;
1483// -------------------------------------------------
1484
1485verbose("ATI %s %s %dMB (%s) [%04x:%04x] (subsys [%04x:%04x]):: %s\n",
1486chip_family_name[card->info->chip_family], card->info->model_name,
1487(uint32_t)(card->vram_size / (1024 * 1024)), card->cfg_name,
1488ati_dev->vendor_id, ati_dev->device_id,
1489ati_dev->subsys_id.subsys.vendor_id, ati_dev->subsys_id.subsys.device_id,
1490devicepath);
1491
1492free(card);
1493
1494return true;
1495}
1496

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